1 /*- 2 * Copyright (c) 2010 Nathan Whitehorn 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/bus.h> 34 #include <sys/pcpu.h> 35 #include <sys/proc.h> 36 #include <sys/reboot.h> 37 #include <sys/smp.h> 38 39 #include <vm/vm.h> 40 #include <vm/pmap.h> 41 42 #include <machine/bus.h> 43 #include <machine/cpu.h> 44 #include <machine/hid.h> 45 #include <machine/platform.h> 46 #include <machine/platformvar.h> 47 #include <machine/pmap.h> 48 #include <machine/smp.h> 49 #include <machine/spr.h> 50 #include <machine/vmparam.h> 51 52 #include "platform_if.h" 53 #include "ps3-hvcall.h" 54 55 #ifdef SMP 56 extern void *ap_pcpu; 57 #endif 58 59 static int ps3_probe(platform_t); 60 static int ps3_attach(platform_t); 61 static void ps3_mem_regions(platform_t, struct mem_region **phys, int *physsz, 62 struct mem_region **avail, int *availsz); 63 static vm_offset_t ps3_real_maxaddr(platform_t); 64 static u_long ps3_timebase_freq(platform_t, struct cpuref *cpuref); 65 #ifdef SMP 66 static int ps3_smp_first_cpu(platform_t, struct cpuref *cpuref); 67 static int ps3_smp_next_cpu(platform_t, struct cpuref *cpuref); 68 static int ps3_smp_get_bsp(platform_t, struct cpuref *cpuref); 69 static int ps3_smp_start_cpu(platform_t, struct pcpu *cpu); 70 static struct cpu_group *ps3_smp_topo(platform_t); 71 #endif 72 static void ps3_reset(platform_t); 73 static void ps3_cpu_idle(void); 74 75 static platform_method_t ps3_methods[] = { 76 PLATFORMMETHOD(platform_probe, ps3_probe), 77 PLATFORMMETHOD(platform_attach, ps3_attach), 78 PLATFORMMETHOD(platform_mem_regions, ps3_mem_regions), 79 PLATFORMMETHOD(platform_real_maxaddr, ps3_real_maxaddr), 80 PLATFORMMETHOD(platform_timebase_freq, ps3_timebase_freq), 81 82 #ifdef SMP 83 PLATFORMMETHOD(platform_smp_first_cpu, ps3_smp_first_cpu), 84 PLATFORMMETHOD(platform_smp_next_cpu, ps3_smp_next_cpu), 85 PLATFORMMETHOD(platform_smp_get_bsp, ps3_smp_get_bsp), 86 PLATFORMMETHOD(platform_smp_start_cpu, ps3_smp_start_cpu), 87 PLATFORMMETHOD(platform_smp_topo, ps3_smp_topo), 88 #endif 89 90 PLATFORMMETHOD(platform_reset, ps3_reset), 91 92 { 0, 0 } 93 }; 94 95 static platform_def_t ps3_platform = { 96 "ps3", 97 ps3_methods, 98 0 99 }; 100 101 PLATFORM_DEF(ps3_platform); 102 103 static int 104 ps3_probe(platform_t plat) 105 { 106 107 return (BUS_PROBE_NOWILDCARD); 108 } 109 110 #define MEM_REGIONS 2 111 static struct mem_region avail_regions[MEM_REGIONS]; 112 113 static int 114 ps3_attach(platform_t plat) 115 { 116 uint64_t lpar_id, junk, ppe_id; 117 118 /* Get real mode memory region */ 119 avail_regions[0].mr_start = 0; 120 lv1_get_logical_partition_id(&lpar_id); 121 lv1_get_logical_ppe_id(&ppe_id); 122 lv1_get_repository_node_value(lpar_id, 123 lv1_repository_string("bi") >> 32, lv1_repository_string("pu"), 124 ppe_id, lv1_repository_string("rm_size"), 125 &avail_regions[0].mr_size, &junk); 126 127 /* Now get extended memory region */ 128 lv1_get_repository_node_value(lpar_id, 129 lv1_repository_string("bi") >> 32, 130 lv1_repository_string("rgntotal"), 0, 0, 131 &avail_regions[1].mr_size, &junk); 132 133 /* Convert to maximum amount we can allocate in 16 MB pages */ 134 avail_regions[1].mr_size -= avail_regions[0].mr_size; 135 avail_regions[1].mr_size -= avail_regions[1].mr_size % (16*1024*1024); 136 137 lv1_allocate_memory(avail_regions[1].mr_size, 24 /* 16 MB pages */, 138 0, 0x04 /* any address */, &avail_regions[1].mr_start, &junk); 139 140 pmap_mmu_install("mmu_ps3", BUS_PROBE_SPECIFIC); 141 cpu_idle_hook = ps3_cpu_idle; 142 143 /* Set a breakpoint to make NULL an invalid address */ 144 lv1_set_dabr(0x7 /* read and write, MMU on */, 2 /* kernel accesses */); 145 146 return (0); 147 } 148 149 void 150 ps3_mem_regions(platform_t plat, struct mem_region **phys, int *physsz, 151 struct mem_region **avail, int *availsz) 152 { 153 154 *phys = *avail = avail_regions; 155 *physsz = *availsz = MEM_REGIONS; 156 } 157 158 static u_long 159 ps3_timebase_freq(platform_t plat, struct cpuref *cpuref) 160 { 161 uint64_t ticks, node_id, junk; 162 163 lv1_get_repository_node_value(PS3_LPAR_ID_PME, 164 lv1_repository_string("be") >> 32, 0, 0, 0, &node_id, &junk); 165 lv1_get_repository_node_value(PS3_LPAR_ID_PME, 166 lv1_repository_string("be") >> 32, node_id, 167 lv1_repository_string("clock"), 0, &ticks, &junk); 168 169 return (ticks); 170 } 171 172 #ifdef SMP 173 static int 174 ps3_smp_first_cpu(platform_t plat, struct cpuref *cpuref) 175 { 176 177 cpuref->cr_cpuid = 0; 178 cpuref->cr_hwref = cpuref->cr_cpuid; 179 180 return (0); 181 } 182 183 static int 184 ps3_smp_next_cpu(platform_t plat, struct cpuref *cpuref) 185 { 186 187 if (cpuref->cr_cpuid >= 1) 188 return (ENOENT); 189 190 cpuref->cr_cpuid++; 191 cpuref->cr_hwref = cpuref->cr_cpuid; 192 193 return (0); 194 } 195 196 static int 197 ps3_smp_get_bsp(platform_t plat, struct cpuref *cpuref) 198 { 199 200 cpuref->cr_cpuid = 0; 201 cpuref->cr_hwref = cpuref->cr_cpuid; 202 203 return (0); 204 } 205 206 static int 207 ps3_smp_start_cpu(platform_t plat, struct pcpu *pc) 208 { 209 /* loader(8) is spinning on 0x40 == 0 right now */ 210 uint32_t *secondary_spin_sem = (uint32_t *)(0x40); 211 int timeout; 212 213 if (pc->pc_hwref != 1) 214 return (ENXIO); 215 216 ap_pcpu = pc; 217 *secondary_spin_sem = 1; 218 powerpc_sync(); 219 DELAY(1); 220 221 timeout = 10000; 222 while (!pc->pc_awake && timeout--) 223 DELAY(100); 224 225 return ((pc->pc_awake) ? 0 : EBUSY); 226 } 227 228 static struct cpu_group * 229 ps3_smp_topo(platform_t plat) 230 { 231 return (smp_topo_1level(CG_SHARE_L1, 2, CG_FLAG_SMT)); 232 } 233 #endif 234 235 static void 236 ps3_reset(platform_t plat) 237 { 238 lv1_panic(1); 239 } 240 241 static vm_offset_t 242 ps3_real_maxaddr(platform_t plat) 243 { 244 return (avail_regions[0].mr_start + avail_regions[0].mr_size); 245 } 246 247 static void 248 ps3_cpu_idle(void) 249 { 250 static volatile int pausing = 0; 251 252 /* 253 * XXX: It appears that the PS3 can livelock if both threads 254 * call lv1_pause(0) simultaneously. 255 */ 256 if (!atomic_cmpset_int(&pausing, 0, 1)) 257 return; 258 259 lv1_pause(0); 260 pausing = 0; 261 } 262 263