17a8d25c0SNathan Whitehorn /*-
24d846d26SWarner Losh * SPDX-License-Identifier: BSD-2-Clause
371e3c308SPedro F. Giffuni *
47a8d25c0SNathan Whitehorn * Copyright (c) 2013, Nathan Whitehorn <nwhitehorn@FreeBSD.org>
57a8d25c0SNathan Whitehorn * All rights reserved.
67a8d25c0SNathan Whitehorn *
77a8d25c0SNathan Whitehorn * Redistribution and use in source and binary forms, with or without
87a8d25c0SNathan Whitehorn * modification, are permitted provided that the following conditions
97a8d25c0SNathan Whitehorn * are met:
107a8d25c0SNathan Whitehorn * 1. Redistributions of source code must retain the above copyright
117a8d25c0SNathan Whitehorn * notice unmodified, this list of conditions, and the following
127a8d25c0SNathan Whitehorn * disclaimer.
137a8d25c0SNathan Whitehorn * 2. Redistributions in binary form must reproduce the above copyright
147a8d25c0SNathan Whitehorn * notice, this list of conditions and the following disclaimer in the
157a8d25c0SNathan Whitehorn * documentation and/or other materials provided with the distribution.
167a8d25c0SNathan Whitehorn *
177a8d25c0SNathan Whitehorn * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
187a8d25c0SNathan Whitehorn * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
197a8d25c0SNathan Whitehorn * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
207a8d25c0SNathan Whitehorn * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
217a8d25c0SNathan Whitehorn * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
227a8d25c0SNathan Whitehorn * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
237a8d25c0SNathan Whitehorn * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
247a8d25c0SNathan Whitehorn * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
257a8d25c0SNathan Whitehorn * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
267a8d25c0SNathan Whitehorn * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
277a8d25c0SNathan Whitehorn */
287a8d25c0SNathan Whitehorn
297a8d25c0SNathan Whitehorn #include <sys/param.h>
307a8d25c0SNathan Whitehorn #include <sys/bus.h>
317a8d25c0SNathan Whitehorn #include <sys/kernel.h>
327a8d25c0SNathan Whitehorn #include <sys/libkern.h>
337a8d25c0SNathan Whitehorn #include <sys/module.h>
347a8d25c0SNathan Whitehorn #include <sys/vmem.h>
357a8d25c0SNathan Whitehorn
367a8d25c0SNathan Whitehorn #include <dev/ofw/ofw_bus.h>
377a8d25c0SNathan Whitehorn #include <dev/ofw/ofw_bus_subr.h>
387a8d25c0SNathan Whitehorn #include <dev/ofw/openfirm.h>
397a8d25c0SNathan Whitehorn
407a8d25c0SNathan Whitehorn #include <machine/bus.h>
417a8d25c0SNathan Whitehorn
427a8d25c0SNathan Whitehorn #include <powerpc/pseries/phyp-hvcall.h>
437a8d25c0SNathan Whitehorn #include <powerpc/pseries/plpar_iommu.h>
447a8d25c0SNathan Whitehorn
457a8d25c0SNathan Whitehorn MALLOC_DEFINE(M_PHYPIOMMU, "iommu", "IOMMU data for PAPR LPARs");
467a8d25c0SNathan Whitehorn
477a8d25c0SNathan Whitehorn struct papr_iommu_map {
487a8d25c0SNathan Whitehorn uint32_t iobn;
497a8d25c0SNathan Whitehorn vmem_t *vmem;
507a8d25c0SNathan Whitehorn struct papr_iommu_map *next;
517a8d25c0SNathan Whitehorn };
527a8d25c0SNathan Whitehorn
537a8d25c0SNathan Whitehorn static SLIST_HEAD(iommu_maps, iommu_map) iommu_map_head =
547a8d25c0SNathan Whitehorn SLIST_HEAD_INITIALIZER(iommu_map_head);
557a8d25c0SNathan Whitehorn static int papr_supports_stuff_tce = -1;
567a8d25c0SNathan Whitehorn
577a8d25c0SNathan Whitehorn struct iommu_map {
587a8d25c0SNathan Whitehorn uint32_t iobn;
597a8d25c0SNathan Whitehorn vmem_t *vmem;
607a8d25c0SNathan Whitehorn
617a8d25c0SNathan Whitehorn SLIST_ENTRY(iommu_map) entries;
627a8d25c0SNathan Whitehorn };
637a8d25c0SNathan Whitehorn
647a8d25c0SNathan Whitehorn struct dma_window {
657a8d25c0SNathan Whitehorn struct iommu_map *map;
667a8d25c0SNathan Whitehorn bus_addr_t start;
677a8d25c0SNathan Whitehorn bus_addr_t end;
687a8d25c0SNathan Whitehorn };
697a8d25c0SNathan Whitehorn
707a8d25c0SNathan Whitehorn int
phyp_iommu_set_dma_tag(device_t bus,device_t dev,bus_dma_tag_t tag)71453319bfSNathan Whitehorn phyp_iommu_set_dma_tag(device_t bus, device_t dev, bus_dma_tag_t tag)
727a8d25c0SNathan Whitehorn {
737a8d25c0SNathan Whitehorn device_t p;
747a8d25c0SNathan Whitehorn phandle_t node;
75e941e1e9SNathan Whitehorn cell_t dma_acells, dma_scells, dmawindow[6];
767a8d25c0SNathan Whitehorn struct iommu_map *i;
77e941e1e9SNathan Whitehorn int cell;
787a8d25c0SNathan Whitehorn
79453319bfSNathan Whitehorn for (p = dev; device_get_parent(p) != NULL; p = device_get_parent(p)) {
807a8d25c0SNathan Whitehorn if (ofw_bus_has_prop(p, "ibm,my-dma-window"))
817a8d25c0SNathan Whitehorn break;
827a8d25c0SNathan Whitehorn if (ofw_bus_has_prop(p, "ibm,dma-window"))
837a8d25c0SNathan Whitehorn break;
847a8d25c0SNathan Whitehorn }
857a8d25c0SNathan Whitehorn
867a8d25c0SNathan Whitehorn if (p == NULL)
877a8d25c0SNathan Whitehorn return (ENXIO);
887a8d25c0SNathan Whitehorn
897a8d25c0SNathan Whitehorn node = ofw_bus_get_node(p);
90509142e1SNathan Whitehorn if (OF_getencprop(node, "ibm,#dma-size-cells", &dma_scells,
917a8d25c0SNathan Whitehorn sizeof(cell_t)) <= 0)
92509142e1SNathan Whitehorn OF_searchencprop(node, "#size-cells", &dma_scells,
93509142e1SNathan Whitehorn sizeof(cell_t));
94509142e1SNathan Whitehorn if (OF_getencprop(node, "ibm,#dma-address-cells", &dma_acells,
957a8d25c0SNathan Whitehorn sizeof(cell_t)) <= 0)
96509142e1SNathan Whitehorn OF_searchencprop(node, "#address-cells", &dma_acells,
977a8d25c0SNathan Whitehorn sizeof(cell_t));
987a8d25c0SNathan Whitehorn
997a8d25c0SNathan Whitehorn if (ofw_bus_has_prop(p, "ibm,my-dma-window"))
100509142e1SNathan Whitehorn OF_getencprop(node, "ibm,my-dma-window", dmawindow,
1017a8d25c0SNathan Whitehorn sizeof(cell_t)*(dma_scells + dma_acells + 1));
1027a8d25c0SNathan Whitehorn else
103509142e1SNathan Whitehorn OF_getencprop(node, "ibm,dma-window", dmawindow,
1047a8d25c0SNathan Whitehorn sizeof(cell_t)*(dma_scells + dma_acells + 1));
1057a8d25c0SNathan Whitehorn
1067a8d25c0SNathan Whitehorn struct dma_window *window = malloc(sizeof(struct dma_window),
1077a8d25c0SNathan Whitehorn M_PHYPIOMMU, M_WAITOK);
108e941e1e9SNathan Whitehorn window->start = 0;
109e941e1e9SNathan Whitehorn for (cell = 1; cell < 1 + dma_acells; cell++) {
110e941e1e9SNathan Whitehorn window->start <<= 32;
111e941e1e9SNathan Whitehorn window->start |= dmawindow[cell];
112e941e1e9SNathan Whitehorn }
113e941e1e9SNathan Whitehorn window->end = 0;
114e941e1e9SNathan Whitehorn for (; cell < 1 + dma_acells + dma_scells; cell++) {
115e941e1e9SNathan Whitehorn window->end <<= 32;
116e941e1e9SNathan Whitehorn window->end |= dmawindow[cell];
117e941e1e9SNathan Whitehorn }
118e941e1e9SNathan Whitehorn window->end += window->start;
1197a8d25c0SNathan Whitehorn
120acf9bb33SNathan Whitehorn if (bootverbose)
121acf9bb33SNathan Whitehorn device_printf(dev, "Mapping IOMMU domain %#x\n", dmawindow[0]);
1227a8d25c0SNathan Whitehorn window->map = NULL;
1237a8d25c0SNathan Whitehorn SLIST_FOREACH(i, &iommu_map_head, entries) {
1247a8d25c0SNathan Whitehorn if (i->iobn == dmawindow[0]) {
1257a8d25c0SNathan Whitehorn window->map = i;
1267a8d25c0SNathan Whitehorn break;
1277a8d25c0SNathan Whitehorn }
1287a8d25c0SNathan Whitehorn }
1297a8d25c0SNathan Whitehorn
1307a8d25c0SNathan Whitehorn if (window->map == NULL) {
1317a8d25c0SNathan Whitehorn window->map = malloc(sizeof(struct iommu_map), M_PHYPIOMMU,
1327a8d25c0SNathan Whitehorn M_WAITOK);
1337a8d25c0SNathan Whitehorn window->map->iobn = dmawindow[0];
1347a8d25c0SNathan Whitehorn /*
1357a8d25c0SNathan Whitehorn * Allocate IOMMU range beginning at PAGE_SIZE. Some drivers
1367a8d25c0SNathan Whitehorn * (em(4), for example) do not like getting mappings at 0.
1377a8d25c0SNathan Whitehorn */
1387a8d25c0SNathan Whitehorn window->map->vmem = vmem_create("IOMMU mappings", PAGE_SIZE,
1397a8d25c0SNathan Whitehorn trunc_page(VMEM_ADDR_MAX) - PAGE_SIZE, PAGE_SIZE, 0,
1407a8d25c0SNathan Whitehorn M_BESTFIT | M_NOWAIT);
141acf9bb33SNathan Whitehorn SLIST_INSERT_HEAD(&iommu_map_head, window->map, entries);
1427a8d25c0SNathan Whitehorn }
1437a8d25c0SNathan Whitehorn
1447a8d25c0SNathan Whitehorn /*
1457a8d25c0SNathan Whitehorn * Check experimentally whether we can use H_STUFF_TCE. It is required
1467a8d25c0SNathan Whitehorn * by the spec but some firmware (e.g. QEMU) does not actually support
1477a8d25c0SNathan Whitehorn * it
1487a8d25c0SNathan Whitehorn */
1497a8d25c0SNathan Whitehorn if (papr_supports_stuff_tce == -1)
1507a8d25c0SNathan Whitehorn papr_supports_stuff_tce = !(phyp_hcall(H_STUFF_TCE,
1517a8d25c0SNathan Whitehorn window->map->iobn, 0, 0, 0) == H_FUNCTION);
1527a8d25c0SNathan Whitehorn
153453319bfSNathan Whitehorn bus_dma_tag_set_iommu(tag, bus, window);
1547a8d25c0SNathan Whitehorn
1557a8d25c0SNathan Whitehorn return (0);
1567a8d25c0SNathan Whitehorn }
1577a8d25c0SNathan Whitehorn
1587a8d25c0SNathan Whitehorn int
phyp_iommu_map(device_t dev,bus_dma_segment_t * segs,int * nsegs,bus_addr_t min,bus_addr_t max,bus_size_t alignment,bus_addr_t boundary,void * cookie)1597a8d25c0SNathan Whitehorn phyp_iommu_map(device_t dev, bus_dma_segment_t *segs, int *nsegs,
1607a8d25c0SNathan Whitehorn bus_addr_t min, bus_addr_t max, bus_size_t alignment, bus_addr_t boundary,
1617a8d25c0SNathan Whitehorn void *cookie)
1627a8d25c0SNathan Whitehorn {
1637a8d25c0SNathan Whitehorn struct dma_window *window = cookie;
1647a8d25c0SNathan Whitehorn bus_addr_t minaddr, maxaddr;
1657a8d25c0SNathan Whitehorn bus_addr_t alloced;
1667a8d25c0SNathan Whitehorn bus_size_t allocsize;
1677a8d25c0SNathan Whitehorn int error, i, j;
1687a8d25c0SNathan Whitehorn uint64_t tce;
1697a8d25c0SNathan Whitehorn minaddr = window->start;
1707a8d25c0SNathan Whitehorn maxaddr = window->end;
1717a8d25c0SNathan Whitehorn
1727a8d25c0SNathan Whitehorn /* XXX: handle exclusion range in a more useful way */
1737a8d25c0SNathan Whitehorn if (min < maxaddr)
1747a8d25c0SNathan Whitehorn maxaddr = min;
1757a8d25c0SNathan Whitehorn
1767a8d25c0SNathan Whitehorn /* XXX: consolidate segs? */
1777a8d25c0SNathan Whitehorn for (i = 0; i < *nsegs; i++) {
1787a8d25c0SNathan Whitehorn allocsize = round_page(segs[i].ds_len +
1797a8d25c0SNathan Whitehorn (segs[i].ds_addr & PAGE_MASK));
1807a8d25c0SNathan Whitehorn error = vmem_xalloc(window->map->vmem, allocsize,
1817a8d25c0SNathan Whitehorn (alignment < PAGE_SIZE) ? PAGE_SIZE : alignment, 0,
1827a8d25c0SNathan Whitehorn boundary, minaddr, maxaddr, M_BESTFIT | M_NOWAIT, &alloced);
1837a8d25c0SNathan Whitehorn if (error != 0) {
1847a8d25c0SNathan Whitehorn panic("VMEM failure: %d\n", error);
1857a8d25c0SNathan Whitehorn return (error);
1867a8d25c0SNathan Whitehorn }
1877a8d25c0SNathan Whitehorn KASSERT(alloced % PAGE_SIZE == 0, ("Alloc not page aligned"));
1887a8d25c0SNathan Whitehorn KASSERT((alloced + (segs[i].ds_addr & PAGE_MASK)) %
1897a8d25c0SNathan Whitehorn alignment == 0,
1907a8d25c0SNathan Whitehorn ("Allocated segment does not match alignment constraint"));
1917a8d25c0SNathan Whitehorn
1927a8d25c0SNathan Whitehorn tce = trunc_page(segs[i].ds_addr);
1937a8d25c0SNathan Whitehorn tce |= 0x3; /* read/write */
194c7be335eSNathan Whitehorn for (j = 0; j < allocsize; j += PAGE_SIZE) {
1957a8d25c0SNathan Whitehorn error = phyp_hcall(H_PUT_TCE, window->map->iobn,
1967a8d25c0SNathan Whitehorn alloced + j, tce + j);
197c7be335eSNathan Whitehorn if (error < 0) {
198c7be335eSNathan Whitehorn panic("IOMMU mapping error: %d\n", error);
199c7be335eSNathan Whitehorn return (ENOMEM);
200c7be335eSNathan Whitehorn }
2017a8d25c0SNathan Whitehorn }
2027a8d25c0SNathan Whitehorn
2037a8d25c0SNathan Whitehorn segs[i].ds_addr = alloced + (segs[i].ds_addr & PAGE_MASK);
2047a8d25c0SNathan Whitehorn KASSERT(segs[i].ds_addr > 0, ("Address needs to be positive"));
2057a8d25c0SNathan Whitehorn KASSERT(segs[i].ds_addr + segs[i].ds_len < maxaddr,
2067a8d25c0SNathan Whitehorn ("Address not in range"));
2077a8d25c0SNathan Whitehorn if (error < 0) {
2087a8d25c0SNathan Whitehorn panic("IOMMU mapping error: %d\n", error);
2097a8d25c0SNathan Whitehorn return (ENOMEM);
2107a8d25c0SNathan Whitehorn }
2117a8d25c0SNathan Whitehorn }
2127a8d25c0SNathan Whitehorn
2137a8d25c0SNathan Whitehorn return (0);
2147a8d25c0SNathan Whitehorn }
2157a8d25c0SNathan Whitehorn
2167a8d25c0SNathan Whitehorn int
phyp_iommu_unmap(device_t dev,bus_dma_segment_t * segs,int nsegs,void * cookie)2177a8d25c0SNathan Whitehorn phyp_iommu_unmap(device_t dev, bus_dma_segment_t *segs, int nsegs, void *cookie)
2187a8d25c0SNathan Whitehorn {
2197a8d25c0SNathan Whitehorn struct dma_window *window = cookie;
2207a8d25c0SNathan Whitehorn bus_addr_t pageround;
2217a8d25c0SNathan Whitehorn bus_size_t roundedsize;
2227a8d25c0SNathan Whitehorn int i;
2237a8d25c0SNathan Whitehorn bus_addr_t j;
2247a8d25c0SNathan Whitehorn
2257a8d25c0SNathan Whitehorn for (i = 0; i < nsegs; i++) {
2267a8d25c0SNathan Whitehorn pageround = trunc_page(segs[i].ds_addr);
2277a8d25c0SNathan Whitehorn roundedsize = round_page(segs[i].ds_len +
2287a8d25c0SNathan Whitehorn (segs[i].ds_addr & PAGE_MASK));
2297a8d25c0SNathan Whitehorn
2307a8d25c0SNathan Whitehorn if (papr_supports_stuff_tce) {
2317a8d25c0SNathan Whitehorn phyp_hcall(H_STUFF_TCE, window->map->iobn, pageround, 0,
2327a8d25c0SNathan Whitehorn roundedsize/PAGE_SIZE);
2337a8d25c0SNathan Whitehorn } else {
2347a8d25c0SNathan Whitehorn for (j = 0; j < roundedsize; j += PAGE_SIZE)
2357a8d25c0SNathan Whitehorn phyp_hcall(H_PUT_TCE, window->map->iobn,
2367a8d25c0SNathan Whitehorn pageround + j, 0);
2377a8d25c0SNathan Whitehorn }
2387a8d25c0SNathan Whitehorn
2397a8d25c0SNathan Whitehorn vmem_xfree(window->map->vmem, pageround, roundedsize);
2407a8d25c0SNathan Whitehorn }
2417a8d25c0SNathan Whitehorn
2427a8d25c0SNathan Whitehorn return (0);
2437a8d25c0SNathan Whitehorn }
244