17a8d25c0SNathan Whitehorn /*- 271e3c308SPedro F. Giffuni * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 371e3c308SPedro F. Giffuni * 47a8d25c0SNathan Whitehorn * Copyright (c) 2013, Nathan Whitehorn <nwhitehorn@FreeBSD.org> 57a8d25c0SNathan Whitehorn * All rights reserved. 67a8d25c0SNathan Whitehorn * 77a8d25c0SNathan Whitehorn * Redistribution and use in source and binary forms, with or without 87a8d25c0SNathan Whitehorn * modification, are permitted provided that the following conditions 97a8d25c0SNathan Whitehorn * are met: 107a8d25c0SNathan Whitehorn * 1. Redistributions of source code must retain the above copyright 117a8d25c0SNathan Whitehorn * notice unmodified, this list of conditions, and the following 127a8d25c0SNathan Whitehorn * disclaimer. 137a8d25c0SNathan Whitehorn * 2. Redistributions in binary form must reproduce the above copyright 147a8d25c0SNathan Whitehorn * notice, this list of conditions and the following disclaimer in the 157a8d25c0SNathan Whitehorn * documentation and/or other materials provided with the distribution. 167a8d25c0SNathan Whitehorn * 177a8d25c0SNathan Whitehorn * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 187a8d25c0SNathan Whitehorn * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 197a8d25c0SNathan Whitehorn * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 207a8d25c0SNathan Whitehorn * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 217a8d25c0SNathan Whitehorn * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 227a8d25c0SNathan Whitehorn * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 237a8d25c0SNathan Whitehorn * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 247a8d25c0SNathan Whitehorn * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 257a8d25c0SNathan Whitehorn * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 267a8d25c0SNathan Whitehorn * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 277a8d25c0SNathan Whitehorn */ 287a8d25c0SNathan Whitehorn 297a8d25c0SNathan Whitehorn #include <sys/cdefs.h> 307a8d25c0SNathan Whitehorn __FBSDID("$FreeBSD$"); 317a8d25c0SNathan Whitehorn 327a8d25c0SNathan Whitehorn #include <sys/param.h> 337a8d25c0SNathan Whitehorn #include <sys/bus.h> 347a8d25c0SNathan Whitehorn #include <sys/kernel.h> 357a8d25c0SNathan Whitehorn #include <sys/libkern.h> 367a8d25c0SNathan Whitehorn #include <sys/module.h> 377a8d25c0SNathan Whitehorn #include <sys/vmem.h> 387a8d25c0SNathan Whitehorn 397a8d25c0SNathan Whitehorn #include <dev/ofw/ofw_bus.h> 407a8d25c0SNathan Whitehorn #include <dev/ofw/ofw_bus_subr.h> 417a8d25c0SNathan Whitehorn #include <dev/ofw/openfirm.h> 427a8d25c0SNathan Whitehorn 437a8d25c0SNathan Whitehorn #include <machine/bus.h> 447a8d25c0SNathan Whitehorn 457a8d25c0SNathan Whitehorn #include <powerpc/pseries/phyp-hvcall.h> 467a8d25c0SNathan Whitehorn #include <powerpc/pseries/plpar_iommu.h> 477a8d25c0SNathan Whitehorn 487a8d25c0SNathan Whitehorn MALLOC_DEFINE(M_PHYPIOMMU, "iommu", "IOMMU data for PAPR LPARs"); 497a8d25c0SNathan Whitehorn 507a8d25c0SNathan Whitehorn struct papr_iommu_map { 517a8d25c0SNathan Whitehorn uint32_t iobn; 527a8d25c0SNathan Whitehorn vmem_t *vmem; 537a8d25c0SNathan Whitehorn struct papr_iommu_map *next; 547a8d25c0SNathan Whitehorn }; 557a8d25c0SNathan Whitehorn 567a8d25c0SNathan Whitehorn static SLIST_HEAD(iommu_maps, iommu_map) iommu_map_head = 577a8d25c0SNathan Whitehorn SLIST_HEAD_INITIALIZER(iommu_map_head); 587a8d25c0SNathan Whitehorn static int papr_supports_stuff_tce = -1; 597a8d25c0SNathan Whitehorn 607a8d25c0SNathan Whitehorn struct iommu_map { 617a8d25c0SNathan Whitehorn uint32_t iobn; 627a8d25c0SNathan Whitehorn vmem_t *vmem; 637a8d25c0SNathan Whitehorn 647a8d25c0SNathan Whitehorn SLIST_ENTRY(iommu_map) entries; 657a8d25c0SNathan Whitehorn }; 667a8d25c0SNathan Whitehorn 677a8d25c0SNathan Whitehorn struct dma_window { 687a8d25c0SNathan Whitehorn struct iommu_map *map; 697a8d25c0SNathan Whitehorn bus_addr_t start; 707a8d25c0SNathan Whitehorn bus_addr_t end; 717a8d25c0SNathan Whitehorn }; 727a8d25c0SNathan Whitehorn 737a8d25c0SNathan Whitehorn int 74453319bfSNathan Whitehorn phyp_iommu_set_dma_tag(device_t bus, device_t dev, bus_dma_tag_t tag) 757a8d25c0SNathan Whitehorn { 767a8d25c0SNathan Whitehorn device_t p; 777a8d25c0SNathan Whitehorn phandle_t node; 78e941e1e9SNathan Whitehorn cell_t dma_acells, dma_scells, dmawindow[6]; 797a8d25c0SNathan Whitehorn struct iommu_map *i; 80e941e1e9SNathan Whitehorn int cell; 817a8d25c0SNathan Whitehorn 82453319bfSNathan Whitehorn for (p = dev; device_get_parent(p) != NULL; p = device_get_parent(p)) { 837a8d25c0SNathan Whitehorn if (ofw_bus_has_prop(p, "ibm,my-dma-window")) 847a8d25c0SNathan Whitehorn break; 857a8d25c0SNathan Whitehorn if (ofw_bus_has_prop(p, "ibm,dma-window")) 867a8d25c0SNathan Whitehorn break; 877a8d25c0SNathan Whitehorn } 887a8d25c0SNathan Whitehorn 897a8d25c0SNathan Whitehorn if (p == NULL) 907a8d25c0SNathan Whitehorn return (ENXIO); 917a8d25c0SNathan Whitehorn 927a8d25c0SNathan Whitehorn node = ofw_bus_get_node(p); 93509142e1SNathan Whitehorn if (OF_getencprop(node, "ibm,#dma-size-cells", &dma_scells, 947a8d25c0SNathan Whitehorn sizeof(cell_t)) <= 0) 95509142e1SNathan Whitehorn OF_searchencprop(node, "#size-cells", &dma_scells, 96509142e1SNathan Whitehorn sizeof(cell_t)); 97509142e1SNathan Whitehorn if (OF_getencprop(node, "ibm,#dma-address-cells", &dma_acells, 987a8d25c0SNathan Whitehorn sizeof(cell_t)) <= 0) 99509142e1SNathan Whitehorn OF_searchencprop(node, "#address-cells", &dma_acells, 1007a8d25c0SNathan Whitehorn sizeof(cell_t)); 1017a8d25c0SNathan Whitehorn 1027a8d25c0SNathan Whitehorn if (ofw_bus_has_prop(p, "ibm,my-dma-window")) 103509142e1SNathan Whitehorn OF_getencprop(node, "ibm,my-dma-window", dmawindow, 1047a8d25c0SNathan Whitehorn sizeof(cell_t)*(dma_scells + dma_acells + 1)); 1057a8d25c0SNathan Whitehorn else 106509142e1SNathan Whitehorn OF_getencprop(node, "ibm,dma-window", dmawindow, 1077a8d25c0SNathan Whitehorn sizeof(cell_t)*(dma_scells + dma_acells + 1)); 1087a8d25c0SNathan Whitehorn 1097a8d25c0SNathan Whitehorn struct dma_window *window = malloc(sizeof(struct dma_window), 1107a8d25c0SNathan Whitehorn M_PHYPIOMMU, M_WAITOK); 111e941e1e9SNathan Whitehorn window->start = 0; 112e941e1e9SNathan Whitehorn for (cell = 1; cell < 1 + dma_acells; cell++) { 113e941e1e9SNathan Whitehorn window->start <<= 32; 114e941e1e9SNathan Whitehorn window->start |= dmawindow[cell]; 115e941e1e9SNathan Whitehorn } 116e941e1e9SNathan Whitehorn window->end = 0; 117e941e1e9SNathan Whitehorn for (; cell < 1 + dma_acells + dma_scells; cell++) { 118e941e1e9SNathan Whitehorn window->end <<= 32; 119e941e1e9SNathan Whitehorn window->end |= dmawindow[cell]; 120e941e1e9SNathan Whitehorn } 121e941e1e9SNathan Whitehorn window->end += window->start; 1227a8d25c0SNathan Whitehorn 123acf9bb33SNathan Whitehorn if (bootverbose) 124acf9bb33SNathan Whitehorn device_printf(dev, "Mapping IOMMU domain %#x\n", dmawindow[0]); 1257a8d25c0SNathan Whitehorn window->map = NULL; 1267a8d25c0SNathan Whitehorn SLIST_FOREACH(i, &iommu_map_head, entries) { 1277a8d25c0SNathan Whitehorn if (i->iobn == dmawindow[0]) { 1287a8d25c0SNathan Whitehorn window->map = i; 1297a8d25c0SNathan Whitehorn break; 1307a8d25c0SNathan Whitehorn } 1317a8d25c0SNathan Whitehorn } 1327a8d25c0SNathan Whitehorn 1337a8d25c0SNathan Whitehorn if (window->map == NULL) { 1347a8d25c0SNathan Whitehorn window->map = malloc(sizeof(struct iommu_map), M_PHYPIOMMU, 1357a8d25c0SNathan Whitehorn M_WAITOK); 1367a8d25c0SNathan Whitehorn window->map->iobn = dmawindow[0]; 1377a8d25c0SNathan Whitehorn /* 1387a8d25c0SNathan Whitehorn * Allocate IOMMU range beginning at PAGE_SIZE. Some drivers 1397a8d25c0SNathan Whitehorn * (em(4), for example) do not like getting mappings at 0. 1407a8d25c0SNathan Whitehorn */ 1417a8d25c0SNathan Whitehorn window->map->vmem = vmem_create("IOMMU mappings", PAGE_SIZE, 1427a8d25c0SNathan Whitehorn trunc_page(VMEM_ADDR_MAX) - PAGE_SIZE, PAGE_SIZE, 0, 1437a8d25c0SNathan Whitehorn M_BESTFIT | M_NOWAIT); 144acf9bb33SNathan Whitehorn SLIST_INSERT_HEAD(&iommu_map_head, window->map, entries); 1457a8d25c0SNathan Whitehorn } 1467a8d25c0SNathan Whitehorn 1477a8d25c0SNathan Whitehorn /* 1487a8d25c0SNathan Whitehorn * Check experimentally whether we can use H_STUFF_TCE. It is required 1497a8d25c0SNathan Whitehorn * by the spec but some firmware (e.g. QEMU) does not actually support 1507a8d25c0SNathan Whitehorn * it 1517a8d25c0SNathan Whitehorn */ 1527a8d25c0SNathan Whitehorn if (papr_supports_stuff_tce == -1) 1537a8d25c0SNathan Whitehorn papr_supports_stuff_tce = !(phyp_hcall(H_STUFF_TCE, 1547a8d25c0SNathan Whitehorn window->map->iobn, 0, 0, 0) == H_FUNCTION); 1557a8d25c0SNathan Whitehorn 156453319bfSNathan Whitehorn bus_dma_tag_set_iommu(tag, bus, window); 1577a8d25c0SNathan Whitehorn 1587a8d25c0SNathan Whitehorn return (0); 1597a8d25c0SNathan Whitehorn } 1607a8d25c0SNathan Whitehorn 1617a8d25c0SNathan Whitehorn int 1627a8d25c0SNathan Whitehorn phyp_iommu_map(device_t dev, bus_dma_segment_t *segs, int *nsegs, 1637a8d25c0SNathan Whitehorn bus_addr_t min, bus_addr_t max, bus_size_t alignment, bus_addr_t boundary, 1647a8d25c0SNathan Whitehorn void *cookie) 1657a8d25c0SNathan Whitehorn { 1667a8d25c0SNathan Whitehorn struct dma_window *window = cookie; 1677a8d25c0SNathan Whitehorn bus_addr_t minaddr, maxaddr; 1687a8d25c0SNathan Whitehorn bus_addr_t alloced; 1697a8d25c0SNathan Whitehorn bus_size_t allocsize; 1707a8d25c0SNathan Whitehorn int error, i, j; 1717a8d25c0SNathan Whitehorn uint64_t tce; 1727a8d25c0SNathan Whitehorn minaddr = window->start; 1737a8d25c0SNathan Whitehorn maxaddr = window->end; 1747a8d25c0SNathan Whitehorn 1757a8d25c0SNathan Whitehorn /* XXX: handle exclusion range in a more useful way */ 1767a8d25c0SNathan Whitehorn if (min < maxaddr) 1777a8d25c0SNathan Whitehorn maxaddr = min; 1787a8d25c0SNathan Whitehorn 1797a8d25c0SNathan Whitehorn /* XXX: consolidate segs? */ 1807a8d25c0SNathan Whitehorn for (i = 0; i < *nsegs; i++) { 1817a8d25c0SNathan Whitehorn allocsize = round_page(segs[i].ds_len + 1827a8d25c0SNathan Whitehorn (segs[i].ds_addr & PAGE_MASK)); 1837a8d25c0SNathan Whitehorn error = vmem_xalloc(window->map->vmem, allocsize, 1847a8d25c0SNathan Whitehorn (alignment < PAGE_SIZE) ? PAGE_SIZE : alignment, 0, 1857a8d25c0SNathan Whitehorn boundary, minaddr, maxaddr, M_BESTFIT | M_NOWAIT, &alloced); 1867a8d25c0SNathan Whitehorn if (error != 0) { 1877a8d25c0SNathan Whitehorn panic("VMEM failure: %d\n", error); 1887a8d25c0SNathan Whitehorn return (error); 1897a8d25c0SNathan Whitehorn } 1907a8d25c0SNathan Whitehorn KASSERT(alloced % PAGE_SIZE == 0, ("Alloc not page aligned")); 1917a8d25c0SNathan Whitehorn KASSERT((alloced + (segs[i].ds_addr & PAGE_MASK)) % 1927a8d25c0SNathan Whitehorn alignment == 0, 1937a8d25c0SNathan Whitehorn ("Allocated segment does not match alignment constraint")); 1947a8d25c0SNathan Whitehorn 1957a8d25c0SNathan Whitehorn tce = trunc_page(segs[i].ds_addr); 1967a8d25c0SNathan Whitehorn tce |= 0x3; /* read/write */ 197c7be335eSNathan Whitehorn for (j = 0; j < allocsize; j += PAGE_SIZE) { 1987a8d25c0SNathan Whitehorn error = phyp_hcall(H_PUT_TCE, window->map->iobn, 1997a8d25c0SNathan Whitehorn alloced + j, tce + j); 200c7be335eSNathan Whitehorn if (error < 0) { 201c7be335eSNathan Whitehorn panic("IOMMU mapping error: %d\n", error); 202c7be335eSNathan Whitehorn return (ENOMEM); 203c7be335eSNathan Whitehorn } 2047a8d25c0SNathan Whitehorn } 2057a8d25c0SNathan Whitehorn 2067a8d25c0SNathan Whitehorn segs[i].ds_addr = alloced + (segs[i].ds_addr & PAGE_MASK); 2077a8d25c0SNathan Whitehorn KASSERT(segs[i].ds_addr > 0, ("Address needs to be positive")); 2087a8d25c0SNathan Whitehorn KASSERT(segs[i].ds_addr + segs[i].ds_len < maxaddr, 2097a8d25c0SNathan Whitehorn ("Address not in range")); 2107a8d25c0SNathan Whitehorn if (error < 0) { 2117a8d25c0SNathan Whitehorn panic("IOMMU mapping error: %d\n", error); 2127a8d25c0SNathan Whitehorn return (ENOMEM); 2137a8d25c0SNathan Whitehorn } 2147a8d25c0SNathan Whitehorn } 2157a8d25c0SNathan Whitehorn 2167a8d25c0SNathan Whitehorn return (0); 2177a8d25c0SNathan Whitehorn } 2187a8d25c0SNathan Whitehorn 2197a8d25c0SNathan Whitehorn int 2207a8d25c0SNathan Whitehorn phyp_iommu_unmap(device_t dev, bus_dma_segment_t *segs, int nsegs, void *cookie) 2217a8d25c0SNathan Whitehorn { 2227a8d25c0SNathan Whitehorn struct dma_window *window = cookie; 2237a8d25c0SNathan Whitehorn bus_addr_t pageround; 2247a8d25c0SNathan Whitehorn bus_size_t roundedsize; 2257a8d25c0SNathan Whitehorn int i; 2267a8d25c0SNathan Whitehorn bus_addr_t j; 2277a8d25c0SNathan Whitehorn 2287a8d25c0SNathan Whitehorn for (i = 0; i < nsegs; i++) { 2297a8d25c0SNathan Whitehorn pageround = trunc_page(segs[i].ds_addr); 2307a8d25c0SNathan Whitehorn roundedsize = round_page(segs[i].ds_len + 2317a8d25c0SNathan Whitehorn (segs[i].ds_addr & PAGE_MASK)); 2327a8d25c0SNathan Whitehorn 2337a8d25c0SNathan Whitehorn if (papr_supports_stuff_tce) { 2347a8d25c0SNathan Whitehorn phyp_hcall(H_STUFF_TCE, window->map->iobn, pageround, 0, 2357a8d25c0SNathan Whitehorn roundedsize/PAGE_SIZE); 2367a8d25c0SNathan Whitehorn } else { 2377a8d25c0SNathan Whitehorn for (j = 0; j < roundedsize; j += PAGE_SIZE) 2387a8d25c0SNathan Whitehorn phyp_hcall(H_PUT_TCE, window->map->iobn, 2397a8d25c0SNathan Whitehorn pageround + j, 0); 2407a8d25c0SNathan Whitehorn } 2417a8d25c0SNathan Whitehorn 2427a8d25c0SNathan Whitehorn vmem_xfree(window->map->vmem, pageround, roundedsize); 2437a8d25c0SNathan Whitehorn } 2447a8d25c0SNathan Whitehorn 2457a8d25c0SNathan Whitehorn return (0); 2467a8d25c0SNathan Whitehorn } 2477a8d25c0SNathan Whitehorn 248