1/*- 2 * Copyright (c) 2015-2018 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * Portions of this software were developed by SRI International and the 6 * University of Cambridge Computer Laboratory under DARPA/AFRL contract 7 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. 8 * 9 * Portions of this software were developed by the University of Cambridge 10 * Computer Laboratory as part of the CTSRD Project, with support from the 11 * UK Higher Education Innovation Fund (HEIF). 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35#include <machine/asm.h> 36__FBSDID("$FreeBSD$"); 37 38#include "assym.inc" 39 40#include <machine/trap.h> 41#include <machine/riscvreg.h> 42 43.macro save_registers mode 44 addi sp, sp, -(TF_SIZE) 45 46 sd ra, (TF_RA)(sp) 47 sd tp, (TF_TP)(sp) 48 49.if \mode == 0 /* We came from userspace. */ 50 sd gp, (TF_GP)(sp) 51.option push 52.option norelax 53 /* Load the kernel's global pointer */ 54 la gp, __global_pointer$ 55.option pop 56 57 /* Load our pcpu */ 58 ld tp, (TF_SIZE)(sp) 59.endif 60 61 sd t0, (TF_T + 0 * 8)(sp) 62 sd t1, (TF_T + 1 * 8)(sp) 63 sd t2, (TF_T + 2 * 8)(sp) 64 sd t3, (TF_T + 3 * 8)(sp) 65 sd t4, (TF_T + 4 * 8)(sp) 66 sd t5, (TF_T + 5 * 8)(sp) 67 sd t6, (TF_T + 6 * 8)(sp) 68 69 sd s0, (TF_S + 0 * 8)(sp) 70 sd s1, (TF_S + 1 * 8)(sp) 71 sd s2, (TF_S + 2 * 8)(sp) 72 sd s3, (TF_S + 3 * 8)(sp) 73 sd s4, (TF_S + 4 * 8)(sp) 74 sd s5, (TF_S + 5 * 8)(sp) 75 sd s6, (TF_S + 6 * 8)(sp) 76 sd s7, (TF_S + 7 * 8)(sp) 77 sd s8, (TF_S + 8 * 8)(sp) 78 sd s9, (TF_S + 9 * 8)(sp) 79 sd s10, (TF_S + 10 * 8)(sp) 80 sd s11, (TF_S + 11 * 8)(sp) 81 82 sd a0, (TF_A + 0 * 8)(sp) 83 sd a1, (TF_A + 1 * 8)(sp) 84 sd a2, (TF_A + 2 * 8)(sp) 85 sd a3, (TF_A + 3 * 8)(sp) 86 sd a4, (TF_A + 4 * 8)(sp) 87 sd a5, (TF_A + 5 * 8)(sp) 88 sd a6, (TF_A + 6 * 8)(sp) 89 sd a7, (TF_A + 7 * 8)(sp) 90 91.if \mode == 1 92 /* Store kernel sp */ 93 li t1, TF_SIZE 94 add t0, sp, t1 95 sd t0, (TF_SP)(sp) 96.else 97 /* Store user sp */ 98 csrr t0, sscratch 99 sd t0, (TF_SP)(sp) 100.endif 101 li t0, 0 102 csrw sscratch, t0 103 csrr t0, sepc 104 sd t0, (TF_SEPC)(sp) 105 csrr t0, sstatus 106 sd t0, (TF_SSTATUS)(sp) 107.if \mode == 1 108 /* Disable user address access for supervisor mode exceptions. */ 109 li t0, SSTATUS_SUM 110 csrc sstatus, t0 111.endif 112 csrr t0, stval 113 sd t0, (TF_STVAL)(sp) 114 csrr t0, scause 115 sd t0, (TF_SCAUSE)(sp) 116.endm 117 118.macro load_registers mode 119 ld t0, (TF_SSTATUS)(sp) 120.if \mode == 0 121 /* Ensure user interrupts will be enabled on eret */ 122 li t1, SSTATUS_SPIE 123 or t0, t0, t1 124.else 125 /* 126 * Disable interrupts for supervisor mode exceptions. 127 * For user mode exceptions we have already done this 128 * in do_ast. 129 */ 130 li t1, ~SSTATUS_SIE 131 and t0, t0, t1 132.endif 133 csrw sstatus, t0 134 135 ld t0, (TF_SEPC)(sp) 136 csrw sepc, t0 137 138.if \mode == 0 139 /* We go to userspace. Load user sp */ 140 ld t0, (TF_SP)(sp) 141 csrw sscratch, t0 142 143 /* Store our pcpu */ 144 sd tp, (TF_SIZE)(sp) 145 ld tp, (TF_TP)(sp) 146 147 /* And restore the user's global pointer */ 148 ld gp, (TF_GP)(sp) 149.endif 150 151 ld ra, (TF_RA)(sp) 152 153 ld t0, (TF_T + 0 * 8)(sp) 154 ld t1, (TF_T + 1 * 8)(sp) 155 ld t2, (TF_T + 2 * 8)(sp) 156 ld t3, (TF_T + 3 * 8)(sp) 157 ld t4, (TF_T + 4 * 8)(sp) 158 ld t5, (TF_T + 5 * 8)(sp) 159 ld t6, (TF_T + 6 * 8)(sp) 160 161 ld s0, (TF_S + 0 * 8)(sp) 162 ld s1, (TF_S + 1 * 8)(sp) 163 ld s2, (TF_S + 2 * 8)(sp) 164 ld s3, (TF_S + 3 * 8)(sp) 165 ld s4, (TF_S + 4 * 8)(sp) 166 ld s5, (TF_S + 5 * 8)(sp) 167 ld s6, (TF_S + 6 * 8)(sp) 168 ld s7, (TF_S + 7 * 8)(sp) 169 ld s8, (TF_S + 8 * 8)(sp) 170 ld s9, (TF_S + 9 * 8)(sp) 171 ld s10, (TF_S + 10 * 8)(sp) 172 ld s11, (TF_S + 11 * 8)(sp) 173 174 ld a0, (TF_A + 0 * 8)(sp) 175 ld a1, (TF_A + 1 * 8)(sp) 176 ld a2, (TF_A + 2 * 8)(sp) 177 ld a3, (TF_A + 3 * 8)(sp) 178 ld a4, (TF_A + 4 * 8)(sp) 179 ld a5, (TF_A + 5 * 8)(sp) 180 ld a6, (TF_A + 6 * 8)(sp) 181 ld a7, (TF_A + 7 * 8)(sp) 182 183 addi sp, sp, (TF_SIZE) 184.endm 185 186.macro do_ast 187 /* Disable interrupts */ 188 csrr a4, sstatus 1891: 190 csrci sstatus, (SSTATUS_SIE) 191 192 ld a1, PC_CURTHREAD(tp) 193 lw a2, TD_AST(a1) 194 195 beqz a2, 2f 196 197 /* Restore interrupts */ 198 andi a4, a4, (SSTATUS_SIE) 199 csrs sstatus, a4 200 201 /* Handle the ast */ 202 mv a0, sp 203 call _C_LABEL(ast) 204 205 /* Re-check for new ast scheduled */ 206 j 1b 2072: 208.endm 209 210ENTRY(cpu_exception_handler) 211 csrrw sp, sscratch, sp 212 beqz sp, 1f 213 /* User mode detected */ 214 j cpu_exception_handler_user 2151: 216 /* Supervisor mode detected */ 217 csrrw sp, sscratch, sp 218 j cpu_exception_handler_supervisor 219END(cpu_exception_handler) 220 221ENTRY(cpu_exception_handler_supervisor) 222 save_registers 1 223 mv a0, sp 224 call _C_LABEL(do_trap_supervisor) 225 load_registers 1 226 sret 227END(cpu_exception_handler_supervisor) 228 229ENTRY(cpu_exception_handler_user) 230 save_registers 0 231 mv a0, sp 232 call _C_LABEL(do_trap_user) 233 do_ast 234 load_registers 0 235 csrrw sp, sscratch, sp 236 sret 237END(cpu_exception_handler_user) 238