1 /*- 2 * Copyright (c) 2003-2008, Joseph Koshy 3 * Copyright (c) 2007 The FreeBSD Foundation 4 * All rights reserved. 5 * 6 * Portions of this software were developed by A. Joseph Koshy under 7 * sponsorship from the FreeBSD Foundation and Google, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 28 * SUCH DAMAGE. 29 * 30 * $FreeBSD$ 31 */ 32 33 #ifndef _SYS_PMC_H_ 34 #define _SYS_PMC_H_ 35 36 #include <dev/hwpmc/pmc_events.h> 37 38 #include <machine/pmc_mdep.h> 39 #include <machine/profile.h> 40 41 #define PMC_MODULE_NAME "hwpmc" 42 #define PMC_NAME_MAX 64 /* HW counter name size */ 43 #define PMC_CLASS_MAX 8 /* max #classes of PMCs per-system */ 44 45 /* 46 * Kernel<->userland API version number [MMmmpppp] 47 * 48 * Major numbers are to be incremented when an incompatible change to 49 * the ABI occurs that older clients will not be able to handle. 50 * 51 * Minor numbers are incremented when a backwards compatible change 52 * occurs that allows older correct programs to run unchanged. For 53 * example, when support for a new PMC type is added. 54 * 55 * The patch version is incremented for every bug fix. 56 */ 57 #define PMC_VERSION_MAJOR 0x03 58 #define PMC_VERSION_MINOR 0x01 59 #define PMC_VERSION_PATCH 0x0000 60 61 #define PMC_VERSION (PMC_VERSION_MAJOR << 24 | \ 62 PMC_VERSION_MINOR << 16 | PMC_VERSION_PATCH) 63 64 /* 65 * Kinds of CPUs known. 66 * 67 * We keep track of CPU variants that need to be distinguished in 68 * some way for PMC operations. CPU names are grouped by manufacturer 69 * and numbered sparsely in order to minimize changes to the ABI involved 70 * when new CPUs are added. 71 */ 72 73 #define __PMC_CPUS() \ 74 __PMC_CPU(AMD_K7, 0x00, "AMD K7") \ 75 __PMC_CPU(AMD_K8, 0x01, "AMD K8") \ 76 __PMC_CPU(INTEL_P5, 0x80, "Intel Pentium") \ 77 __PMC_CPU(INTEL_P6, 0x81, "Intel Pentium Pro") \ 78 __PMC_CPU(INTEL_CL, 0x82, "Intel Celeron") \ 79 __PMC_CPU(INTEL_PII, 0x83, "Intel Pentium II") \ 80 __PMC_CPU(INTEL_PIII, 0x84, "Intel Pentium III") \ 81 __PMC_CPU(INTEL_PM, 0x85, "Intel Pentium M") \ 82 __PMC_CPU(INTEL_PIV, 0x86, "Intel Pentium IV") \ 83 __PMC_CPU(INTEL_CORE, 0x87, "Intel Core Solo/Duo") \ 84 __PMC_CPU(INTEL_CORE2, 0x88, "Intel Core2") \ 85 __PMC_CPU(INTEL_CORE2EXTREME, 0x89, "Intel Core2 Extreme") \ 86 __PMC_CPU(INTEL_ATOM, 0x8A, "Intel Atom") \ 87 __PMC_CPU(INTEL_COREI7, 0x8B, "Intel Core i7") \ 88 __PMC_CPU(INTEL_WESTMERE, 0x8C, "Intel Westmere") \ 89 __PMC_CPU(INTEL_SANDYBRIDGE, 0x8D, "Intel Sandy Bridge") \ 90 __PMC_CPU(INTEL_IVYBRIDGE, 0x8E, "Intel Ivy Bridge") \ 91 __PMC_CPU(INTEL_SANDYBRIDGE_XEON, 0x8F, "Intel Sandy Bridge Xeon") \ 92 __PMC_CPU(INTEL_IVYBRIDGE_XEON, 0x90, "Intel Ivy Bridge Xeon") \ 93 __PMC_CPU(INTEL_HASWELL, 0x91, "Intel Haswell") \ 94 __PMC_CPU(INTEL_XSCALE, 0x100, "Intel XScale") \ 95 __PMC_CPU(MIPS_24K, 0x200, "MIPS 24K") \ 96 __PMC_CPU(MIPS_OCTEON, 0x201, "Cavium Octeon") \ 97 __PMC_CPU(PPC_7450, 0x300, "PowerPC MPC7450") \ 98 __PMC_CPU(GENERIC, 0x400, "Generic") 99 100 enum pmc_cputype { 101 #undef __PMC_CPU 102 #define __PMC_CPU(S,V,D) PMC_CPU_##S = V, 103 __PMC_CPUS() 104 }; 105 106 #define PMC_CPU_FIRST PMC_CPU_AMD_K7 107 #define PMC_CPU_LAST PMC_CPU_GENERIC 108 109 /* 110 * Classes of PMCs 111 */ 112 113 #define __PMC_CLASSES() \ 114 __PMC_CLASS(TSC) /* CPU Timestamp counter */ \ 115 __PMC_CLASS(K7) /* AMD K7 performance counters */ \ 116 __PMC_CLASS(K8) /* AMD K8 performance counters */ \ 117 __PMC_CLASS(P5) /* Intel Pentium counters */ \ 118 __PMC_CLASS(P6) /* Intel Pentium Pro counters */ \ 119 __PMC_CLASS(P4) /* Intel Pentium-IV counters */ \ 120 __PMC_CLASS(IAF) /* Intel Core2/Atom, fixed function */ \ 121 __PMC_CLASS(IAP) /* Intel Core...Atom, programmable */ \ 122 __PMC_CLASS(UCF) /* Intel Uncore fixed function */ \ 123 __PMC_CLASS(UCP) /* Intel Uncore programmable */ \ 124 __PMC_CLASS(XSCALE) /* Intel XScale counters */ \ 125 __PMC_CLASS(MIPS24K) /* MIPS 24K */ \ 126 __PMC_CLASS(OCTEON) /* Cavium Octeon */ \ 127 __PMC_CLASS(PPC7450) /* Motorola MPC7450 class */ \ 128 __PMC_CLASS(SOFT) /* Software events */ 129 130 enum pmc_class { 131 #undef __PMC_CLASS 132 #define __PMC_CLASS(N) PMC_CLASS_##N , 133 __PMC_CLASSES() 134 }; 135 136 #define PMC_CLASS_FIRST PMC_CLASS_TSC 137 #define PMC_CLASS_LAST PMC_CLASS_SOFT 138 139 /* 140 * A PMC can be in the following states: 141 * 142 * Hardware states: 143 * DISABLED -- administratively prohibited from being used. 144 * FREE -- HW available for use 145 * Software states: 146 * ALLOCATED -- allocated 147 * STOPPED -- allocated, but not counting events 148 * RUNNING -- allocated, and in operation; 'pm_runcount' 149 * holds the number of CPUs using this PMC at 150 * a given instant 151 * DELETED -- being destroyed 152 */ 153 154 #define __PMC_HWSTATES() \ 155 __PMC_STATE(DISABLED) \ 156 __PMC_STATE(FREE) 157 158 #define __PMC_SWSTATES() \ 159 __PMC_STATE(ALLOCATED) \ 160 __PMC_STATE(STOPPED) \ 161 __PMC_STATE(RUNNING) \ 162 __PMC_STATE(DELETED) 163 164 #define __PMC_STATES() \ 165 __PMC_HWSTATES() \ 166 __PMC_SWSTATES() 167 168 enum pmc_state { 169 #undef __PMC_STATE 170 #define __PMC_STATE(S) PMC_STATE_##S, 171 __PMC_STATES() 172 __PMC_STATE(MAX) 173 }; 174 175 #define PMC_STATE_FIRST PMC_STATE_DISABLED 176 #define PMC_STATE_LAST PMC_STATE_DELETED 177 178 /* 179 * An allocated PMC may used as a 'global' counter or as a 180 * 'thread-private' one. Each such mode of use can be in either 181 * statistical sampling mode or in counting mode. Thus a PMC in use 182 * 183 * SS i.e., SYSTEM STATISTICAL -- system-wide statistical profiling 184 * SC i.e., SYSTEM COUNTER -- system-wide counting mode 185 * TS i.e., THREAD STATISTICAL -- thread virtual, statistical profiling 186 * TC i.e., THREAD COUNTER -- thread virtual, counting mode 187 * 188 * Statistical profiling modes rely on the PMC periodically delivering 189 * a interrupt to the CPU (when the configured number of events have 190 * been measured), so the PMC must have the ability to generate 191 * interrupts. 192 * 193 * In counting modes, the PMC counts its configured events, with the 194 * value of the PMC being read whenever needed by its owner process. 195 * 196 * The thread specific modes "virtualize" the PMCs -- the PMCs appear 197 * to be thread private and count events only when the profiled thread 198 * actually executes on the CPU. 199 * 200 * The system-wide "global" modes keep the PMCs running all the time 201 * and are used to measure the behaviour of the whole system. 202 */ 203 204 #define __PMC_MODES() \ 205 __PMC_MODE(SS, 0) \ 206 __PMC_MODE(SC, 1) \ 207 __PMC_MODE(TS, 2) \ 208 __PMC_MODE(TC, 3) 209 210 enum pmc_mode { 211 #undef __PMC_MODE 212 #define __PMC_MODE(M,N) PMC_MODE_##M = N, 213 __PMC_MODES() 214 }; 215 216 #define PMC_MODE_FIRST PMC_MODE_SS 217 #define PMC_MODE_LAST PMC_MODE_TC 218 219 #define PMC_IS_COUNTING_MODE(mode) \ 220 ((mode) == PMC_MODE_SC || (mode) == PMC_MODE_TC) 221 #define PMC_IS_SYSTEM_MODE(mode) \ 222 ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_SC) 223 #define PMC_IS_SAMPLING_MODE(mode) \ 224 ((mode) == PMC_MODE_SS || (mode) == PMC_MODE_TS) 225 #define PMC_IS_VIRTUAL_MODE(mode) \ 226 ((mode) == PMC_MODE_TS || (mode) == PMC_MODE_TC) 227 228 /* 229 * PMC row disposition 230 */ 231 232 #define __PMC_DISPOSITIONS(N) \ 233 __PMC_DISP(STANDALONE) /* global/disabled counters */ \ 234 __PMC_DISP(FREE) /* free/available */ \ 235 __PMC_DISP(THREAD) /* thread-virtual PMCs */ \ 236 __PMC_DISP(UNKNOWN) /* sentinel */ 237 238 enum pmc_disp { 239 #undef __PMC_DISP 240 #define __PMC_DISP(D) PMC_DISP_##D , 241 __PMC_DISPOSITIONS() 242 }; 243 244 #define PMC_DISP_FIRST PMC_DISP_STANDALONE 245 #define PMC_DISP_LAST PMC_DISP_THREAD 246 247 /* 248 * Counter capabilities 249 * 250 * __PMC_CAPS(NAME, VALUE, DESCRIPTION) 251 */ 252 253 #define __PMC_CAPS() \ 254 __PMC_CAP(INTERRUPT, 0, "generate interrupts") \ 255 __PMC_CAP(USER, 1, "count user-mode events") \ 256 __PMC_CAP(SYSTEM, 2, "count system-mode events") \ 257 __PMC_CAP(EDGE, 3, "do edge detection of events") \ 258 __PMC_CAP(THRESHOLD, 4, "ignore events below a threshold") \ 259 __PMC_CAP(READ, 5, "read PMC counter") \ 260 __PMC_CAP(WRITE, 6, "reprogram PMC counter") \ 261 __PMC_CAP(INVERT, 7, "invert comparision sense") \ 262 __PMC_CAP(QUALIFIER, 8, "further qualify monitored events") \ 263 __PMC_CAP(PRECISE, 9, "perform precise sampling") \ 264 __PMC_CAP(TAGGING, 10, "tag upstream events") \ 265 __PMC_CAP(CASCADE, 11, "cascade counters") 266 267 enum pmc_caps 268 { 269 #undef __PMC_CAP 270 #define __PMC_CAP(NAME, VALUE, DESCR) PMC_CAP_##NAME = (1 << VALUE) , 271 __PMC_CAPS() 272 }; 273 274 #define PMC_CAP_FIRST PMC_CAP_INTERRUPT 275 #define PMC_CAP_LAST PMC_CAP_CASCADE 276 277 /* 278 * PMC Event Numbers 279 * 280 * These are generated from the definitions in "dev/hwpmc/pmc_events.h". 281 */ 282 283 enum pmc_event { 284 #undef __PMC_EV 285 #undef __PMC_EV_BLOCK 286 #define __PMC_EV_BLOCK(C,V) PMC_EV_ ## C ## __BLOCK_START = (V) - 1 , 287 #define __PMC_EV(C,N) PMC_EV_ ## C ## _ ## N , 288 __PMC_EVENTS() 289 }; 290 291 /* 292 * PMC SYSCALL INTERFACE 293 */ 294 295 /* 296 * "PMC_OPS" -- these are the commands recognized by the kernel 297 * module, and are used when performing a system call from userland. 298 */ 299 #define __PMC_OPS() \ 300 __PMC_OP(CONFIGURELOG, "Set log file") \ 301 __PMC_OP(FLUSHLOG, "Flush log file") \ 302 __PMC_OP(GETCPUINFO, "Get system CPU information") \ 303 __PMC_OP(GETDRIVERSTATS, "Get driver statistics") \ 304 __PMC_OP(GETMODULEVERSION, "Get module version") \ 305 __PMC_OP(GETPMCINFO, "Get per-cpu PMC information") \ 306 __PMC_OP(PMCADMIN, "Set PMC state") \ 307 __PMC_OP(PMCALLOCATE, "Allocate and configure a PMC") \ 308 __PMC_OP(PMCATTACH, "Attach a PMC to a process") \ 309 __PMC_OP(PMCDETACH, "Detach a PMC from a process") \ 310 __PMC_OP(PMCGETMSR, "Get a PMC's hardware address") \ 311 __PMC_OP(PMCRELEASE, "Release a PMC") \ 312 __PMC_OP(PMCRW, "Read/Set a PMC") \ 313 __PMC_OP(PMCSETCOUNT, "Set initial count/sampling rate") \ 314 __PMC_OP(PMCSTART, "Start a PMC") \ 315 __PMC_OP(PMCSTOP, "Stop a PMC") \ 316 __PMC_OP(WRITELOG, "Write a cookie to the log file") \ 317 __PMC_OP(CLOSELOG, "Close log file") \ 318 __PMC_OP(GETDYNEVENTINFO, "Get dynamic events list") 319 320 321 enum pmc_ops { 322 #undef __PMC_OP 323 #define __PMC_OP(N, D) PMC_OP_##N, 324 __PMC_OPS() 325 }; 326 327 328 /* 329 * Flags used in operations on PMCs. 330 */ 331 332 #define PMC_F_FORCE 0x00000001 /*OP ADMIN force operation */ 333 #define PMC_F_DESCENDANTS 0x00000002 /*OP ALLOCATE track descendants */ 334 #define PMC_F_LOG_PROCCSW 0x00000004 /*OP ALLOCATE track ctx switches */ 335 #define PMC_F_LOG_PROCEXIT 0x00000008 /*OP ALLOCATE log proc exits */ 336 #define PMC_F_NEWVALUE 0x00000010 /*OP RW write new value */ 337 #define PMC_F_OLDVALUE 0x00000020 /*OP RW get old value */ 338 #define PMC_F_KGMON 0x00000040 /*OP ALLOCATE kgmon(8) profiling */ 339 /* V2 API */ 340 #define PMC_F_CALLCHAIN 0x00000080 /*OP ALLOCATE capture callchains */ 341 342 /* internal flags */ 343 #define PMC_F_ATTACHED_TO_OWNER 0x00010000 /*attached to owner*/ 344 #define PMC_F_NEEDS_LOGFILE 0x00020000 /*needs log file */ 345 #define PMC_F_ATTACH_DONE 0x00040000 /*attached at least once */ 346 347 #define PMC_CALLCHAIN_DEPTH_MAX 32 348 349 #define PMC_CC_F_USERSPACE 0x01 /*userspace callchain*/ 350 351 /* 352 * Cookies used to denote allocated PMCs, and the values of PMCs. 353 */ 354 355 typedef uint32_t pmc_id_t; 356 typedef uint64_t pmc_value_t; 357 358 #define PMC_ID_INVALID (~ (pmc_id_t) 0) 359 360 /* 361 * PMC IDs have the following format: 362 * 363 * +--------+----------+-----------+-----------+ 364 * | CPU | PMC MODE | PMC CLASS | ROW INDEX | 365 * +--------+----------+-----------+-----------+ 366 * 367 * where each field is 8 bits wide. Field 'CPU' is set to the 368 * requested CPU for system-wide PMCs or PMC_CPU_ANY for process-mode 369 * PMCs. Field 'PMC MODE' is the allocated PMC mode. Field 'PMC 370 * CLASS' is the class of the PMC. Field 'ROW INDEX' is the row index 371 * for the PMC. 372 * 373 * The 'ROW INDEX' ranges over 0..NWPMCS where NHWPMCS is the total 374 * number of hardware PMCs on this cpu. 375 */ 376 377 378 #define PMC_ID_TO_ROWINDEX(ID) ((ID) & 0xFF) 379 #define PMC_ID_TO_CLASS(ID) (((ID) & 0xFF00) >> 8) 380 #define PMC_ID_TO_MODE(ID) (((ID) & 0xFF0000) >> 16) 381 #define PMC_ID_TO_CPU(ID) (((ID) & 0xFF000000) >> 24) 382 #define PMC_ID_MAKE_ID(CPU,MODE,CLASS,ROWINDEX) \ 383 ((((CPU) & 0xFF) << 24) | (((MODE) & 0xFF) << 16) | \ 384 (((CLASS) & 0xFF) << 8) | ((ROWINDEX) & 0xFF)) 385 386 /* 387 * Data structures for system calls supported by the pmc driver. 388 */ 389 390 /* 391 * OP PMCALLOCATE 392 * 393 * Allocate a PMC on the named CPU. 394 */ 395 396 #define PMC_CPU_ANY ~0 397 398 struct pmc_op_pmcallocate { 399 uint32_t pm_caps; /* PMC_CAP_* */ 400 uint32_t pm_cpu; /* CPU number or PMC_CPU_ANY */ 401 enum pmc_class pm_class; /* class of PMC desired */ 402 enum pmc_event pm_ev; /* [enum pmc_event] desired */ 403 uint32_t pm_flags; /* additional modifiers PMC_F_* */ 404 enum pmc_mode pm_mode; /* desired mode */ 405 pmc_id_t pm_pmcid; /* [return] process pmc id */ 406 407 union pmc_md_op_pmcallocate pm_md; /* MD layer extensions */ 408 }; 409 410 /* 411 * OP PMCADMIN 412 * 413 * Set the administrative state (i.e., whether enabled or disabled) of 414 * a PMC 'pm_pmc' on CPU 'pm_cpu'. Note that 'pm_pmc' specifies an 415 * absolute PMC number and need not have been first allocated by the 416 * calling process. 417 */ 418 419 struct pmc_op_pmcadmin { 420 int pm_cpu; /* CPU# */ 421 uint32_t pm_flags; /* flags */ 422 int pm_pmc; /* PMC# */ 423 enum pmc_state pm_state; /* desired state */ 424 }; 425 426 /* 427 * OP PMCATTACH / OP PMCDETACH 428 * 429 * Attach/detach a PMC and a process. 430 */ 431 432 struct pmc_op_pmcattach { 433 pmc_id_t pm_pmc; /* PMC to attach to */ 434 pid_t pm_pid; /* target process */ 435 }; 436 437 /* 438 * OP PMCSETCOUNT 439 * 440 * Set the sampling rate (i.e., the reload count) for statistical counters. 441 * 'pm_pmcid' need to have been previously allocated using PMCALLOCATE. 442 */ 443 444 struct pmc_op_pmcsetcount { 445 pmc_value_t pm_count; /* initial/sample count */ 446 pmc_id_t pm_pmcid; /* PMC id to set */ 447 }; 448 449 450 /* 451 * OP PMCRW 452 * 453 * Read the value of a PMC named by 'pm_pmcid'. 'pm_pmcid' needs 454 * to have been previously allocated using PMCALLOCATE. 455 */ 456 457 458 struct pmc_op_pmcrw { 459 uint32_t pm_flags; /* PMC_F_{OLD,NEW}VALUE*/ 460 pmc_id_t pm_pmcid; /* pmc id */ 461 pmc_value_t pm_value; /* new&returned value */ 462 }; 463 464 465 /* 466 * OP GETPMCINFO 467 * 468 * retrieve PMC state for a named CPU. The caller is expected to 469 * allocate 'npmc' * 'struct pmc_info' bytes of space for the return 470 * values. 471 */ 472 473 struct pmc_info { 474 char pm_name[PMC_NAME_MAX]; /* pmc name */ 475 enum pmc_class pm_class; /* enum pmc_class */ 476 int pm_enabled; /* whether enabled */ 477 enum pmc_disp pm_rowdisp; /* FREE, THREAD or STANDLONE */ 478 pid_t pm_ownerpid; /* owner, or -1 */ 479 enum pmc_mode pm_mode; /* current mode [enum pmc_mode] */ 480 enum pmc_event pm_event; /* current event */ 481 uint32_t pm_flags; /* current flags */ 482 pmc_value_t pm_reloadcount; /* sampling counters only */ 483 }; 484 485 struct pmc_op_getpmcinfo { 486 int32_t pm_cpu; /* 0 <= cpu < mp_maxid */ 487 struct pmc_info pm_pmcs[]; /* space for 'npmc' structures */ 488 }; 489 490 491 /* 492 * OP GETCPUINFO 493 * 494 * Retrieve system CPU information. 495 */ 496 497 498 struct pmc_classinfo { 499 enum pmc_class pm_class; /* class id */ 500 uint32_t pm_caps; /* counter capabilities */ 501 uint32_t pm_width; /* width of the PMC */ 502 uint32_t pm_num; /* number of PMCs in class */ 503 }; 504 505 struct pmc_op_getcpuinfo { 506 enum pmc_cputype pm_cputype; /* what kind of CPU */ 507 uint32_t pm_ncpu; /* max CPU number */ 508 uint32_t pm_npmc; /* #PMCs per CPU */ 509 uint32_t pm_nclass; /* #classes of PMCs */ 510 struct pmc_classinfo pm_classes[PMC_CLASS_MAX]; 511 }; 512 513 /* 514 * OP CONFIGURELOG 515 * 516 * Configure a log file for writing system-wide statistics to. 517 */ 518 519 struct pmc_op_configurelog { 520 int pm_flags; 521 int pm_logfd; /* logfile fd (or -1) */ 522 }; 523 524 /* 525 * OP GETDRIVERSTATS 526 * 527 * Retrieve pmc(4) driver-wide statistics. 528 */ 529 530 struct pmc_op_getdriverstats { 531 int pm_intr_ignored; /* #interrupts ignored */ 532 int pm_intr_processed; /* #interrupts processed */ 533 int pm_intr_bufferfull; /* #interrupts with ENOSPC */ 534 int pm_syscalls; /* #syscalls */ 535 int pm_syscall_errors; /* #syscalls with errors */ 536 int pm_buffer_requests; /* #buffer requests */ 537 int pm_buffer_requests_failed; /* #failed buffer requests */ 538 int pm_log_sweeps; /* #sample buffer processing passes */ 539 }; 540 541 /* 542 * OP RELEASE / OP START / OP STOP 543 * 544 * Simple operations on a PMC id. 545 */ 546 547 struct pmc_op_simple { 548 pmc_id_t pm_pmcid; 549 }; 550 551 /* 552 * OP WRITELOG 553 * 554 * Flush the current log buffer and write 4 bytes of user data to it. 555 */ 556 557 struct pmc_op_writelog { 558 uint32_t pm_userdata; 559 }; 560 561 /* 562 * OP GETMSR 563 * 564 * Retrieve the machine specific address assoicated with the allocated 565 * PMC. This number can be used subsequently with a read-performance-counter 566 * instruction. 567 */ 568 569 struct pmc_op_getmsr { 570 uint32_t pm_msr; /* machine specific address */ 571 pmc_id_t pm_pmcid; /* allocated pmc id */ 572 }; 573 574 /* 575 * OP GETDYNEVENTINFO 576 * 577 * Retrieve a PMC dynamic class events list. 578 */ 579 580 struct pmc_dyn_event_descr { 581 char pm_ev_name[PMC_NAME_MAX]; 582 enum pmc_event pm_ev_code; 583 }; 584 585 struct pmc_op_getdyneventinfo { 586 enum pmc_class pm_class; 587 unsigned int pm_nevent; 588 struct pmc_dyn_event_descr pm_events[PMC_EV_DYN_COUNT]; 589 }; 590 591 #ifdef _KERNEL 592 593 #include <sys/malloc.h> 594 #include <sys/sysctl.h> 595 596 #include <machine/frame.h> 597 598 #define PMC_HASH_SIZE 16 599 #define PMC_MTXPOOL_SIZE 32 600 #define PMC_LOG_BUFFER_SIZE 4 601 #define PMC_NLOGBUFFERS 64 602 #define PMC_NSAMPLES 512 603 #define PMC_CALLCHAIN_DEPTH 8 604 605 #define PMC_SYSCTL_NAME_PREFIX "kern." PMC_MODULE_NAME "." 606 607 /* 608 * Locking keys 609 * 610 * (b) - pmc_bufferlist_mtx (spin lock) 611 * (k) - pmc_kthread_mtx (sleep lock) 612 * (o) - po->po_mtx (spin lock) 613 */ 614 615 /* 616 * PMC commands 617 */ 618 619 struct pmc_syscall_args { 620 register_t pmop_code; /* one of PMC_OP_* */ 621 void *pmop_data; /* syscall parameter */ 622 }; 623 624 /* 625 * Interface to processor specific s1tuff 626 */ 627 628 /* 629 * struct pmc_descr 630 * 631 * Machine independent (i.e., the common parts) of a human readable 632 * PMC description. 633 */ 634 635 struct pmc_descr { 636 char pd_name[PMC_NAME_MAX]; /* name */ 637 uint32_t pd_caps; /* capabilities */ 638 enum pmc_class pd_class; /* class of the PMC */ 639 uint32_t pd_width; /* width in bits */ 640 }; 641 642 /* 643 * struct pmc_target 644 * 645 * This structure records all the target processes associated with a 646 * PMC. 647 */ 648 649 struct pmc_target { 650 LIST_ENTRY(pmc_target) pt_next; 651 struct pmc_process *pt_process; /* target descriptor */ 652 }; 653 654 /* 655 * struct pmc 656 * 657 * Describes each allocated PMC. 658 * 659 * Each PMC has precisely one owner, namely the process that allocated 660 * the PMC. 661 * 662 * A PMC may be attached to multiple target processes. The 663 * 'pm_targets' field links all the target processes being monitored 664 * by this PMC. 665 * 666 * The 'pm_savedvalue' field is protected by a mutex. 667 * 668 * On a multi-cpu machine, multiple target threads associated with a 669 * process-virtual PMC could be concurrently executing on different 670 * CPUs. The 'pm_runcount' field is atomically incremented every time 671 * the PMC gets scheduled on a CPU and atomically decremented when it 672 * get descheduled. Deletion of a PMC is only permitted when this 673 * field is '0'. 674 * 675 */ 676 677 struct pmc { 678 LIST_HEAD(,pmc_target) pm_targets; /* list of target processes */ 679 LIST_ENTRY(pmc) pm_next; /* owner's list */ 680 681 /* 682 * System-wide PMCs are allocated on a CPU and are not moved 683 * around. For system-wide PMCs we record the CPU the PMC was 684 * allocated on in the 'CPU' field of the pmc ID. 685 * 686 * Virtual PMCs run on whichever CPU is currently executing 687 * their targets' threads. For these PMCs we need to save 688 * their current PMC counter values when they are taken off 689 * CPU. 690 */ 691 692 union { 693 pmc_value_t pm_savedvalue; /* Virtual PMCS */ 694 } pm_gv; 695 696 /* 697 * For sampling mode PMCs, we keep track of the PMC's "reload 698 * count", which is the counter value to be loaded in when 699 * arming the PMC for the next counting session. For counting 700 * modes on PMCs that are read-only (e.g., the x86 TSC), we 701 * keep track of the initial value at the start of 702 * counting-mode operation. 703 */ 704 705 union { 706 pmc_value_t pm_reloadcount; /* sampling PMC modes */ 707 pmc_value_t pm_initial; /* counting PMC modes */ 708 } pm_sc; 709 710 uint32_t pm_stalled; /* marks stalled sampling PMCs */ 711 uint32_t pm_caps; /* PMC capabilities */ 712 enum pmc_event pm_event; /* event being measured */ 713 uint32_t pm_flags; /* additional flags PMC_F_... */ 714 struct pmc_owner *pm_owner; /* owner thread state */ 715 int pm_runcount; /* #cpus currently on */ 716 enum pmc_state pm_state; /* current PMC state */ 717 718 /* 719 * The PMC ID field encodes the row-index for the PMC, its 720 * mode, class and the CPU# associated with the PMC. 721 */ 722 723 pmc_id_t pm_id; /* allocated PMC id */ 724 725 /* md extensions */ 726 union pmc_md_pmc pm_md; 727 }; 728 729 /* 730 * Accessor macros for 'struct pmc' 731 */ 732 733 #define PMC_TO_MODE(P) PMC_ID_TO_MODE((P)->pm_id) 734 #define PMC_TO_CLASS(P) PMC_ID_TO_CLASS((P)->pm_id) 735 #define PMC_TO_ROWINDEX(P) PMC_ID_TO_ROWINDEX((P)->pm_id) 736 #define PMC_TO_CPU(P) PMC_ID_TO_CPU((P)->pm_id) 737 738 739 /* 740 * struct pmc_process 741 * 742 * Record a 'target' process being profiled. 743 * 744 * The target process being profiled could be different from the owner 745 * process which allocated the PMCs. Each target process descriptor 746 * is associated with NHWPMC 'struct pmc *' pointers. Each PMC at a 747 * given hardware row-index 'n' will use slot 'n' of the 'pp_pmcs[]' 748 * array. The size of this structure is thus PMC architecture 749 * dependent. 750 * 751 */ 752 753 struct pmc_targetstate { 754 struct pmc *pp_pmc; /* target PMC */ 755 pmc_value_t pp_pmcval; /* per-process value */ 756 }; 757 758 struct pmc_process { 759 LIST_ENTRY(pmc_process) pp_next; /* hash chain */ 760 int pp_refcnt; /* reference count */ 761 uint32_t pp_flags; /* flags PMC_PP_* */ 762 struct proc *pp_proc; /* target thread */ 763 struct pmc_targetstate pp_pmcs[]; /* NHWPMCs */ 764 }; 765 766 #define PMC_PP_ENABLE_MSR_ACCESS 0x00000001 767 768 /* 769 * struct pmc_owner 770 * 771 * We associate a PMC with an 'owner' process. 772 * 773 * A process can be associated with 0..NCPUS*NHWPMC PMCs during its 774 * lifetime, where NCPUS is the numbers of CPUS in the system and 775 * NHWPMC is the number of hardware PMCs per CPU. These are 776 * maintained in the list headed by the 'po_pmcs' to save on space. 777 * 778 */ 779 780 struct pmc_owner { 781 LIST_ENTRY(pmc_owner) po_next; /* hash chain */ 782 LIST_ENTRY(pmc_owner) po_ssnext; /* list of SS PMC owners */ 783 LIST_HEAD(, pmc) po_pmcs; /* owned PMC list */ 784 TAILQ_HEAD(, pmclog_buffer) po_logbuffers; /* (o) logbuffer list */ 785 struct mtx po_mtx; /* spin lock for (o) */ 786 struct proc *po_owner; /* owner proc */ 787 uint32_t po_flags; /* (k) flags PMC_PO_* */ 788 struct proc *po_kthread; /* (k) helper kthread */ 789 struct pmclog_buffer *po_curbuf; /* current log buffer */ 790 struct file *po_file; /* file reference */ 791 int po_error; /* recorded error */ 792 short po_sscount; /* # SS PMCs owned */ 793 short po_logprocmaps; /* global mappings done */ 794 }; 795 796 #define PMC_PO_OWNS_LOGFILE 0x00000001 /* has a log file */ 797 #define PMC_PO_SHUTDOWN 0x00000010 /* in the process of shutdown */ 798 #define PMC_PO_INITIAL_MAPPINGS_DONE 0x00000020 799 800 /* 801 * struct pmc_hw -- describe the state of the PMC hardware 802 * 803 * When in use, a HW PMC is associated with one allocated 'struct pmc' 804 * pointed to by field 'phw_pmc'. When inactive, this field is NULL. 805 * 806 * On an SMP box, one or more HW PMC's in process virtual mode with 807 * the same 'phw_pmc' could be executing on different CPUs. In order 808 * to handle this case correctly, we need to ensure that only 809 * incremental counts get added to the saved value in the associated 810 * 'struct pmc'. The 'phw_save' field is used to keep the saved PMC 811 * value at the time the hardware is started during this context 812 * switch (i.e., the difference between the new (hardware) count and 813 * the saved count is atomically added to the count field in 'struct 814 * pmc' at context switch time). 815 * 816 */ 817 818 struct pmc_hw { 819 uint32_t phw_state; /* see PHW_* macros below */ 820 struct pmc *phw_pmc; /* current thread PMC */ 821 }; 822 823 #define PMC_PHW_RI_MASK 0x000000FF 824 #define PMC_PHW_CPU_SHIFT 8 825 #define PMC_PHW_CPU_MASK 0x0000FF00 826 #define PMC_PHW_FLAGS_SHIFT 16 827 #define PMC_PHW_FLAGS_MASK 0xFFFF0000 828 829 #define PMC_PHW_INDEX_TO_STATE(ri) ((ri) & PMC_PHW_RI_MASK) 830 #define PMC_PHW_STATE_TO_INDEX(state) ((state) & PMC_PHW_RI_MASK) 831 #define PMC_PHW_CPU_TO_STATE(cpu) (((cpu) << PMC_PHW_CPU_SHIFT) & \ 832 PMC_PHW_CPU_MASK) 833 #define PMC_PHW_STATE_TO_CPU(state) (((state) & PMC_PHW_CPU_MASK) >> \ 834 PMC_PHW_CPU_SHIFT) 835 #define PMC_PHW_FLAGS_TO_STATE(flags) (((flags) << PMC_PHW_FLAGS_SHIFT) & \ 836 PMC_PHW_FLAGS_MASK) 837 #define PMC_PHW_STATE_TO_FLAGS(state) (((state) & PMC_PHW_FLAGS_MASK) >> \ 838 PMC_PHW_FLAGS_SHIFT) 839 #define PMC_PHW_FLAG_IS_ENABLED (PMC_PHW_FLAGS_TO_STATE(0x01)) 840 #define PMC_PHW_FLAG_IS_SHAREABLE (PMC_PHW_FLAGS_TO_STATE(0x02)) 841 842 /* 843 * struct pmc_sample 844 * 845 * Space for N (tunable) PC samples and associated control data. 846 */ 847 848 struct pmc_sample { 849 uint16_t ps_nsamples; /* callchain depth */ 850 uint8_t ps_cpu; /* cpu number */ 851 uint8_t ps_flags; /* other flags */ 852 pid_t ps_pid; /* process PID or -1 */ 853 struct thread *ps_td; /* which thread */ 854 struct pmc *ps_pmc; /* interrupting PMC */ 855 uintptr_t *ps_pc; /* (const) callchain start */ 856 }; 857 858 #define PMC_SAMPLE_FREE ((uint16_t) 0) 859 #define PMC_SAMPLE_INUSE ((uint16_t) 0xFFFF) 860 861 struct pmc_samplebuffer { 862 struct pmc_sample * volatile ps_read; /* read pointer */ 863 struct pmc_sample * volatile ps_write; /* write pointer */ 864 uintptr_t *ps_callchains; /* all saved call chains */ 865 struct pmc_sample *ps_fence; /* one beyond ps_samples[] */ 866 struct pmc_sample ps_samples[]; /* array of sample entries */ 867 }; 868 869 870 /* 871 * struct pmc_cpustate 872 * 873 * A CPU is modelled as a collection of HW PMCs with space for additional 874 * flags. 875 */ 876 877 struct pmc_cpu { 878 uint32_t pc_state; /* physical cpu number + flags */ 879 struct pmc_samplebuffer *pc_sb[2]; /* space for samples */ 880 struct pmc_hw *pc_hwpmcs[]; /* 'npmc' pointers */ 881 }; 882 883 #define PMC_PCPU_CPU_MASK 0x000000FF 884 #define PMC_PCPU_FLAGS_MASK 0xFFFFFF00 885 #define PMC_PCPU_FLAGS_SHIFT 8 886 #define PMC_PCPU_STATE_TO_CPU(S) ((S) & PMC_PCPU_CPU_MASK) 887 #define PMC_PCPU_STATE_TO_FLAGS(S) (((S) & PMC_PCPU_FLAGS_MASK) >> PMC_PCPU_FLAGS_SHIFT) 888 #define PMC_PCPU_FLAGS_TO_STATE(F) (((F) << PMC_PCPU_FLAGS_SHIFT) & PMC_PCPU_FLAGS_MASK) 889 #define PMC_PCPU_CPU_TO_STATE(C) ((C) & PMC_PCPU_CPU_MASK) 890 #define PMC_PCPU_FLAG_HTT (PMC_PCPU_FLAGS_TO_STATE(0x1)) 891 892 /* 893 * struct pmc_binding 894 * 895 * CPU binding information. 896 */ 897 898 struct pmc_binding { 899 int pb_bound; /* is bound? */ 900 int pb_cpu; /* if so, to which CPU */ 901 }; 902 903 904 struct pmc_mdep; 905 906 /* 907 * struct pmc_classdep 908 * 909 * PMC class-dependent operations. 910 */ 911 struct pmc_classdep { 912 uint32_t pcd_caps; /* class capabilities */ 913 enum pmc_class pcd_class; /* class id */ 914 int pcd_num; /* number of PMCs */ 915 int pcd_ri; /* row index of the first PMC in class */ 916 int pcd_width; /* width of the PMC */ 917 918 /* configuring/reading/writing the hardware PMCs */ 919 int (*pcd_config_pmc)(int _cpu, int _ri, struct pmc *_pm); 920 int (*pcd_get_config)(int _cpu, int _ri, struct pmc **_ppm); 921 int (*pcd_read_pmc)(int _cpu, int _ri, pmc_value_t *_value); 922 int (*pcd_write_pmc)(int _cpu, int _ri, pmc_value_t _value); 923 924 /* pmc allocation/release */ 925 int (*pcd_allocate_pmc)(int _cpu, int _ri, struct pmc *_t, 926 const struct pmc_op_pmcallocate *_a); 927 int (*pcd_release_pmc)(int _cpu, int _ri, struct pmc *_pm); 928 929 /* starting and stopping PMCs */ 930 int (*pcd_start_pmc)(int _cpu, int _ri); 931 int (*pcd_stop_pmc)(int _cpu, int _ri); 932 933 /* description */ 934 int (*pcd_describe)(int _cpu, int _ri, struct pmc_info *_pi, 935 struct pmc **_ppmc); 936 937 /* class-dependent initialization & finalization */ 938 int (*pcd_pcpu_init)(struct pmc_mdep *_md, int _cpu); 939 int (*pcd_pcpu_fini)(struct pmc_mdep *_md, int _cpu); 940 941 /* machine-specific interface */ 942 int (*pcd_get_msr)(int _ri, uint32_t *_msr); 943 }; 944 945 /* 946 * struct pmc_mdep 947 * 948 * Machine dependent bits needed per CPU type. 949 */ 950 951 struct pmc_mdep { 952 uint32_t pmd_cputype; /* from enum pmc_cputype */ 953 uint32_t pmd_npmc; /* number of PMCs per CPU */ 954 uint32_t pmd_nclass; /* number of PMC classes present */ 955 956 /* 957 * Machine dependent methods. 958 */ 959 960 /* per-cpu initialization and finalization */ 961 int (*pmd_pcpu_init)(struct pmc_mdep *_md, int _cpu); 962 int (*pmd_pcpu_fini)(struct pmc_mdep *_md, int _cpu); 963 964 /* thread context switch in/out */ 965 int (*pmd_switch_in)(struct pmc_cpu *_p, struct pmc_process *_pp); 966 int (*pmd_switch_out)(struct pmc_cpu *_p, struct pmc_process *_pp); 967 968 /* handle a PMC interrupt */ 969 int (*pmd_intr)(int _cpu, struct trapframe *_tf); 970 971 /* 972 * PMC class dependent information. 973 */ 974 struct pmc_classdep pmd_classdep[]; 975 }; 976 977 /* 978 * Per-CPU state. This is an array of 'mp_ncpu' pointers 979 * to struct pmc_cpu descriptors. 980 */ 981 982 extern struct pmc_cpu **pmc_pcpu; 983 984 /* driver statistics */ 985 extern struct pmc_op_getdriverstats pmc_stats; 986 987 #if defined(DEBUG) 988 989 /* debug flags, major flag groups */ 990 struct pmc_debugflags { 991 int pdb_CPU; 992 int pdb_CSW; 993 int pdb_LOG; 994 int pdb_MDP; 995 int pdb_MOD; 996 int pdb_OWN; 997 int pdb_PMC; 998 int pdb_PRC; 999 int pdb_SAM; 1000 }; 1001 1002 extern struct pmc_debugflags pmc_debugflags; 1003 1004 #define PMC_DEBUG_STRSIZE 128 1005 #define PMC_DEBUG_DEFAULT_FLAGS { 0, 0, 0, 0, 0, 0, 0, 0 } 1006 1007 #define PMCDBG(M,N,L,F,...) do { \ 1008 if (pmc_debugflags.pdb_ ## M & (1 << PMC_DEBUG_MIN_ ## N)) \ 1009 printf(#M ":" #N ":" #L ": " F "\n", __VA_ARGS__); \ 1010 } while (0) 1011 1012 /* Major numbers */ 1013 #define PMC_DEBUG_MAJ_CPU 0 /* cpu switches */ 1014 #define PMC_DEBUG_MAJ_CSW 1 /* context switches */ 1015 #define PMC_DEBUG_MAJ_LOG 2 /* logging */ 1016 #define PMC_DEBUG_MAJ_MDP 3 /* machine dependent */ 1017 #define PMC_DEBUG_MAJ_MOD 4 /* misc module infrastructure */ 1018 #define PMC_DEBUG_MAJ_OWN 5 /* owner */ 1019 #define PMC_DEBUG_MAJ_PMC 6 /* pmc management */ 1020 #define PMC_DEBUG_MAJ_PRC 7 /* processes */ 1021 #define PMC_DEBUG_MAJ_SAM 8 /* sampling */ 1022 1023 /* Minor numbers */ 1024 1025 /* Common (8 bits) */ 1026 #define PMC_DEBUG_MIN_ALL 0 /* allocation */ 1027 #define PMC_DEBUG_MIN_REL 1 /* release */ 1028 #define PMC_DEBUG_MIN_OPS 2 /* ops: start, stop, ... */ 1029 #define PMC_DEBUG_MIN_INI 3 /* init */ 1030 #define PMC_DEBUG_MIN_FND 4 /* find */ 1031 1032 /* MODULE */ 1033 #define PMC_DEBUG_MIN_PMH 14 /* pmc_hook */ 1034 #define PMC_DEBUG_MIN_PMS 15 /* pmc_syscall */ 1035 1036 /* OWN */ 1037 #define PMC_DEBUG_MIN_ORM 8 /* owner remove */ 1038 #define PMC_DEBUG_MIN_OMR 9 /* owner maybe remove */ 1039 1040 /* PROCESSES */ 1041 #define PMC_DEBUG_MIN_TLK 8 /* link target */ 1042 #define PMC_DEBUG_MIN_TUL 9 /* unlink target */ 1043 #define PMC_DEBUG_MIN_EXT 10 /* process exit */ 1044 #define PMC_DEBUG_MIN_EXC 11 /* process exec */ 1045 #define PMC_DEBUG_MIN_FRK 12 /* process fork */ 1046 #define PMC_DEBUG_MIN_ATT 13 /* attach/detach */ 1047 #define PMC_DEBUG_MIN_SIG 14 /* signalling */ 1048 1049 /* CONTEXT SWITCHES */ 1050 #define PMC_DEBUG_MIN_SWI 8 /* switch in */ 1051 #define PMC_DEBUG_MIN_SWO 9 /* switch out */ 1052 1053 /* PMC */ 1054 #define PMC_DEBUG_MIN_REG 8 /* pmc register */ 1055 #define PMC_DEBUG_MIN_ALR 9 /* allocate row */ 1056 1057 /* MACHINE DEPENDENT LAYER */ 1058 #define PMC_DEBUG_MIN_REA 8 /* read */ 1059 #define PMC_DEBUG_MIN_WRI 9 /* write */ 1060 #define PMC_DEBUG_MIN_CFG 10 /* config */ 1061 #define PMC_DEBUG_MIN_STA 11 /* start */ 1062 #define PMC_DEBUG_MIN_STO 12 /* stop */ 1063 #define PMC_DEBUG_MIN_INT 13 /* interrupts */ 1064 1065 /* CPU */ 1066 #define PMC_DEBUG_MIN_BND 8 /* bind */ 1067 #define PMC_DEBUG_MIN_SEL 9 /* select */ 1068 1069 /* LOG */ 1070 #define PMC_DEBUG_MIN_GTB 8 /* get buf */ 1071 #define PMC_DEBUG_MIN_SIO 9 /* schedule i/o */ 1072 #define PMC_DEBUG_MIN_FLS 10 /* flush */ 1073 #define PMC_DEBUG_MIN_SAM 11 /* sample */ 1074 #define PMC_DEBUG_MIN_CLO 12 /* close */ 1075 1076 #else 1077 #define PMCDBG(M,N,L,F,...) /* nothing */ 1078 #endif 1079 1080 /* declare a dedicated memory pool */ 1081 MALLOC_DECLARE(M_PMC); 1082 1083 /* 1084 * Functions 1085 */ 1086 1087 struct pmc_mdep *pmc_md_initialize(void); /* MD init function */ 1088 void pmc_md_finalize(struct pmc_mdep *_md); /* MD fini function */ 1089 int pmc_getrowdisp(int _ri); 1090 int pmc_process_interrupt(int _cpu, int _soft, struct pmc *_pm, 1091 struct trapframe *_tf, int _inuserspace); 1092 int pmc_save_kernel_callchain(uintptr_t *_cc, int _maxsamples, 1093 struct trapframe *_tf); 1094 int pmc_save_user_callchain(uintptr_t *_cc, int _maxsamples, 1095 struct trapframe *_tf); 1096 struct pmc_mdep *pmc_mdep_alloc(int nclasses); 1097 void pmc_mdep_free(struct pmc_mdep *md); 1098 #endif /* _KERNEL */ 1099 #endif /* _SYS_PMC_H_ */ 1100