1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2013, 2015 The FreeBSD Foundation 5 * All rights reserved. 6 * 7 * This software was developed by Konstantin Belousov <kib@FreeBSD.org> 8 * under sponsorship from the FreeBSD Foundation. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __FBSDID("$FreeBSD$"); 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/kernel.h> 38 #include <sys/lock.h> 39 #include <sys/malloc.h> 40 #include <sys/memdesc.h> 41 #include <sys/module.h> 42 #include <sys/rman.h> 43 #include <sys/rwlock.h> 44 #include <sys/smp.h> 45 #include <sys/taskqueue.h> 46 #include <sys/tree.h> 47 #include <sys/vmem.h> 48 #include <machine/bus.h> 49 #include <contrib/dev/acpica/include/acpi.h> 50 #include <contrib/dev/acpica/include/accommon.h> 51 #include <dev/acpica/acpivar.h> 52 #include <vm/vm.h> 53 #include <vm/vm_extern.h> 54 #include <vm/vm_kern.h> 55 #include <vm/vm_object.h> 56 #include <vm/vm_page.h> 57 #include <vm/vm_pager.h> 58 #include <vm/vm_map.h> 59 #include <x86/include/busdma_impl.h> 60 #include <x86/iommu/intel_reg.h> 61 #include <x86/iommu/busdma_dmar.h> 62 #include <x86/iommu/intel_dmar.h> 63 #include <dev/pci/pcivar.h> 64 65 typedef void (*dmar_quirk_cpu_fun)(struct dmar_unit *); 66 67 struct intel_dmar_quirk_cpu { 68 u_int ext_family; 69 u_int ext_model; 70 u_int family_code; 71 u_int model; 72 u_int stepping; 73 dmar_quirk_cpu_fun quirk; 74 const char *descr; 75 }; 76 77 typedef void (*dmar_quirk_nb_fun)(struct dmar_unit *, device_t nb); 78 79 struct intel_dmar_quirk_nb { 80 u_int dev_id; 81 u_int rev_no; 82 dmar_quirk_nb_fun quirk; 83 const char *descr; 84 }; 85 86 #define QUIRK_NB_ALL_REV 0xffffffff 87 88 static void 89 dmar_match_quirks(struct dmar_unit *dmar, 90 const struct intel_dmar_quirk_nb *nb_quirks, int nb_quirks_len, 91 const struct intel_dmar_quirk_cpu *cpu_quirks, int cpu_quirks_len) 92 { 93 device_t nb; 94 const struct intel_dmar_quirk_nb *nb_quirk; 95 const struct intel_dmar_quirk_cpu *cpu_quirk; 96 u_int p[4]; 97 u_int dev_id, rev_no; 98 u_int ext_family, ext_model, family_code, model, stepping; 99 int i; 100 101 if (nb_quirks != NULL) { 102 nb = pci_find_bsf(0, 0, 0); 103 if (nb != NULL) { 104 dev_id = pci_get_device(nb); 105 rev_no = pci_get_revid(nb); 106 for (i = 0; i < nb_quirks_len; i++) { 107 nb_quirk = &nb_quirks[i]; 108 if (nb_quirk->dev_id == dev_id && 109 (nb_quirk->rev_no == rev_no || 110 nb_quirk->rev_no == QUIRK_NB_ALL_REV)) { 111 if (bootverbose) { 112 device_printf(dmar->dev, 113 "NB IOMMU quirk %s\n", 114 nb_quirk->descr); 115 } 116 nb_quirk->quirk(dmar, nb); 117 } 118 } 119 } else { 120 device_printf(dmar->dev, "cannot find northbridge\n"); 121 } 122 } 123 if (cpu_quirks != NULL) { 124 do_cpuid(1, p); 125 ext_family = (p[0] & CPUID_EXT_FAMILY) >> 20; 126 ext_model = (p[0] & CPUID_EXT_MODEL) >> 16; 127 family_code = (p[0] & CPUID_FAMILY) >> 8; 128 model = (p[0] & CPUID_MODEL) >> 4; 129 stepping = p[0] & CPUID_STEPPING; 130 for (i = 0; i < cpu_quirks_len; i++) { 131 cpu_quirk = &cpu_quirks[i]; 132 if (cpu_quirk->ext_family == ext_family && 133 cpu_quirk->ext_model == ext_model && 134 cpu_quirk->family_code == family_code && 135 cpu_quirk->model == model && 136 (cpu_quirk->stepping == -1 || 137 cpu_quirk->stepping == stepping)) { 138 if (bootverbose) { 139 device_printf(dmar->dev, 140 "CPU IOMMU quirk %s\n", 141 cpu_quirk->descr); 142 } 143 cpu_quirk->quirk(dmar); 144 } 145 } 146 } 147 } 148 149 static void 150 nb_5400_no_low_high_prot_mem(struct dmar_unit *unit, device_t nb __unused) 151 { 152 153 unit->hw_cap &= ~(DMAR_CAP_PHMR | DMAR_CAP_PLMR); 154 } 155 156 static void 157 nb_no_ir(struct dmar_unit *unit, device_t nb __unused) 158 { 159 160 unit->hw_ecap &= ~(DMAR_ECAP_IR | DMAR_ECAP_EIM); 161 } 162 163 static void 164 nb_5500_no_ir_rev13(struct dmar_unit *unit, device_t nb) 165 { 166 u_int rev_no; 167 168 rev_no = pci_get_revid(nb); 169 if (rev_no <= 0x13) 170 nb_no_ir(unit, nb); 171 } 172 173 static const struct intel_dmar_quirk_nb pre_use_nb[] = { 174 { 175 .dev_id = 0x4001, .rev_no = 0x20, 176 .quirk = nb_5400_no_low_high_prot_mem, 177 .descr = "5400 E23" /* no low/high protected memory */ 178 }, 179 { 180 .dev_id = 0x4003, .rev_no = 0x20, 181 .quirk = nb_5400_no_low_high_prot_mem, 182 .descr = "5400 E23" /* no low/high protected memory */ 183 }, 184 { 185 .dev_id = 0x3403, .rev_no = QUIRK_NB_ALL_REV, 186 .quirk = nb_5500_no_ir_rev13, 187 .descr = "5500 E47, E53" /* interrupt remapping does not work */ 188 }, 189 { 190 .dev_id = 0x3405, .rev_no = QUIRK_NB_ALL_REV, 191 .quirk = nb_5500_no_ir_rev13, 192 .descr = "5500 E47, E53" /* interrupt remapping does not work */ 193 }, 194 { 195 .dev_id = 0x3405, .rev_no = 0x22, 196 .quirk = nb_no_ir, 197 .descr = "5500 E47, E53" /* interrupt remapping does not work */ 198 }, 199 { 200 .dev_id = 0x3406, .rev_no = QUIRK_NB_ALL_REV, 201 .quirk = nb_5500_no_ir_rev13, 202 .descr = "5500 E47, E53" /* interrupt remapping does not work */ 203 }, 204 }; 205 206 static void 207 cpu_e5_am9(struct dmar_unit *unit) 208 { 209 210 unit->hw_cap &= ~(0x3fULL << 48); 211 unit->hw_cap |= (9ULL << 48); 212 } 213 214 static const struct intel_dmar_quirk_cpu post_ident_cpu[] = { 215 { 216 .ext_family = 0, .ext_model = 2, .family_code = 6, .model = 13, 217 .stepping = 6, .quirk = cpu_e5_am9, 218 .descr = "E5 BT176" /* AM should be at most 9 */ 219 }, 220 }; 221 222 void 223 dmar_quirks_pre_use(struct dmar_unit *dmar) 224 { 225 226 if (!dmar_barrier_enter(dmar, DMAR_BARRIER_USEQ)) 227 return; 228 DMAR_LOCK(dmar); 229 dmar_match_quirks(dmar, pre_use_nb, nitems(pre_use_nb), 230 NULL, 0); 231 dmar_barrier_exit(dmar, DMAR_BARRIER_USEQ); 232 } 233 234 void 235 dmar_quirks_post_ident(struct dmar_unit *dmar) 236 { 237 238 dmar_match_quirks(dmar, NULL, 0, post_ident_cpu, 239 nitems(post_ident_cpu)); 240 } 241