1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 1990 The Regents of the University of California. 5 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org> 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz and Don Ahn. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 36 */ 37 38 #include <sys/cdefs.h> 39 /* 40 * Routines to handle clock hardware. 41 */ 42 43 #ifdef __amd64__ 44 #define DEV_APIC 45 #else 46 #include "opt_apic.h" 47 #endif 48 #include "opt_clock.h" 49 #include "opt_isa.h" 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/bus.h> 54 #include <sys/lock.h> 55 #include <sys/kdb.h> 56 #include <sys/mutex.h> 57 #include <sys/proc.h> 58 #include <sys/kernel.h> 59 #include <sys/module.h> 60 #include <sys/rman.h> 61 #include <sys/sched.h> 62 #include <sys/smp.h> 63 #include <sys/sysctl.h> 64 #include <sys/timeet.h> 65 #include <sys/timetc.h> 66 67 #include <machine/clock.h> 68 #include <machine/cpu.h> 69 #include <machine/intr_machdep.h> 70 #include <x86/apicvar.h> 71 #include <x86/init.h> 72 #include <x86/ppireg.h> 73 #include <x86/timerreg.h> 74 75 #include <isa/rtc.h> 76 #ifdef DEV_ISA 77 #include <isa/isareg.h> 78 #include <isa/isavar.h> 79 #endif 80 81 int clkintr_pending; 82 #ifndef TIMER_FREQ 83 #define TIMER_FREQ 1193182 84 #endif 85 u_int i8254_freq = TIMER_FREQ; 86 TUNABLE_INT("hw.i8254.freq", &i8254_freq); 87 int i8254_max_count; 88 static int i8254_timecounter = 1; 89 90 static struct mtx clock_lock; 91 static struct intsrc *i8254_intsrc; 92 static uint16_t i8254_lastcount; 93 static uint16_t i8254_offset; 94 static int (*i8254_pending)(struct intsrc *); 95 static int i8254_ticked; 96 97 struct attimer_softc { 98 int intr_en; 99 int port_rid, intr_rid; 100 struct resource *port_res; 101 struct resource *intr_res; 102 void *intr_handler; 103 struct timecounter tc; 104 struct eventtimer et; 105 int mode; 106 #define MODE_STOP 0 107 #define MODE_PERIODIC 1 108 #define MODE_ONESHOT 2 109 uint32_t period; 110 }; 111 static struct attimer_softc *attimer_sc = NULL; 112 113 static int timer0_period = -2; 114 static int timer0_mode = 0xffff; 115 static int timer0_last = 0xffff; 116 117 /* Values for timerX_state: */ 118 #define RELEASED 0 119 #define RELEASE_PENDING 1 120 #define ACQUIRED 2 121 #define ACQUIRE_PENDING 3 122 123 static u_char timer2_state; 124 125 static unsigned i8254_get_timecount(struct timecounter *tc); 126 static void set_i8254_freq(int mode, uint32_t period); 127 128 void 129 clock_init(void) 130 { 131 /* Init the clock lock */ 132 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE); 133 /* Init the clock in order to use DELAY */ 134 init_ops.early_clock_source_init(); 135 tsc_init(); 136 } 137 138 static int 139 clkintr(void *arg) 140 { 141 struct attimer_softc *sc = (struct attimer_softc *)arg; 142 143 if (i8254_timecounter && sc->period != 0) { 144 mtx_lock_spin(&clock_lock); 145 if (i8254_ticked) 146 i8254_ticked = 0; 147 else { 148 i8254_offset += i8254_max_count; 149 i8254_lastcount = 0; 150 } 151 clkintr_pending = 0; 152 mtx_unlock_spin(&clock_lock); 153 } 154 155 if (sc->et.et_active && sc->mode != MODE_STOP) 156 sc->et.et_event_cb(&sc->et, sc->et.et_arg); 157 158 return (FILTER_HANDLED); 159 } 160 161 int 162 timer_spkr_acquire(void) 163 { 164 int mode; 165 166 mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT; 167 168 if (timer2_state != RELEASED) 169 return (-1); 170 timer2_state = ACQUIRED; 171 172 /* 173 * This access to the timer registers is as atomic as possible 174 * because it is a single instruction. We could do better if we 175 * knew the rate. Use of splclock() limits glitches to 10-100us, 176 * and this is probably good enough for timer2, so we aren't as 177 * careful with it as with timer0. 178 */ 179 outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f)); 180 181 ppi_spkr_on(); /* enable counter2 output to speaker */ 182 return (0); 183 } 184 185 int 186 timer_spkr_release(void) 187 { 188 189 if (timer2_state != ACQUIRED) 190 return (-1); 191 timer2_state = RELEASED; 192 outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT); 193 194 ppi_spkr_off(); /* disable counter2 output to speaker */ 195 return (0); 196 } 197 198 void 199 timer_spkr_setfreq(int freq) 200 { 201 202 freq = i8254_freq / freq; 203 mtx_lock_spin(&clock_lock); 204 outb(TIMER_CNTR2, freq & 0xff); 205 outb(TIMER_CNTR2, freq >> 8); 206 mtx_unlock_spin(&clock_lock); 207 } 208 209 static int 210 getit(void) 211 { 212 int high, low; 213 214 mtx_lock_spin(&clock_lock); 215 216 /* Select timer0 and latch counter value. */ 217 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 218 219 low = inb(TIMER_CNTR0); 220 high = inb(TIMER_CNTR0); 221 222 mtx_unlock_spin(&clock_lock); 223 return ((high << 8) | low); 224 } 225 226 /* 227 * Wait "n" microseconds. 228 * Relies on timer 1 counting down from (i8254_freq / hz) 229 * Note: timer had better have been programmed before this is first used! 230 */ 231 void 232 i8254_delay(int n) 233 { 234 int delta, prev_tick, tick, ticks_left; 235 #ifdef DELAYDEBUG 236 int getit_calls = 1; 237 int n1; 238 static int state = 0; 239 240 if (state == 0) { 241 state = 1; 242 for (n1 = 1; n1 <= 10000000; n1 *= 10) 243 DELAY(n1); 244 state = 2; 245 } 246 if (state == 1) 247 printf("DELAY(%d)...", n); 248 #endif 249 /* 250 * Read the counter first, so that the rest of the setup overhead is 251 * counted. Guess the initial overhead is 20 usec (on most systems it 252 * takes about 1.5 usec for each of the i/o's in getit(). The loop 253 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The 254 * multiplications and divisions to scale the count take a while). 255 * 256 * However, if ddb is active then use a fake counter since reading 257 * the i8254 counter involves acquiring a lock. ddb must not do 258 * locking for many reasons, but it calls here for at least atkbd 259 * input. 260 */ 261 #ifdef KDB 262 if (kdb_active) 263 prev_tick = 1; 264 else 265 #endif 266 prev_tick = getit(); 267 n -= 0; /* XXX actually guess no initial overhead */ 268 /* 269 * Calculate (n * (i8254_freq / 1e6)) without using floating point 270 * and without any avoidable overflows. 271 */ 272 if (n <= 0) 273 ticks_left = 0; 274 else if (n < 256) 275 /* 276 * Use fixed point to avoid a slow division by 1000000. 277 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest. 278 * 2^15 is the first power of 2 that gives exact results 279 * for n between 0 and 256. 280 */ 281 ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15; 282 else 283 /* 284 * Don't bother using fixed point, although gcc-2.7.2 285 * generates particularly poor code for the long long 286 * division, since even the slow way will complete long 287 * before the delay is up (unless we're interrupted). 288 */ 289 ticks_left = ((u_int)n * (long long)i8254_freq + 999999) 290 / 1000000; 291 292 while (ticks_left > 0) { 293 #ifdef KDB 294 if (kdb_active) { 295 inb(0x84); 296 tick = prev_tick - 1; 297 if (tick <= 0) 298 tick = i8254_max_count; 299 } else 300 #endif 301 tick = getit(); 302 #ifdef DELAYDEBUG 303 ++getit_calls; 304 #endif 305 delta = prev_tick - tick; 306 prev_tick = tick; 307 if (delta < 0) { 308 delta += i8254_max_count; 309 /* 310 * Guard against i8254_max_count being wrong. 311 * This shouldn't happen in normal operation, 312 * but it may happen if set_i8254_freq() is 313 * traced. 314 */ 315 if (delta < 0) 316 delta = 0; 317 } 318 ticks_left -= delta; 319 } 320 #ifdef DELAYDEBUG 321 if (state == 1) 322 printf(" %d calls to getit() at %d usec each\n", 323 getit_calls, (n + 5) / getit_calls); 324 #endif 325 } 326 327 static void 328 set_i8254_freq(int mode, uint32_t period) 329 { 330 int new_count, new_mode; 331 332 mtx_lock_spin(&clock_lock); 333 if (mode == MODE_STOP) { 334 if (i8254_timecounter) { 335 mode = MODE_PERIODIC; 336 new_count = 0x10000; 337 } else 338 new_count = -1; 339 } else { 340 new_count = min(((uint64_t)i8254_freq * period + 341 0x80000000LLU) >> 32, 0x10000); 342 } 343 if (new_count == timer0_period) 344 goto out; 345 i8254_max_count = ((new_count & ~0xffff) != 0) ? 0xffff : new_count; 346 timer0_period = (mode == MODE_PERIODIC) ? new_count : -1; 347 switch (mode) { 348 case MODE_STOP: 349 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT; 350 outb(TIMER_MODE, new_mode); 351 outb(TIMER_CNTR0, 0); 352 outb(TIMER_CNTR0, 0); 353 break; 354 case MODE_PERIODIC: 355 new_mode = TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT; 356 outb(TIMER_MODE, new_mode); 357 outb(TIMER_CNTR0, new_count & 0xff); 358 outb(TIMER_CNTR0, new_count >> 8); 359 break; 360 case MODE_ONESHOT: 361 if (new_count < 256 && timer0_last < 256) { 362 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_LSB; 363 if (new_mode != timer0_mode) 364 outb(TIMER_MODE, new_mode); 365 outb(TIMER_CNTR0, new_count & 0xff); 366 break; 367 } 368 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT; 369 if (new_mode != timer0_mode) 370 outb(TIMER_MODE, new_mode); 371 outb(TIMER_CNTR0, new_count & 0xff); 372 outb(TIMER_CNTR0, new_count >> 8); 373 break; 374 default: 375 panic("set_i8254_freq: unknown operational mode"); 376 } 377 timer0_mode = new_mode; 378 timer0_last = new_count; 379 out: 380 mtx_unlock_spin(&clock_lock); 381 } 382 383 static void 384 i8254_restore(void) 385 { 386 387 timer0_period = -2; 388 timer0_mode = 0xffff; 389 timer0_last = 0xffff; 390 if (attimer_sc != NULL) 391 set_i8254_freq(attimer_sc->mode, attimer_sc->period); 392 else 393 set_i8254_freq(MODE_STOP, 0); 394 } 395 396 /* This is separate from startrtclock() so that it can be called early. */ 397 void 398 i8254_init(void) 399 { 400 401 set_i8254_freq(MODE_STOP, 0); 402 } 403 404 void 405 startrtclock(void) 406 { 407 408 start_TSC(); 409 } 410 411 void 412 cpu_initclocks(void) 413 { 414 #ifdef EARLY_AP_STARTUP 415 struct thread *td; 416 int i; 417 418 td = curthread; 419 420 tsc_calibrate(); 421 #ifdef DEV_APIC 422 lapic_calibrate_timer(); 423 #endif 424 cpu_initclocks_bsp(); 425 CPU_FOREACH(i) { 426 if (i == 0) 427 continue; 428 thread_lock(td); 429 sched_bind(td, i); 430 thread_unlock(td); 431 cpu_initclocks_ap(); 432 } 433 thread_lock(td); 434 if (sched_is_bound(td)) 435 sched_unbind(td); 436 thread_unlock(td); 437 #else 438 tsc_calibrate(); 439 #ifdef DEV_APIC 440 lapic_calibrate_timer(); 441 #endif 442 cpu_initclocks_bsp(); 443 #endif 444 } 445 446 static int 447 sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS) 448 { 449 int error; 450 u_int freq; 451 452 /* 453 * Use `i8254' instead of `timer' in external names because `timer' 454 * is too generic. Should use it everywhere. 455 */ 456 freq = i8254_freq; 457 error = sysctl_handle_int(oidp, &freq, 0, req); 458 if (error == 0 && req->newptr != NULL) { 459 i8254_freq = freq; 460 if (attimer_sc != NULL) { 461 set_i8254_freq(attimer_sc->mode, attimer_sc->period); 462 attimer_sc->tc.tc_frequency = freq; 463 } else { 464 set_i8254_freq(MODE_STOP, 0); 465 } 466 } 467 return (error); 468 } 469 470 SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, 471 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, 472 0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", 473 "i8254 timer frequency"); 474 475 static unsigned 476 i8254_get_timecount(struct timecounter *tc) 477 { 478 device_t dev = (device_t)tc->tc_priv; 479 struct attimer_softc *sc = device_get_softc(dev); 480 register_t flags; 481 uint16_t count; 482 u_int high, low; 483 484 if (sc->period == 0) 485 return (i8254_max_count - getit()); 486 487 #ifdef __amd64__ 488 flags = read_rflags(); 489 #else 490 flags = read_eflags(); 491 #endif 492 mtx_lock_spin(&clock_lock); 493 494 /* Select timer0 and latch counter value. */ 495 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 496 497 low = inb(TIMER_CNTR0); 498 high = inb(TIMER_CNTR0); 499 count = i8254_max_count - ((high << 8) | low); 500 if (count < i8254_lastcount || 501 (!i8254_ticked && (clkintr_pending || 502 ((count < 20 || (!(flags & PSL_I) && 503 count < i8254_max_count / 2u)) && 504 i8254_pending != NULL && i8254_pending(i8254_intsrc))))) { 505 i8254_ticked = 1; 506 i8254_offset += i8254_max_count; 507 } 508 i8254_lastcount = count; 509 count += i8254_offset; 510 mtx_unlock_spin(&clock_lock); 511 return (count); 512 } 513 514 static int 515 attimer_start(struct eventtimer *et, sbintime_t first, sbintime_t period) 516 { 517 device_t dev = (device_t)et->et_priv; 518 struct attimer_softc *sc = device_get_softc(dev); 519 520 if (period != 0) { 521 sc->mode = MODE_PERIODIC; 522 sc->period = period; 523 } else { 524 sc->mode = MODE_ONESHOT; 525 sc->period = first; 526 } 527 if (!sc->intr_en) { 528 i8254_intsrc->is_pic->pic_enable_source(i8254_intsrc); 529 sc->intr_en = 1; 530 } 531 set_i8254_freq(sc->mode, sc->period); 532 return (0); 533 } 534 535 static int 536 attimer_stop(struct eventtimer *et) 537 { 538 device_t dev = (device_t)et->et_priv; 539 struct attimer_softc *sc = device_get_softc(dev); 540 541 sc->mode = MODE_STOP; 542 sc->period = 0; 543 set_i8254_freq(sc->mode, sc->period); 544 return (0); 545 } 546 547 #ifdef DEV_ISA 548 /* 549 * Attach to the ISA PnP descriptors for the timer 550 */ 551 static struct isa_pnp_id attimer_ids[] = { 552 { 0x0001d041 /* PNP0100 */, "AT timer" }, 553 { 0 } 554 }; 555 556 static int 557 attimer_probe(device_t dev) 558 { 559 int result; 560 561 result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids); 562 /* ENOENT means no PnP-ID, device is hinted. */ 563 if (result == ENOENT) { 564 device_set_desc(dev, "AT timer"); 565 return (BUS_PROBE_LOW_PRIORITY); 566 } 567 return (result); 568 } 569 570 static int 571 attimer_attach(device_t dev) 572 { 573 struct attimer_softc *sc; 574 rman_res_t s; 575 int i; 576 577 attimer_sc = sc = device_get_softc(dev); 578 bzero(sc, sizeof(struct attimer_softc)); 579 if (!(sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, 580 &sc->port_rid, IO_TIMER1, IO_TIMER1 + 3, 4, RF_ACTIVE))) 581 device_printf(dev,"Warning: Couldn't map I/O.\n"); 582 i8254_intsrc = intr_lookup_source(0); 583 if (i8254_intsrc != NULL) 584 i8254_pending = i8254_intsrc->is_pic->pic_source_pending; 585 resource_int_value(device_get_name(dev), device_get_unit(dev), 586 "timecounter", &i8254_timecounter); 587 set_i8254_freq(MODE_STOP, 0); 588 if (i8254_timecounter) { 589 sc->tc.tc_get_timecount = i8254_get_timecount; 590 sc->tc.tc_counter_mask = 0xffff; 591 sc->tc.tc_frequency = i8254_freq; 592 sc->tc.tc_name = "i8254"; 593 sc->tc.tc_quality = 0; 594 sc->tc.tc_priv = dev; 595 tc_init(&sc->tc); 596 } 597 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 598 "clock", &i) != 0 || i != 0) { 599 sc->intr_rid = 0; 600 while (bus_get_resource(dev, SYS_RES_IRQ, sc->intr_rid, 601 &s, NULL) == 0 && s != 0) 602 sc->intr_rid++; 603 if (!(sc->intr_res = bus_alloc_resource(dev, SYS_RES_IRQ, 604 &sc->intr_rid, 0, 0, 1, RF_ACTIVE))) { 605 device_printf(dev,"Can't map interrupt.\n"); 606 return (0); 607 } 608 /* Dirty hack, to make bus_setup_intr to not enable source. */ 609 i8254_intsrc->is_handlers++; 610 if ((bus_setup_intr(dev, sc->intr_res, 611 INTR_MPSAFE | INTR_TYPE_CLK, 612 (driver_filter_t *)clkintr, NULL, 613 sc, &sc->intr_handler))) { 614 device_printf(dev, "Can't setup interrupt.\n"); 615 i8254_intsrc->is_handlers--; 616 return (0); 617 } 618 i8254_intsrc->is_handlers--; 619 i8254_intsrc->is_pic->pic_enable_intr(i8254_intsrc); 620 sc->et.et_name = "i8254"; 621 sc->et.et_flags = ET_FLAGS_PERIODIC; 622 if (!i8254_timecounter) 623 sc->et.et_flags |= ET_FLAGS_ONESHOT; 624 sc->et.et_quality = 100; 625 sc->et.et_frequency = i8254_freq; 626 sc->et.et_min_period = (0x0002LLU << 32) / i8254_freq; 627 sc->et.et_max_period = (0xfffeLLU << 32) / i8254_freq; 628 sc->et.et_start = attimer_start; 629 sc->et.et_stop = attimer_stop; 630 sc->et.et_priv = dev; 631 et_register(&sc->et); 632 } 633 return(0); 634 } 635 636 static int 637 attimer_resume(device_t dev) 638 { 639 640 i8254_restore(); 641 return (0); 642 } 643 644 static device_method_t attimer_methods[] = { 645 /* Device interface */ 646 DEVMETHOD(device_probe, attimer_probe), 647 DEVMETHOD(device_attach, attimer_attach), 648 DEVMETHOD(device_detach, bus_generic_detach), 649 DEVMETHOD(device_shutdown, bus_generic_shutdown), 650 DEVMETHOD(device_suspend, bus_generic_suspend), 651 DEVMETHOD(device_resume, attimer_resume), 652 { 0, 0 } 653 }; 654 655 static driver_t attimer_driver = { 656 "attimer", 657 attimer_methods, 658 sizeof(struct attimer_softc), 659 }; 660 661 DRIVER_MODULE(attimer, isa, attimer_driver, 0, 0); 662 DRIVER_MODULE(attimer, acpi, attimer_driver, 0, 0); 663 ISA_PNP_INFO(attimer_ids); 664 665 #endif /* DEV_ISA */ 666