1 /*- 2 * Copyright 1998 Massachusetts Institute of Technology 3 * 4 * Permission to use, copy, modify, and distribute this software and 5 * its documentation for any purpose and without fee is hereby 6 * granted, provided that both the above copyright notice and this 7 * permission notice appear in all copies, that both the above 8 * copyright notice and this permission notice appear in all 9 * supporting documentation, and that the name of M.I.T. not be used 10 * in advertising or publicity pertaining to distribution of the 11 * software without specific, written prior permission. M.I.T. makes 12 * no representations about the suitability of this software for any 13 * purpose. It is provided "as is" without express or implied 14 * warranty. 15 * 16 * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS 17 * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE, 18 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT 20 * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /* 34 * This code implements a system driver for legacy systems that do not 35 * support ACPI or when ACPI support is not present in the kernel. 36 */ 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/bus.h> 41 #include <sys/cpu.h> 42 #include <sys/kernel.h> 43 #include <sys/malloc.h> 44 #include <sys/module.h> 45 #include <machine/bus.h> 46 #include <sys/pcpu.h> 47 #include <sys/rman.h> 48 #include <sys/smp.h> 49 #include <dev/pci/pcireg.h> 50 51 #include <machine/clock.h> 52 #include <machine/pci_cfgreg.h> 53 #include <machine/resource.h> 54 #include <x86/legacyvar.h> 55 56 static MALLOC_DEFINE(M_LEGACYDEV, "legacydrv", "legacy system device"); 57 struct legacy_device { 58 int lg_pcibus; 59 int lg_pcislot; 60 int lg_pcifunc; 61 }; 62 63 #define DEVTOAT(dev) ((struct legacy_device *)device_get_ivars(dev)) 64 65 static int legacy_probe(device_t); 66 static int legacy_attach(device_t); 67 static int legacy_print_child(device_t, device_t); 68 static device_t legacy_add_child(device_t bus, u_int order, const char *name, 69 int unit); 70 static int legacy_read_ivar(device_t, device_t, int, uintptr_t *); 71 static int legacy_write_ivar(device_t, device_t, int, uintptr_t); 72 73 static device_method_t legacy_methods[] = { 74 /* Device interface */ 75 DEVMETHOD(device_probe, legacy_probe), 76 DEVMETHOD(device_attach, legacy_attach), 77 DEVMETHOD(device_detach, bus_generic_detach), 78 DEVMETHOD(device_shutdown, bus_generic_shutdown), 79 DEVMETHOD(device_suspend, bus_generic_suspend), 80 DEVMETHOD(device_resume, bus_generic_resume), 81 82 /* Bus interface */ 83 DEVMETHOD(bus_print_child, legacy_print_child), 84 DEVMETHOD(bus_add_child, legacy_add_child), 85 DEVMETHOD(bus_read_ivar, legacy_read_ivar), 86 DEVMETHOD(bus_write_ivar, legacy_write_ivar), 87 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), 88 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource), 89 DEVMETHOD(bus_release_resource, bus_generic_release_resource), 90 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 91 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 92 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 93 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 94 { 0, 0 } 95 }; 96 97 static driver_t legacy_driver = { 98 "legacy", 99 legacy_methods, 100 1, /* no softc */ 101 }; 102 103 DRIVER_MODULE(legacy, nexus, legacy_driver, 0, 0); 104 105 static int 106 legacy_probe(device_t dev) 107 { 108 109 device_set_desc(dev, "legacy system"); 110 device_quiet(dev); 111 return (0); 112 } 113 114 /* 115 * Grope around in the PCI config space to see if this is a chipset 116 * that is capable of doing memory-mapped config cycles. This also 117 * implies that it can do PCIe extended config cycles. 118 */ 119 static void 120 legacy_pci_cfgregopen(device_t dev) 121 { 122 uint64_t pciebar; 123 u_int16_t did, vid; 124 125 if (cfgmech == CFGMECH_NONE || cfgmech == CFGMECH_PCIE) 126 return; 127 128 /* Check for supported chipsets */ 129 vid = pci_cfgregread(0, 0, 0, PCIR_VENDOR, 2); 130 did = pci_cfgregread(0, 0, 0, PCIR_DEVICE, 2); 131 switch (vid) { 132 case 0x8086: 133 switch (did) { 134 case 0x3590: 135 case 0x3592: 136 /* Intel 7520 or 7320 */ 137 pciebar = pci_cfgregread(0, 0, 0, 0xce, 2) << 16; 138 pcie_cfgregopen(pciebar, 0, 255); 139 break; 140 case 0x2580: 141 case 0x2584: 142 case 0x2590: 143 /* Intel 915, 925, or 915GM */ 144 pciebar = pci_cfgregread(0, 0, 0, 0x48, 4); 145 pcie_cfgregopen(pciebar, 0, 255); 146 break; 147 } 148 } 149 150 if (bootverbose && cfgmech == CFGMECH_PCIE) 151 device_printf(dev, "Enabled ECAM PCIe accesses\n"); 152 } 153 154 static int 155 legacy_attach(device_t dev) 156 { 157 device_t child; 158 159 legacy_pci_cfgregopen(dev); 160 161 /* 162 * Let our child drivers identify any child devices that they 163 * can find. Once that is done attach any devices that we 164 * found. 165 */ 166 bus_generic_probe(dev); 167 bus_generic_attach(dev); 168 169 /* 170 * If we didn't see ISA on a PCI bridge, add a top-level bus. 171 */ 172 if (!devclass_get_device(devclass_find("isa"), 0)) { 173 child = BUS_ADD_CHILD(dev, 0, "isa", 0); 174 if (child == NULL) 175 panic("legacy_attach isa"); 176 device_probe_and_attach(child); 177 } 178 179 return 0; 180 } 181 182 static int 183 legacy_print_child(device_t bus, device_t child) 184 { 185 struct legacy_device *atdev = DEVTOAT(child); 186 int retval = 0; 187 188 retval += bus_print_child_header(bus, child); 189 if (atdev->lg_pcibus != -1) 190 retval += printf(" pcibus %d", atdev->lg_pcibus); 191 retval += printf("\n"); 192 193 return (retval); 194 } 195 196 static device_t 197 legacy_add_child(device_t bus, u_int order, const char *name, int unit) 198 { 199 device_t child; 200 struct legacy_device *atdev; 201 202 atdev = malloc(sizeof(struct legacy_device), M_LEGACYDEV, 203 M_NOWAIT | M_ZERO); 204 if (atdev == NULL) 205 return(NULL); 206 atdev->lg_pcibus = -1; 207 atdev->lg_pcislot = -1; 208 atdev->lg_pcifunc = -1; 209 210 child = device_add_child_ordered(bus, order, name, unit); 211 if (child == NULL) 212 free(atdev, M_LEGACYDEV); 213 else 214 /* should we free this in legacy_child_detached? */ 215 device_set_ivars(child, atdev); 216 217 return (child); 218 } 219 220 static int 221 legacy_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 222 { 223 struct legacy_device *atdev = DEVTOAT(child); 224 225 switch (which) { 226 case LEGACY_IVAR_PCIDOMAIN: 227 *result = 0; 228 break; 229 case LEGACY_IVAR_PCIBUS: 230 *result = atdev->lg_pcibus; 231 break; 232 case LEGACY_IVAR_PCISLOT: 233 *result = atdev->lg_pcislot; 234 break; 235 case LEGACY_IVAR_PCIFUNC: 236 *result = atdev->lg_pcifunc; 237 break; 238 default: 239 return ENOENT; 240 } 241 return 0; 242 } 243 244 static int 245 legacy_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 246 { 247 struct legacy_device *atdev = DEVTOAT(child); 248 249 switch (which) { 250 case LEGACY_IVAR_PCIDOMAIN: 251 return EINVAL; 252 case LEGACY_IVAR_PCIBUS: 253 atdev->lg_pcibus = value; 254 break; 255 case LEGACY_IVAR_PCISLOT: 256 atdev->lg_pcislot = value; 257 break; 258 case LEGACY_IVAR_PCIFUNC: 259 atdev->lg_pcifunc = value; 260 break; 261 default: 262 return ENOENT; 263 } 264 return 0; 265 } 266 267 /* 268 * Legacy CPU attachment when ACPI is not available. Drivers like 269 * cpufreq(4) hang off this. 270 */ 271 static void cpu_identify(driver_t *driver, device_t parent); 272 static int cpu_read_ivar(device_t dev, device_t child, int index, 273 uintptr_t *result); 274 static device_t cpu_add_child(device_t bus, u_int order, const char *name, 275 int unit); 276 static struct resource_list *cpu_get_rlist(device_t dev, device_t child); 277 278 struct cpu_device { 279 struct resource_list cd_rl; 280 struct pcpu *cd_pcpu; 281 }; 282 283 static device_method_t cpu_methods[] = { 284 /* Device interface */ 285 DEVMETHOD(device_identify, cpu_identify), 286 DEVMETHOD(device_probe, bus_generic_probe), 287 DEVMETHOD(device_attach, bus_generic_attach), 288 DEVMETHOD(device_detach, bus_generic_detach), 289 DEVMETHOD(device_shutdown, bus_generic_shutdown), 290 DEVMETHOD(device_suspend, bus_generic_suspend), 291 DEVMETHOD(device_resume, bus_generic_resume), 292 293 /* Bus interface */ 294 DEVMETHOD(bus_add_child, cpu_add_child), 295 DEVMETHOD(bus_read_ivar, cpu_read_ivar), 296 DEVMETHOD(bus_get_resource_list, cpu_get_rlist), 297 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 298 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 299 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 300 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 301 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 302 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 303 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 304 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 305 306 DEVMETHOD_END 307 }; 308 309 static driver_t cpu_driver = { 310 "cpu", 311 cpu_methods, 312 1, /* no softc */ 313 }; 314 315 DRIVER_MODULE(cpu, legacy, cpu_driver, 0, 0); 316 317 static void 318 cpu_identify(driver_t *driver, device_t parent) 319 { 320 device_t child; 321 int i; 322 323 /* 324 * Attach a cpuX device for each CPU. We use an order of 150 325 * so that these devices are attached after the Host-PCI 326 * bridges (which are added at order 100). 327 */ 328 CPU_FOREACH(i) { 329 child = BUS_ADD_CHILD(parent, 150, "cpu", i); 330 if (child == NULL) 331 panic("legacy_attach cpu"); 332 } 333 } 334 335 static device_t 336 cpu_add_child(device_t bus, u_int order, const char *name, int unit) 337 { 338 struct cpu_device *cd; 339 device_t child; 340 struct pcpu *pc; 341 342 if ((cd = malloc(sizeof(*cd), M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) 343 return (NULL); 344 345 resource_list_init(&cd->cd_rl); 346 pc = pcpu_find(device_get_unit(bus)); 347 cd->cd_pcpu = pc; 348 349 child = device_add_child_ordered(bus, order, name, unit); 350 if (child != NULL) { 351 pc->pc_device = child; 352 device_set_ivars(child, cd); 353 } else 354 free(cd, M_DEVBUF); 355 return (child); 356 } 357 358 static struct resource_list * 359 cpu_get_rlist(device_t dev, device_t child) 360 { 361 struct cpu_device *cpdev; 362 363 cpdev = device_get_ivars(child); 364 return (&cpdev->cd_rl); 365 } 366 367 static int 368 cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) 369 { 370 struct cpu_device *cpdev; 371 372 switch (index) { 373 case CPU_IVAR_PCPU: 374 cpdev = device_get_ivars(child); 375 *result = (uintptr_t)cpdev->cd_pcpu; 376 break; 377 case CPU_IVAR_NOMINAL_MHZ: 378 if (tsc_is_invariant) { 379 *result = (uintptr_t)(atomic_load_acq_64(&tsc_freq) / 380 1000000); 381 break; 382 } 383 /* FALLTHROUGH */ 384 default: 385 return (ENOENT); 386 } 387 return (0); 388 } 389