1 /*- 2 * Copyright 1998 Massachusetts Institute of Technology 3 * 4 * Permission to use, copy, modify, and distribute this software and 5 * its documentation for any purpose and without fee is hereby 6 * granted, provided that both the above copyright notice and this 7 * permission notice appear in all copies, that both the above 8 * copyright notice and this permission notice appear in all 9 * supporting documentation, and that the name of M.I.T. not be used 10 * in advertising or publicity pertaining to distribution of the 11 * software without specific, written prior permission. M.I.T. makes 12 * no representations about the suitability of this software for any 13 * purpose. It is provided "as is" without express or implied 14 * warranty. 15 * 16 * THIS SOFTWARE IS PROVIDED BY M.I.T. ``AS IS''. M.I.T. DISCLAIMS 17 * ALL EXPRESS OR IMPLIED WARRANTIES WITH REGARD TO THIS SOFTWARE, 18 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT 20 * SHALL M.I.T. BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 23 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 24 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 26 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 /* 34 * This code implements a system driver for legacy systems that do not 35 * support ACPI or when ACPI support is not present in the kernel. 36 */ 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/bus.h> 41 #include <sys/cpu.h> 42 #include <sys/kernel.h> 43 #include <sys/malloc.h> 44 #include <sys/module.h> 45 #include <machine/bus.h> 46 #include <sys/pcpu.h> 47 #include <sys/rman.h> 48 #include <sys/smp.h> 49 #include <dev/pci/pcireg.h> 50 51 #include <machine/clock.h> 52 #include <machine/pci_cfgreg.h> 53 #include <machine/resource.h> 54 #include <x86/legacyvar.h> 55 56 static MALLOC_DEFINE(M_LEGACYDEV, "legacydrv", "legacy system device"); 57 struct legacy_device { 58 int lg_pcibus; 59 int lg_pcislot; 60 int lg_pcifunc; 61 }; 62 63 #define DEVTOAT(dev) ((struct legacy_device *)device_get_ivars(dev)) 64 65 static int legacy_probe(device_t); 66 static int legacy_attach(device_t); 67 static int legacy_print_child(device_t, device_t); 68 static device_t legacy_add_child(device_t bus, u_int order, const char *name, 69 int unit); 70 static int legacy_read_ivar(device_t, device_t, int, uintptr_t *); 71 static int legacy_write_ivar(device_t, device_t, int, uintptr_t); 72 73 static device_method_t legacy_methods[] = { 74 /* Device interface */ 75 DEVMETHOD(device_probe, legacy_probe), 76 DEVMETHOD(device_attach, legacy_attach), 77 DEVMETHOD(device_detach, bus_generic_detach), 78 DEVMETHOD(device_shutdown, bus_generic_shutdown), 79 DEVMETHOD(device_suspend, bus_generic_suspend), 80 DEVMETHOD(device_resume, bus_generic_resume), 81 82 /* Bus interface */ 83 DEVMETHOD(bus_print_child, legacy_print_child), 84 DEVMETHOD(bus_add_child, legacy_add_child), 85 DEVMETHOD(bus_read_ivar, legacy_read_ivar), 86 DEVMETHOD(bus_write_ivar, legacy_write_ivar), 87 DEVMETHOD(bus_alloc_resource, bus_generic_alloc_resource), 88 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource), 89 DEVMETHOD(bus_release_resource, bus_generic_release_resource), 90 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 91 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 92 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 93 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 94 { 0, 0 } 95 }; 96 97 static driver_t legacy_driver = { 98 "legacy", 99 legacy_methods, 100 1, /* no softc */ 101 }; 102 static devclass_t legacy_devclass; 103 104 DRIVER_MODULE(legacy, nexus, legacy_driver, legacy_devclass, 0, 0); 105 106 static int 107 legacy_probe(device_t dev) 108 { 109 110 device_set_desc(dev, "legacy system"); 111 device_quiet(dev); 112 return (0); 113 } 114 115 /* 116 * Grope around in the PCI config space to see if this is a chipset 117 * that is capable of doing memory-mapped config cycles. This also 118 * implies that it can do PCIe extended config cycles. 119 */ 120 static void 121 legacy_pci_cfgregopen(device_t dev) 122 { 123 uint64_t pciebar; 124 u_int16_t did, vid; 125 126 if (cfgmech == CFGMECH_NONE || cfgmech == CFGMECH_PCIE) 127 return; 128 129 /* Check for supported chipsets */ 130 vid = pci_cfgregread(0, 0, 0, PCIR_VENDOR, 2); 131 did = pci_cfgregread(0, 0, 0, PCIR_DEVICE, 2); 132 switch (vid) { 133 case 0x8086: 134 switch (did) { 135 case 0x3590: 136 case 0x3592: 137 /* Intel 7520 or 7320 */ 138 pciebar = pci_cfgregread(0, 0, 0, 0xce, 2) << 16; 139 pcie_cfgregopen(pciebar, 0, 255); 140 break; 141 case 0x2580: 142 case 0x2584: 143 case 0x2590: 144 /* Intel 915, 925, or 915GM */ 145 pciebar = pci_cfgregread(0, 0, 0, 0x48, 4); 146 pcie_cfgregopen(pciebar, 0, 255); 147 break; 148 } 149 } 150 151 if (bootverbose && cfgmech == CFGMECH_PCIE) 152 device_printf(dev, "Enabled ECAM PCIe accesses\n"); 153 } 154 155 static int 156 legacy_attach(device_t dev) 157 { 158 device_t child; 159 160 legacy_pci_cfgregopen(dev); 161 162 /* 163 * Let our child drivers identify any child devices that they 164 * can find. Once that is done attach any devices that we 165 * found. 166 */ 167 bus_generic_probe(dev); 168 bus_generic_attach(dev); 169 170 /* 171 * If we didn't see ISA on a PCI bridge, add a top-level bus. 172 */ 173 if (!devclass_get_device(devclass_find("isa"), 0)) { 174 child = BUS_ADD_CHILD(dev, 0, "isa", 0); 175 if (child == NULL) 176 panic("legacy_attach isa"); 177 device_probe_and_attach(child); 178 } 179 180 return 0; 181 } 182 183 static int 184 legacy_print_child(device_t bus, device_t child) 185 { 186 struct legacy_device *atdev = DEVTOAT(child); 187 int retval = 0; 188 189 retval += bus_print_child_header(bus, child); 190 if (atdev->lg_pcibus != -1) 191 retval += printf(" pcibus %d", atdev->lg_pcibus); 192 retval += printf("\n"); 193 194 return (retval); 195 } 196 197 static device_t 198 legacy_add_child(device_t bus, u_int order, const char *name, int unit) 199 { 200 device_t child; 201 struct legacy_device *atdev; 202 203 atdev = malloc(sizeof(struct legacy_device), M_LEGACYDEV, 204 M_NOWAIT | M_ZERO); 205 if (atdev == NULL) 206 return(NULL); 207 atdev->lg_pcibus = -1; 208 atdev->lg_pcislot = -1; 209 atdev->lg_pcifunc = -1; 210 211 child = device_add_child_ordered(bus, order, name, unit); 212 if (child == NULL) 213 free(atdev, M_LEGACYDEV); 214 else 215 /* should we free this in legacy_child_detached? */ 216 device_set_ivars(child, atdev); 217 218 return (child); 219 } 220 221 static int 222 legacy_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 223 { 224 struct legacy_device *atdev = DEVTOAT(child); 225 226 switch (which) { 227 case LEGACY_IVAR_PCIDOMAIN: 228 *result = 0; 229 break; 230 case LEGACY_IVAR_PCIBUS: 231 *result = atdev->lg_pcibus; 232 break; 233 case LEGACY_IVAR_PCISLOT: 234 *result = atdev->lg_pcislot; 235 break; 236 case LEGACY_IVAR_PCIFUNC: 237 *result = atdev->lg_pcifunc; 238 break; 239 default: 240 return ENOENT; 241 } 242 return 0; 243 } 244 245 static int 246 legacy_write_ivar(device_t dev, device_t child, int which, uintptr_t value) 247 { 248 struct legacy_device *atdev = DEVTOAT(child); 249 250 switch (which) { 251 case LEGACY_IVAR_PCIDOMAIN: 252 return EINVAL; 253 case LEGACY_IVAR_PCIBUS: 254 atdev->lg_pcibus = value; 255 break; 256 case LEGACY_IVAR_PCISLOT: 257 atdev->lg_pcislot = value; 258 break; 259 case LEGACY_IVAR_PCIFUNC: 260 atdev->lg_pcifunc = value; 261 break; 262 default: 263 return ENOENT; 264 } 265 return 0; 266 } 267 268 /* 269 * Legacy CPU attachment when ACPI is not available. Drivers like 270 * cpufreq(4) hang off this. 271 */ 272 static void cpu_identify(driver_t *driver, device_t parent); 273 static int cpu_read_ivar(device_t dev, device_t child, int index, 274 uintptr_t *result); 275 static device_t cpu_add_child(device_t bus, u_int order, const char *name, 276 int unit); 277 static struct resource_list *cpu_get_rlist(device_t dev, device_t child); 278 279 struct cpu_device { 280 struct resource_list cd_rl; 281 struct pcpu *cd_pcpu; 282 }; 283 284 static device_method_t cpu_methods[] = { 285 /* Device interface */ 286 DEVMETHOD(device_identify, cpu_identify), 287 DEVMETHOD(device_probe, bus_generic_probe), 288 DEVMETHOD(device_attach, bus_generic_attach), 289 DEVMETHOD(device_detach, bus_generic_detach), 290 DEVMETHOD(device_shutdown, bus_generic_shutdown), 291 DEVMETHOD(device_suspend, bus_generic_suspend), 292 DEVMETHOD(device_resume, bus_generic_resume), 293 294 /* Bus interface */ 295 DEVMETHOD(bus_add_child, cpu_add_child), 296 DEVMETHOD(bus_read_ivar, cpu_read_ivar), 297 DEVMETHOD(bus_get_resource_list, cpu_get_rlist), 298 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource), 299 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource), 300 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource), 301 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource), 302 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 303 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 304 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 305 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 306 307 DEVMETHOD_END 308 }; 309 310 static driver_t cpu_driver = { 311 "cpu", 312 cpu_methods, 313 1, /* no softc */ 314 }; 315 static devclass_t cpu_devclass; 316 DRIVER_MODULE(cpu, legacy, cpu_driver, cpu_devclass, 0, 0); 317 318 static void 319 cpu_identify(driver_t *driver, device_t parent) 320 { 321 device_t child; 322 int i; 323 324 /* 325 * Attach a cpuX device for each CPU. We use an order of 150 326 * so that these devices are attached after the Host-PCI 327 * bridges (which are added at order 100). 328 */ 329 CPU_FOREACH(i) { 330 child = BUS_ADD_CHILD(parent, 150, "cpu", i); 331 if (child == NULL) 332 panic("legacy_attach cpu"); 333 } 334 } 335 336 static device_t 337 cpu_add_child(device_t bus, u_int order, const char *name, int unit) 338 { 339 struct cpu_device *cd; 340 device_t child; 341 struct pcpu *pc; 342 343 if ((cd = malloc(sizeof(*cd), M_DEVBUF, M_NOWAIT | M_ZERO)) == NULL) 344 return (NULL); 345 346 resource_list_init(&cd->cd_rl); 347 pc = pcpu_find(device_get_unit(bus)); 348 cd->cd_pcpu = pc; 349 350 child = device_add_child_ordered(bus, order, name, unit); 351 if (child != NULL) { 352 pc->pc_device = child; 353 device_set_ivars(child, cd); 354 } else 355 free(cd, M_DEVBUF); 356 return (child); 357 } 358 359 static struct resource_list * 360 cpu_get_rlist(device_t dev, device_t child) 361 { 362 struct cpu_device *cpdev; 363 364 cpdev = device_get_ivars(child); 365 return (&cpdev->cd_rl); 366 } 367 368 static int 369 cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result) 370 { 371 struct cpu_device *cpdev; 372 373 switch (index) { 374 case CPU_IVAR_PCPU: 375 cpdev = device_get_ivars(child); 376 *result = (uintptr_t)cpdev->cd_pcpu; 377 break; 378 case CPU_IVAR_NOMINAL_MHZ: 379 if (tsc_is_invariant) { 380 *result = (uintptr_t)(atomic_load_acq_64(&tsc_freq) / 381 1000000); 382 break; 383 } 384 /* FALLTHROUGH */ 385 default: 386 return (ENOENT); 387 } 388 return (0); 389 } 390