1 /* 2 * Copyright (c) 2012 Adrian Chadd <adrian@FreeBSD.org> 3 * All Rights Reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <sys/cdefs.h> 19 #include <stdio.h> 20 #include <stdlib.h> 21 #include <unistd.h> 22 #include <fcntl.h> 23 #include <errno.h> 24 #include <string.h> 25 26 #include <sys/types.h> 27 #include <sys/alq.h> 28 #include <sys/endian.h> 29 30 #include <dev/ath/if_ath_alq.h> 31 #include <dev/ath/ath_hal/ar5416/ar5416desc.h> 32 33 #include "ar5416_ds.h" 34 35 #define MS(_v, _f) ( ((_v) & (_f)) >> _f##_S ) 36 #define MF(_v, _f) ( !! ((_v) & (_f))) 37 38 static void 39 ar5416_decode_txstatus(struct if_ath_alq_payload *a) 40 { 41 struct ar5416_desc txs; 42 43 /* XXX assumes txs is smaller than PAYLOAD_LEN! */ 44 memcpy(&txs, &a->payload, sizeof(struct ar5416_desc)); 45 46 printf("[%u.%06u] [%llu] TXSTATUS: TxDone=%d, FrmOk=%d, filt=%d, TS=0x%08x\n", 47 (unsigned int) be32toh(a->hdr.tstamp_sec), 48 (unsigned int) be32toh(a->hdr.tstamp_usec), 49 (unsigned long long) be64toh(a->hdr.threadid), 50 MF(txs.u.tx.status[9], AR_TxDone), 51 MF(txs.u.tx.status[1], AR_FrmXmitOK), 52 MF(txs.u.tx.status[1], AR_Filtered), 53 txs.u.tx.status[2]); 54 55 /* ds_txstatus0 */ 56 printf(" RX RSSI 0 [%d %d %d]", 57 MS(txs.u.tx.status[0], AR_TxRSSIAnt00), 58 MS(txs.u.tx.status[0], AR_TxRSSIAnt01), 59 MS(txs.u.tx.status[0], AR_TxRSSIAnt02)); 60 61 /* ds_txstatus5 */ 62 printf(" RX RSSI 1 [%d %d %d] Comb=%d\n", 63 MS(txs.u.tx.status[5], AR_TxRSSIAnt10), 64 MS(txs.u.tx.status[5], AR_TxRSSIAnt11), 65 MS(txs.u.tx.status[5], AR_TxRSSIAnt12), 66 MS(txs.u.tx.status[5], AR_TxRSSICombined)); 67 68 /* ds_txstatus0 */ 69 printf(" BA Valid=%d", 70 MF(txs.u.tx.status[0], AR_TxBaStatus)); 71 72 /* ds_txstatus1 */ 73 printf(", Frmok=%d, xretries=%d, fifounderrun=%d, filt=%d\n", 74 MF(txs.u.tx.status[1], AR_FrmXmitOK), 75 MF(txs.u.tx.status[1], AR_ExcessiveRetries), 76 MF(txs.u.tx.status[1], AR_FIFOUnderrun), 77 MF(txs.u.tx.status[1], AR_Filtered)); 78 printf(" DelimUnderrun=%d, DataUnderun=%d, DescCfgErr=%d," 79 " TxTimerExceeded=%d\n", 80 MF(txs.u.tx.status[1], AR_TxDelimUnderrun), 81 MF(txs.u.tx.status[1], AR_TxDataUnderrun), 82 MF(txs.u.tx.status[1], AR_DescCfgErr), 83 MF(txs.u.tx.status[1], AR_TxTimerExpired)); 84 85 printf(" RTScnt=%d, FailCnt=%d, VRetryCnt=%d\n", 86 MS(txs.u.tx.status[1], AR_RTSFailCnt), 87 MS(txs.u.tx.status[1], AR_DataFailCnt), 88 MS(txs.u.tx.status[1], AR_VirtRetryCnt)); 89 90 /* ds_txstatus2 */ 91 printf(" TxTimestamp=0x%08x", txs.u.tx.status[2]); 92 93 /* ds_txstatus3 */ 94 /* ds_txstatus4 */ 95 printf(", BALow=0x%08x", txs.u.tx.status[3]); 96 printf(", BAHigh=0x%08x\n", txs.u.tx.status[4]); 97 98 99 /* ds_txstatus6 */ 100 /* ds_txstatus7 */ 101 /* ds_txstatus8 */ 102 printf(" TxEVM[0]=0x%08x, TxEVM[1]=0x%08x, TxEVM[2]=0x%08x\n", 103 txs.u.tx.status[6], 104 txs.u.tx.status[7], 105 txs.u.tx.status[8]); 106 107 /* ds_txstatus9 */ 108 printf(" TxDone=%d, SeqNum=0x%04x, TxOpExceeded=%d, FinalTsIdx=%d\n", 109 MF(txs.u.tx.status[9], AR_TxDone), 110 MS(txs.u.tx.status[9], AR_SeqNum), 111 MF(txs.u.tx.status[9], AR_TxOpExceeded), 112 MS(txs.u.tx.status[9], AR_FinalTxIdx)); 113 printf(" PowerMgmt=%d, TxTid=%d\n", 114 MF(txs.u.tx.status[9], AR_PowerMgmt), 115 MS(txs.u.tx.status[9], AR_TxTid)); 116 117 printf("\n ------\n"); 118 } 119 120 static void 121 ar5416_decode_txdesc(struct if_ath_alq_payload *a) 122 { 123 struct ar5416_desc txc; 124 125 /* XXX assumes txs is smaller than PAYLOAD_LEN! */ 126 memcpy(&txc, &a->payload, sizeof(struct ar5416_desc)); 127 128 printf("[%u.%06u] [%llu] TXD\n", 129 (unsigned int) be32toh(a->hdr.tstamp_sec), 130 (unsigned int) be32toh(a->hdr.tstamp_usec), 131 (unsigned long long) be64toh(a->hdr.threadid)); 132 133 printf(" link=0x%08x, data=0x%08x\n", 134 txc.ds_link, 135 txc.ds_data); 136 137 /* ds_ctl0 */ 138 printf(" Frame Len=%d, VMF=%d\n", 139 txc.ds_ctl0 & AR_FrameLen, 140 MF(txc.ds_ctl0, AR_VirtMoreFrag)); 141 printf(" TX power0=%d, RtsEna=%d, Veol=%d, ClrDstMask=%d\n", 142 MS(txc.ds_ctl0, AR_XmitPower), 143 MF(txc.ds_ctl0, AR_RTSEnable), 144 MF(txc.ds_ctl0, AR_VEOL), 145 MF(txc.ds_ctl0, AR_ClrDestMask)); 146 printf(" TxIntrReq=%d, DestIdxValid=%d, CtsEnable=%d\n", 147 MF(txc.ds_ctl0, AR_TxIntrReq), 148 MF(txc.ds_ctl0, AR_DestIdxValid), 149 MF(txc.ds_ctl0, AR_CTSEnable)); 150 151 /* ds_ctl1 */ 152 printf(" BufLen=%d, TxMore=%d, DestIdx=%d," 153 " FrType=0x%x\n", 154 txc.ds_ctl1 & AR_BufLen, 155 MF(txc.ds_ctl1, AR_TxMore), 156 MS(txc.ds_ctl1, AR_DestIdx), 157 MS(txc.ds_ctl1, AR_FrameType)); 158 printf(" NoAck=%d, InsertTs=%d, CorruptFcs=%d, ExtOnly=%d," 159 " ExtAndCtl=%d\n", 160 MF(txc.ds_ctl1, AR_NoAck), 161 MF(txc.ds_ctl1, AR_InsertTS), 162 MF(txc.ds_ctl1, AR_CorruptFCS), 163 MF(txc.ds_ctl1, AR_ExtOnly), 164 MF(txc.ds_ctl1, AR_ExtAndCtl)); 165 printf(" MoreAggr=%d, IsAggr=%d, MoreRifs=%d\n", 166 MF(txc.ds_ctl1, AR_MoreAggr), 167 MF(txc.ds_ctl1, AR_IsAggr), 168 MF(txc.ds_ctl1, AR_MoreRifs)); 169 170 /* ds_ctl2 */ 171 printf(" DurUpEna=%d, Burstdur=0x%04x\n", 172 MF(txc.ds_ctl2, AR_DurUpdateEn), 173 MS(txc.ds_ctl2, AR_BurstDur)); 174 printf(" Try0=%d, Try1=%d, Try2=%d, Try3=%d\n", 175 MS(txc.ds_ctl2, AR_XmitDataTries0), 176 MS(txc.ds_ctl2, AR_XmitDataTries1), 177 MS(txc.ds_ctl2, AR_XmitDataTries2), 178 MS(txc.ds_ctl2, AR_XmitDataTries3)); 179 180 /* ds_ctl3, 4 */ 181 printf(" try 0: Rate=0x%02x, PktDur=%d, RTS/CTS ena=%d\n", 182 MS(txc.ds_ctl3, AR_XmitRate0), 183 MS(txc.ds_ctl4, AR_PacketDur0), 184 MF(txc.ds_ctl4, AR_RTSCTSQual0)); 185 printf(" try 1: Rate=0x%02x, PktDur=%d, RTS/CTS ena=%d\n", 186 MS(txc.ds_ctl3, AR_XmitRate1), 187 MS(txc.ds_ctl4, AR_PacketDur1), 188 MF(txc.ds_ctl4, AR_RTSCTSQual1)); 189 190 /* ds_ctl3, 5 */ 191 printf(" try 2: Rate=0x%02x, PktDur=%d, RTS/CTS ena=%d\n", 192 MS(txc.ds_ctl3, AR_XmitRate2), 193 MS(txc.ds_ctl5, AR_PacketDur2), 194 MF(txc.ds_ctl5, AR_RTSCTSQual2)); 195 printf(" try 3: Rate=0x%02x, PktDur=%d, RTS/CTS ena=%d\n", 196 MS(txc.ds_ctl3, AR_XmitRate3), 197 MS(txc.ds_ctl5, AR_PacketDur3), 198 MF(txc.ds_ctl5, AR_RTSCTSQual3)); 199 200 /* ds_ctl6 */ 201 printf(" AggrLen=%d, PadDelim=%d, EncrType=%d\n", 202 MS(txc.ds_ctl6, AR_AggrLen), 203 MS(txc.ds_ctl6, AR_PadDelim), 204 MS(txc.ds_ctl6, AR_EncrType)); 205 206 /* ds_ctl7 */ 207 printf(" try 0: chainMask=0x%x, GI=%d, 2040=%d, STBC=%d\n", 208 MS(txc.ds_ctl7, AR_ChainSel0), 209 MF(txc.ds_ctl7, AR_GI0), 210 MF(txc.ds_ctl7, AR_2040_0), 211 MF(txc.ds_ctl7, AR_STBC0)); 212 printf(" try 1: chainMask=0x%x, GI=%d, 2040=%d, STBC=%d\n", 213 MS(txc.ds_ctl7, AR_ChainSel1), 214 MF(txc.ds_ctl7, AR_GI1), 215 MF(txc.ds_ctl7, AR_2040_1), 216 MF(txc.ds_ctl7, AR_STBC1)); 217 printf(" try 2: chainMask=0x%x, GI=%d, 2040=%d, STBC=%d\n", 218 MS(txc.ds_ctl7, AR_ChainSel2), 219 MF(txc.ds_ctl7, AR_GI2), 220 MF(txc.ds_ctl7, AR_2040_2), 221 MF(txc.ds_ctl7, AR_STBC2)); 222 printf(" try 3: chainMask=0x%x, GI=%d, 2040=%d, STBC=%d\n", 223 MS(txc.ds_ctl7, AR_ChainSel3), 224 MF(txc.ds_ctl7, AR_GI3), 225 MF(txc.ds_ctl7, AR_2040_3), 226 MF(txc.ds_ctl7, AR_STBC3)); 227 228 printf(" RTSCtsRate=0x%02x\n", MS(txc.ds_ctl7, AR_RTSCTSRate)); 229 230 /* ds_ctl8 */ 231 printf(" try 0: ant=0x%08x\n", txc.ds_ctl8 & AR_AntCtl0); 232 233 /* ds_ctl9 */ 234 printf(" try 1: TxPower=%d, ant=0x%08x\n", 235 MS(txc.ds_ctl9, AR_XmitPower1), 236 txc.ds_ctl9 & AR_AntCtl1); 237 238 /* ds_ctl10 */ 239 printf(" try 2: TxPower=%d, ant=0x%08x\n", 240 MS(txc.ds_ctl10, AR_XmitPower2), 241 txc.ds_ctl10 & AR_AntCtl2); 242 243 /* ds_ctl11 */ 244 printf(" try 3: TxPower=%d, ant=0x%08x\n", 245 MS(txc.ds_ctl11, AR_XmitPower3), 246 txc.ds_ctl11 & AR_AntCtl3); 247 248 printf("\n ------ \n"); 249 } 250 251 static void 252 ar5416_decode_rxstatus(struct if_ath_alq_payload *a) 253 { 254 struct ar5416_desc rxs; 255 256 /* XXX assumes rxs is smaller than PAYLOAD_LEN! */ 257 memcpy(&rxs, &a->payload, sizeof(struct ar5416_desc)); 258 259 printf("[%u.%06u] [%llu] RXSTATUS: RxDone=%d, RxRate=0x%02x, TS=0x%08x\n", 260 (unsigned int) be32toh(a->hdr.tstamp_sec), 261 (unsigned int) be32toh(a->hdr.tstamp_usec), 262 (unsigned long long) be64toh(a->hdr.threadid), 263 MF(rxs.ds_rxstatus8, AR_RxDone), 264 MS(rxs.ds_rxstatus0, AR_RxRate), 265 rxs.ds_rxstatus2); 266 267 printf(" link=0x%08x, data=0x%08x, ctl0=0x%08x, ctl2=0x%08x\n", 268 rxs.ds_link, 269 rxs.ds_data, 270 rxs.ds_ctl0, 271 rxs.ds_ctl1); 272 273 /* status0 */ 274 /* 275 * XXX TODO: For AR9285, the chain 1 and chain 2 RSSI values 276 * acutally contain the RX mixer configuration 277 */ 278 printf(" RSSICtl[0]=%d, RSSICtl[1]=%d, RSSICtl[2]=%d\n", 279 MS(rxs.ds_rxstatus0, AR_RxRSSIAnt00), 280 MS(rxs.ds_rxstatus0, AR_RxRSSIAnt01), 281 MS(rxs.ds_rxstatus0, AR_RxRSSIAnt02)); 282 283 /* status4 */ 284 printf(" RSSIExt[0]=%d, RSSIExt[1]=%d, RSSIExt[2]=%d, RSSIComb=%d\n", 285 MS(rxs.ds_rxstatus4, AR_RxRSSIAnt10), 286 MS(rxs.ds_rxstatus4, AR_RxRSSIAnt11), 287 MS(rxs.ds_rxstatus4, AR_RxRSSIAnt12), 288 MS(rxs.ds_rxstatus4, AR_RxRSSICombined)); 289 290 /* status2 */ 291 printf(" RxTimestamp=0x%08x,", rxs.ds_rxstatus2); 292 293 /* status1 */ 294 printf(" DataLen=%d, RxMore=%d, NumDelim=%d\n", 295 rxs.ds_rxstatus1 & AR_DataLen, 296 MF(rxs.ds_rxstatus1, AR_RxMore), 297 MS(rxs.ds_rxstatus1, AR_NumDelim)); 298 299 /* status3 - RxRate however is for Owl 2.0 */ 300 printf(" GI=%d, 2040=%d, RxRate=0x%02x, DupFrame=%d, RxAnt=0x%08x\n", 301 MF(rxs.ds_rxstatus3, AR_GI), 302 MF(rxs.ds_rxstatus3, AR_2040), 303 MS(rxs.ds_rxstatus0, AR_RxRate), 304 MF(rxs.ds_rxstatus3, AR_DupFrame), 305 MS(rxs.ds_rxstatus3, AR_RxAntenna)); 306 307 /* status5 */ 308 /* status6 */ 309 /* status7 */ 310 printf(" RxEvm0=0x%08x, RxEvm1=0x%08x, RxEvm2=0x%08x\n", 311 rxs.ds_rxstatus5, 312 rxs.ds_rxstatus6, 313 rxs.ds_rxstatus7); 314 315 /* status8 */ 316 printf(" RxDone=%d, RxFrameOk=%d, CrcErr=%d, DecryptCrcErr=%d\n", 317 MF(rxs.ds_rxstatus8, AR_RxDone), 318 MF(rxs.ds_rxstatus8, AR_RxFrameOK), 319 MF(rxs.ds_rxstatus8, AR_CRCErr), 320 MF(rxs.ds_rxstatus8, AR_DecryptCRCErr)); 321 printf(" PhyErr=%d, MichaelErr=%d, PreDelimCRCErr=%d, KeyIdxValid=%d\n", 322 MF(rxs.ds_rxstatus8, AR_PHYErr), 323 MF(rxs.ds_rxstatus8, AR_MichaelErr), 324 MF(rxs.ds_rxstatus8, AR_PreDelimCRCErr), 325 MF(rxs.ds_rxstatus8, AR_RxKeyIdxValid)); 326 327 printf(" RxMoreAggr=%d, RxAggr=%d, PostDelimCRCErr=%d, HiRxChain=%d\n", 328 MF(rxs.ds_rxstatus8, AR_RxMoreAggr), 329 MF(rxs.ds_rxstatus8, AR_RxAggr), 330 MF(rxs.ds_rxstatus8, AR_PostDelimCRCErr), 331 MF(rxs.ds_rxstatus8, AR_HiRxChain)); 332 333 /* If PHY error, print that out. Otherwise, the key index */ 334 if (MF(rxs.ds_rxstatus8, AR_PHYErr)) 335 printf(" PhyErrCode=0x%02x", 336 MS(rxs.ds_rxstatus8, AR_PHYErrCode)); 337 else 338 printf(" KeyIdx=0x%02x", 339 MS(rxs.ds_rxstatus8, AR_KeyIdx)); 340 printf(", KeyMiss=%d\n", 341 MF(rxs.ds_rxstatus8, AR_KeyMiss)); 342 343 printf("\n ------\n"); 344 } 345 346 void 347 ar5416_alq_payload(struct if_ath_alq_payload *a) 348 { 349 350 switch (be16toh(a->hdr.op)) { 351 case ATH_ALQ_EDMA_TXSTATUS: /* TXSTATUS */ 352 ar5416_decode_txstatus(a); 353 break; 354 case ATH_ALQ_EDMA_RXSTATUS: /* RXSTATUS */ 355 ar5416_decode_rxstatus(a); 356 break; 357 case ATH_ALQ_EDMA_TXDESC: /* TXDESC */ 358 ar5416_decode_txdesc(a); 359 break; 360 default: 361 printf("[%d.%06d] [%lld] op: %d; len %d\n", 362 be32toh(a->hdr.tstamp_sec), 363 be32toh(a->hdr.tstamp_usec), 364 be64toh(a->hdr.threadid), 365 be16toh(a->hdr.op), be16toh(a->hdr.len)); 366 } 367 } 368