1 /* 2 * Copyright (c) 2012 Adrian Chadd <adrian@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #include <sys/cdefs.h> 18 #include <stdio.h> 19 #include <stdlib.h> 20 #include <unistd.h> 21 #include <fcntl.h> 22 #include <errno.h> 23 #include <string.h> 24 25 #include <sys/types.h> 26 #include <sys/alq.h> 27 #include <sys/endian.h> 28 29 #include <dev/ath/if_ath_alq.h> 30 #include <ar9300/ar9300desc.h> 31 32 #include "ar9300_ds.h" 33 34 /* XXX should break this out into if_athvar.h */ 35 36 #define MS(_v, _f) ( ((_v) & (_f)) >> _f##_S ) 37 #define MF(_v, _f) ( !! ((_v) & (_f))) 38 39 static uint32_t last_ts = 0; 40 41 void 42 ath_alq_print_edma_tx_fifo_push(struct if_ath_alq_payload *a) 43 { 44 struct if_ath_alq_tx_fifo_push p; 45 46 memcpy(&p, &a->payload, sizeof(p)); 47 printf("[%u.%06u] [%llu] TXPUSH txq=%d, nframes=%d, fifodepth=%d, frmcount=%d\n", 48 (unsigned int) be32toh(a->hdr.tstamp_sec), 49 (unsigned int) be32toh(a->hdr.tstamp_usec), 50 (unsigned long long) be64toh(a->hdr.threadid), 51 be32toh(p.txq), 52 be32toh(p.nframes), 53 be32toh(p.fifo_depth), 54 be32toh(p.frame_cnt)); 55 } 56 57 static void 58 ar9300_decode_txstatus(struct if_ath_alq_payload *a) 59 { 60 struct ar9300_txs txs; 61 62 /* XXX assumes txs is smaller than PAYLOAD_LEN! */ 63 memcpy(&txs, &a->payload, sizeof(struct ar9300_txs)); 64 65 printf("[%u.%06u] [%llu] TXSTATUS TxTimestamp=%u (%u), DescId=0x%04x, QCU=%d\n", 66 (unsigned int) be32toh(a->hdr.tstamp_sec), 67 (unsigned int) be32toh(a->hdr.tstamp_usec), 68 (unsigned long long) be64toh(a->hdr.threadid), 69 txs.status4, 70 txs.status4 - last_ts, 71 (unsigned int) MS(txs.status1, AR_tx_desc_id), 72 (unsigned int) MS(txs.ds_info, AR_tx_qcu_num)); 73 printf(" DescId=0x%08x\n", txs.status1); 74 75 last_ts = txs.status4; 76 77 printf(" DescLen=%d, TxQcuNum=%d, CtrlStat=%d, DescId=0x%04x\n", 78 txs.ds_info & 0xff, 79 MS(txs.ds_info, AR_tx_qcu_num), 80 MS(txs.ds_info, AR_ctrl_stat), 81 MS(txs.ds_info, AR_desc_id)); 82 83 printf(" TxTimestamp: %u\n", txs.status4); 84 85 printf(" TxDone=%d, SeqNo=%d, TxOpExceed=%d, TXBFStatus=%d\n", 86 MF(txs.status8, AR_tx_done), 87 MS(txs.status8, AR_seq_num), 88 MF(txs.status8, AR_tx_op_exceeded), 89 MS(txs.status8, AR_TXBFStatus)); 90 91 printf(" TXBfMismatch=%d, BFStreamMiss=%d, FinalTxIdx=%d\n", 92 MF(txs.status8, AR_tx_bf_bw_mismatch), 93 MF(txs.status8, AR_tx_bf_stream_miss), 94 MS(txs.status8, AR_final_tx_idx)); 95 96 printf(" TxBfDestMiss=%d, TxBfExpired=%d, PwrMgmt=%d, Tid=%d," 97 " FastTsBit=%d\n", 98 MF(txs.status8, AR_tx_bf_dest_miss), 99 MF(txs.status8, AR_tx_bf_expired), 100 MF(txs.status8, AR_power_mgmt), 101 MS(txs.status8, AR_tx_tid), 102 MF(txs.status8, AR_tx_fast_ts)); 103 104 printf(" Frmok=%d, xretries=%d, fifounderrun=%d, filt=%d\n", 105 MF(txs.status3, AR_frm_xmit_ok), 106 MF(txs.status3, AR_excessive_retries), 107 MF(txs.status3, AR_fifounderrun), 108 MF(txs.status3, AR_filtered)); 109 printf(" DelimUnderrun=%d, DataUnderun=%d, DescCfgErr=%d," 110 " TxTimerExceeded=%d\n", 111 MF(txs.status3, AR_tx_delim_underrun), 112 MF(txs.status3, AR_tx_data_underrun), 113 MF(txs.status3, AR_desc_cfg_err), 114 MF(txs.status3, AR_tx_timer_expired)); 115 116 printf(" RTScnt=%d, FailCnt=%d, VRetryCnt=%d\n", 117 MS(txs.status3, AR_rts_fail_cnt), 118 MS(txs.status3, AR_data_fail_cnt), 119 MS(txs.status3, AR_virt_retry_cnt)); 120 121 122 123 printf(" RX RSSI 0 [%d %d %d]\n", 124 MS(txs.status2, AR_tx_rssi_ant00), 125 MS(txs.status2, AR_tx_rssi_ant01), 126 MS(txs.status2, AR_tx_rssi_ant02)); 127 128 printf(" RX RSSI 1 [%d %d %d] Comb=%d\n", 129 MS(txs.status7, AR_tx_rssi_ant10), 130 MS(txs.status7, AR_tx_rssi_ant11), 131 MS(txs.status7, AR_tx_rssi_ant12), 132 MS(txs.status7, AR_tx_rssi_combined)); 133 134 printf(" BA Valid=%d\n", 135 MF(txs.status2, AR_tx_ba_status)); 136 137 printf(" BALow=0x%08x\n", txs.status5); 138 printf(" BAHigh=0x%08x\n", txs.status6); 139 140 printf("\n ------ \n"); 141 } 142 143 /* 144 * Note - these are rounded up to 128 bytes; but we 145 * only use 96 bytes from it. 146 */ 147 static void 148 ar9300_decode_txdesc(struct if_ath_alq_payload *a) 149 { 150 struct ar9300_txc txc; 151 152 /* XXX assumes txs is smaller than PAYLOAD_LEN! */ 153 memcpy(&txc, &a->payload, 96); 154 155 printf("[%u.%06u] [%llu] TXD DescId=0x%04x\n", 156 (unsigned int) be32toh(a->hdr.tstamp_sec), 157 (unsigned int) be32toh(a->hdr.tstamp_usec), 158 (unsigned long long) be64toh(a->hdr.threadid), 159 (unsigned int) MS(txc.ds_ctl10, AR_tx_desc_id)); 160 161 printf(" DescLen=%d, TxQcuNum=%d, CtrlStat=%d, DescId=0x%04x\n", 162 txc.ds_info & 0xff, 163 MS(txc.ds_info, AR_tx_qcu_num), 164 MS(txc.ds_info, AR_ctrl_stat), 165 MS(txc.ds_info, AR_desc_id)); 166 167 /* link */ 168 printf(" Link 0x%08x\n", txc.ds_link); 169 170 /* data0 */ 171 printf(" Data0 0x%08x Len %d\n", 172 txc.ds_data0, 173 MS(txc.ds_ctl3, AR_buf_len)); 174 175 /* data1 */ 176 printf(" Data1 0x%08x Len %d\n", 177 txc.ds_data1, 178 MS(txc.ds_ctl5, AR_buf_len)); 179 180 /* data2 */ 181 printf(" Data2 0x%08x Len %d\n", 182 txc.ds_data2, 183 MS(txc.ds_ctl7, AR_buf_len)); 184 185 /* data3 */ 186 printf(" Data3 0x%08x Len %d\n", 187 txc.ds_data3, 188 MS(txc.ds_ctl9, AR_buf_len)); 189 190 191 /* ctl10 */ 192 printf(" Desc ID=0x%04x, Chksum=0x%04x (ctl10=0x%08x)\n", 193 MS(txc.ds_ctl10, AR_tx_desc_id), 194 txc.ds_ctl10 & AR_tx_ptr_chk_sum, 195 txc.ds_ctl10); 196 197 /* ctl11 */ 198 printf(" Frame Len=%d, VMF=%d, LowRxChain=%d, TxClrRetry=%d\n", 199 txc.ds_ctl11 & AR_frame_len, 200 MF(txc.ds_ctl11, AR_virt_more_frag), 201 MF(txc.ds_ctl11, AR_low_rx_chain), 202 MF(txc.ds_ctl11, AR_tx_clear_retry)); 203 printf(" TX power 0 = %d, RtsEna=%d, Veol=%d, ClrDstMask=%d\n", 204 MS(txc.ds_ctl11, AR_xmit_power0), 205 MF(txc.ds_ctl11, AR_rts_enable), 206 MF(txc.ds_ctl11, AR_veol), 207 MF(txc.ds_ctl11, AR_clr_dest_mask)); 208 printf(" TxIntrReq=%d, DestIdxValid=%d, CtsEnable=%d\n", 209 MF(txc.ds_ctl11, AR_tx_intr_req), 210 MF(txc.ds_ctl11, AR_dest_idx_valid), 211 MF(txc.ds_ctl11, AR_cts_enable)); 212 213 /* ctl12 */ 214 printf(" Paprd Chain Mask=0x%x, TxMore=%d, DestIdx=%d," 215 " FrType=0x%x\n", 216 MS(txc.ds_ctl12, AR_paprd_chain_mask), 217 MF(txc.ds_ctl12, AR_tx_more), 218 MS(txc.ds_ctl12, AR_dest_idx), 219 MS(txc.ds_ctl12, AR_frame_type)); 220 printf(" NoAck=%d, InsertTs=%d, CorruptFcs=%d, ExtOnly=%d," 221 " ExtAndCtl=%d\n", 222 MF(txc.ds_ctl12, AR_no_ack), 223 MF(txc.ds_ctl12, AR_insert_ts), 224 MF(txc.ds_ctl12, AR_corrupt_fcs), 225 MF(txc.ds_ctl12, AR_ext_only), 226 MF(txc.ds_ctl12, AR_ext_and_ctl)); 227 printf(" IsAggr=%d, MoreRifs=%d, LocMode=%d\n", 228 MF(txc.ds_ctl12, AR_is_aggr), 229 MF(txc.ds_ctl12, AR_more_rifs), 230 MF(txc.ds_ctl12, AR_loc_mode)); 231 232 233 /* ctl13 */ 234 printf(" DurUpEna=%d, Burstdur=0x%04x\n", 235 MF(txc.ds_ctl13, AR_dur_update_ena), 236 MS(txc.ds_ctl13, AR_burst_dur)); 237 printf(" Try0=%d, Try1=%d, Try2=%d, Try3=%d\n", 238 MS(txc.ds_ctl13, AR_xmit_data_tries0), 239 MS(txc.ds_ctl13, AR_xmit_data_tries1), 240 MS(txc.ds_ctl13, AR_xmit_data_tries2), 241 MS(txc.ds_ctl13, AR_xmit_data_tries3)); 242 243 /* ctl14 */ 244 printf(" rate0=0x%02x, rate1=0x%02x, rate2=0x%02x, rate3=0x%02x\n", 245 MS(txc.ds_ctl14, AR_xmit_rate0), 246 MS(txc.ds_ctl14, AR_xmit_rate1), 247 MS(txc.ds_ctl14, AR_xmit_rate2), 248 MS(txc.ds_ctl14, AR_xmit_rate3)); 249 250 /* ctl15 */ 251 printf(" try 0: PktDur=%d, RTS/CTS ena=%d\n", 252 MS(txc.ds_ctl15, AR_packet_dur0), 253 MF(txc.ds_ctl15, AR_rts_cts_qual0)); 254 printf(" try 1: PktDur=%d, RTS/CTS ena=%d\n", 255 MS(txc.ds_ctl15, AR_packet_dur1), 256 MF(txc.ds_ctl15, AR_rts_cts_qual1)); 257 258 /* ctl16 */ 259 printf(" try 2: PktDur=%d, RTS/CTS ena=%d\n", 260 MS(txc.ds_ctl16, AR_packet_dur2), 261 MF(txc.ds_ctl16, AR_rts_cts_qual2)); 262 printf(" try 3: PktDur=%d, RTS/CTS ena=%d\n", 263 MS(txc.ds_ctl16, AR_packet_dur3), 264 MF(txc.ds_ctl16, AR_rts_cts_qual3)); 265 266 /* ctl17 */ 267 printf(" AggrLen=%d, PadDelim=%d, EncrType=%d, TxDcApStaSel=%d\n", 268 MS(txc.ds_ctl17, AR_aggr_len), 269 MS(txc.ds_ctl17, AR_pad_delim), 270 MS(txc.ds_ctl17, AR_encr_type), 271 MF(txc.ds_ctl17, AR_tx_dc_ap_sta_sel)); 272 printf(" Calib=%d LDPC=%d\n", 273 MF(txc.ds_ctl17, AR_calibrating), 274 MF(txc.ds_ctl17, AR_ldpc)); 275 276 /* ctl18 */ 277 printf(" try 0: chainMask=0x%x, GI=%d, 2040=%d, STBC=%d\n", 278 MS(txc.ds_ctl18, AR_chain_sel0), 279 MF(txc.ds_ctl18, AR_gi0), 280 MF(txc.ds_ctl18, AR_2040_0), 281 MF(txc.ds_ctl18, AR_stbc0)); 282 printf(" try 1: chainMask=0x%x, GI=%d, 2040=%d, STBC=%d\n", 283 MS(txc.ds_ctl18, AR_chain_sel1), 284 MF(txc.ds_ctl18, AR_gi1), 285 MF(txc.ds_ctl18, AR_2040_1), 286 MF(txc.ds_ctl18, AR_stbc1)); 287 printf(" try 2: chainMask=0x%x, GI=%d, 2040=%d, STBC=%d\n", 288 MS(txc.ds_ctl18, AR_chain_sel2), 289 MF(txc.ds_ctl18, AR_gi2), 290 MF(txc.ds_ctl18, AR_2040_2), 291 MF(txc.ds_ctl18, AR_stbc2)); 292 printf(" try 3: chainMask=0x%x, GI=%d, 2040=%d, STBC=%d\n", 293 MS(txc.ds_ctl18, AR_chain_sel3), 294 MF(txc.ds_ctl18, AR_gi3), 295 MF(txc.ds_ctl18, AR_2040_3), 296 MF(txc.ds_ctl18, AR_stbc3)); 297 298 /* ctl19 */ 299 printf(" NotSounding=%d\n", 300 MF(txc.ds_ctl19, AR_not_sounding)); 301 302 printf(" try 0: ant=0x%08x, antsel=%d, ness=%d\n", 303 txc.ds_ctl19 & AR_tx_ant0, 304 MF(txc.ds_ctl19, AR_tx_ant_sel0), 305 MS(txc.ds_ctl19, AR_ness)); 306 307 /* ctl20 */ 308 printf(" try 1: TxPower=%d, ant=0x%08x, antsel=%d, ness=%d\n", 309 MS(txc.ds_ctl20, AR_xmit_power1), 310 txc.ds_ctl20 & AR_tx_ant1, 311 MF(txc.ds_ctl20, AR_tx_ant_sel1), 312 MS(txc.ds_ctl20, AR_ness1)); 313 314 /* ctl21 */ 315 printf(" try 2: TxPower=%d, ant=0x%08x, antsel=%d, ness=%d\n", 316 MS(txc.ds_ctl21, AR_xmit_power2), 317 txc.ds_ctl21 & AR_tx_ant2, 318 MF(txc.ds_ctl21, AR_tx_ant_sel2), 319 MS(txc.ds_ctl21, AR_ness2)); 320 321 /* ctl22 */ 322 printf(" try 3: TxPower=%d, ant=0x%08x, antsel=%d, ness=%d\n", 323 MS(txc.ds_ctl22, AR_xmit_power3), 324 txc.ds_ctl22 & AR_tx_ant3, 325 MF(txc.ds_ctl22, AR_tx_ant_sel3), 326 MS(txc.ds_ctl22, AR_ness3)); 327 328 printf("\n ------ \n"); 329 } 330 331 static void 332 ar9300_decode_rxstatus(struct if_ath_alq_payload *a) 333 { 334 struct ar9300_rxs rxs; 335 336 /* XXX assumes rxs is smaller than PAYLOAD_LEN! */ 337 memcpy(&rxs, &a->payload, sizeof(struct ar9300_rxs)); 338 339 printf("[%u.%06u] [%llu] RXSTATUS RxTimestamp: %u (%d)\n", 340 (unsigned int) be32toh(a->hdr.tstamp_sec), 341 (unsigned int) be32toh(a->hdr.tstamp_usec), 342 (unsigned long long) be64toh(a->hdr.threadid), 343 rxs.status3, 344 rxs.status3 - last_ts); 345 346 /* status1 */ 347 /* .. and status5 */ 348 printf(" RSSI %d/%d/%d / %d/%d/%d; combined: %d; rate=0x%02x\n", 349 MS(rxs.status1, AR_rx_rssi_ant00), 350 MS(rxs.status1, AR_rx_rssi_ant01), 351 MS(rxs.status1, AR_rx_rssi_ant02), 352 MS(rxs.status5, AR_rx_rssi_ant10), 353 MS(rxs.status5, AR_rx_rssi_ant11), 354 MS(rxs.status5, AR_rx_rssi_ant12), 355 MS(rxs.status5, AR_rx_rssi_combined), 356 MS(rxs.status1, AR_rx_rate)); 357 358 /* status2 */ 359 printf(" Len: %d; more=%d, delim=%d, upload=%d\n", 360 MS(rxs.status2, AR_data_len), 361 MF(rxs.status2, AR_rx_more), 362 MS(rxs.status2, AR_num_delim), 363 MS(rxs.status2, AR_hw_upload_data)); 364 365 /* status3 */ 366 printf(" RX timestamp: %u\n", rxs.status3); 367 last_ts = rxs.status3; 368 369 /* status4 */ 370 printf(" GI: %d, 2040: %d, parallel40: %d, stbc=%d\n", 371 MF(rxs.status4, AR_gi), 372 MF(rxs.status4, AR_2040), 373 MF(rxs.status4, AR_parallel40), 374 MF(rxs.status4, AR_rx_stbc)); 375 printf(" Not sounding: %d, ness: %d, upload_valid: %d\n", 376 MF(rxs.status4, AR_rx_not_sounding), 377 MS(rxs.status4, AR_rx_ness), 378 MS(rxs.status4, AR_hw_upload_data_valid)); 379 printf(" RX antenna: 0x%08x\n", 380 MS(rxs.status4, AR_rx_antenna)); 381 382 /* EVM */ 383 /* status6 - 9 */ 384 printf(" EVM: 0x%08x; 0x%08x; 0x%08x; 0x%08x\n", 385 rxs.status6, 386 rxs.status7, 387 rxs.status8, 388 rxs.status9); 389 390 /* status10 - ? */ 391 392 /* status11 */ 393 printf(" RX done: %d, RX frame ok: %d, CRC error: %d\n", 394 MF(rxs.status11, AR_rx_done), 395 MF(rxs.status11, AR_rx_frame_ok), 396 MF(rxs.status11, AR_crc_err)); 397 printf(" Decrypt CRC err: %d, PHY err: %d, MIC err: %d\n", 398 MF(rxs.status11, AR_decrypt_crc_err), 399 MF(rxs.status11, AR_phyerr), 400 MF(rxs.status11, AR_michael_err)); 401 printf(" Pre delim CRC err: %d, uAPSD Trig: %d\n", 402 MF(rxs.status11, AR_pre_delim_crc_err), 403 MF(rxs.status11, AR_apsd_trig)); 404 printf(" RXKeyIdxValid: %d, KeyIdx: %d, PHY error: %d\n", 405 MF(rxs.status11, AR_rx_key_idx_valid), 406 MS(rxs.status11, AR_key_idx), 407 MS(rxs.status11, AR_phy_err_code)); 408 printf(" RX more Aggr: %d, RX aggr %d, post delim CRC err: %d\n", 409 MF(rxs.status11, AR_rx_more_aggr), 410 MF(rxs.status11, AR_rx_aggr), 411 MF(rxs.status11, AR_post_delim_crc_err)); 412 printf(" hw upload data type: %d; position bit: %d\n", 413 MS(rxs.status11, AR_hw_upload_data_type), 414 MF(rxs.status11, AR_position_bit)); 415 printf(" Hi RX chain: %d, RxFirstAggr: %d, DecryptBusy: %d, KeyMiss: %d\n", 416 MF(rxs.status11, AR_hi_rx_chain), 417 MF(rxs.status11, AR_rx_first_aggr), 418 MF(rxs.status11, AR_decrypt_busy_err), 419 MF(rxs.status11, AR_key_miss)); 420 } 421 422 void 423 ar9300_alq_payload(struct if_ath_alq_payload *a) 424 { 425 426 switch (be16toh(a->hdr.op)) { 427 case ATH_ALQ_EDMA_TXSTATUS: /* TXSTATUS */ 428 ar9300_decode_txstatus(a); 429 break; 430 case ATH_ALQ_EDMA_RXSTATUS: /* RXSTATUS */ 431 ar9300_decode_rxstatus(a); 432 break; 433 case ATH_ALQ_EDMA_TXDESC: /* TXDESC */ 434 ar9300_decode_txdesc(a); 435 break; 436 default: 437 printf("[%d.%06d] [%lld] op: %d; len %d\n", 438 be32toh(a->hdr.tstamp_sec), 439 be32toh(a->hdr.tstamp_usec), 440 be64toh(a->hdr.threadid), 441 be16toh(a->hdr.op), be16toh(a->hdr.len)); 442 } 443 } 444