1 /* 2 * $FreeBSD$ 3 */ 4 5 /* This file is automatically generated --- do not edit */ 6 7 struct reg_info t3b_sge3_regs[] = { 8 { "SG_CONTROL", 0x0, 0 }, 9 { "UrgTnl", 26, 1 }, 10 { "NewNotify", 25, 1 }, 11 { "AvoidCqOvfl", 24, 1 }, 12 { "OptOneIntMultQ", 23, 1 }, 13 { "CQCrdtCtrl", 22, 1 }, 14 { "EgrEnUpBp", 21, 1 }, 15 { "DropPkt", 20, 1 }, 16 { "EgrGenCtrl", 19, 1 }, 17 { "UserSpaceSize", 14, 5 }, 18 { "HostPageSize", 11, 3 }, 19 { "PCIRelax", 10, 1 }, 20 { "FLMode", 9, 1 }, 21 { "PktShift", 6, 3 }, 22 { "OneIntMultQ", 5, 1 }, 23 { "FLPickAvail", 4, 1 }, 24 { "BigEndianEgress", 3, 1 }, 25 { "BigEndianIngress", 2, 1 }, 26 { "IscsiCoalescing", 1, 1 }, 27 { "GlobalEnable", 0, 1 }, 28 { "SG_KDOORBELL", 0x4, 0 }, 29 { "SelEgrCntx", 31, 1 }, 30 { "EgrCntx", 0, 16 }, 31 { "SG_GTS", 0x8, 0 }, 32 { "RspQ", 29, 3 }, 33 { "NewTimer", 16, 13 }, 34 { "NewIndex", 0, 16 }, 35 { "SG_CONTEXT_CMD", 0xc, 0 }, 36 { "Opcode", 28, 4 }, 37 { "Busy", 27, 1 }, 38 { "CQ_credit", 20, 7 }, 39 { "CQ", 19, 1 }, 40 { "RspQ", 18, 1 }, 41 { "Egress", 17, 1 }, 42 { "FreeList", 16, 1 }, 43 { "Context", 0, 16 }, 44 { "SG_CONTEXT_DATA0", 0x10, 0 }, 45 { "SG_CONTEXT_DATA1", 0x14, 0 }, 46 { "SG_CONTEXT_DATA2", 0x18, 0 }, 47 { "SG_CONTEXT_DATA3", 0x1c, 0 }, 48 { "SG_CONTEXT_MASK0", 0x20, 0 }, 49 { "SG_CONTEXT_MASK1", 0x24, 0 }, 50 { "SG_CONTEXT_MASK2", 0x28, 0 }, 51 { "SG_CONTEXT_MASK3", 0x2c, 0 }, 52 { "SG_RSPQ_CREDIT_RETURN", 0x30, 0 }, 53 { "RspQ", 29, 3 }, 54 { "Data", 0, 16 }, 55 { "SG_DATA_INTR", 0x34, 0 }, 56 { "ErrIntr", 31, 1 }, 57 { "DataIntr", 0, 8 }, 58 { "SG_HI_DRB_HI_THRSH", 0x38, 0 }, 59 { "HiDrbHiThrsh", 0, 10 }, 60 { "SG_HI_DRB_LO_THRSH", 0x3c, 0 }, 61 { "HiDrbLoThrsh", 0, 10 }, 62 { "SG_LO_DRB_HI_THRSH", 0x40, 0 }, 63 { "LoDrbHiThrsh", 0, 10 }, 64 { "SG_LO_DRB_LO_THRSH", 0x44, 0 }, 65 { "LoDrbLoThrsh", 0, 10 }, 66 { "SG_ONE_INT_MULT_Q_COALESCING_TIMER", 0x48, 0 }, 67 { "SG_RSPQ_FL_STATUS", 0x4c, 0 }, 68 { "RspQ0Starved", 0, 1 }, 69 { "RspQ1Starved", 1, 1 }, 70 { "RspQ2Starved", 2, 1 }, 71 { "RspQ3Starved", 3, 1 }, 72 { "RspQ4Starved", 4, 1 }, 73 { "RspQ5Starved", 5, 1 }, 74 { "RspQ6Starved", 6, 1 }, 75 { "RspQ7Starved", 7, 1 }, 76 { "RspQ0Disabled", 8, 1 }, 77 { "RspQ1Disabled", 9, 1 }, 78 { "RspQ2Disabled", 10, 1 }, 79 { "RspQ3Disabled", 11, 1 }, 80 { "RspQ4Disabled", 12, 1 }, 81 { "RspQ5Disabled", 13, 1 }, 82 { "RspQ6Disabled", 14, 1 }, 83 { "RspQ7Disabled", 15, 1 }, 84 { "FL0Empty", 16, 1 }, 85 { "FL1Empty", 17, 1 }, 86 { "FL2Empty", 18, 1 }, 87 { "FL3Empty", 19, 1 }, 88 { "FL4Empty", 20, 1 }, 89 { "FL5Empty", 21, 1 }, 90 { "FL6Empty", 22, 1 }, 91 { "FL7Empty", 23, 1 }, 92 { "FL8Empty", 24, 1 }, 93 { "FL9Empty", 25, 1 }, 94 { "FL10Empty", 26, 1 }, 95 { "FL11Empty", 27, 1 }, 96 { "FL12Empty", 28, 1 }, 97 { "FL13Empty", 29, 1 }, 98 { "FL14Empty", 30, 1 }, 99 { "FL15Empty", 31, 1 }, 100 { "SG_EGR_PRI_CNT", 0x50, 0 }, 101 { "EgrErrOpCode", 24, 8 }, 102 { "EgrHiOpCode", 16, 8 }, 103 { "EgrLoOpCode", 8, 8 }, 104 { "EgrPriCnt", 0, 5 }, 105 { "SG_EGR_RCQ_DRB_THRSH", 0x54, 0 }, 106 { "HiRcqDrbThrsh", 16, 11 }, 107 { "LoRcqDrbThrsh", 0, 11 }, 108 { "SG_EGR_CNTX_BADDR", 0x58, 0 }, 109 { "EgrCntxBAddr", 5, 27 }, 110 { "SG_INT_CAUSE", 0x5c, 0 }, 111 { "HiCtlDrbDropErr", 13, 1 }, 112 { "LoCtlDrbDropErr", 12, 1 }, 113 { "HiPioDrbDropErr", 11, 1 }, 114 { "LoPioDrbDropErr", 10, 1 }, 115 { "HiCrdtUndFlowErr", 9, 1 }, 116 { "LoCrdtUndFlowErr", 8, 1 }, 117 { "HiPriorityDBFull", 7, 1 }, 118 { "HiPriorityDBEmpty", 6, 1 }, 119 { "LoPriorityDBFull", 5, 1 }, 120 { "LoPriorityDBEmpty", 4, 1 }, 121 { "RspQDisabled", 3, 1 }, 122 { "RspQCreditOverfow", 2, 1 }, 123 { "FlEmpty", 1, 1 }, 124 { "RspQStarve", 0, 1 }, 125 { "SG_INT_ENABLE", 0x60, 0 }, 126 { "HiCtlDrbDropErr", 13, 1 }, 127 { "LoCtlDrbDropErr", 12, 1 }, 128 { "HiPioDrbDropErr", 11, 1 }, 129 { "LoPioDrbDropErr", 10, 1 }, 130 { "HiCrdtUndFlowErr", 9, 1 }, 131 { "LoCrdtUndFlowErr", 8, 1 }, 132 { "HiPriorityDBFull", 7, 1 }, 133 { "HiPriorityDBEmpty", 6, 1 }, 134 { "LoPriorityDBFull", 5, 1 }, 135 { "LoPriorityDBEmpty", 4, 1 }, 136 { "RspQDisabled", 3, 1 }, 137 { "RspQCreditOverfow", 2, 1 }, 138 { "FlEmpty", 1, 1 }, 139 { "RspQStarve", 0, 1 }, 140 { "SG_CMDQ_CREDIT_TH", 0x64, 0 }, 141 { "Timeout", 8, 24 }, 142 { "Threshold", 0, 8 }, 143 { "SG_TIMER_TICK", 0x68, 0 }, 144 { "SG_CQ_CONTEXT_BADDR", 0x6c, 0 }, 145 { "baseAddr", 5, 27 }, 146 { "SG_OCO_BASE", 0x70, 0 }, 147 { "Base1", 16, 16 }, 148 { "Base0", 0, 16 }, 149 { "SG_DRB_PRI_THRESH", 0x74, 0 }, 150 { "DrbPriThrsh", 0, 16 }, 151 { "SG_DEBUG_INDEX", 0x78, 0 }, 152 { "SG_DEBUG_DATA", 0x7c, 0 }, 153 { NULL, 0, 0 } 154 }; 155 156 struct reg_info t3b_pcix1_regs[] = { 157 { "PCIX_INT_ENABLE", 0x80, 0 }, 158 { "MSIXParErr", 22, 3 }, 159 { "CFParErr", 18, 4 }, 160 { "RFParErr", 14, 4 }, 161 { "WFParErr", 12, 2 }, 162 { "PIOParErr", 11, 1 }, 163 { "DetUncECCErr", 10, 1 }, 164 { "DetCorECCErr", 9, 1 }, 165 { "RcvSplCmpErr", 8, 1 }, 166 { "UnxSplCmp", 7, 1 }, 167 { "SplCmpDis", 6, 1 }, 168 { "DetParErr", 5, 1 }, 169 { "SigSysErr", 4, 1 }, 170 { "RcvMstAbt", 3, 1 }, 171 { "RcvTarAbt", 2, 1 }, 172 { "SigTarAbt", 1, 1 }, 173 { "MstDetParErr", 0, 1 }, 174 { "PCIX_INT_CAUSE", 0x84, 0 }, 175 { "MSIXParErr", 22, 3 }, 176 { "CFParErr", 18, 4 }, 177 { "RFParErr", 14, 4 }, 178 { "WFParErr", 12, 2 }, 179 { "PIOParErr", 11, 1 }, 180 { "DetUncECCErr", 10, 1 }, 181 { "DetCorECCErr", 9, 1 }, 182 { "RcvSplCmpErr", 8, 1 }, 183 { "UnxSplCmp", 7, 1 }, 184 { "SplCmpDis", 6, 1 }, 185 { "DetParErr", 5, 1 }, 186 { "SigSysErr", 4, 1 }, 187 { "RcvMstAbt", 3, 1 }, 188 { "RcvTarAbt", 2, 1 }, 189 { "SigTarAbt", 1, 1 }, 190 { "MstDetParErr", 0, 1 }, 191 { "PCIX_CFG", 0x88, 0 }, 192 { "CLIDecEn", 18, 1 }, 193 { "LatTmrDis", 17, 1 }, 194 { "LowPwrEn", 16, 1 }, 195 { "AsyncIntVec", 11, 5 }, 196 { "MaxSplTrnC", 8, 3 }, 197 { "MaxSplTrnR", 5, 3 }, 198 { "MaxWrByteCnt", 3, 2 }, 199 { "WrReqAtomicEn", 2, 1 }, 200 { "CRstWrmMode", 1, 1 }, 201 { "PIOAck64En", 0, 1 }, 202 { "PCIX_MODE", 0x8c, 0 }, 203 { "PClkRange", 6, 2 }, 204 { "PCIXInitPat", 2, 4 }, 205 { "66MHz", 1, 1 }, 206 { "64Bit", 0, 1 }, 207 { "PCIX_CAL", 0x90, 0 }, 208 { "Busy", 31, 1 }, 209 { "PerCalDiv", 22, 8 }, 210 { "PerCalEn", 21, 1 }, 211 { "SglCalEn", 20, 1 }, 212 { "ZInUpdMode", 19, 1 }, 213 { "ZInSel", 18, 1 }, 214 { "ZPDMan", 15, 3 }, 215 { "ZPUMan", 12, 3 }, 216 { "ZPDOut", 9, 3 }, 217 { "ZPUOut", 6, 3 }, 218 { "ZPDIn", 3, 3 }, 219 { "ZPUIn", 0, 3 }, 220 { "PCIX_WOL", 0x94, 0 }, 221 { "WakeUp1", 3, 1 }, 222 { "WakeUp0", 2, 1 }, 223 { "SleepMode1", 1, 1 }, 224 { "SleepMode0", 0, 1 }, 225 { NULL, 0, 0 } 226 }; 227 228 struct reg_info t3b_pcie0_regs[] = { 229 { "PCIE_INT_ENABLE", 0x80, 0 }, 230 { "BISTErr", 15, 8 }, 231 { "MSIXParErr", 12, 3 }, 232 { "CFParErr", 11, 1 }, 233 { "RFParErr", 10, 1 }, 234 { "WFParErr", 9, 1 }, 235 { "PIOParErr", 8, 1 }, 236 { "UnxSplCplErrC", 7, 1 }, 237 { "UnxSplCplErrR", 6, 1 }, 238 { "VPDAddrChng", 5, 1 }, 239 { "BusMstrEn", 4, 1 }, 240 { "PMStChng", 3, 1 }, 241 { "PEXMsg", 2, 1 }, 242 { "ZeroLenRd", 1, 1 }, 243 { "PEXErr", 0, 1 }, 244 { "PCIE_INT_CAUSE", 0x84, 0 }, 245 { "BISTErr", 15, 8 }, 246 { "MSIXParErr", 12, 3 }, 247 { "CFParErr", 11, 1 }, 248 { "RFParErr", 10, 1 }, 249 { "WFParErr", 9, 1 }, 250 { "PIOParErr", 8, 1 }, 251 { "UnxSplCplErrC", 7, 1 }, 252 { "UnxSplCplErrR", 6, 1 }, 253 { "VPDAddrChng", 5, 1 }, 254 { "BusMstrEn", 4, 1 }, 255 { "PMStChng", 3, 1 }, 256 { "PEXMsg", 2, 1 }, 257 { "ZeroLenRd", 1, 1 }, 258 { "PEXErr", 0, 1 }, 259 { "PCIE_CFG", 0x88, 0 }, 260 { "PriorityINTA", 23, 1 }, 261 { "IniFullPkt", 22, 1 }, 262 { "EnableLinkDwnDRst", 21, 1 }, 263 { "EnableLinkDownRst", 20, 1 }, 264 { "EnableHotRst", 19, 1 }, 265 { "IniWaitForGnt", 18, 1 }, 266 { "IniBEDis", 17, 1 }, 267 { "CLIDecEn", 16, 1 }, 268 { "AsyncIntVec", 11, 5 }, 269 { "MaxSplTrnC", 7, 4 }, 270 { "MaxSplTrnR", 1, 6 }, 271 { "CRstWrmMode", 0, 1 }, 272 { "PCIE_MODE", 0x8c, 0 }, 273 { "NumFstTrnSeqRx", 10, 8 }, 274 { "LnkCntlState", 2, 8 }, 275 { "VC0Up", 1, 1 }, 276 { "LnkInitial", 0, 1 }, 277 { "PCIE_WOL", 0x94, 0 }, 278 { "WakeUp1", 3, 1 }, 279 { "WakeUp0", 2, 1 }, 280 { "SleepMode1", 1, 1 }, 281 { "SleepMode0", 0, 1 }, 282 { "PCIE_PEX_CTRL0", 0x98, 0 }, 283 { "CplTimeoutRetry", 31, 1 }, 284 { "StrictTSMN", 30, 1 }, 285 { "NumFstTrnSeq", 22, 8 }, 286 { "ReplayLmt", 2, 20 }, 287 { "TxPndChkEn", 1, 1 }, 288 { "CplPndChkEn", 0, 1 }, 289 { "PCIE_PEX_CTRL1", 0x9c, 0 }, 290 { "RxPhyErrEn", 31, 1 }, 291 { "DLLPTimeoutLmt", 13, 18 }, 292 { "AckLat", 0, 13 }, 293 { "PCIE_PEX_CTRL2", 0xa0, 0 }, 294 { "LnkCntlDetDir", 30, 1 }, 295 { "EnterL1rEn", 29, 1 }, 296 { "PMExitL1Req", 28, 1 }, 297 { "PMTxIdle", 27, 1 }, 298 { "PCIModeLoop", 26, 1 }, 299 { "L1ASPMTxRxL0sTime", 14, 12 }, 300 { "L0sIdleTime", 3, 11 }, 301 { "EnterL1ASPMEn", 2, 1 }, 302 { "EnterL1En", 1, 1 }, 303 { "EnterL0sEn", 0, 1 }, 304 { "PCIE_PEX_ERR", 0xa4, 0 }, 305 { "CplTimeoutID", 18, 7 }, 306 { "FlowCtlOFlowErr", 17, 1 }, 307 { "ReplayTimeout", 16, 1 }, 308 { "ReplayRollover", 15, 1 }, 309 { "BadDLLP", 14, 1 }, 310 { "DLLPErr", 13, 1 }, 311 { "FlowCtlProtErr", 12, 1 }, 312 { "CplTimeout", 11, 1 }, 313 { "PHYRcvErr", 10, 1 }, 314 { "DisTLP", 9, 1 }, 315 { "BadECRC", 8, 1 }, 316 { "BadTLP", 7, 1 }, 317 { "MalTLP", 6, 1 }, 318 { "UnxCpl", 5, 1 }, 319 { "UnsReq", 4, 1 }, 320 { "PsnReq", 3, 1 }, 321 { "UnsCpl", 2, 1 }, 322 { "CplAbt", 1, 1 }, 323 { "PsnCpl", 0, 1 }, 324 { "PCIE_SERDES_CTRL", 0xa8, 0 }, 325 { "PMASel", 3, 1 }, 326 { "Lane", 0, 3 }, 327 { "PCIE_SERDES_QUAD_CTRL0", 0xac, 0 }, 328 { "TestSig", 10, 19 }, 329 { "Offset", 2, 8 }, 330 { "OffsetEn", 1, 1 }, 331 { "IDDQb", 0, 1 }, 332 { "PCIE_SERDES_QUAD_CTRL1", 0xb0, 0 }, 333 { "FastInit", 28, 1 }, 334 { "CTCDisable", 27, 1 }, 335 { "ManResetPLL", 26, 1 }, 336 { "ManL2Pwrdn", 25, 1 }, 337 { "ManQuadEn", 24, 1 }, 338 { "RxEqCtl", 22, 2 }, 339 { "HiVMode", 21, 1 }, 340 { "RefSel", 19, 2 }, 341 { "RxTermAdj", 17, 2 }, 342 { "TxTermAdj", 15, 2 }, 343 { "Deq", 11, 4 }, 344 { "Dtx", 7, 4 }, 345 { "LoDrv", 6, 1 }, 346 { "HiDrv", 5, 1 }, 347 { "IntParReset", 4, 1 }, 348 { "IntParLPBK", 3, 1 }, 349 { "IntSerLPBKwDrv", 2, 1 }, 350 { "PW", 1, 1 }, 351 { "PClkDetect", 0, 1 }, 352 { "PCIE_SERDES_LANE_CTRL", 0xb4, 0 }, 353 { "ExtBISTChkErrClr", 22, 1 }, 354 { "ExtBISTChkEn", 21, 1 }, 355 { "ExtBISTGenEn", 20, 1 }, 356 { "ExtBISTPat", 17, 3 }, 357 { "ExtParReset", 16, 1 }, 358 { "ExtParLPBK", 15, 1 }, 359 { "ManRxTermEn", 14, 1 }, 360 { "ManBeaconTxEn", 13, 1 }, 361 { "ManRxDetectEn", 12, 1 }, 362 { "ManTxIdleEn", 11, 1 }, 363 { "ManRxIdleEn", 10, 1 }, 364 { "ManL1Pwrdn", 9, 1 }, 365 { "ManReset", 8, 1 }, 366 { "ManFmOffset", 3, 5 }, 367 { "ManFmOffsetEn", 2, 1 }, 368 { "ManLaneEn", 1, 1 }, 369 { "IntSerLPBK", 0, 1 }, 370 { "PCIE_SERDES_LANE_STAT", 0xb8, 0 }, 371 { "ExtBISTChkErrCnt", 8, 24 }, 372 { "ExtBISTChkFmd", 7, 1 }, 373 { "BeaconDetectChg", 6, 1 }, 374 { "RxDetectChg", 5, 1 }, 375 { "TxIdleDetectChg", 4, 1 }, 376 { "BeaconDetect", 2, 1 }, 377 { "RxDetect", 1, 1 }, 378 { "TxIdleDetect", 0, 1 }, 379 { NULL, 0, 0 } 380 }; 381 382 struct reg_info t3b_t3dbg_regs[] = { 383 { "T3DBG_DBG0_CFG", 0xc0, 0 }, 384 { "RegSelect", 9, 8 }, 385 { "ModuleSelect", 4, 5 }, 386 { "ClkSelect", 0, 4 }, 387 { "T3DBG_DBG0_EN", 0xc4, 0 }, 388 { "SDRByte0", 8, 1 }, 389 { "DDREn", 4, 1 }, 390 { "PortEn", 0, 1 }, 391 { "T3DBG_DBG1_CFG", 0xc8, 0 }, 392 { "RegSelect", 9, 8 }, 393 { "ModuleSelect", 4, 5 }, 394 { "ClkSelect", 0, 4 }, 395 { "T3DBG_DBG1_EN", 0xcc, 0 }, 396 { "SDRByte0", 8, 1 }, 397 { "DDREn", 4, 1 }, 398 { "PortEn", 0, 1 }, 399 { "T3DBG_GPIO_EN", 0xd0, 0 }, 400 { "GPIO11_OEn", 27, 1 }, 401 { "GPIO10_OEn", 26, 1 }, 402 { "GPIO9_OEn", 25, 1 }, 403 { "GPIO8_OEn", 24, 1 }, 404 { "GPIO7_OEn", 23, 1 }, 405 { "GPIO6_OEn", 22, 1 }, 406 { "GPIO5_OEn", 21, 1 }, 407 { "GPIO4_OEn", 20, 1 }, 408 { "GPIO3_OEn", 19, 1 }, 409 { "GPIO2_OEn", 18, 1 }, 410 { "GPIO1_OEn", 17, 1 }, 411 { "GPIO0_OEn", 16, 1 }, 412 { "GPIO11_Out_Val", 11, 1 }, 413 { "GPIO10_Out_Val", 10, 1 }, 414 { "GPIO9_Out_Val", 9, 1 }, 415 { "GPIO8_Out_Val", 8, 1 }, 416 { "GPIO7_Out_Val", 7, 1 }, 417 { "GPIO6_Out_Val", 6, 1 }, 418 { "GPIO5_Out_Val", 5, 1 }, 419 { "GPIO4_Out_Val", 4, 1 }, 420 { "GPIO3_Out_Val", 3, 1 }, 421 { "GPIO2_Out_Val", 2, 1 }, 422 { "GPIO1_Out_Val", 1, 1 }, 423 { "GPIO0_Out_Val", 0, 1 }, 424 { "T3DBG_GPIO_IN", 0xd4, 0 }, 425 { "GPIO11_CHG_DET", 27, 1 }, 426 { "GPIO10_CHG_DET", 26, 1 }, 427 { "GPIO9_CHG_DET", 25, 1 }, 428 { "GPIO8_CHG_DET", 24, 1 }, 429 { "GPIO7_CHG_DET", 23, 1 }, 430 { "GPIO6_CHG_DET", 22, 1 }, 431 { "GPIO5_CHG_DET", 21, 1 }, 432 { "GPIO4_CHG_DET", 20, 1 }, 433 { "GPIO3_CHG_DET", 19, 1 }, 434 { "GPIO2_CHG_DET", 18, 1 }, 435 { "GPIO1_CHG_DET", 17, 1 }, 436 { "GPIO0_CHG_DET", 16, 1 }, 437 { "GPIO11_IN", 11, 1 }, 438 { "GPIO10_IN", 10, 1 }, 439 { "GPIO9_IN", 9, 1 }, 440 { "GPIO8_IN", 8, 1 }, 441 { "GPIO7_IN", 7, 1 }, 442 { "GPIO6_IN", 6, 1 }, 443 { "GPIO5_IN", 5, 1 }, 444 { "GPIO4_IN", 4, 1 }, 445 { "GPIO3_IN", 3, 1 }, 446 { "GPIO2_IN", 2, 1 }, 447 { "GPIO1_IN", 1, 1 }, 448 { "GPIO0_IN", 0, 1 }, 449 { "T3DBG_INT_ENABLE", 0xd8, 0 }, 450 { "C_LOCK", 21, 1 }, 451 { "M_LOCK", 20, 1 }, 452 { "U_LOCK", 19, 1 }, 453 { "R_LOCK", 18, 1 }, 454 { "PX_LOCK", 17, 1 }, 455 { "GPIO11", 11, 1 }, 456 { "GPIO10", 10, 1 }, 457 { "GPIO9", 9, 1 }, 458 { "GPIO8", 8, 1 }, 459 { "GPIO7", 7, 1 }, 460 { "GPIO6", 6, 1 }, 461 { "GPIO5", 5, 1 }, 462 { "GPIO4", 4, 1 }, 463 { "GPIO3", 3, 1 }, 464 { "GPIO2", 2, 1 }, 465 { "GPIO1", 1, 1 }, 466 { "GPIO0", 0, 1 }, 467 { "T3DBG_INT_CAUSE", 0xdc, 0 }, 468 { "C_LOCK", 21, 1 }, 469 { "M_LOCK", 20, 1 }, 470 { "U_LOCK", 19, 1 }, 471 { "R_LOCK", 18, 1 }, 472 { "PX_LOCK", 17, 1 }, 473 { "GPIO11", 11, 1 }, 474 { "GPIO10", 10, 1 }, 475 { "GPIO9", 9, 1 }, 476 { "GPIO8", 8, 1 }, 477 { "GPIO7", 7, 1 }, 478 { "GPIO6", 6, 1 }, 479 { "GPIO5", 5, 1 }, 480 { "GPIO4", 4, 1 }, 481 { "GPIO3", 3, 1 }, 482 { "GPIO2", 2, 1 }, 483 { "GPIO1", 1, 1 }, 484 { "GPIO0", 0, 1 }, 485 { "T3DBG_DBG0_RST_VALUE", 0xe0, 0 }, 486 { "DebugData", 0, 8 }, 487 { "T3DBG_PLL_OCLK_PAD_EN", 0xe4, 0 }, 488 { "PCIE_OCLK_En", 20, 1 }, 489 { "PClkTree_DBG_En", 17, 1 }, 490 { "PCIX_OCLK_En", 16, 1 }, 491 { "U_OCLK_En", 12, 1 }, 492 { "R_OCLK_En", 8, 1 }, 493 { "M_OCLK_En", 4, 1 }, 494 { "C_OCLK_En", 0, 1 }, 495 { "T3DBG_PLL_LOCK", 0xe8, 0 }, 496 { "PCIX_LOCK", 16, 1 }, 497 { "U_LOCK", 12, 1 }, 498 { "R_LOCK", 8, 1 }, 499 { "M_LOCK", 4, 1 }, 500 { "C_LOCK", 0, 1 }, 501 { "T3DBG_SERDES_RBC_CFG", 0xec, 0 }, 502 { "X_RBC_Lane_Sel", 16, 2 }, 503 { "X_RBC_Dbg_En", 12, 1 }, 504 { "X_Serdes_Sel", 8, 1 }, 505 { "PE_RBC_Lane_Sel", 4, 3 }, 506 { "PE_RBC_Dbg_En", 0, 1 }, 507 { "T3DBG_GPIO_ACT_LOW", 0xf0, 0 }, 508 { "C_LOCK_ACT_LOW", 21, 1 }, 509 { "M_LOCK_ACT_LOW", 20, 1 }, 510 { "U_LOCK_ACT_LOW", 19, 1 }, 511 { "R_LOCK_ACT_LOW", 18, 1 }, 512 { "PX_LOCK_ACT_LOW", 17, 1 }, 513 { "GPIO11_ACT_LOW", 11, 1 }, 514 { "GPIO10_ACT_LOW", 10, 1 }, 515 { "GPIO9_ACT_LOW", 9, 1 }, 516 { "GPIO8_ACT_LOW", 8, 1 }, 517 { "GPIO7_ACT_LOW", 7, 1 }, 518 { "GPIO6_ACT_LOW", 6, 1 }, 519 { "GPIO5_ACT_LOW", 5, 1 }, 520 { "GPIO4_ACT_LOW", 4, 1 }, 521 { "GPIO3_ACT_LOW", 3, 1 }, 522 { "GPIO2_ACT_LOW", 2, 1 }, 523 { "GPIO1_ACT_LOW", 1, 1 }, 524 { "GPIO0_ACT_LOW", 0, 1 }, 525 { "T3DBG_PMON_CFG", 0xf4, 0 }, 526 { "PMON_DONE", 29, 1 }, 527 { "PMON_FAIL", 28, 1 }, 528 { "PMON_FDEL_AUTO", 22, 6 }, 529 { "PMON_CDEL_AUTO", 16, 6 }, 530 { "PMON_FDEL_MANUAL", 10, 6 }, 531 { "PMON_CDEL_MANUAL", 4, 6 }, 532 { "PMON_MANUAL", 1, 1 }, 533 { "PMON_AUTO", 0, 1 }, 534 { "T3DBG_SERDES_REFCLK_CFG", 0xf8, 0 }, 535 { "PE_REFCLK_DBG_EN", 12, 1 }, 536 { "X_REFCLK_DBG_EN", 8, 1 }, 537 { "PE_REFCLK_TERMADJ", 5, 2 }, 538 { "PE_REFCLK_PD", 4, 1 }, 539 { "X_REFCLK_TERMADJ", 1, 2 }, 540 { "X_REFCLK_PD", 0, 1 }, 541 { "T3DBG_PCIE_PMA_BSPIN_CFG", 0xfc, 0 }, 542 { "BSModeQuad1", 31, 1 }, 543 { "BSInSelLane7", 29, 2 }, 544 { "BSEnLane7", 28, 1 }, 545 { "BSInSelLane6", 25, 2 }, 546 { "BSEnLane6", 24, 1 }, 547 { "BSInSelLane5", 21, 2 }, 548 { "BSEnLane5", 20, 1 }, 549 { "BSInSelLane4", 17, 2 }, 550 { "BSEnLane4", 16, 1 }, 551 { "BSModeQuad0", 15, 1 }, 552 { "BSInSelLane3", 13, 2 }, 553 { "BSEnLane3", 12, 1 }, 554 { "BSInSelLane2", 9, 2 }, 555 { "BSEnLane2", 8, 1 }, 556 { "BSInSelLane1", 5, 2 }, 557 { "BSEnLane1", 4, 1 }, 558 { "BSInSelLane0", 1, 2 }, 559 { "BSEnLane0", 0, 1 }, 560 { NULL, 0, 0 } 561 }; 562 563 struct reg_info t3b_mc7_pmrx_regs[] = { 564 { "MC7_CFG", 0x100, 0 }, 565 { "ImpSetUpdate", 14, 1 }, 566 { "IFEn", 13, 1 }, 567 { "TERM300", 12, 1 }, 568 { "TERM150", 11, 1 }, 569 { "Slow", 10, 1 }, 570 { "Width", 8, 2 }, 571 { "ODTEn", 7, 1 }, 572 { "Bks", 6, 1 }, 573 { "Org", 5, 1 }, 574 { "Den", 2, 3 }, 575 { "Rdy", 1, 1 }, 576 { "ClkEn", 0, 1 }, 577 { "MC7_MODE", 0x104, 0 }, 578 { "Busy", 31, 1 }, 579 { "Mode", 0, 16 }, 580 { "MC7_EXT_MODE1", 0x108, 0 }, 581 { "Busy", 31, 1 }, 582 { "OCDAdjustMode", 20, 1 }, 583 { "OCDCode", 16, 4 }, 584 { "ExtMode1", 0, 16 }, 585 { "MC7_EXT_MODE2", 0x10c, 0 }, 586 { "Busy", 31, 1 }, 587 { "ExtMode2", 0, 16 }, 588 { "MC7_EXT_MODE3", 0x110, 0 }, 589 { "Busy", 31, 1 }, 590 { "ExtMode3", 0, 16 }, 591 { "MC7_PRE", 0x114, 0 }, 592 { "Busy", 31, 1 }, 593 { "MC7_REF", 0x118, 0 }, 594 { "Busy", 31, 1 }, 595 { "PreRefDiv", 1, 14 }, 596 { "PerRefEn", 0, 1 }, 597 { "MC7_DLL", 0x11c, 0 }, 598 { "DLLLock", 31, 1 }, 599 { "DLLDelta", 24, 7 }, 600 { "ManDelta", 3, 7 }, 601 { "DLLDeltaSel", 2, 1 }, 602 { "DLLEnb", 1, 1 }, 603 { "DLLRst", 0, 1 }, 604 { "MC7_PARM", 0x120, 0 }, 605 { "ActToPreDly", 26, 4 }, 606 { "ActToRdWrDly", 23, 3 }, 607 { "PreCyc", 20, 3 }, 608 { "RefCyc", 13, 7 }, 609 { "BkCyc", 8, 5 }, 610 { "WrToRdDly", 4, 4 }, 611 { "RdToWrDly", 0, 4 }, 612 { "MC7_HWM_WRR", 0x124, 0 }, 613 { "MEM_HWM", 26, 6 }, 614 { "ULP_HWM", 22, 4 }, 615 { "TOT_RLD_WT", 14, 8 }, 616 { "MEM_RLD_WT", 7, 7 }, 617 { "ULP_RLD_WT", 0, 7 }, 618 { "MC7_CAL", 0x128, 0 }, 619 { "BUSY", 31, 1 }, 620 { "CAL_FAULT", 30, 1 }, 621 { "PER_CAL_DIV", 22, 8 }, 622 { "PER_CAL_EN", 21, 1 }, 623 { "SGL_CAL_EN", 20, 1 }, 624 { "IMP_UPD_MODE", 19, 1 }, 625 { "IMP_SEL", 18, 1 }, 626 { "IMP_MAN_PD", 15, 3 }, 627 { "IMP_MAN_PU", 12, 3 }, 628 { "IMP_CAL_PD", 9, 3 }, 629 { "IMP_CAL_PU", 6, 3 }, 630 { "IMP_SET_PD", 3, 3 }, 631 { "IMP_SET_PU", 0, 3 }, 632 { "MC7_ERR_ADDR", 0x12c, 0 }, 633 { "ErrAddress", 3, 29 }, 634 { "ErrAgent", 1, 2 }, 635 { "ErrOp", 0, 1 }, 636 { "MC7_ECC", 0x130, 0 }, 637 { "UECnt", 10, 8 }, 638 { "CECnt", 2, 8 }, 639 { "ECCChkEn", 1, 1 }, 640 { "ECCGenEn", 0, 1 }, 641 { "MC7_CE_ADDR", 0x134, 0 }, 642 { "MC7_CE_DATA0", 0x138, 0 }, 643 { "MC7_CE_DATA1", 0x13c, 0 }, 644 { "MC7_CE_DATA2", 0x140, 0 }, 645 { "Data", 0, 8 }, 646 { "MC7_UE_ADDR", 0x144, 0 }, 647 { "MC7_UE_DATA0", 0x148, 0 }, 648 { "MC7_UE_DATA1", 0x14c, 0 }, 649 { "MC7_UE_DATA2", 0x150, 0 }, 650 { "Data", 0, 8 }, 651 { "MC7_BD_ADDR", 0x154, 0 }, 652 { "Addr", 3, 29 }, 653 { "MC7_BD_DATA0", 0x158, 0 }, 654 { "MC7_BD_DATA1", 0x15c, 0 }, 655 { "MC7_BD_DATA2", 0x160, 0 }, 656 { "Data", 0, 8 }, 657 { "MC7_BD_OP", 0x164, 0 }, 658 { "Busy", 31, 1 }, 659 { "Op", 0, 1 }, 660 { "MC7_BIST_ADDR_BEG", 0x168, 0 }, 661 { "AddrBeg", 5, 27 }, 662 { "MC7_BIST_ADDR_END", 0x16c, 0 }, 663 { "AddrEnd", 5, 27 }, 664 { "MC7_BIST_DATA", 0x170, 0 }, 665 { "MC7_BIST_OP", 0x174, 0 }, 666 { "Busy", 31, 1 }, 667 { "Gap", 4, 5 }, 668 { "Cont", 3, 1 }, 669 { "DataPat", 1, 2 }, 670 { "Op", 0, 1 }, 671 { "MC7_INT_ENABLE", 0x178, 0 }, 672 { "AE", 17, 1 }, 673 { "PE", 2, 15 }, 674 { "UE", 1, 1 }, 675 { "CE", 0, 1 }, 676 { "MC7_INT_CAUSE", 0x17c, 0 }, 677 { "AE", 17, 1 }, 678 { "PE", 2, 15 }, 679 { "UE", 1, 1 }, 680 { "CE", 0, 1 }, 681 { NULL, 0, 0 } 682 }; 683 684 struct reg_info t3b_mc7_pmtx_regs[] = { 685 { "MC7_CFG", 0x180, 0 }, 686 { "ImpSetUpdate", 14, 1 }, 687 { "IFEn", 13, 1 }, 688 { "TERM300", 12, 1 }, 689 { "TERM150", 11, 1 }, 690 { "Slow", 10, 1 }, 691 { "Width", 8, 2 }, 692 { "ODTEn", 7, 1 }, 693 { "Bks", 6, 1 }, 694 { "Org", 5, 1 }, 695 { "Den", 2, 3 }, 696 { "Rdy", 1, 1 }, 697 { "ClkEn", 0, 1 }, 698 { "MC7_MODE", 0x184, 0 }, 699 { "Busy", 31, 1 }, 700 { "Mode", 0, 16 }, 701 { "MC7_EXT_MODE1", 0x188, 0 }, 702 { "Busy", 31, 1 }, 703 { "OCDAdjustMode", 20, 1 }, 704 { "OCDCode", 16, 4 }, 705 { "ExtMode1", 0, 16 }, 706 { "MC7_EXT_MODE2", 0x18c, 0 }, 707 { "Busy", 31, 1 }, 708 { "ExtMode2", 0, 16 }, 709 { "MC7_EXT_MODE3", 0x190, 0 }, 710 { "Busy", 31, 1 }, 711 { "ExtMode3", 0, 16 }, 712 { "MC7_PRE", 0x194, 0 }, 713 { "Busy", 31, 1 }, 714 { "MC7_REF", 0x198, 0 }, 715 { "Busy", 31, 1 }, 716 { "PreRefDiv", 1, 14 }, 717 { "PerRefEn", 0, 1 }, 718 { "MC7_DLL", 0x19c, 0 }, 719 { "DLLLock", 31, 1 }, 720 { "DLLDelta", 24, 7 }, 721 { "ManDelta", 3, 7 }, 722 { "DLLDeltaSel", 2, 1 }, 723 { "DLLEnb", 1, 1 }, 724 { "DLLRst", 0, 1 }, 725 { "MC7_PARM", 0x1a0, 0 }, 726 { "ActToPreDly", 26, 4 }, 727 { "ActToRdWrDly", 23, 3 }, 728 { "PreCyc", 20, 3 }, 729 { "RefCyc", 13, 7 }, 730 { "BkCyc", 8, 5 }, 731 { "WrToRdDly", 4, 4 }, 732 { "RdToWrDly", 0, 4 }, 733 { "MC7_HWM_WRR", 0x1a4, 0 }, 734 { "MEM_HWM", 26, 6 }, 735 { "ULP_HWM", 22, 4 }, 736 { "TOT_RLD_WT", 14, 8 }, 737 { "MEM_RLD_WT", 7, 7 }, 738 { "ULP_RLD_WT", 0, 7 }, 739 { "MC7_CAL", 0x1a8, 0 }, 740 { "BUSY", 31, 1 }, 741 { "CAL_FAULT", 30, 1 }, 742 { "PER_CAL_DIV", 22, 8 }, 743 { "PER_CAL_EN", 21, 1 }, 744 { "SGL_CAL_EN", 20, 1 }, 745 { "IMP_UPD_MODE", 19, 1 }, 746 { "IMP_SEL", 18, 1 }, 747 { "IMP_MAN_PD", 15, 3 }, 748 { "IMP_MAN_PU", 12, 3 }, 749 { "IMP_CAL_PD", 9, 3 }, 750 { "IMP_CAL_PU", 6, 3 }, 751 { "IMP_SET_PD", 3, 3 }, 752 { "IMP_SET_PU", 0, 3 }, 753 { "MC7_ERR_ADDR", 0x1ac, 0 }, 754 { "ErrAddress", 3, 29 }, 755 { "ErrAgent", 1, 2 }, 756 { "ErrOp", 0, 1 }, 757 { "MC7_ECC", 0x1b0, 0 }, 758 { "UECnt", 10, 8 }, 759 { "CECnt", 2, 8 }, 760 { "ECCChkEn", 1, 1 }, 761 { "ECCGenEn", 0, 1 }, 762 { "MC7_CE_ADDR", 0x1b4, 0 }, 763 { "MC7_CE_DATA0", 0x1b8, 0 }, 764 { "MC7_CE_DATA1", 0x1bc, 0 }, 765 { "MC7_CE_DATA2", 0x1c0, 0 }, 766 { "Data", 0, 8 }, 767 { "MC7_UE_ADDR", 0x1c4, 0 }, 768 { "MC7_UE_DATA0", 0x1c8, 0 }, 769 { "MC7_UE_DATA1", 0x1cc, 0 }, 770 { "MC7_UE_DATA2", 0x1d0, 0 }, 771 { "Data", 0, 8 }, 772 { "MC7_BD_ADDR", 0x1d4, 0 }, 773 { "Addr", 3, 29 }, 774 { "MC7_BD_DATA0", 0x1d8, 0 }, 775 { "MC7_BD_DATA1", 0x1dc, 0 }, 776 { "MC7_BD_DATA2", 0x1e0, 0 }, 777 { "Data", 0, 8 }, 778 { "MC7_BD_OP", 0x1e4, 0 }, 779 { "Busy", 31, 1 }, 780 { "Op", 0, 1 }, 781 { "MC7_BIST_ADDR_BEG", 0x1e8, 0 }, 782 { "AddrBeg", 5, 27 }, 783 { "MC7_BIST_ADDR_END", 0x1ec, 0 }, 784 { "AddrEnd", 5, 27 }, 785 { "MC7_BIST_DATA", 0x1f0, 0 }, 786 { "MC7_BIST_OP", 0x1f4, 0 }, 787 { "Busy", 31, 1 }, 788 { "Gap", 4, 5 }, 789 { "Cont", 3, 1 }, 790 { "DataPat", 1, 2 }, 791 { "Op", 0, 1 }, 792 { "MC7_INT_ENABLE", 0x1f8, 0 }, 793 { "AE", 17, 1 }, 794 { "PE", 2, 15 }, 795 { "UE", 1, 1 }, 796 { "CE", 0, 1 }, 797 { "MC7_INT_CAUSE", 0x1fc, 0 }, 798 { "AE", 17, 1 }, 799 { "PE", 2, 15 }, 800 { "UE", 1, 1 }, 801 { "CE", 0, 1 }, 802 { NULL, 0, 0 } 803 }; 804 805 struct reg_info t3b_mc7_cm_regs[] = { 806 { "MC7_CFG", 0x200, 0 }, 807 { "ImpSetUpdate", 14, 1 }, 808 { "IFEn", 13, 1 }, 809 { "TERM300", 12, 1 }, 810 { "TERM150", 11, 1 }, 811 { "Slow", 10, 1 }, 812 { "Width", 8, 2 }, 813 { "ODTEn", 7, 1 }, 814 { "Bks", 6, 1 }, 815 { "Org", 5, 1 }, 816 { "Den", 2, 3 }, 817 { "Rdy", 1, 1 }, 818 { "ClkEn", 0, 1 }, 819 { "MC7_MODE", 0x204, 0 }, 820 { "Busy", 31, 1 }, 821 { "Mode", 0, 16 }, 822 { "MC7_EXT_MODE1", 0x208, 0 }, 823 { "Busy", 31, 1 }, 824 { "OCDAdjustMode", 20, 1 }, 825 { "OCDCode", 16, 4 }, 826 { "ExtMode1", 0, 16 }, 827 { "MC7_EXT_MODE2", 0x20c, 0 }, 828 { "Busy", 31, 1 }, 829 { "ExtMode2", 0, 16 }, 830 { "MC7_EXT_MODE3", 0x210, 0 }, 831 { "Busy", 31, 1 }, 832 { "ExtMode3", 0, 16 }, 833 { "MC7_PRE", 0x214, 0 }, 834 { "Busy", 31, 1 }, 835 { "MC7_REF", 0x218, 0 }, 836 { "Busy", 31, 1 }, 837 { "PreRefDiv", 1, 14 }, 838 { "PerRefEn", 0, 1 }, 839 { "MC7_DLL", 0x21c, 0 }, 840 { "DLLLock", 31, 1 }, 841 { "DLLDelta", 24, 7 }, 842 { "ManDelta", 3, 7 }, 843 { "DLLDeltaSel", 2, 1 }, 844 { "DLLEnb", 1, 1 }, 845 { "DLLRst", 0, 1 }, 846 { "MC7_PARM", 0x220, 0 }, 847 { "ActToPreDly", 26, 4 }, 848 { "ActToRdWrDly", 23, 3 }, 849 { "PreCyc", 20, 3 }, 850 { "RefCyc", 13, 7 }, 851 { "BkCyc", 8, 5 }, 852 { "WrToRdDly", 4, 4 }, 853 { "RdToWrDly", 0, 4 }, 854 { "MC7_HWM_WRR", 0x224, 0 }, 855 { "MEM_HWM", 26, 6 }, 856 { "ULP_HWM", 22, 4 }, 857 { "TOT_RLD_WT", 14, 8 }, 858 { "MEM_RLD_WT", 7, 7 }, 859 { "ULP_RLD_WT", 0, 7 }, 860 { "MC7_CAL", 0x228, 0 }, 861 { "BUSY", 31, 1 }, 862 { "CAL_FAULT", 30, 1 }, 863 { "PER_CAL_DIV", 22, 8 }, 864 { "PER_CAL_EN", 21, 1 }, 865 { "SGL_CAL_EN", 20, 1 }, 866 { "IMP_UPD_MODE", 19, 1 }, 867 { "IMP_SEL", 18, 1 }, 868 { "IMP_MAN_PD", 15, 3 }, 869 { "IMP_MAN_PU", 12, 3 }, 870 { "IMP_CAL_PD", 9, 3 }, 871 { "IMP_CAL_PU", 6, 3 }, 872 { "IMP_SET_PD", 3, 3 }, 873 { "IMP_SET_PU", 0, 3 }, 874 { "MC7_ERR_ADDR", 0x22c, 0 }, 875 { "ErrAddress", 3, 29 }, 876 { "ErrAgent", 1, 2 }, 877 { "ErrOp", 0, 1 }, 878 { "MC7_ECC", 0x230, 0 }, 879 { "UECnt", 10, 8 }, 880 { "CECnt", 2, 8 }, 881 { "ECCChkEn", 1, 1 }, 882 { "ECCGenEn", 0, 1 }, 883 { "MC7_CE_ADDR", 0x234, 0 }, 884 { "MC7_CE_DATA0", 0x238, 0 }, 885 { "MC7_CE_DATA1", 0x23c, 0 }, 886 { "MC7_CE_DATA2", 0x240, 0 }, 887 { "Data", 0, 8 }, 888 { "MC7_UE_ADDR", 0x244, 0 }, 889 { "MC7_UE_DATA0", 0x248, 0 }, 890 { "MC7_UE_DATA1", 0x24c, 0 }, 891 { "MC7_UE_DATA2", 0x250, 0 }, 892 { "Data", 0, 8 }, 893 { "MC7_BD_ADDR", 0x254, 0 }, 894 { "Addr", 3, 29 }, 895 { "MC7_BD_DATA0", 0x258, 0 }, 896 { "MC7_BD_DATA1", 0x25c, 0 }, 897 { "MC7_BD_DATA2", 0x260, 0 }, 898 { "Data", 0, 8 }, 899 { "MC7_BD_OP", 0x264, 0 }, 900 { "Busy", 31, 1 }, 901 { "Op", 0, 1 }, 902 { "MC7_BIST_ADDR_BEG", 0x268, 0 }, 903 { "AddrBeg", 5, 27 }, 904 { "MC7_BIST_ADDR_END", 0x26c, 0 }, 905 { "AddrEnd", 5, 27 }, 906 { "MC7_BIST_DATA", 0x270, 0 }, 907 { "MC7_BIST_OP", 0x274, 0 }, 908 { "Busy", 31, 1 }, 909 { "Gap", 4, 5 }, 910 { "Cont", 3, 1 }, 911 { "DataPat", 1, 2 }, 912 { "Op", 0, 1 }, 913 { "MC7_INT_ENABLE", 0x278, 0 }, 914 { "AE", 17, 1 }, 915 { "PE", 2, 15 }, 916 { "UE", 1, 1 }, 917 { "CE", 0, 1 }, 918 { "MC7_INT_CAUSE", 0x27c, 0 }, 919 { "AE", 17, 1 }, 920 { "PE", 2, 15 }, 921 { "UE", 1, 1 }, 922 { "CE", 0, 1 }, 923 { NULL, 0, 0 } 924 }; 925 926 struct reg_info t3b_cim_regs[] = { 927 { "CIM_BOOT_CFG", 0x280, 0 }, 928 { "BootAddr", 2, 30 }, 929 { "BootSdram", 1, 1 }, 930 { "uPCRst", 0, 1 }, 931 { "CIM_FLASH_BASE_ADDR", 0x284, 0 }, 932 { "FlashBaseAddr", 2, 22 }, 933 { "CIM_FLASH_ADDR_SIZE", 0x288, 0 }, 934 { "FlashAddrSize", 2, 22 }, 935 { "CIM_SDRAM_BASE_ADDR", 0x28c, 0 }, 936 { "SdramBaseAddr", 2, 30 }, 937 { "CIM_SDRAM_ADDR_SIZE", 0x290, 0 }, 938 { "SdramAddrSize", 2, 30 }, 939 { "CIM_UP_SPARE_INT", 0x294, 0 }, 940 { "uPSpareInt", 0, 3 }, 941 { "CIM_HOST_INT_ENABLE", 0x298, 0 }, 942 { "Timer1IntEn", 15, 1 }, 943 { "Timer0IntEn", 14, 1 }, 944 { "PrefDropIntEn", 13, 1 }, 945 { "BlkWrPlIntEn", 12, 1 }, 946 { "BlkRdPlIntEn", 11, 1 }, 947 { "BlkWrCtlIntEn", 10, 1 }, 948 { "BlkRdCtlIntEn", 9, 1 }, 949 { "BlkWrFlashIntEn", 8, 1 }, 950 { "BlkRdFlashIntEn", 7, 1 }, 951 { "SglWrFlashIntEn", 6, 1 }, 952 { "WrBlkFlashIntEn", 5, 1 }, 953 { "BlkWrBootIntEn", 4, 1 }, 954 { "BlkRdBootIntEn", 3, 1 }, 955 { "FlashRangeIntEn", 2, 1 }, 956 { "SdramRangeIntEn", 1, 1 }, 957 { "RsvdSpaceIntEn", 0, 1 }, 958 { "CIM_HOST_INT_CAUSE", 0x29c, 0 }, 959 { "Timer1Int", 15, 1 }, 960 { "Timer0Int", 14, 1 }, 961 { "PrefDropInt", 13, 1 }, 962 { "BlkWrPlInt", 12, 1 }, 963 { "BlkRdPlInt", 11, 1 }, 964 { "BlkWrCtlInt", 10, 1 }, 965 { "BlkRdCtlInt", 9, 1 }, 966 { "BlkWrFlashInt", 8, 1 }, 967 { "BlkRdFlashInt", 7, 1 }, 968 { "SglWrFlashInt", 6, 1 }, 969 { "WrBlkFlashInt", 5, 1 }, 970 { "BlkWrBootInt", 4, 1 }, 971 { "BlkRdBootInt", 3, 1 }, 972 { "FlashRangeInt", 2, 1 }, 973 { "SdramRangeInt", 1, 1 }, 974 { "RsvdSpaceInt", 0, 1 }, 975 { "CIM_UP_INT_ENABLE", 0x2a0, 0 }, 976 { "MstPlIntEn", 16, 1 }, 977 { "Timer1IntEn", 15, 1 }, 978 { "Timer0IntEn", 14, 1 }, 979 { "PrefDropIntEn", 13, 1 }, 980 { "BlkWrPlIntEn", 12, 1 }, 981 { "BlkRdPlIntEn", 11, 1 }, 982 { "BlkWrCtlIntEn", 10, 1 }, 983 { "BlkRdCtlIntEn", 9, 1 }, 984 { "BlkWrFlashIntEn", 8, 1 }, 985 { "BlkRdFlashIntEn", 7, 1 }, 986 { "SglWrFlashIntEn", 6, 1 }, 987 { "WrBlkFlashIntEn", 5, 1 }, 988 { "BlkWrBootIntEn", 4, 1 }, 989 { "BlkRdBootIntEn", 3, 1 }, 990 { "FlashRangeIntEn", 2, 1 }, 991 { "SdramRangeIntEn", 1, 1 }, 992 { "RsvdSpaceIntEn", 0, 1 }, 993 { "CIM_UP_INT_CAUSE", 0x2a4, 0 }, 994 { "MstPlInt", 16, 1 }, 995 { "Timer1Int", 15, 1 }, 996 { "Timer0Int", 14, 1 }, 997 { "PrefDropInt", 13, 1 }, 998 { "BlkWrPlInt", 12, 1 }, 999 { "BlkRdPlInt", 11, 1 }, 1000 { "BlkWrCtlInt", 10, 1 }, 1001 { "BlkRdCtlInt", 9, 1 }, 1002 { "BlkWrFlashInt", 8, 1 }, 1003 { "BlkRdFlashInt", 7, 1 }, 1004 { "SglWrFlashInt", 6, 1 }, 1005 { "WrBlkFlashInt", 5, 1 }, 1006 { "BlkWrBootInt", 4, 1 }, 1007 { "BlkRdBootInt", 3, 1 }, 1008 { "FlashRangeInt", 2, 1 }, 1009 { "SdramRangeInt", 1, 1 }, 1010 { "RsvdSpaceInt", 0, 1 }, 1011 { "CIM_IBQ_FULLA_THRSH", 0x2a8, 0 }, 1012 { "Ibq0FullThrsh", 0, 9 }, 1013 { "Ibq1FullThrsh", 16, 9 }, 1014 { "CIM_IBQ_FULLB_THRSH", 0x2ac, 0 }, 1015 { "Ibq2FullThrsh", 0, 9 }, 1016 { "Ibq3FullThrsh", 16, 9 }, 1017 { "CIM_HOST_ACC_CTRL", 0x2b0, 0 }, 1018 { "HostBusy", 17, 1 }, 1019 { "HostWrite", 16, 1 }, 1020 { "HostAddr", 0, 16 }, 1021 { "CIM_HOST_ACC_DATA", 0x2b4, 0 }, 1022 { "CIM_IBQ_DBG_CFG", 0x2c0, 0 }, 1023 { "IbqDbgAddr", 16, 9 }, 1024 { "IbqDbgQID", 3, 2 }, 1025 { "IbqDbgWr", 2, 1 }, 1026 { "IbqDbgBusy", 1, 1 }, 1027 { "IbqDbgEn", 0, 1 }, 1028 { "CIM_OBQ_DBG_CFG", 0x2c4, 0 }, 1029 { "ObqDbgAddr", 16, 9 }, 1030 { "ObqDbgQID", 3, 2 }, 1031 { "ObqDbgWr", 2, 1 }, 1032 { "ObqDbgBusy", 1, 1 }, 1033 { "ObqDbgEn", 0, 1 }, 1034 { "CIM_IBQ_DBG_DATA", 0x2c8, 0 }, 1035 { "CIM_OBQ_DBG_DATA", 0x2cc, 0 }, 1036 { "CIM_CDEBUGDATA", 0x2d0, 0 }, 1037 { "CDebugDataH", 16, 16 }, 1038 { "CDebugDataL", 0, 16 }, 1039 { "CIM_DEBUGCFG", 0x2e0, 0 }, 1040 { "POLADbgRdPtr", 23, 9 }, 1041 { "PILADbgRdPtr", 14, 9 }, 1042 { "LADbgEn", 12, 1 }, 1043 { "DebugSelH", 5, 5 }, 1044 { "DebugSelL", 0, 5 }, 1045 { "CIM_DEBUGSTS", 0x2e4, 0 }, 1046 { "POLADbgWrPtr", 16, 9 }, 1047 { "PILADbgWrPtr", 0, 9 }, 1048 { "CIM_PO_LA_DEBUGDATA", 0x2e8, 0 }, 1049 { "CIM_PI_LA_DEBUGDATA", 0x2ec, 0 }, 1050 { NULL, 0, 0 } 1051 }; 1052 1053 struct reg_info t3b_tp1_regs[] = { 1054 { "TP_IN_CONFIG", 0x300, 0 }, 1055 { "RXFbArbPrio", 25, 1 }, 1056 { "TXFbArbPrio", 24, 1 }, 1057 { "DBMaxOpCnt", 16, 8 }, 1058 { "IPv6Enable", 15, 1 }, 1059 { "NICMode", 14, 1 }, 1060 { "EChecksumCheckTCP", 13, 1 }, 1061 { "EChecksumCheckIP", 12, 1 }, 1062 { "ECPL", 10, 1 }, 1063 { "EEthernet", 8, 1 }, 1064 { "ETunnel", 7, 1 }, 1065 { "CChecksumCheckTCP", 6, 1 }, 1066 { "CChecksumCheckIP", 5, 1 }, 1067 { "CCPL", 3, 1 }, 1068 { "CEthernet", 1, 1 }, 1069 { "CTunnel", 0, 1 }, 1070 { "TP_OUT_CONFIG", 0x304, 0 }, 1071 { "IPIDSplitMode", 16, 1 }, 1072 { "VLANExtractionEnable2ndPort", 13, 1 }, 1073 { "VLANExtractionEnable", 12, 1 }, 1074 { "EChecksumGenerateTCP", 11, 1 }, 1075 { "EChecksumGenerateIP", 10, 1 }, 1076 { "ECPL", 8, 1 }, 1077 { "EEthernet", 6, 1 }, 1078 { "CChecksumGenerateTCP", 5, 1 }, 1079 { "CChecksumGenerateIP", 4, 1 }, 1080 { "CCPL", 2, 1 }, 1081 { "CEthernet", 0, 1 }, 1082 { "TP_GLOBAL_CONFIG", 0x308, 0 }, 1083 { "SYNCookieParams", 26, 6 }, 1084 { "RXFlowControlDisable", 25, 1 }, 1085 { "TXPacingEnable", 24, 1 }, 1086 { "AttackFilterEnable", 23, 1 }, 1087 { "SYNCookieNoOptions", 22, 1 }, 1088 { "ProtectedMode", 21, 1 }, 1089 { "PingDrop", 20, 1 }, 1090 { "FragmentDrop", 19, 1 }, 1091 { "FiveTupleLookup", 17, 2 }, 1092 { "PathMTU", 15, 1 }, 1093 { "IPIdentSplit", 14, 1 }, 1094 { "IPChecksumOffload", 13, 1 }, 1095 { "UDPChecksumOffload", 12, 1 }, 1096 { "TCPChecksumOffload", 11, 1 }, 1097 { "QOSMapping", 10, 1 }, 1098 { "TCAMServerUse", 8, 2 }, 1099 { "IPTTL", 0, 8 }, 1100 { "TP_GLOBAL_RX_CREDIT", 0x30c, 0 }, 1101 { "TP_CMM_SIZE", 0x310, 0 }, 1102 { "CMMemMgrSize", 0, 28 }, 1103 { "TP_CMM_MM_BASE", 0x314, 0 }, 1104 { "CMMemMgrBase", 0, 28 }, 1105 { "TP_CMM_TIMER_BASE", 0x318, 0 }, 1106 { "CMTimerMaxNum", 28, 2 }, 1107 { "CMTimerBase", 0, 28 }, 1108 { "TP_PMM_SIZE", 0x31c, 0 }, 1109 { "PMSize", 0, 28 }, 1110 { "TP_PMM_TX_BASE", 0x320, 0 }, 1111 { "TP_PMM_DEFRAG_BASE", 0x324, 0 }, 1112 { "TP_PMM_RX_BASE", 0x328, 0 }, 1113 { "TP_PMM_RX_PAGE_SIZE", 0x32c, 0 }, 1114 { "TP_PMM_RX_MAX_PAGE", 0x330, 0 }, 1115 { "PMRxMaxPage", 0, 21 }, 1116 { "TP_PMM_TX_PAGE_SIZE", 0x334, 0 }, 1117 { "TP_PMM_TX_MAX_PAGE", 0x338, 0 }, 1118 { "PMTxMaxPage", 0, 21 }, 1119 { "TP_TCP_OPTIONS", 0x340, 0 }, 1120 { "MTUDefault", 16, 16 }, 1121 { "MTUEnable", 10, 1 }, 1122 { "SACKTx", 9, 1 }, 1123 { "SACKRx", 8, 1 }, 1124 { "SACKMode", 4, 2 }, 1125 { "WindowScaleMode", 2, 2 }, 1126 { "TimestampsMode", 0, 2 }, 1127 { "TP_DACK_CONFIG", 0x344, 0 }, 1128 { "AutoState3", 30, 2 }, 1129 { "AutoState2", 28, 2 }, 1130 { "AutoState1", 26, 2 }, 1131 { "ByteThreshold", 5, 20 }, 1132 { "MSSThreshold", 3, 2 }, 1133 { "AutoCareful", 2, 1 }, 1134 { "AutoEnable", 1, 1 }, 1135 { "Mode", 0, 1 }, 1136 { "TP_PC_CONFIG", 0x348, 0 }, 1137 { "CMCacheDisable", 31, 1 }, 1138 { "EnableOcspiFull", 30, 1 }, 1139 { "EnableFLMErrorDDP", 29, 1 }, 1140 { "LockTid", 28, 1 }, 1141 { "FixRcvWnd", 27, 1 }, 1142 { "TxTosQueueMapMode", 26, 1 }, 1143 { "RddpCongEn", 25, 1 }, 1144 { "EnableOnFlyPDU", 24, 1 }, 1145 { "EnableEPCMDAFull", 23, 1 }, 1146 { "ModulateUnionMode", 22, 1 }, 1147 { "TxDataAckRateEnable", 21, 1 }, 1148 { "TxDeferEnable", 20, 1 }, 1149 { "RxCongestionMode", 19, 1 }, 1150 { "HearbeatOnceDACK", 18, 1 }, 1151 { "HearbeatOnceHeap", 17, 1 }, 1152 { "HearbeatDACK", 16, 1 }, 1153 { "TxCongestionMode", 15, 1 }, 1154 { "AcceptLatestRcvAdv", 14, 1 }, 1155 { "DisableSYNData", 13, 1 }, 1156 { "DisableWindowPSH", 12, 1 }, 1157 { "DisableFINOldData", 11, 1 }, 1158 { "EnableFLMError", 10, 1 }, 1159 { "DisableNextMtu", 9, 1 }, 1160 { "FilterPeerFIN", 8, 1 }, 1161 { "EnableFeedbackSend", 7, 1 }, 1162 { "EnableRDMAError", 6, 1 }, 1163 { "EnableDDPFlowControl", 5, 1 }, 1164 { "DisableHeldFIN", 4, 1 }, 1165 { "TableLatencyDelta", 0, 4 }, 1166 { "TP_PC_CONFIG2", 0x34c, 0 }, 1167 { "EnableDropRQEmptyPkt", 10, 1 }, 1168 { "EnableTxPortfromDA2", 9, 1 }, 1169 { "EnableRxPktTmstpRss", 8, 1 }, 1170 { "EnableSndUnaInRxData", 7, 1 }, 1171 { "EnableRxPortFromAddr", 6, 1 }, 1172 { "EnableTxPortfromDA", 5, 1 }, 1173 { "CHdrAFull", 4, 1 }, 1174 { "EnableNonOfdScbBit", 3, 1 }, 1175 { "EnableNonOfdTidRss", 2, 1 }, 1176 { "EnableNonOfdTcbRss", 1, 1 }, 1177 { "EnableOldRxForward", 0, 1 }, 1178 { "TP_TCP_BACKOFF_REG0", 0x350, 0 }, 1179 { "TimerBackoffIndex3", 24, 8 }, 1180 { "TimerBackoffIndex2", 16, 8 }, 1181 { "TimerBackoffIndex1", 8, 8 }, 1182 { "TimerBackoffIndex0", 0, 8 }, 1183 { "TP_TCP_BACKOFF_REG1", 0x354, 0 }, 1184 { "TimerBackoffIndex7", 24, 8 }, 1185 { "TimerBackoffIndex6", 16, 8 }, 1186 { "TimerBackoffIndex5", 8, 8 }, 1187 { "TimerBackoffIndex4", 0, 8 }, 1188 { "TP_TCP_BACKOFF_REG2", 0x358, 0 }, 1189 { "TimerBackoffIndex11", 24, 8 }, 1190 { "TimerBackoffIndex10", 16, 8 }, 1191 { "TimerBackoffIndex9", 8, 8 }, 1192 { "TimerBackoffIndex8", 0, 8 }, 1193 { "TP_TCP_BACKOFF_REG3", 0x35c, 0 }, 1194 { "TimerBackoffIndex15", 24, 8 }, 1195 { "TimerBackoffIndex14", 16, 8 }, 1196 { "TimerBackoffIndex13", 8, 8 }, 1197 { "TimerBackoffIndex12", 0, 8 }, 1198 { "TP_PARA_REG0", 0x360, 0 }, 1199 { "InitCwnd", 24, 3 }, 1200 { "DupAckThresh", 20, 4 }, 1201 { "TP_PARA_REG1", 0x364, 0 }, 1202 { "InitRwnd", 16, 16 }, 1203 { "InitialSSThresh", 0, 16 }, 1204 { "TP_PARA_REG2", 0x368, 0 }, 1205 { "MaxRxData", 16, 16 }, 1206 { "RxCoalesceSize", 0, 16 }, 1207 { "TP_PARA_REG3", 0x36c, 0 }, 1208 { "TunnelCngDrop1", 21, 1 }, 1209 { "TunnelCngDrop0", 20, 1 }, 1210 { "TxDataAckIdx", 16, 4 }, 1211 { "RxFragEnable", 12, 3 }, 1212 { "TxPaceFixedStrict", 11, 1 }, 1213 { "TxPaceAutoStrict", 10, 1 }, 1214 { "TxPaceFixed", 9, 1 }, 1215 { "TxPaceAuto", 8, 1 }, 1216 { "RxUrgTunnel", 6, 1 }, 1217 { "RxUrgMode", 5, 1 }, 1218 { "TxUrgMode", 4, 1 }, 1219 { "CngCtrlMode", 2, 2 }, 1220 { "RxCoalesceEnable", 1, 1 }, 1221 { "RxCoalescePshEn", 0, 1 }, 1222 { "TP_PARA_REG4", 0x370, 0 }, 1223 { "HighSpeedCfg", 24, 8 }, 1224 { "NewRenoCfg", 16, 8 }, 1225 { "TahoeCfg", 8, 8 }, 1226 { "RenoCfg", 0, 8 }, 1227 { "TP_PARA_REG5", 0x374, 0 }, 1228 { "IndicateSize", 16, 16 }, 1229 { "SchdEnable", 8, 1 }, 1230 { "OnFlyDDPEnable", 2, 1 }, 1231 { "DackTimerSpin", 1, 1 }, 1232 { "PushTimerEnable", 0, 1 }, 1233 { "TP_PARA_REG6", 0x378, 0 }, 1234 { "TxPDUSizeAdj", 16, 8 }, 1235 { "EnableDeferACK", 12, 1 }, 1236 { "EnableESnd", 11, 1 }, 1237 { "EnableCSnd", 10, 1 }, 1238 { "EnablePDUE", 9, 1 }, 1239 { "EnablePDUC", 8, 1 }, 1240 { "EnableBUFI", 7, 1 }, 1241 { "EnableBUFE", 6, 1 }, 1242 { "EnableDefer", 5, 1 }, 1243 { "EnableClearRxmtOos", 4, 1 }, 1244 { "DisablePDUCng", 3, 1 }, 1245 { "DisablePDUTimeout", 2, 1 }, 1246 { "DisablePDURxmt", 1, 1 }, 1247 { "DisablePDUxmt", 0, 1 }, 1248 { "TP_PARA_REG7", 0x37c, 0 }, 1249 { "PMMaxXferLen1", 16, 16 }, 1250 { "PMMaxXferLen0", 0, 16 }, 1251 { "TP_TIMER_RESOLUTION", 0x390, 0 }, 1252 { "TimerResolution", 16, 8 }, 1253 { "TimestampResolution", 8, 8 }, 1254 { "DelayedACKResolution", 0, 8 }, 1255 { "TP_MSL", 0x394, 0 }, 1256 { "MSL", 0, 30 }, 1257 { "TP_RXT_MIN", 0x398, 0 }, 1258 { "RxtMin", 0, 30 }, 1259 { "TP_RXT_MAX", 0x39c, 0 }, 1260 { "RxtMax", 0, 30 }, 1261 { "TP_PERS_MIN", 0x3a0, 0 }, 1262 { "PersMin", 0, 30 }, 1263 { "TP_PERS_MAX", 0x3a4, 0 }, 1264 { "PersMax", 0, 30 }, 1265 { "TP_KEEP_IDLE", 0x3a8, 0 }, 1266 { "KeepaliveIdle", 0, 30 }, 1267 { "TP_KEEP_INTVL", 0x3ac, 0 }, 1268 { "KeepaliveIntvl", 0, 30 }, 1269 { "TP_INIT_SRTT", 0x3b0, 0 }, 1270 { "InitSrtt", 0, 16 }, 1271 { "TP_DACK_TIMER", 0x3b4, 0 }, 1272 { "DackTime", 0, 12 }, 1273 { "TP_FINWAIT2_TIMER", 0x3b8, 0 }, 1274 { "Finwait2Time", 0, 30 }, 1275 { "TP_FAST_FINWAIT2_TIMER", 0x3bc, 0 }, 1276 { "FastFinwait2Time", 0, 30 }, 1277 { "TP_SHIFT_CNT", 0x3c0, 0 }, 1278 { "SynShiftMax", 24, 8 }, 1279 { "RxtShiftMaxR1", 20, 4 }, 1280 { "RxtShiftMaxR2", 16, 4 }, 1281 { "PerShiftBackoffMax", 12, 4 }, 1282 { "PerShiftMax", 8, 4 }, 1283 { "KeepaliveMax", 0, 8 }, 1284 { "TP_TIME_HI", 0x3c8, 0 }, 1285 { "TP_TIME_LO", 0x3cc, 0 }, 1286 { "TP_MTU_PORT_TABLE", 0x3d0, 0 }, 1287 { "Port1MTUValue", 16, 16 }, 1288 { "Port0MTUValue", 0, 16 }, 1289 { "TP_ULP_TABLE", 0x3d4, 0 }, 1290 { "ULPType7Field", 28, 4 }, 1291 { "ULPType6Field", 24, 4 }, 1292 { "ULPType5Field", 20, 4 }, 1293 { "ULPType4Field", 16, 4 }, 1294 { "ULPType3Field", 12, 4 }, 1295 { "ULPType2Field", 8, 4 }, 1296 { "ULPType1Field", 4, 4 }, 1297 { "ULPType0Field", 0, 4 }, 1298 { "TP_PACE_TABLE", 0x3d8, 0 }, 1299 { "TP_CCTRL_TABLE", 0x3dc, 0 }, 1300 { "TP_TOS_TABLE", 0x3e0, 0 }, 1301 { "TP_MTU_TABLE", 0x3e4, 0 }, 1302 { "TP_RSS_MAP_TABLE", 0x3e8, 0 }, 1303 { "TP_RSS_LKP_TABLE", 0x3ec, 0 }, 1304 { "TP_RSS_CONFIG", 0x3f0, 0 }, 1305 { "TNL4tupEn", 29, 1 }, 1306 { "TNL2tupEn", 28, 1 }, 1307 { "TNLprtEn", 26, 1 }, 1308 { "TNLMapEn", 25, 1 }, 1309 { "TNLLkpEn", 24, 1 }, 1310 { "OFD4tupEn", 21, 1 }, 1311 { "OFD2tupEn", 20, 1 }, 1312 { "OFDMapEn", 17, 1 }, 1313 { "OFDLkpEn", 16, 1 }, 1314 { "SYN4tupEn", 13, 1 }, 1315 { "SYN2tupEn", 12, 1 }, 1316 { "SYNMapEn", 9, 1 }, 1317 { "SYNLkpEn", 8, 1 }, 1318 { "RRCPLMapEn", 7, 1 }, 1319 { "RRCPLCPUSIZE", 4, 3 }, 1320 { "RQFeedbackEnable", 3, 1 }, 1321 { "HashToeplitz", 2, 1 }, 1322 { "HashSave", 1, 1 }, 1323 { "Disable", 0, 1 }, 1324 { "TP_RSS_CONFIG_TNL", 0x3f4, 0 }, 1325 { "MaskSize", 28, 3 }, 1326 { "DefaultCPUBase", 22, 6 }, 1327 { "DefaultCPU", 16, 6 }, 1328 { "DefaultQueue", 0, 16 }, 1329 { "TP_RSS_CONFIG_OFD", 0x3f8, 0 }, 1330 { "MaskSize", 28, 3 }, 1331 { "DefaultCPUBase", 22, 6 }, 1332 { "DefaultCPU", 16, 6 }, 1333 { "DefaultQueue", 0, 16 }, 1334 { "TP_RSS_CONFIG_SYN", 0x3fc, 0 }, 1335 { "MaskSize", 28, 3 }, 1336 { "DefaultCPUBase", 22, 6 }, 1337 { "DefaultCPU", 16, 6 }, 1338 { "DefaultQueue", 0, 16 }, 1339 { "TP_RSS_SECRET_KEY0", 0x400, 0 }, 1340 { "TP_RSS_SECRET_KEY1", 0x404, 0 }, 1341 { "TP_RSS_SECRET_KEY2", 0x408, 0 }, 1342 { "TP_RSS_SECRET_KEY3", 0x40c, 0 }, 1343 { "TP_TM_PIO_ADDR", 0x418, 0 }, 1344 { "TP_TM_PIO_DATA", 0x41c, 0 }, 1345 { "TP_TX_MOD_QUE_TABLE", 0x420, 0 }, 1346 { "TP_TX_RESOURCE_LIMIT", 0x424, 0 }, 1347 { "TX_RESOURCE_LIMIT_CH1_PC", 24, 8 }, 1348 { "TX_RESOURCE_LIMIT_CH1_NON_PC", 16, 8 }, 1349 { "TX_RESOURCE_LIMIT_CH0_PC", 8, 8 }, 1350 { "TX_RESOURCE_LIMIT_CH0_NON_PC", 0, 8 }, 1351 { "TP_TX_MOD_QUEUE_REQ_MAP", 0x428, 0 }, 1352 { "RX_MOD_WEIGHT", 24, 8 }, 1353 { "TX_MOD_WEIGHT", 16, 8 }, 1354 { "TX_MOD_TIMER_MODE", 8, 8 }, 1355 { "TX_MOD_QUEUE_REQ_MAP", 0, 8 }, 1356 { "TP_TX_MOD_QUEUE_WEIGHT1", 0x42c, 0 }, 1357 { "TP_TX_MOD_QUEUE_WEIGHT7", 24, 8 }, 1358 { "TP_TX_MOD_QUEUE_WEIGHT6", 16, 8 }, 1359 { "TP_TX_MOD_QUEUE_WEIGHT5", 8, 8 }, 1360 { "TP_TX_MOD_QUEUE_WEIGHT4", 0, 8 }, 1361 { "TP_TX_MOD_QUEUE_WEIGHT0", 0x430, 0 }, 1362 { "TP_TX_MOD_QUEUE_WEIGHT3", 24, 8 }, 1363 { "TP_TX_MOD_QUEUE_WEIGHT2", 16, 8 }, 1364 { "TP_TX_MOD_QUEUE_WEIGHT1", 8, 8 }, 1365 { "TP_TX_MOD_QUEUE_WEIGHT0", 0, 8 }, 1366 { "TP_MOD_CHANNEL_WEIGHT", 0x434, 0 }, 1367 { "RX_MOD_CHANNEL_WEIGHT1", 24, 8 }, 1368 { "RX_MOD_CHANNEL_WEIGHT0", 16, 8 }, 1369 { "TX_MOD_CHANNEL_WEIGHT1", 8, 8 }, 1370 { "TX_MOD_CHANNEL_WEIGHT0", 0, 8 }, 1371 { "TP_MOD_RATE_LIMIT", 0x438, 0 }, 1372 { "RX_MOD_RATE_LIMIT_INC", 24, 8 }, 1373 { "RX_MOD_RATE_LIMIT_TICK", 16, 8 }, 1374 { "TX_MOD_RATE_LIMIT_INC", 8, 8 }, 1375 { "TX_MOD_RATE_LIMIT_TICK", 0, 8 }, 1376 { "TP_PIO_ADDR", 0x440, 0 }, 1377 { "TP_PIO_DATA", 0x444, 0 }, 1378 { "TP_RESET", 0x44c, 0 }, 1379 { "FlstInitEnable", 1, 1 }, 1380 { "TPReset", 0, 1 }, 1381 { "TP_MIB_INDEX", 0x450, 0 }, 1382 { "TP_MIB_RDATA", 0x454, 0 }, 1383 { "TP_SYNC_TIME_HI", 0x458, 0 }, 1384 { "TP_SYNC_TIME_LO", 0x45c, 0 }, 1385 { "TP_CMM_MM_RX_FLST_BASE", 0x460, 0 }, 1386 { "CMRxFlstBase", 0, 28 }, 1387 { "TP_CMM_MM_TX_FLST_BASE", 0x464, 0 }, 1388 { "CMTxFlstBase", 0, 28 }, 1389 { "TP_CMM_MM_PS_FLST_BASE", 0x468, 0 }, 1390 { "CMPsFlstBase", 0, 28 }, 1391 { "TP_CMM_MM_MAX_PSTRUCT", 0x46c, 0 }, 1392 { "CMMaxPstruct", 0, 21 }, 1393 { "TP_INT_ENABLE", 0x470, 0 }, 1394 { "TP_INT_CAUSE", 0x474, 0 }, 1395 { "TP_FLM_FREE_PS_CNT", 0x480, 0 }, 1396 { "FreePstructCount", 0, 21 }, 1397 { "TP_FLM_FREE_RX_CNT", 0x484, 0 }, 1398 { "FreeRxPageCount", 0, 21 }, 1399 { "TP_FLM_FREE_TX_CNT", 0x488, 0 }, 1400 { "FreeTxPageCount", 0, 21 }, 1401 { "TP_TM_HEAP_PUSH_CNT", 0x48c, 0 }, 1402 { "TP_TM_HEAP_POP_CNT", 0x490, 0 }, 1403 { "TP_TM_DACK_PUSH_CNT", 0x494, 0 }, 1404 { "TP_TM_DACK_POP_CNT", 0x498, 0 }, 1405 { "TP_TM_MOD_PUSH_CNT", 0x49c, 0 }, 1406 { "TP_MOD_POP_CNT", 0x4a0, 0 }, 1407 { "TP_TIMER_SEPARATOR", 0x4a4, 0 }, 1408 { "TP_DEBUG_SEL", 0x4a8, 0 }, 1409 { "TP_DEBUG_FLAGS", 0x4ac, 0 }, 1410 { "RxTimerDackFirst", 26, 1 }, 1411 { "RxTimerDack", 25, 1 }, 1412 { "RxTimerHeartbeat", 24, 1 }, 1413 { "RxPawsDrop", 23, 1 }, 1414 { "RxUrgDataDrop", 22, 1 }, 1415 { "RxFutureData", 21, 1 }, 1416 { "RxRcvRxmData", 20, 1 }, 1417 { "RxRcvOooDataFin", 19, 1 }, 1418 { "RxRcvOooData", 18, 1 }, 1419 { "RxRcvWndZero", 17, 1 }, 1420 { "RxRcvWndLtMss", 16, 1 }, 1421 { "TxDupAckInc", 11, 1 }, 1422 { "TxRxmUrg", 10, 1 }, 1423 { "TxRxmFin", 9, 1 }, 1424 { "TxRxmSyn", 8, 1 }, 1425 { "TxRxmNewReno", 7, 1 }, 1426 { "TxRxmFast", 6, 1 }, 1427 { "TxRxmTimer", 5, 1 }, 1428 { "TxRxmTimerKeepalive", 4, 1 }, 1429 { "TxRxmTimerPersist", 3, 1 }, 1430 { "TxRcvAdvShrunk", 2, 1 }, 1431 { "TxRcvAdvZero", 1, 1 }, 1432 { "TxRcvAdvLtMss", 0, 1 }, 1433 { "TP_PROXY_FLOW_CNTL", 0x4b0, 0 }, 1434 { "TP_PC_CONGESTION_CNTL", 0x4b4, 0 }, 1435 { "EDropTunnel", 19, 1 }, 1436 { "CDropTunnel", 18, 1 }, 1437 { "EThreshold", 12, 6 }, 1438 { "CThreshold", 6, 6 }, 1439 { "TxThreshold", 0, 6 }, 1440 { "TP_TX_DROP_COUNT", 0x4bc, 0 }, 1441 { "TP_CLEAR_DEBUG", 0x4c0, 0 }, 1442 { "ClrDebug", 0, 1 }, 1443 { "TP_DEBUG_VEC", 0x4c4, 0 }, 1444 { "TP_DEBUG_VEC2", 0x4c8, 0 }, 1445 { "TP_DEBUG_REG_SEL", 0x4cc, 0 }, 1446 { "TP_DEBUG", 0x4d0, 0 }, 1447 { "TP_DBG_LA_CONFIG", 0x4d4, 0 }, 1448 { "TP_DBG_LA_DATAH", 0x4d8, 0 }, 1449 { "TP_DBG_LA_DATAL", 0x4dc, 0 }, 1450 { "TP_EMBED_OP_FIELD0", 0x4e8, 0 }, 1451 { "TP_EMBED_OP_FIELD1", 0x4ec, 0 }, 1452 { "TP_EMBED_OP_FIELD2", 0x4f0, 0 }, 1453 { "TP_EMBED_OP_FIELD3", 0x4f4, 0 }, 1454 { "TP_EMBED_OP_FIELD4", 0x4f8, 0 }, 1455 { "TP_EMBED_OP_FIELD5", 0x4fc, 0 }, 1456 { NULL, 0, 0 } 1457 }; 1458 1459 struct reg_info t3b_ulp2_rx_regs[] = { 1460 { "ULPRX_CTL", 0x500, 0 }, 1461 { "PCMD1Threshold", 24, 8 }, 1462 { "PCMD0Threshold", 16, 8 }, 1463 { "round_robin", 4, 1 }, 1464 { "RDMA_permissive_mode", 3, 1 }, 1465 { "PagePodME", 2, 1 }, 1466 { "IscsiTagTcb", 1, 1 }, 1467 { "TddpTagTcb", 0, 1 }, 1468 { "ULPRX_INT_ENABLE", 0x504, 0 }, 1469 { "ParErr", 0, 1 }, 1470 { "ULPRX_INT_CAUSE", 0x508, 0 }, 1471 { "ParErr", 0, 1 }, 1472 { "ULPRX_ISCSI_LLIMIT", 0x50c, 0 }, 1473 { "IscsiLlimit", 6, 26 }, 1474 { "ULPRX_ISCSI_ULIMIT", 0x510, 0 }, 1475 { "IscsiUlimit", 6, 26 }, 1476 { "ULPRX_ISCSI_TAGMASK", 0x514, 0 }, 1477 { "IscsiTagMask", 6, 26 }, 1478 { "ULPRX_ISCSI_PSZ", 0x518, 0 }, 1479 { "Hpz3", 24, 4 }, 1480 { "Hpz2", 16, 4 }, 1481 { "Hpz1", 8, 4 }, 1482 { "Hpz0", 0, 4 }, 1483 { "ULPRX_TDDP_LLIMIT", 0x51c, 0 }, 1484 { "TddpLlimit", 6, 26 }, 1485 { "ULPRX_TDDP_ULIMIT", 0x520, 0 }, 1486 { "TddpUlimit", 6, 26 }, 1487 { "ULPRX_TDDP_TAGMASK", 0x524, 0 }, 1488 { "TddpTagMask", 6, 26 }, 1489 { "ULPRX_TDDP_PSZ", 0x528, 0 }, 1490 { "Hpz3", 24, 4 }, 1491 { "Hpz2", 16, 4 }, 1492 { "Hpz1", 8, 4 }, 1493 { "Hpz0", 0, 4 }, 1494 { "ULPRX_STAG_LLIMIT", 0x52c, 0 }, 1495 { "ULPRX_STAG_ULIMIT", 0x530, 0 }, 1496 { "ULPRX_RQ_LLIMIT", 0x534, 0 }, 1497 { "ULPRX_RQ_ULIMIT", 0x538, 0 }, 1498 { "ULPRX_PBL_LLIMIT", 0x53c, 0 }, 1499 { "ULPRX_PBL_ULIMIT", 0x540, 0 }, 1500 { NULL, 0, 0 } 1501 }; 1502 1503 struct reg_info t3b_ulp2_tx_regs[] = { 1504 { "ULPTX_CONFIG", 0x580, 0 }, 1505 { "CFG_RR_ARB", 0, 1 }, 1506 { "ULPTX_INT_ENABLE", 0x584, 0 }, 1507 { "Pbl_bound_err_ch1", 1, 1 }, 1508 { "Pbl_bound_err_ch0", 0, 1 }, 1509 { "ULPTX_INT_CAUSE", 0x588, 0 }, 1510 { "Pbl_bound_err_ch1", 1, 1 }, 1511 { "Pbl_bound_err_ch0", 0, 1 }, 1512 { "ULPTX_TPT_LLIMIT", 0x58c, 0 }, 1513 { "ULPTX_TPT_ULIMIT", 0x590, 0 }, 1514 { "ULPTX_PBL_LLIMIT", 0x594, 0 }, 1515 { "ULPTX_PBL_ULIMIT", 0x598, 0 }, 1516 { "ULPTX_CPL_ERR_OFFSET", 0x59c, 0 }, 1517 { "ULPTX_CPL_ERR_MASK", 0x5a0, 0 }, 1518 { "ULPTX_CPL_ERR_VALUE", 0x5a4, 0 }, 1519 { "ULPTX_CPL_PACK_SIZE", 0x5a8, 0 }, 1520 { "value", 24, 8 }, 1521 { "Ch1Size2", 24, 8 }, 1522 { "Ch1Size1", 16, 8 }, 1523 { "Ch0Size2", 8, 8 }, 1524 { "Ch0Size1", 0, 8 }, 1525 { "ULPTX_DMA_WEIGHT", 0x5ac, 0 }, 1526 { "D1_WEIGHT", 16, 16 }, 1527 { "D0_WEIGHT", 0, 16 }, 1528 { NULL, 0, 0 } 1529 }; 1530 1531 struct reg_info t3b_pm1_rx_regs[] = { 1532 { "PM1_RX_CFG", 0x5c0, 0 }, 1533 { "PM1_RX_MODE", 0x5c4, 0 }, 1534 { "stat_channel", 1, 1 }, 1535 { "priority_ch", 0, 1 }, 1536 { "PM1_RX_STAT_CONFIG", 0x5c8, 0 }, 1537 { "PM1_RX_STAT_COUNT", 0x5cc, 0 }, 1538 { "PM1_RX_STAT_MSB", 0x5d0, 0 }, 1539 { "PM1_RX_STAT_LSB", 0x5d4, 0 }, 1540 { "PM1_RX_INT_ENABLE", 0x5d8, 0 }, 1541 { "zero_e_cmd_error", 18, 1 }, 1542 { "iespi0_fifo2x_Rx_framing_error", 17, 1 }, 1543 { "iespi1_fifo2x_Rx_framing_error", 16, 1 }, 1544 { "iespi0_Rx_framing_error", 15, 1 }, 1545 { "iespi1_Rx_framing_error", 14, 1 }, 1546 { "iespi0_Tx_framing_error", 13, 1 }, 1547 { "iespi1_Tx_framing_error", 12, 1 }, 1548 { "ocspi0_Rx_framing_error", 11, 1 }, 1549 { "ocspi1_Rx_framing_error", 10, 1 }, 1550 { "ocspi0_Tx_framing_error", 9, 1 }, 1551 { "ocspi1_Tx_framing_error", 8, 1 }, 1552 { "ocspi0_ofifo2x_Tx_framing_error", 7, 1 }, 1553 { "ocspi1_ofifo2x_Tx_framing_error", 6, 1 }, 1554 { "iespi_par_error", 3, 3 }, 1555 { "ocspi_par_error", 0, 3 }, 1556 { "PM1_RX_INT_CAUSE", 0x5dc, 0 }, 1557 { "zero_e_cmd_error", 18, 1 }, 1558 { "iespi0_fifo2x_Rx_framing_error", 17, 1 }, 1559 { "iespi1_fifo2x_Rx_framing_error", 16, 1 }, 1560 { "iespi0_Rx_framing_error", 15, 1 }, 1561 { "iespi1_Rx_framing_error", 14, 1 }, 1562 { "iespi0_Tx_framing_error", 13, 1 }, 1563 { "iespi1_Tx_framing_error", 12, 1 }, 1564 { "ocspi0_Rx_framing_error", 11, 1 }, 1565 { "ocspi1_Rx_framing_error", 10, 1 }, 1566 { "ocspi0_Tx_framing_error", 9, 1 }, 1567 { "ocspi1_Tx_framing_error", 8, 1 }, 1568 { "ocspi0_ofifo2x_Tx_framing_error", 7, 1 }, 1569 { "ocspi1_ofifo2x_Tx_framing_error", 6, 1 }, 1570 { "iespi_par_error", 3, 3 }, 1571 { "ocspi_par_error", 0, 3 }, 1572 { NULL, 0, 0 } 1573 }; 1574 1575 struct reg_info t3b_pm1_tx_regs[] = { 1576 { "PM1_TX_CFG", 0x5e0, 0 }, 1577 { "PM1_TX_MODE", 0x5e4, 0 }, 1578 { "stat_channel", 1, 1 }, 1579 { "priority_ch", 0, 1 }, 1580 { "PM1_TX_STAT_CONFIG", 0x5e8, 0 }, 1581 { "PM1_TX_STAT_COUNT", 0x5ec, 0 }, 1582 { "PM1_TX_STAT_MSB", 0x5f0, 0 }, 1583 { "PM1_TX_STAT_LSB", 0x5f4, 0 }, 1584 { "PM1_TX_INT_ENABLE", 0x5f8, 0 }, 1585 { "zero_c_cmd_error", 18, 1 }, 1586 { "icspi0_fifo2x_Rx_framing_error", 17, 1 }, 1587 { "icspi1_fifo2x_Rx_framing_error", 16, 1 }, 1588 { "icspi0_Rx_framing_error", 15, 1 }, 1589 { "icspi1_Rx_framing_error", 14, 1 }, 1590 { "icspi0_Tx_framing_error", 13, 1 }, 1591 { "icspi1_Tx_framing_error", 12, 1 }, 1592 { "oespi0_Rx_framing_error", 11, 1 }, 1593 { "oespi1_Rx_framing_error", 10, 1 }, 1594 { "oespi0_Tx_framing_error", 9, 1 }, 1595 { "oespi1_Tx_framing_error", 8, 1 }, 1596 { "oespi0_ofifo2x_Tx_framing_error", 7, 1 }, 1597 { "oespi1_ofifo2x_Tx_framing_error", 6, 1 }, 1598 { "icspi_par_error", 3, 3 }, 1599 { "oespi_par_error", 0, 3 }, 1600 { "PM1_TX_INT_CAUSE", 0x5fc, 0 }, 1601 { "zero_c_cmd_error", 18, 1 }, 1602 { "icspi0_fifo2x_Rx_framing_error", 17, 1 }, 1603 { "icspi1_fifo2x_Rx_framing_error", 16, 1 }, 1604 { "icspi0_Rx_framing_error", 15, 1 }, 1605 { "icspi1_Rx_framing_error", 14, 1 }, 1606 { "icspi0_Tx_framing_error", 13, 1 }, 1607 { "icspi1_Tx_framing_error", 12, 1 }, 1608 { "oespi0_Rx_framing_error", 11, 1 }, 1609 { "oespi1_Rx_framing_error", 10, 1 }, 1610 { "oespi0_Tx_framing_error", 9, 1 }, 1611 { "oespi1_Tx_framing_error", 8, 1 }, 1612 { "oespi0_ofifo2x_Tx_framing_error", 7, 1 }, 1613 { "oespi1_ofifo2x_Tx_framing_error", 6, 1 }, 1614 { "icspi_par_error", 3, 3 }, 1615 { "oespi_par_error", 0, 3 }, 1616 { NULL, 0, 0 } 1617 }; 1618 1619 struct reg_info t3b_mps0_regs[] = { 1620 { "MPS_CFG", 0x600, 0 }, 1621 { "EnForcePkt", 11, 1 }, 1622 { "SGETPQid", 8, 3 }, 1623 { "TPRxPortSize", 7, 1 }, 1624 { "TPTxPort1Size", 6, 1 }, 1625 { "TPTxPort0Size", 5, 1 }, 1626 { "TPRxPortEn", 4, 1 }, 1627 { "TPTxPort1En", 3, 1 }, 1628 { "TPTxPort0En", 2, 1 }, 1629 { "Port1Active", 1, 1 }, 1630 { "Port0Active", 0, 1 }, 1631 { "MPS_DRR_CFG1", 0x604, 0 }, 1632 { "RldWtTPD1", 11, 11 }, 1633 { "RldWtTPD0", 0, 11 }, 1634 { "MPS_DRR_CFG2", 0x608, 0 }, 1635 { "RldWtTotal", 0, 12 }, 1636 { "MPS_MCA_STATUS", 0x60c, 0 }, 1637 { "MCAPktCnt", 12, 20 }, 1638 { "MCADepth", 0, 12 }, 1639 { "MPS_TX0_TP_CNT", 0x610, 0 }, 1640 { "TX0TPDisCnt", 24, 8 }, 1641 { "TX0TPCnt", 0, 24 }, 1642 { "MPS_TX1_TP_CNT", 0x614, 0 }, 1643 { "TX1TPDisCnt", 24, 8 }, 1644 { "TX1TPCnt", 0, 24 }, 1645 { "MPS_RX_TP_CNT", 0x618, 0 }, 1646 { "RXTPDisCnt", 24, 8 }, 1647 { "RXTPCnt", 0, 24 }, 1648 { "MPS_INT_ENABLE", 0x61c, 0 }, 1649 { "MCAParErrEnb", 6, 3 }, 1650 { "RXTpParErrEnb", 4, 2 }, 1651 { "TX1TpParErrEnb", 2, 2 }, 1652 { "TX0TpParErrEnb", 0, 2 }, 1653 { "MPS_INT_CAUSE", 0x620, 0 }, 1654 { "MCAParErr", 6, 3 }, 1655 { "RXTpParErr", 4, 2 }, 1656 { "TX1TpParErr", 2, 2 }, 1657 { "TX0TpParErr", 0, 2 }, 1658 { NULL, 0, 0 } 1659 }; 1660 1661 struct reg_info t3b_cpl_switch_regs[] = { 1662 { "CPL_SWITCH_CNTRL", 0x640, 0 }, 1663 { "cpl_pkt_tid", 8, 24 }, 1664 { "cpu_no_3F_CIM_enable", 3, 1 }, 1665 { "switch_table_enable", 2, 1 }, 1666 { "sge_enable", 1, 1 }, 1667 { "cim_enable", 0, 1 }, 1668 { "CPL_SWITCH_TBL_IDX", 0x644, 0 }, 1669 { "switch_tbl_idx", 0, 4 }, 1670 { "CPL_SWITCH_TBL_DATA", 0x648, 0 }, 1671 { "CPL_SWITCH_ZERO_ERROR", 0x64c, 0 }, 1672 { "zero_cmd", 0, 8 }, 1673 { "CPL_INTR_ENABLE", 0x650, 0 }, 1674 { "cim_ovfl_error", 4, 1 }, 1675 { "tp_framing_error", 3, 1 }, 1676 { "sge_framing_error", 2, 1 }, 1677 { "cim_framing_error", 1, 1 }, 1678 { "zero_switch_error", 0, 1 }, 1679 { "CPL_INTR_CAUSE", 0x654, 0 }, 1680 { "cim_ovfl_error", 4, 1 }, 1681 { "tp_framing_error", 3, 1 }, 1682 { "sge_framing_error", 2, 1 }, 1683 { "cim_framing_error", 1, 1 }, 1684 { "zero_switch_error", 0, 1 }, 1685 { "CPL_MAP_TBL_IDX", 0x658, 0 }, 1686 { "cpl_map_tbl_idx", 0, 8 }, 1687 { "CPL_MAP_TBL_DATA", 0x65c, 0 }, 1688 { "cpl_map_tbl_data", 0, 8 }, 1689 { NULL, 0, 0 } 1690 }; 1691 1692 struct reg_info t3b_smb0_regs[] = { 1693 { "SMB_GLOBAL_TIME_CFG", 0x660, 0 }, 1694 { "LADbgWrPtr", 24, 8 }, 1695 { "LADbgRdPtr", 16, 8 }, 1696 { "LADbgEn", 13, 1 }, 1697 { "MacroCntCfg", 8, 5 }, 1698 { "MicroCntCfg", 0, 8 }, 1699 { "SMB_MST_TIMEOUT_CFG", 0x664, 0 }, 1700 { "DebugSelH", 28, 4 }, 1701 { "DebugSelL", 24, 4 }, 1702 { "MstTimeOutCfg", 0, 24 }, 1703 { "SMB_MST_CTL_CFG", 0x668, 0 }, 1704 { "MstFifoDbg", 31, 1 }, 1705 { "MstFifoDbgClr", 30, 1 }, 1706 { "MstRxByteCfg", 12, 6 }, 1707 { "MstTxByteCfg", 6, 6 }, 1708 { "MstReset", 1, 1 }, 1709 { "MstCtlEn", 0, 1 }, 1710 { "SMB_MST_CTL_STS", 0x66c, 0 }, 1711 { "MstRxByteCnt", 12, 6 }, 1712 { "MstTxByteCnt", 6, 6 }, 1713 { "MstBusySts", 0, 1 }, 1714 { "SMB_MST_TX_FIFO_RDWR", 0x670, 0 }, 1715 { "SMB_MST_RX_FIFO_RDWR", 0x674, 0 }, 1716 { "SMB_SLV_TIMEOUT_CFG", 0x678, 0 }, 1717 { "SlvTimeOutCfg", 0, 24 }, 1718 { "SMB_SLV_CTL_CFG", 0x67c, 0 }, 1719 { "SlvFifoDbg", 31, 1 }, 1720 { "SlvFifoDbgClr", 30, 1 }, 1721 { "SlvAddrCfg", 4, 7 }, 1722 { "SlvAlrtSet", 2, 1 }, 1723 { "SlvReset", 1, 1 }, 1724 { "SlvCtlEn", 0, 1 }, 1725 { "SMB_SLV_CTL_STS", 0x680, 0 }, 1726 { "SlvFifoTxCnt", 12, 6 }, 1727 { "SlvFifoCnt", 6, 6 }, 1728 { "SlvAlrtSts", 2, 1 }, 1729 { "SlvBusySts", 0, 1 }, 1730 { "SMB_SLV_FIFO_RDWR", 0x684, 0 }, 1731 { "SMB_SLV_CMD_FIFO_RDWR", 0x688, 0 }, 1732 { "SMB_INT_ENABLE", 0x68c, 0 }, 1733 { "SlvTimeOutIntEn", 7, 1 }, 1734 { "SlvErrIntEn", 6, 1 }, 1735 { "SlvDoneIntEn", 5, 1 }, 1736 { "SlvRxRdyIntEn", 4, 1 }, 1737 { "MstTimeOutIntEn", 3, 1 }, 1738 { "MstNAckIntEn", 2, 1 }, 1739 { "MstLostArbIntEn", 1, 1 }, 1740 { "MstDoneIntEn", 0, 1 }, 1741 { "SMB_INT_CAUSE", 0x690, 0 }, 1742 { "SlvTimeOutInt", 7, 1 }, 1743 { "SlvErrInt", 6, 1 }, 1744 { "SlvDoneInt", 5, 1 }, 1745 { "SlvRxRdyInt", 4, 1 }, 1746 { "MstTimeOutInt", 3, 1 }, 1747 { "MstNAckInt", 2, 1 }, 1748 { "MstLostArbInt", 1, 1 }, 1749 { "MstDoneInt", 0, 1 }, 1750 { "SMB_DEBUG_DATA", 0x694, 0 }, 1751 { "DebugDataH", 16, 16 }, 1752 { "DebugDataL", 0, 16 }, 1753 { "SMB_DEBUG_LA", 0x69c, 0 }, 1754 { "DebugLAReqAddr", 0, 10 }, 1755 { NULL, 0, 0 } 1756 }; 1757 1758 struct reg_info t3b_i2cm0_regs[] = { 1759 { "I2C_CFG", 0x6a0, 0 }, 1760 { "ClkDiv", 0, 12 }, 1761 { "I2C_DATA", 0x6a4, 0 }, 1762 { "Data", 0, 8 }, 1763 { "I2C_OP", 0x6a8, 0 }, 1764 { "Busy", 31, 1 }, 1765 { "Ack", 30, 1 }, 1766 { "Cont", 1, 1 }, 1767 { "Op", 0, 1 }, 1768 { NULL, 0, 0 } 1769 }; 1770 1771 struct reg_info t3b_mi1_regs[] = { 1772 { "MI1_CFG", 0x6b0, 0 }, 1773 { "ClkDiv", 5, 8 }, 1774 { "St", 3, 2 }, 1775 { "PreEn", 2, 1 }, 1776 { "MDIInv", 1, 1 }, 1777 { "MDIEn", 0, 1 }, 1778 { "MI1_ADDR", 0x6b4, 0 }, 1779 { "PhyAddr", 5, 5 }, 1780 { "RegAddr", 0, 5 }, 1781 { "MI1_DATA", 0x6b8, 0 }, 1782 { "Data", 0, 16 }, 1783 { "MI1_OP", 0x6bc, 0 }, 1784 { "Busy", 31, 1 }, 1785 { "Inc", 2, 1 }, 1786 { "Op", 0, 2 }, 1787 { NULL, 0, 0 } 1788 }; 1789 1790 struct reg_info t3b_jm1_regs[] = { 1791 { "JM_CFG", 0x6c0, 0 }, 1792 { "ClkDiv", 2, 8 }, 1793 { "TRst", 1, 1 }, 1794 { "En", 0, 1 }, 1795 { "JM_MODE", 0x6c4, 0 }, 1796 { "JM_DATA", 0x6c8, 0 }, 1797 { "JM_OP", 0x6cc, 0 }, 1798 { "Busy", 31, 1 }, 1799 { "Cnt", 0, 5 }, 1800 { NULL, 0, 0 } 1801 }; 1802 1803 struct reg_info t3b_sf1_regs[] = { 1804 { "SF_DATA", 0x6d8, 0 }, 1805 { "SF_OP", 0x6dc, 0 }, 1806 { "Busy", 31, 1 }, 1807 { "Cont", 3, 1 }, 1808 { "ByteCnt", 1, 2 }, 1809 { "Op", 0, 1 }, 1810 { NULL, 0, 0 } 1811 }; 1812 1813 struct reg_info t3b_pl3_regs[] = { 1814 { "PL_INT_ENABLE0", 0x6e0, 0 }, 1815 { "SW", 25, 1 }, 1816 { "EXT", 24, 1 }, 1817 { "T3DBG", 23, 1 }, 1818 { "XGMAC0_1", 20, 1 }, 1819 { "XGMAC0_0", 19, 1 }, 1820 { "MC5A", 18, 1 }, 1821 { "SF1", 17, 1 }, 1822 { "SMB0", 15, 1 }, 1823 { "I2CM0", 14, 1 }, 1824 { "MI1", 13, 1 }, 1825 { "CPL_SWITCH", 12, 1 }, 1826 { "MPS0", 11, 1 }, 1827 { "PM1_TX", 10, 1 }, 1828 { "PM1_RX", 9, 1 }, 1829 { "ULP2_TX", 8, 1 }, 1830 { "ULP2_RX", 7, 1 }, 1831 { "TP1", 6, 1 }, 1832 { "CIM", 5, 1 }, 1833 { "MC7_CM", 4, 1 }, 1834 { "MC7_PMTX", 3, 1 }, 1835 { "MC7_PMRX", 2, 1 }, 1836 { "PCIM0", 1, 1 }, 1837 { "SGE3", 0, 1 }, 1838 { "PL_INT_CAUSE0", 0x6e4, 0 }, 1839 { "SW", 25, 1 }, 1840 { "EXT", 24, 1 }, 1841 { "T3DBG", 23, 1 }, 1842 { "XGMAC0_1", 20, 1 }, 1843 { "XGMAC0_0", 19, 1 }, 1844 { "MC5A", 18, 1 }, 1845 { "SF1", 17, 1 }, 1846 { "SMB0", 15, 1 }, 1847 { "I2CM0", 14, 1 }, 1848 { "MI1", 13, 1 }, 1849 { "CPL_SWITCH", 12, 1 }, 1850 { "MPS0", 11, 1 }, 1851 { "PM1_TX", 10, 1 }, 1852 { "PM1_RX", 9, 1 }, 1853 { "ULP2_TX", 8, 1 }, 1854 { "ULP2_RX", 7, 1 }, 1855 { "TP1", 6, 1 }, 1856 { "CIM", 5, 1 }, 1857 { "MC7_CM", 4, 1 }, 1858 { "MC7_PMTX", 3, 1 }, 1859 { "MC7_PMRX", 2, 1 }, 1860 { "PCIM0", 1, 1 }, 1861 { "SGE3", 0, 1 }, 1862 { "PL_INT_ENABLE1", 0x6e8, 0 }, 1863 { "SW", 25, 1 }, 1864 { "EXT", 24, 1 }, 1865 { "T3DBG", 23, 1 }, 1866 { "XGMAC0_1", 20, 1 }, 1867 { "XGMAC0_0", 19, 1 }, 1868 { "MC5A", 18, 1 }, 1869 { "SF1", 17, 1 }, 1870 { "SMB0", 15, 1 }, 1871 { "I2CM0", 14, 1 }, 1872 { "MI1", 13, 1 }, 1873 { "CPL_SWITCH", 12, 1 }, 1874 { "MPS0", 11, 1 }, 1875 { "PM1_TX", 10, 1 }, 1876 { "PM1_RX", 9, 1 }, 1877 { "ULP2_TX", 8, 1 }, 1878 { "ULP2_RX", 7, 1 }, 1879 { "TP1", 6, 1 }, 1880 { "CIM", 5, 1 }, 1881 { "MC7_CM", 4, 1 }, 1882 { "MC7_PMTX", 3, 1 }, 1883 { "MC7_PMRX", 2, 1 }, 1884 { "PCIM0", 1, 1 }, 1885 { "SGE3", 0, 1 }, 1886 { "PL_INT_CAUSE1", 0x6ec, 0 }, 1887 { "SW", 25, 1 }, 1888 { "EXT", 24, 1 }, 1889 { "T3DBG", 23, 1 }, 1890 { "XGMAC0_1", 20, 1 }, 1891 { "XGMAC0_0", 19, 1 }, 1892 { "MC5A", 18, 1 }, 1893 { "SF1", 17, 1 }, 1894 { "SMB0", 15, 1 }, 1895 { "I2CM0", 14, 1 }, 1896 { "MI1", 13, 1 }, 1897 { "CPL_SWITCH", 12, 1 }, 1898 { "MPS0", 11, 1 }, 1899 { "PM1_TX", 10, 1 }, 1900 { "PM1_RX", 9, 1 }, 1901 { "ULP2_TX", 8, 1 }, 1902 { "ULP2_RX", 7, 1 }, 1903 { "TP1", 6, 1 }, 1904 { "CIM", 5, 1 }, 1905 { "MC7_CM", 4, 1 }, 1906 { "MC7_PMTX", 3, 1 }, 1907 { "MC7_PMRX", 2, 1 }, 1908 { "PCIM0", 1, 1 }, 1909 { "SGE3", 0, 1 }, 1910 { "PL_RST", 0x6f0, 0 }, 1911 { "SWInt1", 3, 1 }, 1912 { "SWInt0", 2, 1 }, 1913 { "CRstWrm", 1, 1 }, 1914 { "CRstWrmMode", 0, 1 }, 1915 { "PL_REV", 0x6f4, 0 }, 1916 { "Rev", 0, 4 }, 1917 { "PL_CLI", 0x6f8, 0 }, 1918 { "PL_LCK", 0x6fc, 0 }, 1919 { "Lck", 0, 2 }, 1920 { NULL, 0, 0 } 1921 }; 1922 1923 struct reg_info t3b_mc5a_regs[] = { 1924 { "MC5_BUF_CONFIG", 0x700, 0 }, 1925 { "term300_240", 31, 1 }, 1926 { "term150", 30, 1 }, 1927 { "term60", 29, 1 }, 1928 { "gddriii", 28, 1 }, 1929 { "gddrii", 27, 1 }, 1930 { "gddri", 26, 1 }, 1931 { "read", 25, 1 }, 1932 { "imp_set_update", 24, 1 }, 1933 { "cal_update", 23, 1 }, 1934 { "cal_busy", 22, 1 }, 1935 { "cal_error", 21, 1 }, 1936 { "sgl_cal_en", 20, 1 }, 1937 { "imp_upd_mode", 19, 1 }, 1938 { "imp_sel", 18, 1 }, 1939 { "man_pu", 15, 3 }, 1940 { "man_pd", 12, 3 }, 1941 { "cal_pu", 9, 3 }, 1942 { "cal_pd", 6, 3 }, 1943 { "set_pu", 3, 3 }, 1944 { "set_pd", 0, 3 }, 1945 { "MC5_DB_CONFIG", 0x704, 0 }, 1946 { "TMCfgWrLock", 31, 1 }, 1947 { "TMTypeHi", 30, 1 }, 1948 { "TMPartSize", 28, 2 }, 1949 { "TMType", 26, 2 }, 1950 { "TMPartCount", 24, 2 }, 1951 { "nLIP", 18, 6 }, 1952 { "COMPEN", 17, 1 }, 1953 { "BUILD", 16, 1 }, 1954 { "FilterEn", 11, 1 }, 1955 { "CLIPUpdate", 10, 1 }, 1956 { "TM_IO_PDOWN", 9, 1 }, 1957 { "SYNMode", 7, 2 }, 1958 { "PRTYEN", 6, 1 }, 1959 { "MBUSEN", 5, 1 }, 1960 { "DBGIEN", 4, 1 }, 1961 { "TcmCfgOvr", 3, 1 }, 1962 { "TMRDY", 2, 1 }, 1963 { "TMRST", 1, 1 }, 1964 { "TMMode", 0, 1 }, 1965 { "MC5_MISC", 0x708, 0 }, 1966 { "LIP_Cmp_Unavailable", 0, 4 }, 1967 { "MC5_DB_ROUTING_TABLE_INDEX", 0x70c, 0 }, 1968 { "RTINDX", 0, 22 }, 1969 { "MC5_DB_FILTER_TABLE", 0x710, 0 }, 1970 { "SRINDX", 0, 22 }, 1971 { "MC5_DB_SERVER_INDEX", 0x714, 0 }, 1972 { "SRINDX", 0, 22 }, 1973 { "MC5_DB_LIP_RAM_ADDR", 0x718, 0 }, 1974 { "RAMWR", 8, 1 }, 1975 { "RAMADDR", 0, 6 }, 1976 { "MC5_DB_LIP_RAM_DATA", 0x71c, 0 }, 1977 { "MC5_DB_RSP_LATENCY", 0x720, 0 }, 1978 { "RDLAT", 16, 5 }, 1979 { "LRNLAT", 8, 5 }, 1980 { "SRCHLAT", 0, 5 }, 1981 { "MC5_DB_PARITY_LATENCY", 0x724, 0 }, 1982 { "PARLAT", 0, 4 }, 1983 { "MC5_DB_WR_LRN_VERIFY", 0x728, 0 }, 1984 { "VWVEREN", 2, 1 }, 1985 { "LRNVEREN", 1, 1 }, 1986 { "POVEREN", 0, 1 }, 1987 { "MC5_DB_PART_ID_INDEX", 0x72c, 0 }, 1988 { "IDINDEX", 0, 4 }, 1989 { "MC5_DB_RESET_MAX", 0x730, 0 }, 1990 { "RSTMAX", 0, 4 }, 1991 { "MC5_DB_ACT_CNT", 0x734, 0 }, 1992 { "ACTCNT", 0, 20 }, 1993 { "MC5_DB_CLIP_MAP", 0x738, 0 }, 1994 { "CLIPMapOp", 31, 1 }, 1995 { "CLIPMapVal", 16, 6 }, 1996 { "CLIPMapAddr", 0, 6 }, 1997 { "MC5_DB_INT_ENABLE", 0x740, 0 }, 1998 { "MsgSel", 28, 4 }, 1999 { "DelActEmpty", 18, 1 }, 2000 { "DispQParErr", 17, 1 }, 2001 { "ReqQParErr", 16, 1 }, 2002 { "UnknownCmd", 15, 1 }, 2003 { "SYNCookieOff", 11, 1 }, 2004 { "SYNCookieBad", 10, 1 }, 2005 { "SYNCookie", 9, 1 }, 2006 { "NFASrchFail", 8, 1 }, 2007 { "ActRgnFull", 7, 1 }, 2008 { "ParityErr", 6, 1 }, 2009 { "LIPMiss", 5, 1 }, 2010 { "LIP0", 4, 1 }, 2011 { "Miss", 3, 1 }, 2012 { "RoutingHit", 2, 1 }, 2013 { "ActiveHit", 1, 1 }, 2014 { "ActiveOutHit", 0, 1 }, 2015 { "MC5_DB_INT_CAUSE", 0x744, 0 }, 2016 { "DelActEmpty", 18, 1 }, 2017 { "DispQParErr", 17, 1 }, 2018 { "ReqQParErr", 16, 1 }, 2019 { "UnknownCmd", 15, 1 }, 2020 { "SYNCookieOff", 11, 1 }, 2021 { "SYNCookieBad", 10, 1 }, 2022 { "SYNCookie", 9, 1 }, 2023 { "NFASrchFail", 8, 1 }, 2024 { "ActRgnFull", 7, 1 }, 2025 { "ParityErr", 6, 1 }, 2026 { "LIPMiss", 5, 1 }, 2027 { "LIP0", 4, 1 }, 2028 { "Miss", 3, 1 }, 2029 { "RoutingHit", 2, 1 }, 2030 { "ActiveHit", 1, 1 }, 2031 { "ActiveOutHit", 0, 1 }, 2032 { "MC5_DB_INT_TID", 0x748, 0 }, 2033 { "INTTID", 0, 20 }, 2034 { "MC5_DB_INT_PTID", 0x74c, 0 }, 2035 { "INTPTID", 0, 20 }, 2036 { "MC5_DB_DBGI_CONFIG", 0x774, 0 }, 2037 { "WRReqSize", 22, 10 }, 2038 { "SADRSel", 4, 1 }, 2039 { "CMDMode", 0, 3 }, 2040 { "MC5_DB_DBGI_REQ_CMD", 0x778, 0 }, 2041 { "MBusCmd", 0, 4 }, 2042 { "IDTCmdHi", 11, 3 }, 2043 { "IDTCmdLo", 0, 4 }, 2044 { "IDTCmd", 0, 20 }, 2045 { "LCMDB", 16, 11 }, 2046 { "LCMDA", 0, 11 }, 2047 { "MC5_DB_DBGI_REQ_ADDR0", 0x77c, 0 }, 2048 { "MC5_DB_DBGI_REQ_ADDR1", 0x780, 0 }, 2049 { "MC5_DB_DBGI_REQ_ADDR2", 0x784, 0 }, 2050 { "DBGIReqAdrHi", 0, 8 }, 2051 { "MC5_DB_DBGI_REQ_DATA0", 0x788, 0 }, 2052 { "MC5_DB_DBGI_REQ_DATA1", 0x78c, 0 }, 2053 { "MC5_DB_DBGI_REQ_DATA2", 0x790, 0 }, 2054 { "MC5_DB_DBGI_REQ_DATA3", 0x794, 0 }, 2055 { "MC5_DB_DBGI_REQ_DATA4", 0x798, 0 }, 2056 { "DBGIReqData4", 0, 16 }, 2057 { "MC5_DB_DBGI_REQ_MASK0", 0x79c, 0 }, 2058 { "MC5_DB_DBGI_REQ_MASK1", 0x7a0, 0 }, 2059 { "MC5_DB_DBGI_REQ_MASK2", 0x7a4, 0 }, 2060 { "MC5_DB_DBGI_REQ_MASK3", 0x7a8, 0 }, 2061 { "MC5_DB_DBGI_REQ_MASK4", 0x7ac, 0 }, 2062 { "DBGIReqMsk4", 0, 16 }, 2063 { "MC5_DB_DBGI_RSP_STATUS", 0x7b0, 0 }, 2064 { "DBGIRspMsg", 8, 4 }, 2065 { "DBGIRspMsgVld", 2, 1 }, 2066 { "DBGIRspHit", 1, 1 }, 2067 { "DBGIRspValid", 0, 1 }, 2068 { "MC5_DB_DBGI_RSP_DATA0", 0x7b4, 0 }, 2069 { "MC5_DB_DBGI_RSP_DATA1", 0x7b8, 0 }, 2070 { "MC5_DB_DBGI_RSP_DATA2", 0x7bc, 0 }, 2071 { "MC5_DB_DBGI_RSP_DATA3", 0x7c0, 0 }, 2072 { "MC5_DB_DBGI_RSP_DATA4", 0x7c4, 0 }, 2073 { "DBGIRspData3", 0, 16 }, 2074 { "MC5_DB_DBGI_RSP_LAST_CMD", 0x7c8, 0 }, 2075 { "LastCmdB", 16, 11 }, 2076 { "LastCmdA", 0, 11 }, 2077 { "MC5_DB_POPEN_DATA_WR_CMD", 0x7cc, 0 }, 2078 { "PO_DWR", 0, 20 }, 2079 { "MC5_DB_POPEN_MASK_WR_CMD", 0x7d0, 0 }, 2080 { "PO_MWR", 0, 20 }, 2081 { "MC5_DB_AOPEN_SRCH_CMD", 0x7d4, 0 }, 2082 { "AO_SRCH", 0, 20 }, 2083 { "MC5_DB_AOPEN_LRN_CMD", 0x7d8, 0 }, 2084 { "AO_LRN", 0, 20 }, 2085 { "MC5_DB_SYN_SRCH_CMD", 0x7dc, 0 }, 2086 { "SYN_SRCH", 0, 20 }, 2087 { "MC5_DB_SYN_LRN_CMD", 0x7e0, 0 }, 2088 { "SYN_LRN", 0, 20 }, 2089 { "MC5_DB_ACK_SRCH_CMD", 0x7e4, 0 }, 2090 { "ACK_SRCH", 0, 20 }, 2091 { "MC5_DB_ACK_LRN_CMD", 0x7e8, 0 }, 2092 { "ACK_LRN", 0, 20 }, 2093 { "MC5_DB_ILOOKUP_CMD", 0x7ec, 0 }, 2094 { "I_SRCH", 0, 20 }, 2095 { "MC5_DB_ELOOKUP_CMD", 0x7f0, 0 }, 2096 { "E_SRCH", 0, 20 }, 2097 { "MC5_DB_DATA_WRITE_CMD", 0x7f4, 0 }, 2098 { "Write", 0, 20 }, 2099 { "MC5_DB_DATA_READ_CMD", 0x7f8, 0 }, 2100 { "ReadCmd", 0, 20 }, 2101 { "MC5_DB_MASK_WRITE_CMD", 0x7fc, 0 }, 2102 { "MaskWr", 0, 16 }, 2103 { NULL, 0, 0 } 2104 }; 2105 2106 struct reg_info t3b_xgmac0_0_regs[] = { 2107 { "XGM_TX_CTRL", 0x800, 0 }, 2108 { "SendPause", 2, 1 }, 2109 { "SendZeroPause", 1, 1 }, 2110 { "TxEn", 0, 1 }, 2111 { "XGM_TX_CFG", 0x804, 0 }, 2112 { "CfgClkSpeed", 2, 3 }, 2113 { "StretchMode", 1, 1 }, 2114 { "TxPauseEn", 0, 1 }, 2115 { "XGM_TX_PAUSE_QUANTA", 0x808, 0 }, 2116 { "TxPauseQuanta", 0, 16 }, 2117 { "XGM_RX_CTRL", 0x80c, 0 }, 2118 { "RxEn", 0, 1 }, 2119 { "XGM_RX_CFG", 0x810, 0 }, 2120 { "Con802_3Preamble", 12, 1 }, 2121 { "EnNon802_3Preamble", 11, 1 }, 2122 { "CopyPreamble", 10, 1 }, 2123 { "DisPauseFrames", 9, 1 }, 2124 { "En1536BFrames", 8, 1 }, 2125 { "EnJumbo", 7, 1 }, 2126 { "RmFCS", 6, 1 }, 2127 { "DisNonVlan", 5, 1 }, 2128 { "EnExtMatch", 4, 1 }, 2129 { "EnHashUcast", 3, 1 }, 2130 { "EnHashMcast", 2, 1 }, 2131 { "DisBCast", 1, 1 }, 2132 { "CopyAllFrames", 0, 1 }, 2133 { "XGM_RX_HASH_LOW", 0x814, 0 }, 2134 { "XGM_RX_HASH_HIGH", 0x818, 0 }, 2135 { "XGM_RX_EXACT_MATCH_LOW_1", 0x81c, 0 }, 2136 { "XGM_RX_EXACT_MATCH_HIGH_1", 0x820, 0 }, 2137 { "address_high", 0, 16 }, 2138 { "XGM_RX_EXACT_MATCH_LOW_2", 0x824, 0 }, 2139 { "XGM_RX_EXACT_MATCH_HIGH_2", 0x828, 0 }, 2140 { "address_high", 0, 16 }, 2141 { "XGM_RX_EXACT_MATCH_LOW_3", 0x82c, 0 }, 2142 { "XGM_RX_EXACT_MATCH_HIGH_3", 0x830, 0 }, 2143 { "address_high", 0, 16 }, 2144 { "XGM_RX_EXACT_MATCH_LOW_4", 0x834, 0 }, 2145 { "XGM_RX_EXACT_MATCH_HIGH_4", 0x838, 0 }, 2146 { "address_high", 0, 16 }, 2147 { "XGM_RX_EXACT_MATCH_LOW_5", 0x83c, 0 }, 2148 { "XGM_RX_EXACT_MATCH_HIGH_5", 0x840, 0 }, 2149 { "address_high", 0, 16 }, 2150 { "XGM_RX_EXACT_MATCH_LOW_6", 0x844, 0 }, 2151 { "XGM_RX_EXACT_MATCH_HIGH_6", 0x848, 0 }, 2152 { "address_high", 0, 16 }, 2153 { "XGM_RX_EXACT_MATCH_LOW_7", 0x84c, 0 }, 2154 { "XGM_RX_EXACT_MATCH_HIGH_7", 0x850, 0 }, 2155 { "address_high", 0, 16 }, 2156 { "XGM_RX_EXACT_MATCH_LOW_8", 0x854, 0 }, 2157 { "XGM_RX_EXACT_MATCH_HIGH_8", 0x858, 0 }, 2158 { "address_high", 0, 16 }, 2159 { "XGM_RX_TYPE_MATCH_1", 0x85c, 0 }, 2160 { "EnTypeMatch", 31, 1 }, 2161 { "type", 0, 16 }, 2162 { "XGM_RX_TYPE_MATCH_2", 0x860, 0 }, 2163 { "EnTypeMatch", 31, 1 }, 2164 { "type", 0, 16 }, 2165 { "XGM_RX_TYPE_MATCH_3", 0x864, 0 }, 2166 { "EnTypeMatch", 31, 1 }, 2167 { "type", 0, 16 }, 2168 { "XGM_RX_TYPE_MATCH_4", 0x868, 0 }, 2169 { "EnTypeMatch", 31, 1 }, 2170 { "type", 0, 16 }, 2171 { "XGM_INT_STATUS", 0x86c, 0 }, 2172 { "XGMIIExtInt", 10, 1 }, 2173 { "LinkFaultChange", 9, 1 }, 2174 { "PhyFrameComplete", 8, 1 }, 2175 { "PauseFrameTxmt", 7, 1 }, 2176 { "PauseCntrTimeOut", 6, 1 }, 2177 { "Non0PauseRcvd", 5, 1 }, 2178 { "StatOFlow", 4, 1 }, 2179 { "TxErrFIFO", 3, 1 }, 2180 { "TxUFlow", 2, 1 }, 2181 { "FrameTxmt", 1, 1 }, 2182 { "FrameRcvd", 0, 1 }, 2183 { "XGM_XGM_INT_MASK", 0x870, 0 }, 2184 { "XGMIIExtInt", 10, 1 }, 2185 { "LinkFaultChange", 9, 1 }, 2186 { "PhyFrameComplete", 8, 1 }, 2187 { "PauseFrameTxmt", 7, 1 }, 2188 { "PauseCntrTimeOut", 6, 1 }, 2189 { "Non0PauseRcvd", 5, 1 }, 2190 { "StatOFlow", 4, 1 }, 2191 { "TxErrFIFO", 3, 1 }, 2192 { "TxUFlow", 2, 1 }, 2193 { "FrameTxmt", 1, 1 }, 2194 { "FrameRcvd", 0, 1 }, 2195 { "XGM_XGM_INT_ENABLE", 0x874, 0 }, 2196 { "XGMIIExtInt", 10, 1 }, 2197 { "LinkFaultChange", 9, 1 }, 2198 { "PhyFrameComplete", 8, 1 }, 2199 { "PauseFrameTxmt", 7, 1 }, 2200 { "PauseCntrTimeOut", 6, 1 }, 2201 { "Non0PauseRcvd", 5, 1 }, 2202 { "StatOFlow", 4, 1 }, 2203 { "TxErrFIFO", 3, 1 }, 2204 { "TxUFlow", 2, 1 }, 2205 { "FrameTxmt", 1, 1 }, 2206 { "FrameRcvd", 0, 1 }, 2207 { "XGM_XGM_INT_DISABLE", 0x878, 0 }, 2208 { "XGMIIExtInt", 10, 1 }, 2209 { "LinkFaultChange", 9, 1 }, 2210 { "PhyFrameComplete", 8, 1 }, 2211 { "PauseFrameTxmt", 7, 1 }, 2212 { "PauseCntrTimeOut", 6, 1 }, 2213 { "Non0PauseRcvd", 5, 1 }, 2214 { "StatOFlow", 4, 1 }, 2215 { "TxErrFIFO", 3, 1 }, 2216 { "TxUFlow", 2, 1 }, 2217 { "FrameTxmt", 1, 1 }, 2218 { "FrameRcvd", 0, 1 }, 2219 { "XGM_TX_PAUSE_TIMER", 0x87c, 0 }, 2220 { "CurPauseTimer", 0, 16 }, 2221 { "XGM_STAT_CTRL", 0x880, 0 }, 2222 { "ReadSnpShot", 4, 1 }, 2223 { "TakeSnpShot", 3, 1 }, 2224 { "ClrStats", 2, 1 }, 2225 { "IncrStats", 1, 1 }, 2226 { "EnTestModeWr", 0, 1 }, 2227 { "XGM_RXFIFO_CFG", 0x884, 0 }, 2228 { "RxFIFOPauseHWM", 17, 12 }, 2229 { "RxFIFOPauseLWM", 5, 12 }, 2230 { "ForcedPause", 4, 1 }, 2231 { "ExternLoopback", 3, 1 }, 2232 { "RxByteSwap", 2, 1 }, 2233 { "RxStrFrwrd", 1, 1 }, 2234 { "DisErrFrames", 0, 1 }, 2235 { "XGM_TXFIFO_CFG", 0x888, 0 }, 2236 { "EnDropPkt", 21, 1 }, 2237 { "TxIPG", 13, 8 }, 2238 { "TxFIFOThresh", 4, 9 }, 2239 { "InternLoopback", 3, 1 }, 2240 { "TxByteSwap", 2, 1 }, 2241 { "DisCRC", 1, 1 }, 2242 { "DisPreAmble", 0, 1 }, 2243 { "XGM_SLOW_TIMER", 0x88c, 0 }, 2244 { "PauseSlowTimerEn", 31, 1 }, 2245 { "PauseSlowTimer", 0, 20 }, 2246 { "XGM_PAUSE_TIMER", 0x890, 0 }, 2247 { "PauseTimer", 0, 20 }, 2248 { "XGM_XAUI_PCS_TEST", 0x894, 0 }, 2249 { "TestPattern", 1, 2 }, 2250 { "EnTest", 0, 1 }, 2251 { "XGM_RGMII_CTRL", 0x898, 0 }, 2252 { "PhAlignFIFOThresh", 1, 2 }, 2253 { "TxClk90Shift", 0, 1 }, 2254 { "XGM_RGMII_IMP", 0x89c, 0 }, 2255 { "CalReset", 8, 1 }, 2256 { "CalUpdate", 7, 1 }, 2257 { "ImpSetUpdate", 6, 1 }, 2258 { "RGMIIImpPD", 3, 3 }, 2259 { "RGMIIImpPU", 0, 3 }, 2260 { "XGM_RX_MAX_PKT_SIZE", 0x8a8, 0 }, 2261 { "RxMaxPktSize", 0, 14 }, 2262 { "XGM_RESET_CTRL", 0x8ac, 0 }, 2263 { "XG2G_Reset_", 3, 1 }, 2264 { "RGMII_Reset_", 2, 1 }, 2265 { "PCS_Reset_", 1, 1 }, 2266 { "MAC_Reset_", 0, 1 }, 2267 { "XGM_XAUI1G_CTRL", 0x8b0, 0 }, 2268 { "XAUI1GLinkId", 0, 2 }, 2269 { "XGM_SERDES_LANE_CTRL", 0x8b4, 0 }, 2270 { "LaneReversal", 8, 1 }, 2271 { "TxPolarity", 4, 4 }, 2272 { "RxPolarity", 0, 4 }, 2273 { "XGM_PORT_CFG", 0x8b8, 0 }, 2274 { "SafeSpeedChange", 4, 1 }, 2275 { "ClkDivReset_", 3, 1 }, 2276 { "PortSpeed", 1, 2 }, 2277 { "EnRGMII", 0, 1 }, 2278 { "XGM_EPIO_DATA0", 0x8c0, 0 }, 2279 { "XGM_EPIO_DATA1", 0x8c4, 0 }, 2280 { "XGM_EPIO_DATA2", 0x8c8, 0 }, 2281 { "XGM_EPIO_DATA3", 0x8cc, 0 }, 2282 { "XGM_EPIO_OP", 0x8d0, 0 }, 2283 { "PIO_Ready", 31, 1 }, 2284 { "PIO_WrRd", 24, 1 }, 2285 { "PIO_Address", 0, 8 }, 2286 { "XGM_INT_ENABLE", 0x8d4, 0 }, 2287 { "RGMIIRxFIFOOverflow", 23, 1 }, 2288 { "RGMIIRxFIFOUnderflow", 22, 1 }, 2289 { "RxPktSizeError", 21, 1 }, 2290 { "WOLPatDetected", 20, 1 }, 2291 { "TXFIFO_prty_err", 17, 3 }, 2292 { "RXFIFO_prty_err", 14, 3 }, 2293 { "TXFIFO_underrun", 13, 1 }, 2294 { "RXFIFO_overflow", 12, 1 }, 2295 { "SERDESBISTErr", 8, 4 }, 2296 { "SERDESLowSigChange", 4, 4 }, 2297 { "XAUIPCSCTCErr", 3, 1 }, 2298 { "XAUIPCSAlignChange", 2, 1 }, 2299 { "RGMIILinkStsChange", 1, 1 }, 2300 { "xgm_int", 0, 1 }, 2301 { "XGM_INT_CAUSE", 0x8d8, 0 }, 2302 { "RGMIIRxFIFOOverflow", 23, 1 }, 2303 { "RGMIIRxFIFOUnderflow", 22, 1 }, 2304 { "RxPktSizeError", 21, 1 }, 2305 { "WOLPatDetected", 20, 1 }, 2306 { "TXFIFO_prty_err", 17, 3 }, 2307 { "RXFIFO_prty_err", 14, 3 }, 2308 { "TXFIFO_underrun", 13, 1 }, 2309 { "RXFIFO_overflow", 12, 1 }, 2310 { "SERDESBISTErr", 8, 4 }, 2311 { "SERDESLowSigChange", 4, 4 }, 2312 { "XAUIPCSCTCErr", 3, 1 }, 2313 { "XAUIPCSAlignChange", 2, 1 }, 2314 { "RGMIILinkStsChange", 1, 1 }, 2315 { "xgm_int", 0, 1 }, 2316 { "XGM_XAUI_ACT_CTRL", 0x8dc, 0 }, 2317 { "TxEn", 1, 1 }, 2318 { "RxEn", 0, 1 }, 2319 { "XGM_SERDES_CTRL0", 0x8e0, 0 }, 2320 { "IntSerLPBK3", 27, 1 }, 2321 { "IntSerLPBK2", 26, 1 }, 2322 { "IntSerLPBK1", 25, 1 }, 2323 { "IntSerLPBK0", 24, 1 }, 2324 { "Reset3", 23, 1 }, 2325 { "Reset2", 22, 1 }, 2326 { "Reset1", 21, 1 }, 2327 { "Reset0", 20, 1 }, 2328 { "Pwrdn3", 19, 1 }, 2329 { "Pwrdn2", 18, 1 }, 2330 { "Pwrdn1", 17, 1 }, 2331 { "Pwrdn0", 16, 1 }, 2332 { "ResetPLL23", 15, 1 }, 2333 { "ResetPLL01", 14, 1 }, 2334 { "PW23", 12, 2 }, 2335 { "PW01", 10, 2 }, 2336 { "Deq", 6, 4 }, 2337 { "Dtx", 2, 4 }, 2338 { "LoDrv", 1, 1 }, 2339 { "HiDrv", 0, 1 }, 2340 { "XGM_SERDES_CTRL1", 0x8e4, 0 }, 2341 { "FmOffset3", 19, 5 }, 2342 { "FmOffsetEn3", 18, 1 }, 2343 { "FmOffset2", 13, 5 }, 2344 { "FmOffsetEn2", 12, 1 }, 2345 { "FmOffset1", 7, 5 }, 2346 { "FmOffsetEn1", 6, 1 }, 2347 { "FmOffset0", 1, 5 }, 2348 { "FmOffsetEn0", 0, 1 }, 2349 { "XGM_SERDES_CTRL2", 0x8e8, 0 }, 2350 { "DnIn3", 11, 1 }, 2351 { "UpIn3", 10, 1 }, 2352 { "RxSlave3", 9, 1 }, 2353 { "DnIn2", 8, 1 }, 2354 { "UpIn2", 7, 1 }, 2355 { "RxSlave2", 6, 1 }, 2356 { "DnIn1", 5, 1 }, 2357 { "UpIn1", 4, 1 }, 2358 { "RxSlave1", 3, 1 }, 2359 { "DnIn0", 2, 1 }, 2360 { "UpIn0", 1, 1 }, 2361 { "RxSlave0", 0, 1 }, 2362 { "XGM_SERDES_CTRL3", 0x8ec, 0 }, 2363 { "ExtBISTChkErrClr3", 31, 1 }, 2364 { "ExtBISTChkEn3", 30, 1 }, 2365 { "ExtBISTGenEn3", 29, 1 }, 2366 { "ExtBISTPat3", 26, 3 }, 2367 { "ExtParReset3", 25, 1 }, 2368 { "ExtParLPBK3", 24, 1 }, 2369 { "ExtBISTChkErrClr2", 23, 1 }, 2370 { "ExtBISTChkEn2", 22, 1 }, 2371 { "ExtBISTGenEn2", 21, 1 }, 2372 { "ExtBISTPat2", 18, 3 }, 2373 { "ExtParReset2", 17, 1 }, 2374 { "ExtParLPBK2", 16, 1 }, 2375 { "ExtBISTChkErrClr1", 15, 1 }, 2376 { "ExtBISTChkEn1", 14, 1 }, 2377 { "ExtBISTGenEn1", 13, 1 }, 2378 { "ExtBISTPat1", 10, 3 }, 2379 { "ExtParReset1", 9, 1 }, 2380 { "ExtParLPBK1", 8, 1 }, 2381 { "ExtBISTChkErrClr0", 7, 1 }, 2382 { "ExtBISTChkEn0", 6, 1 }, 2383 { "ExtBISTGenEn0", 5, 1 }, 2384 { "ExtBISTPat0", 2, 3 }, 2385 { "ExtParReset0", 1, 1 }, 2386 { "ExtParLPBK0", 0, 1 }, 2387 { "XGM_SERDES_STAT0", 0x8f0, 0 }, 2388 { "ExtBISTChkErrCnt0", 4, 24 }, 2389 { "ExtBISTChkFmd0", 3, 1 }, 2390 { "LowSig0", 0, 1 }, 2391 { "XGM_SERDES_STAT1", 0x8f4, 0 }, 2392 { "ExtBISTChkErrCnt1", 4, 24 }, 2393 { "ExtBISTChkFmd1", 3, 1 }, 2394 { "LowSig1", 0, 1 }, 2395 { "XGM_SERDES_STAT2", 0x8f8, 0 }, 2396 { "ExtBISTChkErrCnt2", 4, 24 }, 2397 { "ExtBISTChkFmd2", 3, 1 }, 2398 { "LowSig2", 0, 1 }, 2399 { "XGM_SERDES_STAT3", 0x8fc, 0 }, 2400 { "ExtBISTChkErrCnt3", 4, 24 }, 2401 { "ExtBISTChkFmd3", 3, 1 }, 2402 { "LowSig3", 0, 1 }, 2403 { "XGM_STAT_TX_BYTE_LOW", 0x900, 0 }, 2404 { "XGM_STAT_TX_BYTE_HIGH", 0x904, 0 }, 2405 { "TxBytes_high", 0, 13 }, 2406 { "XGM_STAT_TX_FRAME_LOW", 0x908, 0 }, 2407 { "XGM_STAT_TX_FRAME_HIGH", 0x90c, 0 }, 2408 { "TxFrames_high", 0, 4 }, 2409 { "XGM_STAT_TX_BCAST", 0x910, 0 }, 2410 { "XGM_STAT_TX_MCAST", 0x914, 0 }, 2411 { "XGM_STAT_TX_PAUSE", 0x918, 0 }, 2412 { "XGM_STAT_TX_64B_FRAMES", 0x91c, 0 }, 2413 { "XGM_STAT_TX_65_127B_FRAMES", 0x920, 0 }, 2414 { "XGM_STAT_TX_128_255B_FRAMES", 0x924, 0 }, 2415 { "XGM_STAT_TX_256_511B_FRAMES", 0x928, 0 }, 2416 { "XGM_STAT_TX_512_1023B_FRAMES", 0x92c, 0 }, 2417 { "XGM_STAT_TX_1024_1518B_FRAMES", 0x930, 0 }, 2418 { "XGM_STAT_TX_1519_MAXB_FRAMES", 0x934, 0 }, 2419 { "XGM_STAT_TX_ERR_FRAMES", 0x938, 0 }, 2420 { "XGM_STAT_RX_BYTES_LOW", 0x93c, 0 }, 2421 { "XGM_STAT_RX_BYTES_HIGH", 0x940, 0 }, 2422 { "RxBytes_high", 0, 13 }, 2423 { "XGM_STAT_RX_FRAMES_LOW", 0x944, 0 }, 2424 { "XGM_STAT_RX_FRAMES_HIGH", 0x948, 0 }, 2425 { "RxFrames_high", 0, 4 }, 2426 { "XGM_STAT_RX_BCAST_FRAMES", 0x94c, 0 }, 2427 { "XGM_STAT_RX_MCAST_FRAMES", 0x950, 0 }, 2428 { "XGM_STAT_RX_PAUSE_FRAMES", 0x954, 0 }, 2429 { "RxPauseFrames", 0, 16 }, 2430 { "XGM_STAT_RX_64B_FRAMES", 0x958, 0 }, 2431 { "XGM_STAT_RX_65_127B_FRAMES", 0x95c, 0 }, 2432 { "XGM_STAT_RX_128_255B_FRAMES", 0x960, 0 }, 2433 { "XGM_STAT_RX_256_511B_FRAMES", 0x964, 0 }, 2434 { "XGM_STAT_RX_512_1023B_FRAMES", 0x968, 0 }, 2435 { "XGM_STAT_RX_1024_1518B_FRAMES", 0x96c, 0 }, 2436 { "XGM_STAT_RX_1519_MAXB_FRAMES", 0x970, 0 }, 2437 { "XGM_STAT_RX_SHORT_FRAMES", 0x974, 0 }, 2438 { "RxShortFrames", 0, 16 }, 2439 { "XGM_STAT_RX_OVERSIZE_FRAMES", 0x978, 0 }, 2440 { "RxOversizeFrames", 0, 16 }, 2441 { "XGM_STAT_RX_JABBER_FRAMES", 0x97c, 0 }, 2442 { "RxJabberFrames", 0, 16 }, 2443 { "XGM_STAT_RX_CRC_ERR_FRAMES", 0x980, 0 }, 2444 { "RxCRCErrFrames", 0, 16 }, 2445 { "XGM_STAT_RX_LENGTH_ERR_FRAMES", 0x984, 0 }, 2446 { "RxLengthErrFrames", 0, 16 }, 2447 { "XGM_STAT_RX_SYM_CODE_ERR_FRAMES", 0x988, 0 }, 2448 { "RxSymCodeErrFrames", 0, 16 }, 2449 { "XGM_XAUI_PCS_ERR", 0x998, 0 }, 2450 { "PCS_SyncStatus", 5, 4 }, 2451 { "PCS_CTCFIFOErr", 1, 4 }, 2452 { "PCS_NotAligned", 0, 1 }, 2453 { "XGM_RGMII_STATUS", 0x99c, 0 }, 2454 { "GMIIDuplex", 3, 1 }, 2455 { "GMIISpeed", 1, 2 }, 2456 { "GMIILinkStatus", 0, 1 }, 2457 { "XGM_WOL_STATUS", 0x9a0, 0 }, 2458 { "PatDetected", 31, 1 }, 2459 { "MatchedFilter", 0, 3 }, 2460 { "XGM_RX_MAX_PKT_SIZE_ERR_CNT", 0x9a4, 0 }, 2461 { "XGM_TX_SPI4_SOP_EOP_CNT", 0x9a8, 0 }, 2462 { "TxSPI4SopCnt", 16, 16 }, 2463 { "TxSPI4EopCnt", 0, 16 }, 2464 { "XGM_RX_SPI4_SOP_EOP_CNT", 0x9ac, 0 }, 2465 { "RxSPI4SopCnt", 16, 16 }, 2466 { "RxSPI4EopCnt", 0, 16 }, 2467 { NULL, 0, 0 } 2468 }; 2469 2470 struct reg_info t3b_xgmac0_1_regs[] = { 2471 { "XGM_TX_CTRL", 0xa00, 0 }, 2472 { "SendPause", 2, 1 }, 2473 { "SendZeroPause", 1, 1 }, 2474 { "TxEn", 0, 1 }, 2475 { "XGM_TX_CFG", 0xa04, 0 }, 2476 { "CfgClkSpeed", 2, 3 }, 2477 { "StretchMode", 1, 1 }, 2478 { "TxPauseEn", 0, 1 }, 2479 { "XGM_TX_PAUSE_QUANTA", 0xa08, 0 }, 2480 { "TxPauseQuanta", 0, 16 }, 2481 { "XGM_RX_CTRL", 0xa0c, 0 }, 2482 { "RxEn", 0, 1 }, 2483 { "XGM_RX_CFG", 0xa10, 0 }, 2484 { "Con802_3Preamble", 12, 1 }, 2485 { "EnNon802_3Preamble", 11, 1 }, 2486 { "CopyPreamble", 10, 1 }, 2487 { "DisPauseFrames", 9, 1 }, 2488 { "En1536BFrames", 8, 1 }, 2489 { "EnJumbo", 7, 1 }, 2490 { "RmFCS", 6, 1 }, 2491 { "DisNonVlan", 5, 1 }, 2492 { "EnExtMatch", 4, 1 }, 2493 { "EnHashUcast", 3, 1 }, 2494 { "EnHashMcast", 2, 1 }, 2495 { "DisBCast", 1, 1 }, 2496 { "CopyAllFrames", 0, 1 }, 2497 { "XGM_RX_HASH_LOW", 0xa14, 0 }, 2498 { "XGM_RX_HASH_HIGH", 0xa18, 0 }, 2499 { "XGM_RX_EXACT_MATCH_LOW_1", 0xa1c, 0 }, 2500 { "XGM_RX_EXACT_MATCH_HIGH_1", 0xa20, 0 }, 2501 { "address_high", 0, 16 }, 2502 { "XGM_RX_EXACT_MATCH_LOW_2", 0xa24, 0 }, 2503 { "XGM_RX_EXACT_MATCH_HIGH_2", 0xa28, 0 }, 2504 { "address_high", 0, 16 }, 2505 { "XGM_RX_EXACT_MATCH_LOW_3", 0xa2c, 0 }, 2506 { "XGM_RX_EXACT_MATCH_HIGH_3", 0xa30, 0 }, 2507 { "address_high", 0, 16 }, 2508 { "XGM_RX_EXACT_MATCH_LOW_4", 0xa34, 0 }, 2509 { "XGM_RX_EXACT_MATCH_HIGH_4", 0xa38, 0 }, 2510 { "address_high", 0, 16 }, 2511 { "XGM_RX_EXACT_MATCH_LOW_5", 0xa3c, 0 }, 2512 { "XGM_RX_EXACT_MATCH_HIGH_5", 0xa40, 0 }, 2513 { "address_high", 0, 16 }, 2514 { "XGM_RX_EXACT_MATCH_LOW_6", 0xa44, 0 }, 2515 { "XGM_RX_EXACT_MATCH_HIGH_6", 0xa48, 0 }, 2516 { "address_high", 0, 16 }, 2517 { "XGM_RX_EXACT_MATCH_LOW_7", 0xa4c, 0 }, 2518 { "XGM_RX_EXACT_MATCH_HIGH_7", 0xa50, 0 }, 2519 { "address_high", 0, 16 }, 2520 { "XGM_RX_EXACT_MATCH_LOW_8", 0xa54, 0 }, 2521 { "XGM_RX_EXACT_MATCH_HIGH_8", 0xa58, 0 }, 2522 { "address_high", 0, 16 }, 2523 { "XGM_RX_TYPE_MATCH_1", 0xa5c, 0 }, 2524 { "EnTypeMatch", 31, 1 }, 2525 { "type", 0, 16 }, 2526 { "XGM_RX_TYPE_MATCH_2", 0xa60, 0 }, 2527 { "EnTypeMatch", 31, 1 }, 2528 { "type", 0, 16 }, 2529 { "XGM_RX_TYPE_MATCH_3", 0xa64, 0 }, 2530 { "EnTypeMatch", 31, 1 }, 2531 { "type", 0, 16 }, 2532 { "XGM_RX_TYPE_MATCH_4", 0xa68, 0 }, 2533 { "EnTypeMatch", 31, 1 }, 2534 { "type", 0, 16 }, 2535 { "XGM_INT_STATUS", 0xa6c, 0 }, 2536 { "XGMIIExtInt", 10, 1 }, 2537 { "LinkFaultChange", 9, 1 }, 2538 { "PhyFrameComplete", 8, 1 }, 2539 { "PauseFrameTxmt", 7, 1 }, 2540 { "PauseCntrTimeOut", 6, 1 }, 2541 { "Non0PauseRcvd", 5, 1 }, 2542 { "StatOFlow", 4, 1 }, 2543 { "TxErrFIFO", 3, 1 }, 2544 { "TxUFlow", 2, 1 }, 2545 { "FrameTxmt", 1, 1 }, 2546 { "FrameRcvd", 0, 1 }, 2547 { "XGM_XGM_INT_MASK", 0xa70, 0 }, 2548 { "XGMIIExtInt", 10, 1 }, 2549 { "LinkFaultChange", 9, 1 }, 2550 { "PhyFrameComplete", 8, 1 }, 2551 { "PauseFrameTxmt", 7, 1 }, 2552 { "PauseCntrTimeOut", 6, 1 }, 2553 { "Non0PauseRcvd", 5, 1 }, 2554 { "StatOFlow", 4, 1 }, 2555 { "TxErrFIFO", 3, 1 }, 2556 { "TxUFlow", 2, 1 }, 2557 { "FrameTxmt", 1, 1 }, 2558 { "FrameRcvd", 0, 1 }, 2559 { "XGM_XGM_INT_ENABLE", 0xa74, 0 }, 2560 { "XGMIIExtInt", 10, 1 }, 2561 { "LinkFaultChange", 9, 1 }, 2562 { "PhyFrameComplete", 8, 1 }, 2563 { "PauseFrameTxmt", 7, 1 }, 2564 { "PauseCntrTimeOut", 6, 1 }, 2565 { "Non0PauseRcvd", 5, 1 }, 2566 { "StatOFlow", 4, 1 }, 2567 { "TxErrFIFO", 3, 1 }, 2568 { "TxUFlow", 2, 1 }, 2569 { "FrameTxmt", 1, 1 }, 2570 { "FrameRcvd", 0, 1 }, 2571 { "XGM_XGM_INT_DISABLE", 0xa78, 0 }, 2572 { "XGMIIExtInt", 10, 1 }, 2573 { "LinkFaultChange", 9, 1 }, 2574 { "PhyFrameComplete", 8, 1 }, 2575 { "PauseFrameTxmt", 7, 1 }, 2576 { "PauseCntrTimeOut", 6, 1 }, 2577 { "Non0PauseRcvd", 5, 1 }, 2578 { "StatOFlow", 4, 1 }, 2579 { "TxErrFIFO", 3, 1 }, 2580 { "TxUFlow", 2, 1 }, 2581 { "FrameTxmt", 1, 1 }, 2582 { "FrameRcvd", 0, 1 }, 2583 { "XGM_TX_PAUSE_TIMER", 0xa7c, 0 }, 2584 { "CurPauseTimer", 0, 16 }, 2585 { "XGM_STAT_CTRL", 0xa80, 0 }, 2586 { "ReadSnpShot", 4, 1 }, 2587 { "TakeSnpShot", 3, 1 }, 2588 { "ClrStats", 2, 1 }, 2589 { "IncrStats", 1, 1 }, 2590 { "EnTestModeWr", 0, 1 }, 2591 { "XGM_RXFIFO_CFG", 0xa84, 0 }, 2592 { "RxFIFOPauseHWM", 17, 12 }, 2593 { "RxFIFOPauseLWM", 5, 12 }, 2594 { "ForcedPause", 4, 1 }, 2595 { "ExternLoopback", 3, 1 }, 2596 { "RxByteSwap", 2, 1 }, 2597 { "RxStrFrwrd", 1, 1 }, 2598 { "DisErrFrames", 0, 1 }, 2599 { "XGM_TXFIFO_CFG", 0xa88, 0 }, 2600 { "EnDropPkt", 21, 1 }, 2601 { "TxIPG", 13, 8 }, 2602 { "TxFIFOThresh", 4, 9 }, 2603 { "InternLoopback", 3, 1 }, 2604 { "TxByteSwap", 2, 1 }, 2605 { "DisCRC", 1, 1 }, 2606 { "DisPreAmble", 0, 1 }, 2607 { "XGM_SLOW_TIMER", 0xa8c, 0 }, 2608 { "PauseSlowTimerEn", 31, 1 }, 2609 { "PauseSlowTimer", 0, 20 }, 2610 { "XGM_PAUSE_TIMER", 0xa90, 0 }, 2611 { "PauseTimer", 0, 20 }, 2612 { "XGM_XAUI_PCS_TEST", 0xa94, 0 }, 2613 { "TestPattern", 1, 2 }, 2614 { "EnTest", 0, 1 }, 2615 { "XGM_RGMII_CTRL", 0xa98, 0 }, 2616 { "PhAlignFIFOThresh", 1, 2 }, 2617 { "TxClk90Shift", 0, 1 }, 2618 { "XGM_RGMII_IMP", 0xa9c, 0 }, 2619 { "CalReset", 8, 1 }, 2620 { "CalUpdate", 7, 1 }, 2621 { "ImpSetUpdate", 6, 1 }, 2622 { "RGMIIImpPD", 3, 3 }, 2623 { "RGMIIImpPU", 0, 3 }, 2624 { "XGM_RX_MAX_PKT_SIZE", 0xaa8, 0 }, 2625 { "RxMaxPktSize", 0, 14 }, 2626 { "XGM_RESET_CTRL", 0xaac, 0 }, 2627 { "XG2G_Reset_", 3, 1 }, 2628 { "RGMII_Reset_", 2, 1 }, 2629 { "PCS_Reset_", 1, 1 }, 2630 { "MAC_Reset_", 0, 1 }, 2631 { "XGM_XAUI1G_CTRL", 0xab0, 0 }, 2632 { "XAUI1GLinkId", 0, 2 }, 2633 { "XGM_SERDES_LANE_CTRL", 0xab4, 0 }, 2634 { "LaneReversal", 8, 1 }, 2635 { "TxPolarity", 4, 4 }, 2636 { "RxPolarity", 0, 4 }, 2637 { "XGM_PORT_CFG", 0xab8, 0 }, 2638 { "SafeSpeedChange", 4, 1 }, 2639 { "ClkDivReset_", 3, 1 }, 2640 { "PortSpeed", 1, 2 }, 2641 { "EnRGMII", 0, 1 }, 2642 { "XGM_EPIO_DATA0", 0xac0, 0 }, 2643 { "XGM_EPIO_DATA1", 0xac4, 0 }, 2644 { "XGM_EPIO_DATA2", 0xac8, 0 }, 2645 { "XGM_EPIO_DATA3", 0xacc, 0 }, 2646 { "XGM_EPIO_OP", 0xad0, 0 }, 2647 { "PIO_Ready", 31, 1 }, 2648 { "PIO_WrRd", 24, 1 }, 2649 { "PIO_Address", 0, 8 }, 2650 { "XGM_INT_ENABLE", 0xad4, 0 }, 2651 { "RGMIIRxFIFOOverflow", 23, 1 }, 2652 { "RGMIIRxFIFOUnderflow", 22, 1 }, 2653 { "RxPktSizeError", 21, 1 }, 2654 { "WOLPatDetected", 20, 1 }, 2655 { "TXFIFO_prty_err", 17, 3 }, 2656 { "RXFIFO_prty_err", 14, 3 }, 2657 { "TXFIFO_underrun", 13, 1 }, 2658 { "RXFIFO_overflow", 12, 1 }, 2659 { "SERDESBISTErr", 8, 4 }, 2660 { "SERDESLowSigChange", 4, 4 }, 2661 { "XAUIPCSCTCErr", 3, 1 }, 2662 { "XAUIPCSAlignChange", 2, 1 }, 2663 { "RGMIILinkStsChange", 1, 1 }, 2664 { "xgm_int", 0, 1 }, 2665 { "XGM_INT_CAUSE", 0xad8, 0 }, 2666 { "RGMIIRxFIFOOverflow", 23, 1 }, 2667 { "RGMIIRxFIFOUnderflow", 22, 1 }, 2668 { "RxPktSizeError", 21, 1 }, 2669 { "WOLPatDetected", 20, 1 }, 2670 { "TXFIFO_prty_err", 17, 3 }, 2671 { "RXFIFO_prty_err", 14, 3 }, 2672 { "TXFIFO_underrun", 13, 1 }, 2673 { "RXFIFO_overflow", 12, 1 }, 2674 { "SERDESBISTErr", 8, 4 }, 2675 { "SERDESLowSigChange", 4, 4 }, 2676 { "XAUIPCSCTCErr", 3, 1 }, 2677 { "XAUIPCSAlignChange", 2, 1 }, 2678 { "RGMIILinkStsChange", 1, 1 }, 2679 { "xgm_int", 0, 1 }, 2680 { "XGM_XAUI_ACT_CTRL", 0xadc, 0 }, 2681 { "TxEn", 1, 1 }, 2682 { "RxEn", 0, 1 }, 2683 { "XGM_SERDES_CTRL0", 0xae0, 0 }, 2684 { "IntSerLPBK3", 27, 1 }, 2685 { "IntSerLPBK2", 26, 1 }, 2686 { "IntSerLPBK1", 25, 1 }, 2687 { "IntSerLPBK0", 24, 1 }, 2688 { "Reset3", 23, 1 }, 2689 { "Reset2", 22, 1 }, 2690 { "Reset1", 21, 1 }, 2691 { "Reset0", 20, 1 }, 2692 { "Pwrdn3", 19, 1 }, 2693 { "Pwrdn2", 18, 1 }, 2694 { "Pwrdn1", 17, 1 }, 2695 { "Pwrdn0", 16, 1 }, 2696 { "ResetPLL23", 15, 1 }, 2697 { "ResetPLL01", 14, 1 }, 2698 { "PW23", 12, 2 }, 2699 { "PW01", 10, 2 }, 2700 { "Deq", 6, 4 }, 2701 { "Dtx", 2, 4 }, 2702 { "LoDrv", 1, 1 }, 2703 { "HiDrv", 0, 1 }, 2704 { "XGM_SERDES_CTRL1", 0xae4, 0 }, 2705 { "FmOffset3", 19, 5 }, 2706 { "FmOffsetEn3", 18, 1 }, 2707 { "FmOffset2", 13, 5 }, 2708 { "FmOffsetEn2", 12, 1 }, 2709 { "FmOffset1", 7, 5 }, 2710 { "FmOffsetEn1", 6, 1 }, 2711 { "FmOffset0", 1, 5 }, 2712 { "FmOffsetEn0", 0, 1 }, 2713 { "XGM_SERDES_CTRL2", 0xae8, 0 }, 2714 { "DnIn3", 11, 1 }, 2715 { "UpIn3", 10, 1 }, 2716 { "RxSlave3", 9, 1 }, 2717 { "DnIn2", 8, 1 }, 2718 { "UpIn2", 7, 1 }, 2719 { "RxSlave2", 6, 1 }, 2720 { "DnIn1", 5, 1 }, 2721 { "UpIn1", 4, 1 }, 2722 { "RxSlave1", 3, 1 }, 2723 { "DnIn0", 2, 1 }, 2724 { "UpIn0", 1, 1 }, 2725 { "RxSlave0", 0, 1 }, 2726 { "XGM_SERDES_CTRL3", 0xaec, 0 }, 2727 { "ExtBISTChkErrClr3", 31, 1 }, 2728 { "ExtBISTChkEn3", 30, 1 }, 2729 { "ExtBISTGenEn3", 29, 1 }, 2730 { "ExtBISTPat3", 26, 3 }, 2731 { "ExtParReset3", 25, 1 }, 2732 { "ExtParLPBK3", 24, 1 }, 2733 { "ExtBISTChkErrClr2", 23, 1 }, 2734 { "ExtBISTChkEn2", 22, 1 }, 2735 { "ExtBISTGenEn2", 21, 1 }, 2736 { "ExtBISTPat2", 18, 3 }, 2737 { "ExtParReset2", 17, 1 }, 2738 { "ExtParLPBK2", 16, 1 }, 2739 { "ExtBISTChkErrClr1", 15, 1 }, 2740 { "ExtBISTChkEn1", 14, 1 }, 2741 { "ExtBISTGenEn1", 13, 1 }, 2742 { "ExtBISTPat1", 10, 3 }, 2743 { "ExtParReset1", 9, 1 }, 2744 { "ExtParLPBK1", 8, 1 }, 2745 { "ExtBISTChkErrClr0", 7, 1 }, 2746 { "ExtBISTChkEn0", 6, 1 }, 2747 { "ExtBISTGenEn0", 5, 1 }, 2748 { "ExtBISTPat0", 2, 3 }, 2749 { "ExtParReset0", 1, 1 }, 2750 { "ExtParLPBK0", 0, 1 }, 2751 { "XGM_SERDES_STAT0", 0xaf0, 0 }, 2752 { "ExtBISTChkErrCnt0", 4, 24 }, 2753 { "ExtBISTChkFmd0", 3, 1 }, 2754 { "LowSig0", 0, 1 }, 2755 { "XGM_SERDES_STAT1", 0xaf4, 0 }, 2756 { "ExtBISTChkErrCnt1", 4, 24 }, 2757 { "ExtBISTChkFmd1", 3, 1 }, 2758 { "LowSig1", 0, 1 }, 2759 { "XGM_SERDES_STAT2", 0xaf8, 0 }, 2760 { "ExtBISTChkErrCnt2", 4, 24 }, 2761 { "ExtBISTChkFmd2", 3, 1 }, 2762 { "LowSig2", 0, 1 }, 2763 { "XGM_SERDES_STAT3", 0xafc, 0 }, 2764 { "ExtBISTChkErrCnt3", 4, 24 }, 2765 { "ExtBISTChkFmd3", 3, 1 }, 2766 { "LowSig3", 0, 1 }, 2767 { "XGM_STAT_TX_BYTE_LOW", 0xb00, 0 }, 2768 { "XGM_STAT_TX_BYTE_HIGH", 0xb04, 0 }, 2769 { "TxBytes_high", 0, 13 }, 2770 { "XGM_STAT_TX_FRAME_LOW", 0xb08, 0 }, 2771 { "XGM_STAT_TX_FRAME_HIGH", 0xb0c, 0 }, 2772 { "TxFrames_high", 0, 4 }, 2773 { "XGM_STAT_TX_BCAST", 0xb10, 0 }, 2774 { "XGM_STAT_TX_MCAST", 0xb14, 0 }, 2775 { "XGM_STAT_TX_PAUSE", 0xb18, 0 }, 2776 { "XGM_STAT_TX_64B_FRAMES", 0xb1c, 0 }, 2777 { "XGM_STAT_TX_65_127B_FRAMES", 0xb20, 0 }, 2778 { "XGM_STAT_TX_128_255B_FRAMES", 0xb24, 0 }, 2779 { "XGM_STAT_TX_256_511B_FRAMES", 0xb28, 0 }, 2780 { "XGM_STAT_TX_512_1023B_FRAMES", 0xb2c, 0 }, 2781 { "XGM_STAT_TX_1024_1518B_FRAMES", 0xb30, 0 }, 2782 { "XGM_STAT_TX_1519_MAXB_FRAMES", 0xb34, 0 }, 2783 { "XGM_STAT_TX_ERR_FRAMES", 0xb38, 0 }, 2784 { "XGM_STAT_RX_BYTES_LOW", 0xb3c, 0 }, 2785 { "XGM_STAT_RX_BYTES_HIGH", 0xb40, 0 }, 2786 { "RxBytes_high", 0, 13 }, 2787 { "XGM_STAT_RX_FRAMES_LOW", 0xb44, 0 }, 2788 { "XGM_STAT_RX_FRAMES_HIGH", 0xb48, 0 }, 2789 { "RxFrames_high", 0, 4 }, 2790 { "XGM_STAT_RX_BCAST_FRAMES", 0xb4c, 0 }, 2791 { "XGM_STAT_RX_MCAST_FRAMES", 0xb50, 0 }, 2792 { "XGM_STAT_RX_PAUSE_FRAMES", 0xb54, 0 }, 2793 { "RxPauseFrames", 0, 16 }, 2794 { "XGM_STAT_RX_64B_FRAMES", 0xb58, 0 }, 2795 { "XGM_STAT_RX_65_127B_FRAMES", 0xb5c, 0 }, 2796 { "XGM_STAT_RX_128_255B_FRAMES", 0xb60, 0 }, 2797 { "XGM_STAT_RX_256_511B_FRAMES", 0xb64, 0 }, 2798 { "XGM_STAT_RX_512_1023B_FRAMES", 0xb68, 0 }, 2799 { "XGM_STAT_RX_1024_1518B_FRAMES", 0xb6c, 0 }, 2800 { "XGM_STAT_RX_1519_MAXB_FRAMES", 0xb70, 0 }, 2801 { "XGM_STAT_RX_SHORT_FRAMES", 0xb74, 0 }, 2802 { "RxShortFrames", 0, 16 }, 2803 { "XGM_STAT_RX_OVERSIZE_FRAMES", 0xb78, 0 }, 2804 { "RxOversizeFrames", 0, 16 }, 2805 { "XGM_STAT_RX_JABBER_FRAMES", 0xb7c, 0 }, 2806 { "RxJabberFrames", 0, 16 }, 2807 { "XGM_STAT_RX_CRC_ERR_FRAMES", 0xb80, 0 }, 2808 { "RxCRCErrFrames", 0, 16 }, 2809 { "XGM_STAT_RX_LENGTH_ERR_FRAMES", 0xb84, 0 }, 2810 { "RxLengthErrFrames", 0, 16 }, 2811 { "XGM_STAT_RX_SYM_CODE_ERR_FRAMES", 0xb88, 0 }, 2812 { "RxSymCodeErrFrames", 0, 16 }, 2813 { "XGM_XAUI_PCS_ERR", 0xb98, 0 }, 2814 { "PCS_SyncStatus", 5, 4 }, 2815 { "PCS_CTCFIFOErr", 1, 4 }, 2816 { "PCS_NotAligned", 0, 1 }, 2817 { "XGM_RGMII_STATUS", 0xb9c, 0 }, 2818 { "GMIIDuplex", 3, 1 }, 2819 { "GMIISpeed", 1, 2 }, 2820 { "GMIILinkStatus", 0, 1 }, 2821 { "XGM_WOL_STATUS", 0xba0, 0 }, 2822 { "PatDetected", 31, 1 }, 2823 { "MatchedFilter", 0, 3 }, 2824 { "XGM_RX_MAX_PKT_SIZE_ERR_CNT", 0xba4, 0 }, 2825 { "XGM_TX_SPI4_SOP_EOP_CNT", 0xba8, 0 }, 2826 { "TxSPI4SopCnt", 16, 16 }, 2827 { "TxSPI4EopCnt", 0, 16 }, 2828 { "XGM_RX_SPI4_SOP_EOP_CNT", 0xbac, 0 }, 2829 { "RxSPI4SopCnt", 16, 16 }, 2830 { "RxSPI4EopCnt", 0, 16 }, 2831 { NULL, 0, 0 } 2832 }; 2833