1 /*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/ioctl.h> 33 #include <sys/mman.h> 34 #include <sys/socket.h> 35 #include <sys/stat.h> 36 37 #include <arpa/inet.h> 38 #include <net/ethernet.h> 39 #include <net/sff8472.h> 40 #include <netinet/in.h> 41 42 #include <ctype.h> 43 #include <err.h> 44 #include <errno.h> 45 #include <fcntl.h> 46 #include <limits.h> 47 #include <stdint.h> 48 #include <stdio.h> 49 #include <stdlib.h> 50 #include <string.h> 51 #include <unistd.h> 52 53 #include "t4_ioctl.h" 54 55 #define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo)) 56 #define max(x, y) ((x) > (y) ? (x) : (y)) 57 58 static const char *progname, *nexus; 59 static int chip_id; /* 4 for T4, 5 for T5 */ 60 61 struct reg_info { 62 const char *name; 63 uint32_t addr; 64 uint32_t len; 65 }; 66 67 struct mod_regs { 68 const char *name; 69 const struct reg_info *ri; 70 }; 71 72 struct field_desc { 73 const char *name; /* Field name */ 74 unsigned short start; /* Start bit position */ 75 unsigned short end; /* End bit position */ 76 unsigned char shift; /* # of low order bits omitted and implicitly 0 */ 77 unsigned char hex; /* Print field in hex instead of decimal */ 78 unsigned char islog2; /* Field contains the base-2 log of the value */ 79 }; 80 81 #include "reg_defs_t4.c" 82 #include "reg_defs_t5.c" 83 #include "reg_defs_t6.c" 84 #include "reg_defs_t4vf.c" 85 86 static void 87 usage(FILE *fp) 88 { 89 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname); 90 fprintf(fp, 91 "\tclearstats <port> clear port statistics\n" 92 "\tcontext <type> <id> show an SGE context\n" 93 "\tfilter <idx> [<param> <val>] ... set a filter\n" 94 "\tfilter <idx> delete|clear delete a filter\n" 95 "\tfilter list list all filters\n" 96 "\tfilter mode [<match>] ... get/set global filter mode\n" 97 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n" 98 "\tloadcfg <fw-config.txt> install configuration file\n" 99 "\tloadcfg clear remove configuration file\n" 100 "\tloadfw <fw-image.bin> install firmware\n" 101 "\tmemdump <addr> <len> dump a memory range\n" 102 "\tmodinfo <port> [raw] optics/cable information\n" 103 "\treg <address>[=<val>] read/write register\n" 104 "\treg64 <address>[=<val>] read/write 64 bit register\n" 105 "\tregdump [<module>] ... dump registers\n" 106 "\tsched-class params <param> <val> .. configure TX scheduler class\n" 107 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n" 108 "\tstdio interactive mode\n" 109 "\ttcb <tid> read TCB\n" 110 "\ttracer <idx> tx<n>|rx<n> set and enable a tracer\n" 111 "\ttracer <idx> disable|enable disable or enable a tracer\n" 112 "\ttracer list list all tracers\n" 113 ); 114 } 115 116 static inline unsigned int 117 get_card_vers(unsigned int version) 118 { 119 return (version & 0x3ff); 120 } 121 122 static int 123 real_doit(unsigned long cmd, void *data, const char *cmdstr) 124 { 125 static int fd = -1; 126 int rc = 0; 127 128 if (fd == -1) { 129 char buf[64]; 130 131 snprintf(buf, sizeof(buf), "/dev/%s", nexus); 132 if ((fd = open(buf, O_RDWR)) < 0) { 133 warn("open(%s)", nexus); 134 rc = errno; 135 return (rc); 136 } 137 chip_id = nexus[1] - '0'; 138 } 139 140 rc = ioctl(fd, cmd, data); 141 if (rc < 0) { 142 warn("%s", cmdstr); 143 rc = errno; 144 } 145 146 return (rc); 147 } 148 #define doit(x, y) real_doit(x, y, #x) 149 150 static char * 151 str_to_number(const char *s, long *val, long long *vall) 152 { 153 char *p; 154 155 if (vall) 156 *vall = strtoll(s, &p, 0); 157 else if (val) 158 *val = strtol(s, &p, 0); 159 else 160 p = NULL; 161 162 return (p); 163 } 164 165 static int 166 read_reg(long addr, int size, long long *val) 167 { 168 struct t4_reg reg; 169 int rc; 170 171 reg.addr = (uint32_t) addr; 172 reg.size = (uint32_t) size; 173 reg.val = 0; 174 175 rc = doit(CHELSIO_T4_GETREG, ®); 176 177 *val = reg.val; 178 179 return (rc); 180 } 181 182 static int 183 write_reg(long addr, int size, long long val) 184 { 185 struct t4_reg reg; 186 187 reg.addr = (uint32_t) addr; 188 reg.size = (uint32_t) size; 189 reg.val = (uint64_t) val; 190 191 return doit(CHELSIO_T4_SETREG, ®); 192 } 193 194 static int 195 register_io(int argc, const char *argv[], int size) 196 { 197 char *p, *v; 198 long addr; 199 long long val; 200 int w = 0, rc; 201 202 if (argc == 1) { 203 /* <reg> OR <reg>=<value> */ 204 205 p = str_to_number(argv[0], &addr, NULL); 206 if (*p) { 207 if (*p != '=') { 208 warnx("invalid register \"%s\"", argv[0]); 209 return (EINVAL); 210 } 211 212 w = 1; 213 v = p + 1; 214 p = str_to_number(v, NULL, &val); 215 216 if (*p) { 217 warnx("invalid value \"%s\"", v); 218 return (EINVAL); 219 } 220 } 221 222 } else if (argc == 2) { 223 /* <reg> <value> */ 224 225 w = 1; 226 227 p = str_to_number(argv[0], &addr, NULL); 228 if (*p) { 229 warnx("invalid register \"%s\"", argv[0]); 230 return (EINVAL); 231 } 232 233 p = str_to_number(argv[1], NULL, &val); 234 if (*p) { 235 warnx("invalid value \"%s\"", argv[1]); 236 return (EINVAL); 237 } 238 } else { 239 warnx("reg: invalid number of arguments (%d)", argc); 240 return (EINVAL); 241 } 242 243 if (w) 244 rc = write_reg(addr, size, val); 245 else { 246 rc = read_reg(addr, size, &val); 247 if (rc == 0) 248 printf("0x%llx [%llu]\n", val, val); 249 } 250 251 return (rc); 252 } 253 254 static inline uint32_t 255 xtract(uint32_t val, int shift, int len) 256 { 257 return (val >> shift) & ((1 << len) - 1); 258 } 259 260 static int 261 dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs) 262 { 263 uint32_t reg_val = 0; 264 265 for ( ; reg_array->name; ++reg_array) 266 if (!reg_array->len) { 267 reg_val = regs[reg_array->addr / 4]; 268 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr, 269 reg_array->name, reg_val, reg_val); 270 } else { 271 uint32_t v = xtract(reg_val, reg_array->addr, 272 reg_array->len); 273 274 printf(" %*u:%u %-47s %#-10x %u\n", 275 reg_array->addr < 10 ? 3 : 2, 276 reg_array->addr + reg_array->len - 1, 277 reg_array->addr, reg_array->name, v, v); 278 } 279 280 return (1); 281 } 282 283 static int 284 dump_regs_table(int argc, const char *argv[], const uint32_t *regs, 285 const struct mod_regs *modtab, int nmodules) 286 { 287 int i, j, match; 288 289 for (i = 0; i < argc; i++) { 290 for (j = 0; j < nmodules; j++) { 291 if (!strcmp(argv[i], modtab[j].name)) 292 break; 293 } 294 295 if (j == nmodules) { 296 warnx("invalid register block \"%s\"", argv[i]); 297 fprintf(stderr, "\nAvailable blocks:"); 298 for ( ; nmodules; nmodules--, modtab++) 299 fprintf(stderr, " %s", modtab->name); 300 fprintf(stderr, "\n"); 301 return (EINVAL); 302 } 303 } 304 305 for ( ; nmodules; nmodules--, modtab++) { 306 307 match = argc == 0 ? 1 : 0; 308 for (i = 0; !match && i < argc; i++) { 309 if (!strcmp(argv[i], modtab->name)) 310 match = 1; 311 } 312 313 if (match) 314 dump_block_regs(modtab->ri, regs); 315 } 316 317 return (0); 318 } 319 320 #define T4_MODREGS(name) { #name, t4_##name##_regs } 321 static int 322 dump_regs_t4(int argc, const char *argv[], const uint32_t *regs) 323 { 324 static struct mod_regs t4_mod[] = { 325 T4_MODREGS(sge), 326 { "pci", t4_pcie_regs }, 327 T4_MODREGS(dbg), 328 T4_MODREGS(mc), 329 T4_MODREGS(ma), 330 { "edc0", t4_edc_0_regs }, 331 { "edc1", t4_edc_1_regs }, 332 T4_MODREGS(cim), 333 T4_MODREGS(tp), 334 T4_MODREGS(ulp_rx), 335 T4_MODREGS(ulp_tx), 336 { "pmrx", t4_pm_rx_regs }, 337 { "pmtx", t4_pm_tx_regs }, 338 T4_MODREGS(mps), 339 { "cplsw", t4_cpl_switch_regs }, 340 T4_MODREGS(smb), 341 { "i2c", t4_i2cm_regs }, 342 T4_MODREGS(mi), 343 T4_MODREGS(uart), 344 T4_MODREGS(pmu), 345 T4_MODREGS(sf), 346 T4_MODREGS(pl), 347 T4_MODREGS(le), 348 T4_MODREGS(ncsi), 349 T4_MODREGS(xgmac) 350 }; 351 352 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod)); 353 } 354 #undef T4_MODREGS 355 356 #define T5_MODREGS(name) { #name, t5_##name##_regs } 357 static int 358 dump_regs_t5(int argc, const char *argv[], const uint32_t *regs) 359 { 360 static struct mod_regs t5_mod[] = { 361 T5_MODREGS(sge), 362 { "pci", t5_pcie_regs }, 363 T5_MODREGS(dbg), 364 { "mc0", t5_mc_0_regs }, 365 { "mc1", t5_mc_1_regs }, 366 T5_MODREGS(ma), 367 { "edc0", t5_edc_t50_regs }, 368 { "edc1", t5_edc_t51_regs }, 369 T5_MODREGS(cim), 370 T5_MODREGS(tp), 371 { "ulprx", t5_ulp_rx_regs }, 372 { "ulptx", t5_ulp_tx_regs }, 373 { "pmrx", t5_pm_rx_regs }, 374 { "pmtx", t5_pm_tx_regs }, 375 T5_MODREGS(mps), 376 { "cplsw", t5_cpl_switch_regs }, 377 T5_MODREGS(smb), 378 { "i2c", t5_i2cm_regs }, 379 T5_MODREGS(mi), 380 T5_MODREGS(uart), 381 T5_MODREGS(pmu), 382 T5_MODREGS(sf), 383 T5_MODREGS(pl), 384 T5_MODREGS(le), 385 T5_MODREGS(ncsi), 386 T5_MODREGS(mac), 387 { "hma", t5_hma_t5_regs } 388 }; 389 390 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod)); 391 } 392 #undef T5_MODREGS 393 394 #define T6_MODREGS(name) { #name, t6_##name##_regs } 395 static int 396 dump_regs_t6(int argc, const char *argv[], const uint32_t *regs) 397 { 398 static struct mod_regs t6_mod[] = { 399 T6_MODREGS(sge), 400 { "pci", t6_pcie_regs }, 401 T6_MODREGS(dbg), 402 { "mc0", t6_mc_0_regs }, 403 T6_MODREGS(ma), 404 { "edc0", t6_edc_t60_regs }, 405 { "edc1", t6_edc_t61_regs }, 406 T6_MODREGS(cim), 407 T6_MODREGS(tp), 408 { "ulprx", t6_ulp_rx_regs }, 409 { "ulptx", t6_ulp_tx_regs }, 410 { "pmrx", t6_pm_rx_regs }, 411 { "pmtx", t6_pm_tx_regs }, 412 T6_MODREGS(mps), 413 { "cplsw", t6_cpl_switch_regs }, 414 T6_MODREGS(smb), 415 { "i2c", t6_i2cm_regs }, 416 T6_MODREGS(mi), 417 T6_MODREGS(uart), 418 T6_MODREGS(pmu), 419 T6_MODREGS(sf), 420 T6_MODREGS(pl), 421 T6_MODREGS(le), 422 T6_MODREGS(ncsi), 423 T6_MODREGS(mac), 424 { "hma", t6_hma_t6_regs } 425 }; 426 427 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod)); 428 } 429 #undef T6_MODREGS 430 431 static int 432 dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs) 433 { 434 static struct mod_regs t4vf_mod[] = { 435 { "sge", t4vf_sge_regs }, 436 { "mps", t4vf_mps_regs }, 437 { "pl", t4vf_pl_regs }, 438 { "mbdata", t4vf_mbdata_regs }, 439 { "cim", t4vf_cim_regs }, 440 }; 441 442 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod)); 443 } 444 445 static int 446 dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs) 447 { 448 static struct mod_regs t5vf_mod[] = { 449 { "sge", t5vf_sge_regs }, 450 { "mps", t4vf_mps_regs }, 451 { "pl", t5vf_pl_regs }, 452 { "mbdata", t4vf_mbdata_regs }, 453 { "cim", t4vf_cim_regs }, 454 }; 455 456 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod)); 457 } 458 459 static int 460 dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs) 461 { 462 static struct mod_regs t6vf_mod[] = { 463 { "sge", t5vf_sge_regs }, 464 { "mps", t4vf_mps_regs }, 465 { "pl", t6vf_pl_regs }, 466 { "mbdata", t4vf_mbdata_regs }, 467 { "cim", t4vf_cim_regs }, 468 }; 469 470 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod)); 471 } 472 473 static int 474 dump_regs(int argc, const char *argv[]) 475 { 476 int vers, revision, rc; 477 struct t4_regdump regs; 478 uint32_t len; 479 480 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE); 481 regs.data = calloc(1, len); 482 if (regs.data == NULL) { 483 warnc(ENOMEM, "regdump"); 484 return (ENOMEM); 485 } 486 487 regs.len = len; 488 rc = doit(CHELSIO_T4_REGDUMP, ®s); 489 if (rc != 0) 490 return (rc); 491 492 vers = get_card_vers(regs.version); 493 revision = (regs.version >> 10) & 0x3f; 494 495 if (vers == 4) { 496 if (revision == 0x3f) 497 rc = dump_regs_t4vf(argc, argv, regs.data); 498 else 499 rc = dump_regs_t4(argc, argv, regs.data); 500 } else if (vers == 5) { 501 if (revision == 0x3f) 502 rc = dump_regs_t5vf(argc, argv, regs.data); 503 else 504 rc = dump_regs_t5(argc, argv, regs.data); 505 } else if (vers == 6) { 506 if (revision == 0x3f) 507 rc = dump_regs_t6vf(argc, argv, regs.data); 508 else 509 rc = dump_regs_t6(argc, argv, regs.data); 510 } else { 511 warnx("%s (type %d, rev %d) is not a known card.", 512 nexus, vers, revision); 513 return (ENOTSUP); 514 } 515 516 free(regs.data); 517 return (rc); 518 } 519 520 static void 521 do_show_info_header(uint32_t mode) 522 { 523 uint32_t i; 524 525 printf("%4s %8s", "Idx", "Hits"); 526 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 527 switch (mode & i) { 528 case T4_FILTER_FCoE: 529 printf(" FCoE"); 530 break; 531 532 case T4_FILTER_PORT: 533 printf(" Port"); 534 break; 535 536 case T4_FILTER_VNIC: 537 if (mode & T4_FILTER_IC_VNIC) 538 printf(" VFvld:PF:VF"); 539 else 540 printf(" vld:oVLAN"); 541 break; 542 543 case T4_FILTER_VLAN: 544 printf(" vld:VLAN"); 545 break; 546 547 case T4_FILTER_IP_TOS: 548 printf(" TOS"); 549 break; 550 551 case T4_FILTER_IP_PROTO: 552 printf(" Prot"); 553 break; 554 555 case T4_FILTER_ETH_TYPE: 556 printf(" EthType"); 557 break; 558 559 case T4_FILTER_MAC_IDX: 560 printf(" MACIdx"); 561 break; 562 563 case T4_FILTER_MPS_HIT_TYPE: 564 printf(" MPS"); 565 break; 566 567 case T4_FILTER_IP_FRAGMENT: 568 printf(" Frag"); 569 break; 570 571 default: 572 /* compressed filter field not enabled */ 573 break; 574 } 575 } 576 printf(" %20s %20s %9s %9s %s\n", 577 "DIP", "SIP", "DPORT", "SPORT", "Action"); 578 } 579 580 /* 581 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] } 582 * ordered tuple. If the parameter name in the argument sub-vector does not 583 * match the passed in parameter name, then a zero is returned for the 584 * function and no parsing is performed. If there is a match, then the value 585 * and optional mask are parsed and returned in the provided return value 586 * pointers. If no optional mask is specified, then a default mask of all 1s 587 * will be returned. 588 * 589 * An error in parsing the value[:mask] will result in an error message and 590 * program termination. 591 */ 592 static int 593 parse_val_mask(const char *param, const char *args[], uint32_t *val, 594 uint32_t *mask) 595 { 596 char *p; 597 598 if (strcmp(param, args[0]) != 0) 599 return (EINVAL); 600 601 *val = strtoul(args[1], &p, 0); 602 if (p > args[1]) { 603 if (p[0] == 0) { 604 *mask = ~0; 605 return (0); 606 } 607 608 if (p[0] == ':' && p[1] != 0) { 609 *mask = strtoul(p+1, &p, 0); 610 if (p[0] == 0) 611 return (0); 612 } 613 } 614 615 warnx("parameter \"%s\" has bad \"value[:mask]\" %s", 616 args[0], args[1]); 617 618 return (EINVAL); 619 } 620 621 /* 622 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] } 623 * ordered tuple. If the parameter name in the argument sub-vector does not 624 * match the passed in parameter name, then a zero is returned for the 625 * function and no parsing is performed. If there is a match, then the value 626 * and optional mask are parsed and returned in the provided return value 627 * pointers. If no optional mask is specified, then a default mask of all 1s 628 * will be returned. 629 * 630 * The value return parameter "afp" is used to specify the expected address 631 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual 632 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6 633 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and 634 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4 635 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are 636 * returned in the first four bytes of the address and mask return values with 637 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0, 638 * 1, 2, 3}, respectively. 639 * 640 * An error in parsing the value[:mask] will result in an error message and 641 * program termination. 642 */ 643 static int 644 parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[], 645 uint8_t mask[]) 646 { 647 const char *colon, *afn; 648 char *slash; 649 uint8_t *m; 650 int af, ret; 651 unsigned int masksize; 652 653 /* 654 * Is this our parameter? 655 */ 656 if (strcmp(param, args[0]) != 0) 657 return (EINVAL); 658 659 /* 660 * Fundamental IPv4 versus IPv6 selection. 661 */ 662 colon = strchr(args[1], ':'); 663 if (!colon) { 664 afn = "IPv4"; 665 af = AF_INET; 666 masksize = 32; 667 } else { 668 afn = "IPv6"; 669 af = AF_INET6; 670 masksize = 128; 671 } 672 if (*afp == AF_UNSPEC) 673 *afp = af; 674 else if (*afp != af) { 675 warnx("address %s is not of expected family %s", 676 args[1], *afp == AF_INET ? "IP" : "IPv6"); 677 return (EINVAL); 678 } 679 680 /* 681 * Parse address (temporarily stripping off any "/mask" 682 * specification). 683 */ 684 slash = strchr(args[1], '/'); 685 if (slash) 686 *slash = 0; 687 ret = inet_pton(af, args[1], addr); 688 if (slash) 689 *slash = '/'; 690 if (ret <= 0) { 691 warnx("Cannot parse %s %s address %s", param, afn, args[1]); 692 return (EINVAL); 693 } 694 695 /* 696 * Parse optional mask specification. 697 */ 698 if (slash) { 699 char *p; 700 unsigned int prefix = strtoul(slash + 1, &p, 10); 701 702 if (p == slash + 1) { 703 warnx("missing address prefix for %s", param); 704 return (EINVAL); 705 } 706 if (*p) { 707 warnx("%s is not a valid address prefix", slash + 1); 708 return (EINVAL); 709 } 710 if (prefix > masksize) { 711 warnx("prefix %u is too long for an %s address", 712 prefix, afn); 713 return (EINVAL); 714 } 715 memset(mask, 0, masksize / 8); 716 masksize = prefix; 717 } 718 719 /* 720 * Fill in mask. 721 */ 722 for (m = mask; masksize >= 8; m++, masksize -= 8) 723 *m = ~0; 724 if (masksize) 725 *m = ~0 << (8 - masksize); 726 727 return (0); 728 } 729 730 /* 731 * Parse an argument sub-vector as a { <parameter name> <value> } ordered 732 * tuple. If the parameter name in the argument sub-vector does not match the 733 * passed in parameter name, then a zero is returned for the function and no 734 * parsing is performed. If there is a match, then the value is parsed and 735 * returned in the provided return value pointer. 736 */ 737 static int 738 parse_val(const char *param, const char *args[], uint32_t *val) 739 { 740 char *p; 741 742 if (strcmp(param, args[0]) != 0) 743 return (EINVAL); 744 745 *val = strtoul(args[1], &p, 0); 746 if (p > args[1] && p[0] == 0) 747 return (0); 748 749 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]); 750 return (EINVAL); 751 } 752 753 static void 754 filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm) 755 { 756 int noctets, octet; 757 758 printf(" "); 759 if (type == 0) { 760 noctets = 4; 761 printf("%3s", " "); 762 } else 763 noctets = 16; 764 765 for (octet = 0; octet < noctets; octet++) 766 printf("%02x", addr[octet]); 767 printf("/"); 768 for (octet = 0; octet < noctets; octet++) 769 printf("%02x", addrm[octet]); 770 } 771 772 static void 773 do_show_one_filter_info(struct t4_filter *t, uint32_t mode) 774 { 775 uint32_t i; 776 777 printf("%4d", t->idx); 778 if (t->hits == UINT64_MAX) 779 printf(" %8s", "-"); 780 else 781 printf(" %8ju", t->hits); 782 783 /* 784 * Compressed header portion of filter. 785 */ 786 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 787 switch (mode & i) { 788 case T4_FILTER_FCoE: 789 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe); 790 break; 791 792 case T4_FILTER_PORT: 793 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport); 794 break; 795 796 case T4_FILTER_VNIC: 797 if (mode & T4_FILTER_IC_VNIC) { 798 printf(" %1d:%1x:%02x/%1d:%1x:%02x", 799 t->fs.val.pfvf_vld, 800 (t->fs.val.vnic >> 13) & 0x7, 801 t->fs.val.vnic & 0x1fff, 802 t->fs.mask.pfvf_vld, 803 (t->fs.mask.vnic >> 13) & 0x7, 804 t->fs.mask.vnic & 0x1fff); 805 } else { 806 printf(" %1d:%04x/%1d:%04x", 807 t->fs.val.ovlan_vld, t->fs.val.vnic, 808 t->fs.mask.ovlan_vld, t->fs.mask.vnic); 809 } 810 break; 811 812 case T4_FILTER_VLAN: 813 printf(" %1d:%04x/%1d:%04x", 814 t->fs.val.vlan_vld, t->fs.val.vlan, 815 t->fs.mask.vlan_vld, t->fs.mask.vlan); 816 break; 817 818 case T4_FILTER_IP_TOS: 819 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos); 820 break; 821 822 case T4_FILTER_IP_PROTO: 823 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto); 824 break; 825 826 case T4_FILTER_ETH_TYPE: 827 printf(" %04x/%04x", t->fs.val.ethtype, 828 t->fs.mask.ethtype); 829 break; 830 831 case T4_FILTER_MAC_IDX: 832 printf(" %03x/%03x", t->fs.val.macidx, 833 t->fs.mask.macidx); 834 break; 835 836 case T4_FILTER_MPS_HIT_TYPE: 837 printf(" %1x/%1x", t->fs.val.matchtype, 838 t->fs.mask.matchtype); 839 break; 840 841 case T4_FILTER_IP_FRAGMENT: 842 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag); 843 break; 844 845 default: 846 /* compressed filter field not enabled */ 847 break; 848 } 849 } 850 851 /* 852 * Fixed portion of filter. 853 */ 854 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip); 855 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip); 856 printf(" %04x/%04x %04x/%04x", 857 t->fs.val.dport, t->fs.mask.dport, 858 t->fs.val.sport, t->fs.mask.sport); 859 860 /* 861 * Variable length filter action. 862 */ 863 if (t->fs.action == FILTER_DROP) 864 printf(" Drop"); 865 else if (t->fs.action == FILTER_SWITCH) { 866 printf(" Switch: port=%d", t->fs.eport); 867 if (t->fs.newdmac) 868 printf( 869 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x " 870 ", l2tidx=%d", 871 t->fs.dmac[0], t->fs.dmac[1], 872 t->fs.dmac[2], t->fs.dmac[3], 873 t->fs.dmac[4], t->fs.dmac[5], 874 t->l2tidx); 875 if (t->fs.newsmac) 876 printf( 877 ", smac=%02x:%02x:%02x:%02x:%02x:%02x " 878 ", smtidx=%d", 879 t->fs.smac[0], t->fs.smac[1], 880 t->fs.smac[2], t->fs.smac[3], 881 t->fs.smac[4], t->fs.smac[5], 882 t->smtidx); 883 if (t->fs.newvlan == VLAN_REMOVE) 884 printf(", vlan=none"); 885 else if (t->fs.newvlan == VLAN_INSERT) 886 printf(", vlan=insert(%x)", t->fs.vlan); 887 else if (t->fs.newvlan == VLAN_REWRITE) 888 printf(", vlan=rewrite(%x)", t->fs.vlan); 889 } else { 890 printf(" Pass: Q="); 891 if (t->fs.dirsteer == 0) { 892 printf("RSS"); 893 if (t->fs.maskhash) 894 printf("(TCB=hash)"); 895 } else { 896 printf("%d", t->fs.iq); 897 if (t->fs.dirsteerhash == 0) 898 printf("(QID)"); 899 else 900 printf("(hash)"); 901 } 902 } 903 if (t->fs.prio) 904 printf(" Prio"); 905 if (t->fs.rpttid) 906 printf(" RptTID"); 907 printf("\n"); 908 } 909 910 static int 911 show_filters(void) 912 { 913 uint32_t mode = 0, header = 0; 914 struct t4_filter t; 915 int rc; 916 917 /* Get the global filter mode first */ 918 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 919 if (rc != 0) 920 return (rc); 921 922 t.idx = 0; 923 for (t.idx = 0; ; t.idx++) { 924 rc = doit(CHELSIO_T4_GET_FILTER, &t); 925 if (rc != 0 || t.idx == 0xffffffff) 926 break; 927 928 if (!header) { 929 do_show_info_header(mode); 930 header = 1; 931 } 932 do_show_one_filter_info(&t, mode); 933 }; 934 935 return (rc); 936 } 937 938 static int 939 get_filter_mode(void) 940 { 941 uint32_t mode = 0; 942 int rc; 943 944 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 945 if (rc != 0) 946 return (rc); 947 948 if (mode & T4_FILTER_IPv4) 949 printf("ipv4 "); 950 951 if (mode & T4_FILTER_IPv6) 952 printf("ipv6 "); 953 954 if (mode & T4_FILTER_IP_SADDR) 955 printf("sip "); 956 957 if (mode & T4_FILTER_IP_DADDR) 958 printf("dip "); 959 960 if (mode & T4_FILTER_IP_SPORT) 961 printf("sport "); 962 963 if (mode & T4_FILTER_IP_DPORT) 964 printf("dport "); 965 966 if (mode & T4_FILTER_IP_FRAGMENT) 967 printf("frag "); 968 969 if (mode & T4_FILTER_MPS_HIT_TYPE) 970 printf("matchtype "); 971 972 if (mode & T4_FILTER_MAC_IDX) 973 printf("macidx "); 974 975 if (mode & T4_FILTER_ETH_TYPE) 976 printf("ethtype "); 977 978 if (mode & T4_FILTER_IP_PROTO) 979 printf("proto "); 980 981 if (mode & T4_FILTER_IP_TOS) 982 printf("tos "); 983 984 if (mode & T4_FILTER_VLAN) 985 printf("vlan "); 986 987 if (mode & T4_FILTER_VNIC) { 988 if (mode & T4_FILTER_IC_VNIC) 989 printf("vnic_id "); 990 else 991 printf("ovlan "); 992 } 993 994 if (mode & T4_FILTER_PORT) 995 printf("iport "); 996 997 if (mode & T4_FILTER_FCoE) 998 printf("fcoe "); 999 1000 printf("\n"); 1001 1002 return (0); 1003 } 1004 1005 static int 1006 set_filter_mode(int argc, const char *argv[]) 1007 { 1008 uint32_t mode = 0; 1009 int vnic = 0, ovlan = 0; 1010 1011 for (; argc; argc--, argv++) { 1012 if (!strcmp(argv[0], "frag")) 1013 mode |= T4_FILTER_IP_FRAGMENT; 1014 1015 if (!strcmp(argv[0], "matchtype")) 1016 mode |= T4_FILTER_MPS_HIT_TYPE; 1017 1018 if (!strcmp(argv[0], "macidx")) 1019 mode |= T4_FILTER_MAC_IDX; 1020 1021 if (!strcmp(argv[0], "ethtype")) 1022 mode |= T4_FILTER_ETH_TYPE; 1023 1024 if (!strcmp(argv[0], "proto")) 1025 mode |= T4_FILTER_IP_PROTO; 1026 1027 if (!strcmp(argv[0], "tos")) 1028 mode |= T4_FILTER_IP_TOS; 1029 1030 if (!strcmp(argv[0], "vlan")) 1031 mode |= T4_FILTER_VLAN; 1032 1033 if (!strcmp(argv[0], "ovlan")) { 1034 mode |= T4_FILTER_VNIC; 1035 ovlan++; 1036 } 1037 1038 if (!strcmp(argv[0], "vnic_id")) { 1039 mode |= T4_FILTER_VNIC; 1040 mode |= T4_FILTER_IC_VNIC; 1041 vnic++; 1042 } 1043 1044 if (!strcmp(argv[0], "iport")) 1045 mode |= T4_FILTER_PORT; 1046 1047 if (!strcmp(argv[0], "fcoe")) 1048 mode |= T4_FILTER_FCoE; 1049 } 1050 1051 if (vnic > 0 && ovlan > 0) { 1052 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive."); 1053 return (EINVAL); 1054 } 1055 1056 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode); 1057 } 1058 1059 static int 1060 del_filter(uint32_t idx) 1061 { 1062 struct t4_filter t; 1063 1064 t.idx = idx; 1065 1066 return doit(CHELSIO_T4_DEL_FILTER, &t); 1067 } 1068 1069 static int 1070 set_filter(uint32_t idx, int argc, const char *argv[]) 1071 { 1072 int af = AF_UNSPEC, start_arg = 0; 1073 struct t4_filter t; 1074 1075 if (argc < 2) { 1076 warnc(EINVAL, "%s", __func__); 1077 return (EINVAL); 1078 }; 1079 bzero(&t, sizeof (t)); 1080 t.idx = idx; 1081 t.fs.hitcnts = 1; 1082 1083 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) { 1084 const char **args = &argv[start_arg]; 1085 uint32_t val, mask; 1086 1087 if (!strcmp(argv[start_arg], "type")) { 1088 int newaf; 1089 if (!strcasecmp(argv[start_arg + 1], "ipv4")) 1090 newaf = AF_INET; 1091 else if (!strcasecmp(argv[start_arg + 1], "ipv6")) 1092 newaf = AF_INET6; 1093 else { 1094 warnx("invalid type \"%s\"; " 1095 "must be one of \"ipv4\" or \"ipv6\"", 1096 argv[start_arg + 1]); 1097 return (EINVAL); 1098 } 1099 1100 if (af != AF_UNSPEC && af != newaf) { 1101 warnx("conflicting IPv4/IPv6 specifications."); 1102 return (EINVAL); 1103 } 1104 af = newaf; 1105 } else if (!parse_val_mask("fcoe", args, &val, &mask)) { 1106 t.fs.val.fcoe = val; 1107 t.fs.mask.fcoe = mask; 1108 } else if (!parse_val_mask("iport", args, &val, &mask)) { 1109 t.fs.val.iport = val; 1110 t.fs.mask.iport = mask; 1111 } else if (!parse_val_mask("ovlan", args, &val, &mask)) { 1112 t.fs.val.vnic = val; 1113 t.fs.mask.vnic = mask; 1114 t.fs.val.ovlan_vld = 1; 1115 t.fs.mask.ovlan_vld = 1; 1116 } else if (!parse_val_mask("ivlan", args, &val, &mask)) { 1117 t.fs.val.vlan = val; 1118 t.fs.mask.vlan = mask; 1119 t.fs.val.vlan_vld = 1; 1120 t.fs.mask.vlan_vld = 1; 1121 } else if (!parse_val_mask("pf", args, &val, &mask)) { 1122 t.fs.val.vnic &= 0x1fff; 1123 t.fs.val.vnic |= (val & 0x7) << 13; 1124 t.fs.mask.vnic &= 0x1fff; 1125 t.fs.mask.vnic |= (mask & 0x7) << 13; 1126 t.fs.val.pfvf_vld = 1; 1127 t.fs.mask.pfvf_vld = 1; 1128 } else if (!parse_val_mask("vf", args, &val, &mask)) { 1129 t.fs.val.vnic &= 0xe000; 1130 t.fs.val.vnic |= val & 0x1fff; 1131 t.fs.mask.vnic &= 0xe000; 1132 t.fs.mask.vnic |= mask & 0x1fff; 1133 t.fs.val.pfvf_vld = 1; 1134 t.fs.mask.pfvf_vld = 1; 1135 } else if (!parse_val_mask("tos", args, &val, &mask)) { 1136 t.fs.val.tos = val; 1137 t.fs.mask.tos = mask; 1138 } else if (!parse_val_mask("proto", args, &val, &mask)) { 1139 t.fs.val.proto = val; 1140 t.fs.mask.proto = mask; 1141 } else if (!parse_val_mask("ethtype", args, &val, &mask)) { 1142 t.fs.val.ethtype = val; 1143 t.fs.mask.ethtype = mask; 1144 } else if (!parse_val_mask("macidx", args, &val, &mask)) { 1145 t.fs.val.macidx = val; 1146 t.fs.mask.macidx = mask; 1147 } else if (!parse_val_mask("matchtype", args, &val, &mask)) { 1148 t.fs.val.matchtype = val; 1149 t.fs.mask.matchtype = mask; 1150 } else if (!parse_val_mask("frag", args, &val, &mask)) { 1151 t.fs.val.frag = val; 1152 t.fs.mask.frag = mask; 1153 } else if (!parse_val_mask("dport", args, &val, &mask)) { 1154 t.fs.val.dport = val; 1155 t.fs.mask.dport = mask; 1156 } else if (!parse_val_mask("sport", args, &val, &mask)) { 1157 t.fs.val.sport = val; 1158 t.fs.mask.sport = mask; 1159 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip, 1160 t.fs.mask.dip)) { 1161 /* nada */; 1162 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip, 1163 t.fs.mask.sip)) { 1164 /* nada */; 1165 } else if (!strcmp(argv[start_arg], "action")) { 1166 if (!strcmp(argv[start_arg + 1], "pass")) 1167 t.fs.action = FILTER_PASS; 1168 else if (!strcmp(argv[start_arg + 1], "drop")) 1169 t.fs.action = FILTER_DROP; 1170 else if (!strcmp(argv[start_arg + 1], "switch")) 1171 t.fs.action = FILTER_SWITCH; 1172 else { 1173 warnx("invalid action \"%s\"; must be one of" 1174 " \"pass\", \"drop\" or \"switch\"", 1175 argv[start_arg + 1]); 1176 return (EINVAL); 1177 } 1178 } else if (!parse_val("hitcnts", args, &val)) { 1179 t.fs.hitcnts = val; 1180 } else if (!parse_val("prio", args, &val)) { 1181 t.fs.prio = val; 1182 } else if (!parse_val("rpttid", args, &val)) { 1183 t.fs.rpttid = 1; 1184 } else if (!parse_val("queue", args, &val)) { 1185 t.fs.dirsteer = 1; 1186 t.fs.iq = val; 1187 } else if (!parse_val("tcbhash", args, &val)) { 1188 t.fs.maskhash = 1; 1189 t.fs.dirsteerhash = 1; 1190 } else if (!parse_val("eport", args, &val)) { 1191 t.fs.eport = val; 1192 } else if (!strcmp(argv[start_arg], "dmac")) { 1193 struct ether_addr *daddr; 1194 1195 daddr = ether_aton(argv[start_arg + 1]); 1196 if (daddr == NULL) { 1197 warnx("invalid dmac address \"%s\"", 1198 argv[start_arg + 1]); 1199 return (EINVAL); 1200 } 1201 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN); 1202 t.fs.newdmac = 1; 1203 } else if (!strcmp(argv[start_arg], "smac")) { 1204 struct ether_addr *saddr; 1205 1206 saddr = ether_aton(argv[start_arg + 1]); 1207 if (saddr == NULL) { 1208 warnx("invalid smac address \"%s\"", 1209 argv[start_arg + 1]); 1210 return (EINVAL); 1211 } 1212 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN); 1213 t.fs.newsmac = 1; 1214 } else if (!strcmp(argv[start_arg], "vlan")) { 1215 char *p; 1216 if (!strcmp(argv[start_arg + 1], "none")) { 1217 t.fs.newvlan = VLAN_REMOVE; 1218 } else if (argv[start_arg + 1][0] == '=') { 1219 t.fs.newvlan = VLAN_REWRITE; 1220 } else if (argv[start_arg + 1][0] == '+') { 1221 t.fs.newvlan = VLAN_INSERT; 1222 } else if (isdigit(argv[start_arg + 1][0]) && 1223 !parse_val_mask("vlan", args, &val, &mask)) { 1224 t.fs.val.vlan = val; 1225 t.fs.mask.vlan = mask; 1226 t.fs.val.vlan_vld = 1; 1227 t.fs.mask.vlan_vld = 1; 1228 } else { 1229 warnx("unknown vlan parameter \"%s\"; must" 1230 " be one of \"none\", \"=<vlan>\", " 1231 " \"+<vlan>\", or \"<vlan>\"", 1232 argv[start_arg + 1]); 1233 return (EINVAL); 1234 } 1235 if (t.fs.newvlan == VLAN_REWRITE || 1236 t.fs.newvlan == VLAN_INSERT) { 1237 t.fs.vlan = strtoul(argv[start_arg + 1] + 1, 1238 &p, 0); 1239 if (p == argv[start_arg + 1] + 1 || p[0] != 0) { 1240 warnx("invalid vlan \"%s\"", 1241 argv[start_arg + 1]); 1242 return (EINVAL); 1243 } 1244 } 1245 } else { 1246 warnx("invalid parameter \"%s\"", argv[start_arg]); 1247 return (EINVAL); 1248 } 1249 } 1250 if (start_arg != argc) { 1251 warnx("no value for \"%s\"", argv[start_arg]); 1252 return (EINVAL); 1253 } 1254 1255 /* 1256 * Check basic sanity of option combinations. 1257 */ 1258 if (t.fs.action != FILTER_SWITCH && 1259 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan)) { 1260 warnx("prio, port dmac, smac and vlan only make sense with" 1261 " \"action switch\""); 1262 return (EINVAL); 1263 } 1264 if (t.fs.action != FILTER_PASS && 1265 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) { 1266 warnx("rpttid, queue and tcbhash don't make sense with" 1267 " action \"drop\" or \"switch\""); 1268 return (EINVAL); 1269 } 1270 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) { 1271 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive"); 1272 return (EINVAL); 1273 } 1274 1275 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */ 1276 return doit(CHELSIO_T4_SET_FILTER, &t); 1277 } 1278 1279 static int 1280 filter_cmd(int argc, const char *argv[]) 1281 { 1282 long long val; 1283 uint32_t idx; 1284 char *s; 1285 1286 if (argc == 0) { 1287 warnx("filter: no arguments."); 1288 return (EINVAL); 1289 }; 1290 1291 /* list */ 1292 if (strcmp(argv[0], "list") == 0) { 1293 if (argc != 1) 1294 warnx("trailing arguments after \"list\" ignored."); 1295 1296 return show_filters(); 1297 } 1298 1299 /* mode */ 1300 if (argc == 1 && strcmp(argv[0], "mode") == 0) 1301 return get_filter_mode(); 1302 1303 /* mode <mode> */ 1304 if (strcmp(argv[0], "mode") == 0) 1305 return set_filter_mode(argc - 1, argv + 1); 1306 1307 /* <idx> ... */ 1308 s = str_to_number(argv[0], NULL, &val); 1309 if (*s || val > 0xffffffffU) { 1310 warnx("\"%s\" is neither an index nor a filter subcommand.", 1311 argv[0]); 1312 return (EINVAL); 1313 } 1314 idx = (uint32_t) val; 1315 1316 /* <idx> delete|clear */ 1317 if (argc == 2 && 1318 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) { 1319 return del_filter(idx); 1320 } 1321 1322 /* <idx> [<param> <val>] ... */ 1323 return set_filter(idx, argc - 1, argv + 1); 1324 } 1325 1326 /* 1327 * Shows the fields of a multi-word structure. The structure is considered to 1328 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure) 1329 * whose fields are described by @fd. The 32-bit words are given in @words 1330 * starting with the least significant 32-bit word. 1331 */ 1332 static void 1333 show_struct(const uint32_t *words, int nwords, const struct field_desc *fd) 1334 { 1335 unsigned int w = 0; 1336 const struct field_desc *p; 1337 1338 for (p = fd; p->name; p++) 1339 w = max(w, strlen(p->name)); 1340 1341 while (fd->name) { 1342 unsigned long long data; 1343 int first_word = fd->start / 32; 1344 int shift = fd->start % 32; 1345 int width = fd->end - fd->start + 1; 1346 unsigned long long mask = (1ULL << width) - 1; 1347 1348 data = (words[first_word] >> shift) | 1349 ((uint64_t)words[first_word + 1] << (32 - shift)); 1350 if (shift) 1351 data |= ((uint64_t)words[first_word + 2] << (64 - shift)); 1352 data &= mask; 1353 if (fd->islog2) 1354 data = 1 << data; 1355 printf("%-*s ", w, fd->name); 1356 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift); 1357 fd++; 1358 } 1359 } 1360 1361 #define FIELD(name, start, end) { name, start, end, 0, 0, 0 } 1362 #define FIELD1(name, start) FIELD(name, start, start) 1363 1364 static void 1365 show_t5t6_ctxt(const struct t4_sge_context *p, int vers) 1366 { 1367 static struct field_desc egress_t5[] = { 1368 FIELD("DCA_ST:", 181, 191), 1369 FIELD1("StatusPgNS:", 180), 1370 FIELD1("StatusPgRO:", 179), 1371 FIELD1("FetchNS:", 178), 1372 FIELD1("FetchRO:", 177), 1373 FIELD1("Valid:", 176), 1374 FIELD("PCIeDataChannel:", 174, 175), 1375 FIELD1("StatusPgTPHintEn:", 173), 1376 FIELD("StatusPgTPHint:", 171, 172), 1377 FIELD1("FetchTPHintEn:", 170), 1378 FIELD("FetchTPHint:", 168, 169), 1379 FIELD1("FCThreshOverride:", 167), 1380 { "WRLength:", 162, 166, 9, 0, 1 }, 1381 FIELD1("WRLengthKnown:", 161), 1382 FIELD1("ReschedulePending:", 160), 1383 FIELD1("OnChipQueue:", 159), 1384 FIELD1("FetchSizeMode:", 158), 1385 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1386 FIELD1("FLMPacking:", 155), 1387 FIELD("FetchBurstMax:", 153, 154), 1388 FIELD("uPToken:", 133, 152), 1389 FIELD1("uPTokenEn:", 132), 1390 FIELD1("UserModeIO:", 131), 1391 FIELD("uPFLCredits:", 123, 130), 1392 FIELD1("uPFLCreditEn:", 122), 1393 FIELD("FID:", 111, 121), 1394 FIELD("HostFCMode:", 109, 110), 1395 FIELD1("HostFCOwner:", 108), 1396 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1397 FIELD("CIDX:", 89, 104), 1398 FIELD("PIDX:", 73, 88), 1399 { "BaseAddress:", 18, 72, 9, 1 }, 1400 FIELD("QueueSize:", 2, 17), 1401 FIELD1("QueueType:", 1), 1402 FIELD1("CachePriority:", 0), 1403 { NULL } 1404 }; 1405 static struct field_desc egress_t6[] = { 1406 FIELD("DCA_ST:", 181, 191), 1407 FIELD1("StatusPgNS:", 180), 1408 FIELD1("StatusPgRO:", 179), 1409 FIELD1("FetchNS:", 178), 1410 FIELD1("FetchRO:", 177), 1411 FIELD1("Valid:", 176), 1412 FIELD1("ReschedulePending_1:", 175), 1413 FIELD1("PCIeDataChannel:", 174), 1414 FIELD1("StatusPgTPHintEn:", 173), 1415 FIELD("StatusPgTPHint:", 171, 172), 1416 FIELD1("FetchTPHintEn:", 170), 1417 FIELD("FetchTPHint:", 168, 169), 1418 FIELD1("FCThreshOverride:", 167), 1419 { "WRLength:", 162, 166, 9, 0, 1 }, 1420 FIELD1("WRLengthKnown:", 161), 1421 FIELD1("ReschedulePending:", 160), 1422 FIELD("TimerIx:", 157, 159), 1423 FIELD1("FetchBurstMin:", 156), 1424 FIELD1("FLMPacking:", 155), 1425 FIELD("FetchBurstMax:", 153, 154), 1426 FIELD("uPToken:", 133, 152), 1427 FIELD1("uPTokenEn:", 132), 1428 FIELD1("UserModeIO:", 131), 1429 FIELD("uPFLCredits:", 123, 130), 1430 FIELD1("uPFLCreditEn:", 122), 1431 FIELD("FID:", 111, 121), 1432 FIELD("HostFCMode:", 109, 110), 1433 FIELD1("HostFCOwner:", 108), 1434 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1435 FIELD("CIDX:", 89, 104), 1436 FIELD("PIDX:", 73, 88), 1437 { "BaseAddress:", 18, 72, 9, 1 }, 1438 FIELD("QueueSize:", 2, 17), 1439 FIELD1("QueueType:", 1), 1440 FIELD1("FetchSizeMode:", 0), 1441 { NULL } 1442 }; 1443 static struct field_desc fl_t5[] = { 1444 FIELD("DCA_ST:", 181, 191), 1445 FIELD1("StatusPgNS:", 180), 1446 FIELD1("StatusPgRO:", 179), 1447 FIELD1("FetchNS:", 178), 1448 FIELD1("FetchRO:", 177), 1449 FIELD1("Valid:", 176), 1450 FIELD("PCIeDataChannel:", 174, 175), 1451 FIELD1("StatusPgTPHintEn:", 173), 1452 FIELD("StatusPgTPHint:", 171, 172), 1453 FIELD1("FetchTPHintEn:", 170), 1454 FIELD("FetchTPHint:", 168, 169), 1455 FIELD1("FCThreshOverride:", 167), 1456 FIELD1("ReschedulePending:", 160), 1457 FIELD1("OnChipQueue:", 159), 1458 FIELD1("FetchSizeMode:", 158), 1459 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1460 FIELD1("FLMPacking:", 155), 1461 FIELD("FetchBurstMax:", 153, 154), 1462 FIELD1("FLMcongMode:", 152), 1463 FIELD("MaxuPFLCredits:", 144, 151), 1464 FIELD("FLMcontextID:", 133, 143), 1465 FIELD1("uPTokenEn:", 132), 1466 FIELD1("UserModeIO:", 131), 1467 FIELD("uPFLCredits:", 123, 130), 1468 FIELD1("uPFLCreditEn:", 122), 1469 FIELD("FID:", 111, 121), 1470 FIELD("HostFCMode:", 109, 110), 1471 FIELD1("HostFCOwner:", 108), 1472 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1473 FIELD("CIDX:", 89, 104), 1474 FIELD("PIDX:", 73, 88), 1475 { "BaseAddress:", 18, 72, 9, 1 }, 1476 FIELD("QueueSize:", 2, 17), 1477 FIELD1("QueueType:", 1), 1478 FIELD1("CachePriority:", 0), 1479 { NULL } 1480 }; 1481 static struct field_desc ingress_t5[] = { 1482 FIELD("DCA_ST:", 143, 153), 1483 FIELD1("ISCSICoalescing:", 142), 1484 FIELD1("Queue_Valid:", 141), 1485 FIELD1("TimerPending:", 140), 1486 FIELD1("DropRSS:", 139), 1487 FIELD("PCIeChannel:", 137, 138), 1488 FIELD1("SEInterruptArmed:", 136), 1489 FIELD1("CongestionMgtEnable:", 135), 1490 FIELD1("NoSnoop:", 134), 1491 FIELD1("RelaxedOrdering:", 133), 1492 FIELD1("GTSmode:", 132), 1493 FIELD1("TPHintEn:", 131), 1494 FIELD("TPHint:", 129, 130), 1495 FIELD1("UpdateScheduling:", 128), 1496 FIELD("UpdateDelivery:", 126, 127), 1497 FIELD1("InterruptSent:", 125), 1498 FIELD("InterruptIDX:", 114, 124), 1499 FIELD1("InterruptDestination:", 113), 1500 FIELD1("InterruptArmed:", 112), 1501 FIELD("RxIntCounter:", 106, 111), 1502 FIELD("RxIntCounterThreshold:", 104, 105), 1503 FIELD1("Generation:", 103), 1504 { "BaseAddress:", 48, 102, 9, 1 }, 1505 FIELD("PIDX:", 32, 47), 1506 FIELD("CIDX:", 16, 31), 1507 { "QueueSize:", 4, 15, 4, 0 }, 1508 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1509 FIELD1("QueueEntryOverride:", 1), 1510 FIELD1("CachePriority:", 0), 1511 { NULL } 1512 }; 1513 static struct field_desc ingress_t6[] = { 1514 FIELD1("SP_NS:", 158), 1515 FIELD1("SP_RO:", 157), 1516 FIELD1("SP_TPHintEn:", 156), 1517 FIELD("SP_TPHint:", 154, 155), 1518 FIELD("DCA_ST:", 143, 153), 1519 FIELD1("ISCSICoalescing:", 142), 1520 FIELD1("Queue_Valid:", 141), 1521 FIELD1("TimerPending:", 140), 1522 FIELD1("DropRSS:", 139), 1523 FIELD("PCIeChannel:", 137, 138), 1524 FIELD1("SEInterruptArmed:", 136), 1525 FIELD1("CongestionMgtEnable:", 135), 1526 FIELD1("NoSnoop:", 134), 1527 FIELD1("RelaxedOrdering:", 133), 1528 FIELD1("GTSmode:", 132), 1529 FIELD1("TPHintEn:", 131), 1530 FIELD("TPHint:", 129, 130), 1531 FIELD1("UpdateScheduling:", 128), 1532 FIELD("UpdateDelivery:", 126, 127), 1533 FIELD1("InterruptSent:", 125), 1534 FIELD("InterruptIDX:", 114, 124), 1535 FIELD1("InterruptDestination:", 113), 1536 FIELD1("InterruptArmed:", 112), 1537 FIELD("RxIntCounter:", 106, 111), 1538 FIELD("RxIntCounterThreshold:", 104, 105), 1539 FIELD1("Generation:", 103), 1540 { "BaseAddress:", 48, 102, 9, 1 }, 1541 FIELD("PIDX:", 32, 47), 1542 FIELD("CIDX:", 16, 31), 1543 { "QueueSize:", 4, 15, 4, 0 }, 1544 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1545 FIELD1("QueueEntryOverride:", 1), 1546 FIELD1("CachePriority:", 0), 1547 { NULL } 1548 }; 1549 static struct field_desc flm_t5[] = { 1550 FIELD1("Valid:", 89), 1551 FIELD("SplitLenMode:", 87, 88), 1552 FIELD1("TPHintEn:", 86), 1553 FIELD("TPHint:", 84, 85), 1554 FIELD1("NoSnoop:", 83), 1555 FIELD1("RelaxedOrdering:", 82), 1556 FIELD("DCA_ST:", 71, 81), 1557 FIELD("EQid:", 54, 70), 1558 FIELD("SplitEn:", 52, 53), 1559 FIELD1("PadEn:", 51), 1560 FIELD1("PackEn:", 50), 1561 FIELD1("Cache_Lock :", 49), 1562 FIELD1("CongDrop:", 48), 1563 FIELD("PackOffset:", 16, 47), 1564 FIELD("CIDX:", 8, 15), 1565 FIELD("PIDX:", 0, 7), 1566 { NULL } 1567 }; 1568 static struct field_desc flm_t6[] = { 1569 FIELD1("Valid:", 89), 1570 FIELD("SplitLenMode:", 87, 88), 1571 FIELD1("TPHintEn:", 86), 1572 FIELD("TPHint:", 84, 85), 1573 FIELD1("NoSnoop:", 83), 1574 FIELD1("RelaxedOrdering:", 82), 1575 FIELD("DCA_ST:", 71, 81), 1576 FIELD("EQid:", 54, 70), 1577 FIELD("SplitEn:", 52, 53), 1578 FIELD1("PadEn:", 51), 1579 FIELD1("PackEn:", 50), 1580 FIELD1("Cache_Lock :", 49), 1581 FIELD1("CongDrop:", 48), 1582 FIELD1("Inflight:", 47), 1583 FIELD1("CongEn:", 46), 1584 FIELD1("CongMode:", 45), 1585 FIELD("PackOffset:", 20, 39), 1586 FIELD("CIDX:", 8, 15), 1587 FIELD("PIDX:", 0, 7), 1588 { NULL } 1589 }; 1590 static struct field_desc conm_t5[] = { 1591 FIELD1("CngMPSEnable:", 21), 1592 FIELD("CngTPMode:", 19, 20), 1593 FIELD1("CngDBPHdr:", 18), 1594 FIELD1("CngDBPData:", 17), 1595 FIELD1("CngIMSG:", 16), 1596 { "CngChMap:", 0, 15, 0, 1, 0 }, 1597 { NULL } 1598 }; 1599 1600 if (p->mem_id == SGE_CONTEXT_EGRESS) { 1601 if (p->data[0] & 2) 1602 show_struct(p->data, 6, fl_t5); 1603 else if (vers == 5) 1604 show_struct(p->data, 6, egress_t5); 1605 else 1606 show_struct(p->data, 6, egress_t6); 1607 } else if (p->mem_id == SGE_CONTEXT_FLM) 1608 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6); 1609 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1610 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6); 1611 else if (p->mem_id == SGE_CONTEXT_CNM) 1612 show_struct(p->data, 1, conm_t5); 1613 } 1614 1615 static void 1616 show_t4_ctxt(const struct t4_sge_context *p) 1617 { 1618 static struct field_desc egress_t4[] = { 1619 FIELD1("StatusPgNS:", 180), 1620 FIELD1("StatusPgRO:", 179), 1621 FIELD1("FetchNS:", 178), 1622 FIELD1("FetchRO:", 177), 1623 FIELD1("Valid:", 176), 1624 FIELD("PCIeDataChannel:", 174, 175), 1625 FIELD1("DCAEgrQEn:", 173), 1626 FIELD("DCACPUID:", 168, 172), 1627 FIELD1("FCThreshOverride:", 167), 1628 FIELD("WRLength:", 162, 166), 1629 FIELD1("WRLengthKnown:", 161), 1630 FIELD1("ReschedulePending:", 160), 1631 FIELD1("OnChipQueue:", 159), 1632 FIELD1("FetchSizeMode", 158), 1633 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1634 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1635 FIELD("uPToken:", 133, 152), 1636 FIELD1("uPTokenEn:", 132), 1637 FIELD1("UserModeIO:", 131), 1638 FIELD("uPFLCredits:", 123, 130), 1639 FIELD1("uPFLCreditEn:", 122), 1640 FIELD("FID:", 111, 121), 1641 FIELD("HostFCMode:", 109, 110), 1642 FIELD1("HostFCOwner:", 108), 1643 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1644 FIELD("CIDX:", 89, 104), 1645 FIELD("PIDX:", 73, 88), 1646 { "BaseAddress:", 18, 72, 9, 1 }, 1647 FIELD("QueueSize:", 2, 17), 1648 FIELD1("QueueType:", 1), 1649 FIELD1("CachePriority:", 0), 1650 { NULL } 1651 }; 1652 static struct field_desc fl_t4[] = { 1653 FIELD1("StatusPgNS:", 180), 1654 FIELD1("StatusPgRO:", 179), 1655 FIELD1("FetchNS:", 178), 1656 FIELD1("FetchRO:", 177), 1657 FIELD1("Valid:", 176), 1658 FIELD("PCIeDataChannel:", 174, 175), 1659 FIELD1("DCAEgrQEn:", 173), 1660 FIELD("DCACPUID:", 168, 172), 1661 FIELD1("FCThreshOverride:", 167), 1662 FIELD1("ReschedulePending:", 160), 1663 FIELD1("OnChipQueue:", 159), 1664 FIELD1("FetchSizeMode", 158), 1665 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1666 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1667 FIELD1("FLMcongMode:", 152), 1668 FIELD("MaxuPFLCredits:", 144, 151), 1669 FIELD("FLMcontextID:", 133, 143), 1670 FIELD1("uPTokenEn:", 132), 1671 FIELD1("UserModeIO:", 131), 1672 FIELD("uPFLCredits:", 123, 130), 1673 FIELD1("uPFLCreditEn:", 122), 1674 FIELD("FID:", 111, 121), 1675 FIELD("HostFCMode:", 109, 110), 1676 FIELD1("HostFCOwner:", 108), 1677 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1678 FIELD("CIDX:", 89, 104), 1679 FIELD("PIDX:", 73, 88), 1680 { "BaseAddress:", 18, 72, 9, 1 }, 1681 FIELD("QueueSize:", 2, 17), 1682 FIELD1("QueueType:", 1), 1683 FIELD1("CachePriority:", 0), 1684 { NULL } 1685 }; 1686 static struct field_desc ingress_t4[] = { 1687 FIELD1("NoSnoop:", 145), 1688 FIELD1("RelaxedOrdering:", 144), 1689 FIELD1("GTSmode:", 143), 1690 FIELD1("ISCSICoalescing:", 142), 1691 FIELD1("Valid:", 141), 1692 FIELD1("TimerPending:", 140), 1693 FIELD1("DropRSS:", 139), 1694 FIELD("PCIeChannel:", 137, 138), 1695 FIELD1("SEInterruptArmed:", 136), 1696 FIELD1("CongestionMgtEnable:", 135), 1697 FIELD1("DCAIngQEnable:", 134), 1698 FIELD("DCACPUID:", 129, 133), 1699 FIELD1("UpdateScheduling:", 128), 1700 FIELD("UpdateDelivery:", 126, 127), 1701 FIELD1("InterruptSent:", 125), 1702 FIELD("InterruptIDX:", 114, 124), 1703 FIELD1("InterruptDestination:", 113), 1704 FIELD1("InterruptArmed:", 112), 1705 FIELD("RxIntCounter:", 106, 111), 1706 FIELD("RxIntCounterThreshold:", 104, 105), 1707 FIELD1("Generation:", 103), 1708 { "BaseAddress:", 48, 102, 9, 1 }, 1709 FIELD("PIDX:", 32, 47), 1710 FIELD("CIDX:", 16, 31), 1711 { "QueueSize:", 4, 15, 4, 0 }, 1712 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1713 FIELD1("QueueEntryOverride:", 1), 1714 FIELD1("CachePriority:", 0), 1715 { NULL } 1716 }; 1717 static struct field_desc flm_t4[] = { 1718 FIELD1("NoSnoop:", 79), 1719 FIELD1("RelaxedOrdering:", 78), 1720 FIELD1("Valid:", 77), 1721 FIELD("DCACPUID:", 72, 76), 1722 FIELD1("DCAFLEn:", 71), 1723 FIELD("EQid:", 54, 70), 1724 FIELD("SplitEn:", 52, 53), 1725 FIELD1("PadEn:", 51), 1726 FIELD1("PackEn:", 50), 1727 FIELD1("DBpriority:", 48), 1728 FIELD("PackOffset:", 16, 47), 1729 FIELD("CIDX:", 8, 15), 1730 FIELD("PIDX:", 0, 7), 1731 { NULL } 1732 }; 1733 static struct field_desc conm_t4[] = { 1734 FIELD1("CngDBPHdr:", 6), 1735 FIELD1("CngDBPData:", 5), 1736 FIELD1("CngIMSG:", 4), 1737 { "CngChMap:", 0, 3, 0, 1, 0}, 1738 { NULL } 1739 }; 1740 1741 if (p->mem_id == SGE_CONTEXT_EGRESS) 1742 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4); 1743 else if (p->mem_id == SGE_CONTEXT_FLM) 1744 show_struct(p->data, 3, flm_t4); 1745 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1746 show_struct(p->data, 5, ingress_t4); 1747 else if (p->mem_id == SGE_CONTEXT_CNM) 1748 show_struct(p->data, 1, conm_t4); 1749 } 1750 1751 #undef FIELD 1752 #undef FIELD1 1753 1754 static int 1755 get_sge_context(int argc, const char *argv[]) 1756 { 1757 int rc; 1758 char *p; 1759 long cid; 1760 struct t4_sge_context cntxt = {0}; 1761 1762 if (argc != 2) { 1763 warnx("sge_context: incorrect number of arguments."); 1764 return (EINVAL); 1765 } 1766 1767 if (!strcmp(argv[0], "egress")) 1768 cntxt.mem_id = SGE_CONTEXT_EGRESS; 1769 else if (!strcmp(argv[0], "ingress")) 1770 cntxt.mem_id = SGE_CONTEXT_INGRESS; 1771 else if (!strcmp(argv[0], "fl")) 1772 cntxt.mem_id = SGE_CONTEXT_FLM; 1773 else if (!strcmp(argv[0], "cong")) 1774 cntxt.mem_id = SGE_CONTEXT_CNM; 1775 else { 1776 warnx("unknown context type \"%s\"; known types are egress, " 1777 "ingress, fl, and cong.", argv[0]); 1778 return (EINVAL); 1779 } 1780 1781 p = str_to_number(argv[1], &cid, NULL); 1782 if (*p) { 1783 warnx("invalid context id \"%s\"", argv[1]); 1784 return (EINVAL); 1785 } 1786 cntxt.cid = cid; 1787 1788 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt); 1789 if (rc != 0) 1790 return (rc); 1791 1792 if (chip_id == 4) 1793 show_t4_ctxt(&cntxt); 1794 else 1795 show_t5t6_ctxt(&cntxt, chip_id); 1796 1797 return (0); 1798 } 1799 1800 static int 1801 loadfw(int argc, const char *argv[]) 1802 { 1803 int rc, fd; 1804 struct t4_data data = {0}; 1805 const char *fname = argv[0]; 1806 struct stat st = {0}; 1807 1808 if (argc != 1) { 1809 warnx("loadfw: incorrect number of arguments."); 1810 return (EINVAL); 1811 } 1812 1813 fd = open(fname, O_RDONLY); 1814 if (fd < 0) { 1815 warn("open(%s)", fname); 1816 return (errno); 1817 } 1818 1819 if (fstat(fd, &st) < 0) { 1820 warn("fstat"); 1821 close(fd); 1822 return (errno); 1823 } 1824 1825 data.len = st.st_size; 1826 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 1827 if (data.data == MAP_FAILED) { 1828 warn("mmap"); 1829 close(fd); 1830 return (errno); 1831 } 1832 1833 rc = doit(CHELSIO_T4_LOAD_FW, &data); 1834 munmap(data.data, data.len); 1835 close(fd); 1836 return (rc); 1837 } 1838 1839 static int 1840 loadcfg(int argc, const char *argv[]) 1841 { 1842 int rc, fd; 1843 struct t4_data data = {0}; 1844 const char *fname = argv[0]; 1845 struct stat st = {0}; 1846 1847 if (argc != 1) { 1848 warnx("loadcfg: incorrect number of arguments."); 1849 return (EINVAL); 1850 } 1851 1852 if (strcmp(fname, "clear") == 0) 1853 return (doit(CHELSIO_T4_LOAD_CFG, &data)); 1854 1855 fd = open(fname, O_RDONLY); 1856 if (fd < 0) { 1857 warn("open(%s)", fname); 1858 return (errno); 1859 } 1860 1861 if (fstat(fd, &st) < 0) { 1862 warn("fstat"); 1863 close(fd); 1864 return (errno); 1865 } 1866 1867 data.len = st.st_size; 1868 data.len &= ~3; /* Clip off to make it a multiple of 4 */ 1869 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 1870 if (data.data == MAP_FAILED) { 1871 warn("mmap"); 1872 close(fd); 1873 return (errno); 1874 } 1875 1876 rc = doit(CHELSIO_T4_LOAD_CFG, &data); 1877 munmap(data.data, data.len); 1878 close(fd); 1879 return (rc); 1880 } 1881 1882 static int 1883 read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t)) 1884 { 1885 int rc; 1886 struct t4_mem_range mr; 1887 1888 mr.addr = addr; 1889 mr.len = len; 1890 mr.data = malloc(mr.len); 1891 1892 if (mr.data == 0) { 1893 warn("read_mem: malloc"); 1894 return (errno); 1895 } 1896 1897 rc = doit(CHELSIO_T4_GET_MEM, &mr); 1898 if (rc != 0) 1899 goto done; 1900 1901 if (output) 1902 (*output)(mr.data, mr.len); 1903 done: 1904 free(mr.data); 1905 return (rc); 1906 } 1907 1908 /* 1909 * Display memory as list of 'n' 4-byte values per line. 1910 */ 1911 static void 1912 show_mem(uint32_t *buf, uint32_t len) 1913 { 1914 const char *s; 1915 int i, n = 8; 1916 1917 while (len) { 1918 for (i = 0; len && i < n; i++, buf++, len -= 4) { 1919 s = i ? " " : ""; 1920 printf("%s%08x", s, htonl(*buf)); 1921 } 1922 printf("\n"); 1923 } 1924 } 1925 1926 static int 1927 memdump(int argc, const char *argv[]) 1928 { 1929 char *p; 1930 long l; 1931 uint32_t addr, len; 1932 1933 if (argc != 2) { 1934 warnx("incorrect number of arguments."); 1935 return (EINVAL); 1936 } 1937 1938 p = str_to_number(argv[0], &l, NULL); 1939 if (*p) { 1940 warnx("invalid address \"%s\"", argv[0]); 1941 return (EINVAL); 1942 } 1943 addr = l; 1944 1945 p = str_to_number(argv[1], &l, NULL); 1946 if (*p) { 1947 warnx("memdump: invalid length \"%s\"", argv[1]); 1948 return (EINVAL); 1949 } 1950 len = l; 1951 1952 return (read_mem(addr, len, show_mem)); 1953 } 1954 1955 /* 1956 * Display TCB as list of 'n' 4-byte values per line. 1957 */ 1958 static void 1959 show_tcb(uint32_t *buf, uint32_t len) 1960 { 1961 const char *s; 1962 int i, n = 8; 1963 1964 while (len) { 1965 for (i = 0; len && i < n; i++, buf++, len -= 4) { 1966 s = i ? " " : ""; 1967 printf("%s%08x", s, htonl(*buf)); 1968 } 1969 printf("\n"); 1970 } 1971 } 1972 1973 #define A_TP_CMM_TCB_BASE 0x7d10 1974 #define TCB_SIZE 128 1975 static int 1976 read_tcb(int argc, const char *argv[]) 1977 { 1978 char *p; 1979 long l; 1980 long long val; 1981 unsigned int tid; 1982 uint32_t addr; 1983 int rc; 1984 1985 if (argc != 1) { 1986 warnx("incorrect number of arguments."); 1987 return (EINVAL); 1988 } 1989 1990 p = str_to_number(argv[0], &l, NULL); 1991 if (*p) { 1992 warnx("invalid tid \"%s\"", argv[0]); 1993 return (EINVAL); 1994 } 1995 tid = l; 1996 1997 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val); 1998 if (rc != 0) 1999 return (rc); 2000 2001 addr = val + tid * TCB_SIZE; 2002 2003 return (read_mem(addr, TCB_SIZE, show_tcb)); 2004 } 2005 2006 static int 2007 read_i2c(int argc, const char *argv[]) 2008 { 2009 char *p; 2010 long l; 2011 struct t4_i2c_data i2cd; 2012 int rc, i; 2013 2014 if (argc < 3 || argc > 4) { 2015 warnx("incorrect number of arguments."); 2016 return (EINVAL); 2017 } 2018 2019 p = str_to_number(argv[0], &l, NULL); 2020 if (*p || l > UCHAR_MAX) { 2021 warnx("invalid port id \"%s\"", argv[0]); 2022 return (EINVAL); 2023 } 2024 i2cd.port_id = l; 2025 2026 p = str_to_number(argv[1], &l, NULL); 2027 if (*p || l > UCHAR_MAX) { 2028 warnx("invalid i2c device address \"%s\"", argv[1]); 2029 return (EINVAL); 2030 } 2031 i2cd.dev_addr = l; 2032 2033 p = str_to_number(argv[2], &l, NULL); 2034 if (*p || l > UCHAR_MAX) { 2035 warnx("invalid byte offset \"%s\"", argv[2]); 2036 return (EINVAL); 2037 } 2038 i2cd.offset = l; 2039 2040 if (argc == 4) { 2041 p = str_to_number(argv[3], &l, NULL); 2042 if (*p || l > sizeof(i2cd.data)) { 2043 warnx("invalid number of bytes \"%s\"", argv[3]); 2044 return (EINVAL); 2045 } 2046 i2cd.len = l; 2047 } else 2048 i2cd.len = 1; 2049 2050 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2051 if (rc != 0) 2052 return (rc); 2053 2054 for (i = 0; i < i2cd.len; i++) 2055 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]); 2056 2057 return (0); 2058 } 2059 2060 static int 2061 clearstats(int argc, const char *argv[]) 2062 { 2063 char *p; 2064 long l; 2065 uint32_t port; 2066 2067 if (argc != 1) { 2068 warnx("incorrect number of arguments."); 2069 return (EINVAL); 2070 } 2071 2072 p = str_to_number(argv[0], &l, NULL); 2073 if (*p) { 2074 warnx("invalid port id \"%s\"", argv[0]); 2075 return (EINVAL); 2076 } 2077 port = l; 2078 2079 return doit(CHELSIO_T4_CLEAR_STATS, &port); 2080 } 2081 2082 static int 2083 show_tracers(void) 2084 { 2085 struct t4_tracer t; 2086 char *s; 2087 int rc, port_idx, i; 2088 long long val; 2089 2090 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */ 2091 rc = read_reg(0x9800, 4, &val); 2092 if (rc != 0) 2093 return (rc); 2094 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED"); 2095 2096 t.idx = 0; 2097 for (t.idx = 0; ; t.idx++) { 2098 rc = doit(CHELSIO_T4_GET_TRACER, &t); 2099 if (rc != 0 || t.idx == 0xff) 2100 break; 2101 2102 if (t.tp.port < 4) { 2103 s = "Rx"; 2104 port_idx = t.tp.port; 2105 } else if (t.tp.port < 8) { 2106 s = "Tx"; 2107 port_idx = t.tp.port - 4; 2108 } else if (t.tp.port < 12) { 2109 s = "loopback"; 2110 port_idx = t.tp.port - 8; 2111 } else if (t.tp.port < 16) { 2112 s = "MPS Rx"; 2113 port_idx = t.tp.port - 12; 2114 } else if (t.tp.port < 20) { 2115 s = "MPS Tx"; 2116 port_idx = t.tp.port - 16; 2117 } else { 2118 s = "unknown"; 2119 port_idx = t.tp.port; 2120 } 2121 2122 printf("\ntracer %u (currently %s) captures ", t.idx, 2123 t.enabled ? "ENABLED" : "DISABLED"); 2124 if (t.tp.port < 8) 2125 printf("port %u %s, ", port_idx, s); 2126 else 2127 printf("%s %u, ", s, port_idx); 2128 printf("snap length: %u, min length: %u\n", t.tp.snap_len, 2129 t.tp.min_len); 2130 printf("packets captured %smatch filter\n", 2131 t.tp.invert ? "do not " : ""); 2132 if (t.tp.skip_ofst) { 2133 printf("filter pattern: "); 2134 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2135 printf("%08x%08x", t.tp.data[i], 2136 t.tp.data[i + 1]); 2137 printf("/"); 2138 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2139 printf("%08x%08x", t.tp.mask[i], 2140 t.tp.mask[i + 1]); 2141 printf("@0\n"); 2142 } 2143 printf("filter pattern: "); 2144 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2145 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]); 2146 printf("/"); 2147 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2148 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]); 2149 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8); 2150 } 2151 2152 return (rc); 2153 } 2154 2155 static int 2156 tracer_onoff(uint8_t idx, int enabled) 2157 { 2158 struct t4_tracer t; 2159 2160 t.idx = idx; 2161 t.enabled = enabled; 2162 t.valid = 0; 2163 2164 return doit(CHELSIO_T4_SET_TRACER, &t); 2165 } 2166 2167 static void 2168 create_tracing_ifnet() 2169 { 2170 char *cmd[] = { 2171 "/sbin/ifconfig", __DECONST(char *, nexus), "create", NULL 2172 }; 2173 char *env[] = {NULL}; 2174 2175 if (vfork() == 0) { 2176 close(STDERR_FILENO); 2177 execve(cmd[0], cmd, env); 2178 _exit(0); 2179 } 2180 } 2181 2182 /* 2183 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted 2184 * matching). Right now this is a quick-n-dirty implementation that traces the 2185 * first 128B of all tx or rx on a port 2186 */ 2187 static int 2188 set_tracer(uint8_t idx, int argc, const char *argv[]) 2189 { 2190 struct t4_tracer t; 2191 int len, port; 2192 2193 bzero(&t, sizeof (t)); 2194 t.idx = idx; 2195 t.enabled = 1; 2196 t.valid = 1; 2197 2198 if (argc != 1) { 2199 warnx("must specify tx<n> or rx<n>."); 2200 return (EINVAL); 2201 } 2202 2203 len = strlen(argv[0]); 2204 if (len != 3) { 2205 warnx("argument must be 3 characters (tx<n> or rx<n>)"); 2206 return (EINVAL); 2207 } 2208 2209 if (strncmp(argv[0], "tx", 2) == 0) { 2210 port = argv[0][2] - '0'; 2211 if (port < 0 || port > 3) { 2212 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2213 return (EINVAL); 2214 } 2215 port += 4; 2216 } else if (strncmp(argv[0], "rx", 2) == 0) { 2217 port = argv[0][2] - '0'; 2218 if (port < 0 || port > 3) { 2219 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2220 return (EINVAL); 2221 } 2222 } else { 2223 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]); 2224 return (EINVAL); 2225 } 2226 2227 t.tp.snap_len = 128; 2228 t.tp.min_len = 0; 2229 t.tp.skip_ofst = 0; 2230 t.tp.skip_len = 0; 2231 t.tp.invert = 0; 2232 t.tp.port = port; 2233 2234 create_tracing_ifnet(); 2235 return doit(CHELSIO_T4_SET_TRACER, &t); 2236 } 2237 2238 static int 2239 tracer_cmd(int argc, const char *argv[]) 2240 { 2241 long long val; 2242 uint8_t idx; 2243 char *s; 2244 2245 if (argc == 0) { 2246 warnx("tracer: no arguments."); 2247 return (EINVAL); 2248 }; 2249 2250 /* list */ 2251 if (strcmp(argv[0], "list") == 0) { 2252 if (argc != 1) 2253 warnx("trailing arguments after \"list\" ignored."); 2254 2255 return show_tracers(); 2256 } 2257 2258 /* <idx> ... */ 2259 s = str_to_number(argv[0], NULL, &val); 2260 if (*s || val > 0xff) { 2261 warnx("\"%s\" is neither an index nor a tracer subcommand.", 2262 argv[0]); 2263 return (EINVAL); 2264 } 2265 idx = (int8_t)val; 2266 2267 /* <idx> disable */ 2268 if (argc == 2 && strcmp(argv[1], "disable") == 0) 2269 return tracer_onoff(idx, 0); 2270 2271 /* <idx> enable */ 2272 if (argc == 2 && strcmp(argv[1], "enable") == 0) 2273 return tracer_onoff(idx, 1); 2274 2275 /* <idx> ... */ 2276 return set_tracer(idx, argc - 1, argv + 1); 2277 } 2278 2279 static int 2280 modinfo_raw(int port_id) 2281 { 2282 uint8_t offset; 2283 struct t4_i2c_data i2cd; 2284 int rc; 2285 2286 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) { 2287 bzero(&i2cd, sizeof(i2cd)); 2288 i2cd.port_id = port_id; 2289 i2cd.dev_addr = 0xa0; 2290 i2cd.offset = offset; 2291 i2cd.len = sizeof(i2cd.data); 2292 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2293 if (rc != 0) 2294 return (rc); 2295 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x", 2296 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2], 2297 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6], 2298 i2cd.data[7]); 2299 2300 printf(" %c%c%c%c %c%c%c%c\n", 2301 isprint(i2cd.data[0]) ? i2cd.data[0] : '.', 2302 isprint(i2cd.data[1]) ? i2cd.data[1] : '.', 2303 isprint(i2cd.data[2]) ? i2cd.data[2] : '.', 2304 isprint(i2cd.data[3]) ? i2cd.data[3] : '.', 2305 isprint(i2cd.data[4]) ? i2cd.data[4] : '.', 2306 isprint(i2cd.data[5]) ? i2cd.data[5] : '.', 2307 isprint(i2cd.data[6]) ? i2cd.data[6] : '.', 2308 isprint(i2cd.data[7]) ? i2cd.data[7] : '.'); 2309 } 2310 2311 return (0); 2312 } 2313 2314 static int 2315 modinfo(int argc, const char *argv[]) 2316 { 2317 long port; 2318 char string[16], *p; 2319 struct t4_i2c_data i2cd; 2320 int rc, i; 2321 uint16_t temp, vcc, tx_bias, tx_power, rx_power; 2322 2323 if (argc < 1) { 2324 warnx("must supply a port"); 2325 return (EINVAL); 2326 } 2327 2328 if (argc > 2) { 2329 warnx("too many arguments"); 2330 return (EINVAL); 2331 } 2332 2333 p = str_to_number(argv[0], &port, NULL); 2334 if (*p || port > UCHAR_MAX) { 2335 warnx("invalid port id \"%s\"", argv[0]); 2336 return (EINVAL); 2337 } 2338 2339 if (argc == 2) { 2340 if (!strcmp(argv[1], "raw")) 2341 return (modinfo_raw(port)); 2342 else { 2343 warnx("second argument can only be \"raw\""); 2344 return (EINVAL); 2345 } 2346 } 2347 2348 bzero(&i2cd, sizeof(i2cd)); 2349 i2cd.len = 1; 2350 i2cd.port_id = port; 2351 i2cd.dev_addr = SFF_8472_BASE; 2352 2353 i2cd.offset = SFF_8472_ID; 2354 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2355 goto fail; 2356 2357 if (i2cd.data[0] > SFF_8472_ID_LAST) 2358 printf("Unknown ID\n"); 2359 else 2360 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]); 2361 2362 bzero(&string, sizeof(string)); 2363 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) { 2364 i2cd.offset = i; 2365 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2366 goto fail; 2367 string[i - SFF_8472_VENDOR_START] = i2cd.data[0]; 2368 } 2369 printf("Vendor %s\n", string); 2370 2371 bzero(&string, sizeof(string)); 2372 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) { 2373 i2cd.offset = i; 2374 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2375 goto fail; 2376 string[i - SFF_8472_SN_START] = i2cd.data[0]; 2377 } 2378 printf("SN %s\n", string); 2379 2380 bzero(&string, sizeof(string)); 2381 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) { 2382 i2cd.offset = i; 2383 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2384 goto fail; 2385 string[i - SFF_8472_PN_START] = i2cd.data[0]; 2386 } 2387 printf("PN %s\n", string); 2388 2389 bzero(&string, sizeof(string)); 2390 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) { 2391 i2cd.offset = i; 2392 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2393 goto fail; 2394 string[i - SFF_8472_REV_START] = i2cd.data[0]; 2395 } 2396 printf("Rev %s\n", string); 2397 2398 i2cd.offset = SFF_8472_DIAG_TYPE; 2399 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2400 goto fail; 2401 2402 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL | 2403 SFF_8472_DIAG_INTERNAL)) { 2404 2405 /* Switch to reading from the Diagnostic address. */ 2406 i2cd.dev_addr = SFF_8472_DIAG; 2407 i2cd.len = 1; 2408 2409 i2cd.offset = SFF_8472_TEMP; 2410 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2411 goto fail; 2412 temp = i2cd.data[0] << 8; 2413 printf("Temp: "); 2414 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN) 2415 printf("-"); 2416 else 2417 printf("+"); 2418 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >> 2419 SFF_8472_TEMP_SHIFT); 2420 2421 i2cd.offset = SFF_8472_VCC; 2422 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2423 goto fail; 2424 vcc = i2cd.data[0] << 8; 2425 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR); 2426 2427 i2cd.offset = SFF_8472_TX_BIAS; 2428 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2429 goto fail; 2430 tx_bias = i2cd.data[0] << 8; 2431 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR); 2432 2433 i2cd.offset = SFF_8472_TX_POWER; 2434 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2435 goto fail; 2436 tx_power = i2cd.data[0] << 8; 2437 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR); 2438 2439 i2cd.offset = SFF_8472_RX_POWER; 2440 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2441 goto fail; 2442 rx_power = i2cd.data[0] << 8; 2443 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR); 2444 2445 } else 2446 printf("Diagnostics not supported.\n"); 2447 2448 return(0); 2449 2450 fail: 2451 if (rc == EPERM) 2452 warnx("No module/cable in port %ld", port); 2453 return (rc); 2454 2455 } 2456 2457 /* XXX: pass in a low/high and do range checks as well */ 2458 static int 2459 get_sched_param(const char *param, const char *args[], long *val) 2460 { 2461 char *p; 2462 2463 if (strcmp(param, args[0]) != 0) 2464 return (EINVAL); 2465 2466 p = str_to_number(args[1], val, NULL); 2467 if (*p) { 2468 warnx("parameter \"%s\" has bad value \"%s\"", args[0], 2469 args[1]); 2470 return (EINVAL); 2471 } 2472 2473 return (0); 2474 } 2475 2476 static int 2477 sched_class(int argc, const char *argv[]) 2478 { 2479 struct t4_sched_params op; 2480 int errs, i; 2481 2482 memset(&op, 0xff, sizeof(op)); 2483 op.subcmd = -1; 2484 op.type = -1; 2485 if (argc == 0) { 2486 warnx("missing scheduling sub-command"); 2487 return (EINVAL); 2488 } 2489 if (!strcmp(argv[0], "config")) { 2490 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG; 2491 op.u.config.minmax = -1; 2492 } else if (!strcmp(argv[0], "params")) { 2493 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS; 2494 op.u.params.level = op.u.params.mode = op.u.params.rateunit = 2495 op.u.params.ratemode = op.u.params.channel = 2496 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate = 2497 op.u.params.weight = op.u.params.pktsize = -1; 2498 } else { 2499 warnx("invalid scheduling sub-command \"%s\"", argv[0]); 2500 return (EINVAL); 2501 } 2502 2503 /* Decode remaining arguments ... */ 2504 errs = 0; 2505 for (i = 1; i < argc; i += 2) { 2506 const char **args = &argv[i]; 2507 long l; 2508 2509 if (i + 1 == argc) { 2510 warnx("missing argument for \"%s\"", args[0]); 2511 errs++; 2512 break; 2513 } 2514 2515 if (!strcmp(args[0], "type")) { 2516 if (!strcmp(args[1], "packet")) 2517 op.type = SCHED_CLASS_TYPE_PACKET; 2518 else { 2519 warnx("invalid type parameter \"%s\"", args[1]); 2520 errs++; 2521 } 2522 2523 continue; 2524 } 2525 2526 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2527 if(!get_sched_param("minmax", args, &l)) 2528 op.u.config.minmax = (int8_t)l; 2529 else { 2530 warnx("unknown scheduler config parameter " 2531 "\"%s\"", args[0]); 2532 errs++; 2533 } 2534 2535 continue; 2536 } 2537 2538 /* Rest applies only to SUBCMD_PARAMS */ 2539 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS) 2540 continue; 2541 2542 if (!strcmp(args[0], "level")) { 2543 if (!strcmp(args[1], "cl-rl")) 2544 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL; 2545 else if (!strcmp(args[1], "cl-wrr")) 2546 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR; 2547 else if (!strcmp(args[1], "ch-rl")) 2548 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL; 2549 else { 2550 warnx("invalid level parameter \"%s\"", 2551 args[1]); 2552 errs++; 2553 } 2554 } else if (!strcmp(args[0], "mode")) { 2555 if (!strcmp(args[1], "class")) 2556 op.u.params.mode = SCHED_CLASS_MODE_CLASS; 2557 else if (!strcmp(args[1], "flow")) 2558 op.u.params.mode = SCHED_CLASS_MODE_FLOW; 2559 else { 2560 warnx("invalid mode parameter \"%s\"", args[1]); 2561 errs++; 2562 } 2563 } else if (!strcmp(args[0], "rate-unit")) { 2564 if (!strcmp(args[1], "bits")) 2565 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS; 2566 else if (!strcmp(args[1], "pkts")) 2567 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS; 2568 else { 2569 warnx("invalid rate-unit parameter \"%s\"", 2570 args[1]); 2571 errs++; 2572 } 2573 } else if (!strcmp(args[0], "rate-mode")) { 2574 if (!strcmp(args[1], "relative")) 2575 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL; 2576 else if (!strcmp(args[1], "absolute")) 2577 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS; 2578 else { 2579 warnx("invalid rate-mode parameter \"%s\"", 2580 args[1]); 2581 errs++; 2582 } 2583 } else if (!get_sched_param("channel", args, &l)) 2584 op.u.params.channel = (int8_t)l; 2585 else if (!get_sched_param("class", args, &l)) 2586 op.u.params.cl = (int8_t)l; 2587 else if (!get_sched_param("min-rate", args, &l)) 2588 op.u.params.minrate = (int32_t)l; 2589 else if (!get_sched_param("max-rate", args, &l)) 2590 op.u.params.maxrate = (int32_t)l; 2591 else if (!get_sched_param("weight", args, &l)) 2592 op.u.params.weight = (int16_t)l; 2593 else if (!get_sched_param("pkt-size", args, &l)) 2594 op.u.params.pktsize = (int16_t)l; 2595 else { 2596 warnx("unknown scheduler parameter \"%s\"", args[0]); 2597 errs++; 2598 } 2599 } 2600 2601 /* 2602 * Catch some logical fallacies in terms of argument combinations here 2603 * so we can offer more than just the EINVAL return from the driver. 2604 * The driver will be able to catch a lot more issues since it knows 2605 * the specifics of the device hardware capabilities like how many 2606 * channels, classes, etc. the device supports. 2607 */ 2608 if (op.type < 0) { 2609 warnx("sched \"type\" parameter missing"); 2610 errs++; 2611 } 2612 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2613 if (op.u.config.minmax < 0) { 2614 warnx("sched config \"minmax\" parameter missing"); 2615 errs++; 2616 } 2617 } 2618 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) { 2619 if (op.u.params.level < 0) { 2620 warnx("sched params \"level\" parameter missing"); 2621 errs++; 2622 } 2623 if (op.u.params.mode < 0) { 2624 warnx("sched params \"mode\" parameter missing"); 2625 errs++; 2626 } 2627 if (op.u.params.rateunit < 0) { 2628 warnx("sched params \"rate-unit\" parameter missing"); 2629 errs++; 2630 } 2631 if (op.u.params.ratemode < 0) { 2632 warnx("sched params \"rate-mode\" parameter missing"); 2633 errs++; 2634 } 2635 if (op.u.params.channel < 0) { 2636 warnx("sched params \"channel\" missing"); 2637 errs++; 2638 } 2639 if (op.u.params.cl < 0) { 2640 warnx("sched params \"class\" missing"); 2641 errs++; 2642 } 2643 if (op.u.params.maxrate < 0 && 2644 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2645 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2646 warnx("sched params \"max-rate\" missing for " 2647 "rate-limit level"); 2648 errs++; 2649 } 2650 if (op.u.params.weight < 0 && 2651 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR) { 2652 warnx("sched params \"weight\" missing for " 2653 "weighted-round-robin level"); 2654 errs++; 2655 } 2656 if (op.u.params.pktsize < 0 && 2657 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2658 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2659 warnx("sched params \"pkt-size\" missing for " 2660 "rate-limit level"); 2661 errs++; 2662 } 2663 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW && 2664 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) { 2665 warnx("sched params mode flow needs rate-mode absolute"); 2666 errs++; 2667 } 2668 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL && 2669 !in_range(op.u.params.maxrate, 1, 100)) { 2670 warnx("sched params \"max-rate\" takes " 2671 "percentage value(1-100) for rate-mode relative"); 2672 errs++; 2673 } 2674 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS && 2675 !in_range(op.u.params.maxrate, 1, 100000000)) { 2676 warnx("sched params \"max-rate\" takes " 2677 "value(1-100000000) for rate-mode absolute"); 2678 errs++; 2679 } 2680 if (op.u.params.maxrate > 0 && 2681 op.u.params.maxrate < op.u.params.minrate) { 2682 warnx("sched params \"max-rate\" is less than " 2683 "\"min-rate\""); 2684 errs++; 2685 } 2686 } 2687 2688 if (errs > 0) { 2689 warnx("%d error%s in sched-class command", errs, 2690 errs == 1 ? "" : "s"); 2691 return (EINVAL); 2692 } 2693 2694 return doit(CHELSIO_T4_SCHED_CLASS, &op); 2695 } 2696 2697 static int 2698 sched_queue(int argc, const char *argv[]) 2699 { 2700 struct t4_sched_queue op = {0}; 2701 char *p; 2702 long val; 2703 2704 if (argc != 3) { 2705 /* need "<port> <queue> <class> */ 2706 warnx("incorrect number of arguments."); 2707 return (EINVAL); 2708 } 2709 2710 p = str_to_number(argv[0], &val, NULL); 2711 if (*p || val > UCHAR_MAX) { 2712 warnx("invalid port id \"%s\"", argv[0]); 2713 return (EINVAL); 2714 } 2715 op.port = (uint8_t)val; 2716 2717 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*")) 2718 op.queue = -1; 2719 else { 2720 p = str_to_number(argv[1], &val, NULL); 2721 if (*p || val < -1) { 2722 warnx("invalid queue \"%s\"", argv[1]); 2723 return (EINVAL); 2724 } 2725 op.queue = (int8_t)val; 2726 } 2727 2728 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear")) 2729 op.cl = -1; 2730 else { 2731 p = str_to_number(argv[2], &val, NULL); 2732 if (*p || val < -1) { 2733 warnx("invalid class \"%s\"", argv[2]); 2734 return (EINVAL); 2735 } 2736 op.cl = (int8_t)val; 2737 } 2738 2739 return doit(CHELSIO_T4_SCHED_QUEUE, &op); 2740 } 2741 2742 static int 2743 run_cmd(int argc, const char *argv[]) 2744 { 2745 int rc = -1; 2746 const char *cmd = argv[0]; 2747 2748 /* command */ 2749 argc--; 2750 argv++; 2751 2752 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32")) 2753 rc = register_io(argc, argv, 4); 2754 else if (!strcmp(cmd, "reg64")) 2755 rc = register_io(argc, argv, 8); 2756 else if (!strcmp(cmd, "regdump")) 2757 rc = dump_regs(argc, argv); 2758 else if (!strcmp(cmd, "filter")) 2759 rc = filter_cmd(argc, argv); 2760 else if (!strcmp(cmd, "context")) 2761 rc = get_sge_context(argc, argv); 2762 else if (!strcmp(cmd, "loadfw")) 2763 rc = loadfw(argc, argv); 2764 else if (!strcmp(cmd, "memdump")) 2765 rc = memdump(argc, argv); 2766 else if (!strcmp(cmd, "tcb")) 2767 rc = read_tcb(argc, argv); 2768 else if (!strcmp(cmd, "i2c")) 2769 rc = read_i2c(argc, argv); 2770 else if (!strcmp(cmd, "clearstats")) 2771 rc = clearstats(argc, argv); 2772 else if (!strcmp(cmd, "tracer")) 2773 rc = tracer_cmd(argc, argv); 2774 else if (!strcmp(cmd, "modinfo")) 2775 rc = modinfo(argc, argv); 2776 else if (!strcmp(cmd, "sched-class")) 2777 rc = sched_class(argc, argv); 2778 else if (!strcmp(cmd, "sched-queue")) 2779 rc = sched_queue(argc, argv); 2780 else if (!strcmp(cmd, "loadcfg")) 2781 rc = loadcfg(argc, argv); 2782 else { 2783 rc = EINVAL; 2784 warnx("invalid command \"%s\"", cmd); 2785 } 2786 2787 return (rc); 2788 } 2789 2790 #define MAX_ARGS 15 2791 static int 2792 run_cmd_loop(void) 2793 { 2794 int i, rc = 0; 2795 char buffer[128], *buf; 2796 const char *args[MAX_ARGS + 1]; 2797 2798 /* 2799 * Simple loop: displays a "> " prompt and processes any input as a 2800 * cxgbetool command. You're supposed to enter only the part after 2801 * "cxgbetool t4nexX". Use "quit" or "exit" to exit. 2802 */ 2803 for (;;) { 2804 fprintf(stdout, "> "); 2805 fflush(stdout); 2806 buf = fgets(buffer, sizeof(buffer), stdin); 2807 if (buf == NULL) { 2808 if (ferror(stdin)) { 2809 warn("stdin error"); 2810 rc = errno; /* errno from fgets */ 2811 } 2812 break; 2813 } 2814 2815 i = 0; 2816 while ((args[i] = strsep(&buf, " \t\n")) != NULL) { 2817 if (args[i][0] != 0 && ++i == MAX_ARGS) 2818 break; 2819 } 2820 args[i] = 0; 2821 2822 if (i == 0) 2823 continue; /* skip empty line */ 2824 2825 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit")) 2826 break; 2827 2828 rc = run_cmd(i, args); 2829 } 2830 2831 /* rc normally comes from the last command (not including quit/exit) */ 2832 return (rc); 2833 } 2834 2835 int 2836 main(int argc, const char *argv[]) 2837 { 2838 int rc = -1; 2839 2840 progname = argv[0]; 2841 2842 if (argc == 2) { 2843 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) { 2844 usage(stdout); 2845 exit(0); 2846 } 2847 } 2848 2849 if (argc < 3) { 2850 usage(stderr); 2851 exit(EINVAL); 2852 } 2853 2854 nexus = argv[1]; 2855 2856 /* progname and nexus */ 2857 argc -= 2; 2858 argv += 2; 2859 2860 if (argc == 1 && !strcmp(argv[0], "stdio")) 2861 rc = run_cmd_loop(); 2862 else 2863 rc = run_cmd(argc, argv); 2864 2865 return (rc); 2866 } 2867