14c87aefeSPatrick Mooney /*- 24c87aefeSPatrick Mooney * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 34c87aefeSPatrick Mooney * 44c87aefeSPatrick Mooney * Copyright (c) 2014 Leon Dang <ldang@nahannisys.com> 54c87aefeSPatrick Mooney * All rights reserved. 64c87aefeSPatrick Mooney * 74c87aefeSPatrick Mooney * Redistribution and use in source and binary forms, with or without 84c87aefeSPatrick Mooney * modification, are permitted provided that the following conditions 94c87aefeSPatrick Mooney * are met: 104c87aefeSPatrick Mooney * 1. Redistributions of source code must retain the above copyright 114c87aefeSPatrick Mooney * notice, this list of conditions and the following disclaimer. 124c87aefeSPatrick Mooney * 2. Redistributions in binary form must reproduce the above copyright 134c87aefeSPatrick Mooney * notice, this list of conditions and the following disclaimer in the 144c87aefeSPatrick Mooney * documentation and/or other materials provided with the distribution. 154c87aefeSPatrick Mooney * 164c87aefeSPatrick Mooney * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 174c87aefeSPatrick Mooney * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 184c87aefeSPatrick Mooney * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 194c87aefeSPatrick Mooney * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 204c87aefeSPatrick Mooney * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 214c87aefeSPatrick Mooney * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 224c87aefeSPatrick Mooney * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 234c87aefeSPatrick Mooney * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 244c87aefeSPatrick Mooney * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 254c87aefeSPatrick Mooney * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 264c87aefeSPatrick Mooney * SUCH DAMAGE. 274c87aefeSPatrick Mooney * 284c87aefeSPatrick Mooney * $FreeBSD$ 294c87aefeSPatrick Mooney */ 304c87aefeSPatrick Mooney 314c87aefeSPatrick Mooney #ifndef _PCI_XHCI_H_ 324c87aefeSPatrick Mooney #define _PCI_XHCI_H_ 334c87aefeSPatrick Mooney 344c87aefeSPatrick Mooney #define PCI_USBREV 0x60 /* USB protocol revision */ 354c87aefeSPatrick Mooney 364c87aefeSPatrick Mooney 374c87aefeSPatrick Mooney enum { /* dsc_slotstate */ 384c87aefeSPatrick Mooney XHCI_ST_DISABLED, 394c87aefeSPatrick Mooney XHCI_ST_ENABLED, 404c87aefeSPatrick Mooney XHCI_ST_DEFAULT, 414c87aefeSPatrick Mooney XHCI_ST_ADDRESSED, 424c87aefeSPatrick Mooney XHCI_ST_CONFIGURED, 434c87aefeSPatrick Mooney XHCI_ST_MAX 444c87aefeSPatrick Mooney }; 454c87aefeSPatrick Mooney 464c87aefeSPatrick Mooney enum { 474c87aefeSPatrick Mooney XHCI_ST_SLCTX_DISABLED, 484c87aefeSPatrick Mooney XHCI_ST_SLCTX_DEFAULT, 494c87aefeSPatrick Mooney XHCI_ST_SLCTX_ADDRESSED, 504c87aefeSPatrick Mooney XHCI_ST_SLCTX_CONFIGURED 514c87aefeSPatrick Mooney }; 524c87aefeSPatrick Mooney 534c87aefeSPatrick Mooney enum { 544c87aefeSPatrick Mooney XHCI_ST_EPCTX_DISABLED, 554c87aefeSPatrick Mooney XHCI_ST_EPCTX_RUNNING, 564c87aefeSPatrick Mooney XHCI_ST_EPCTX_HALTED, 574c87aefeSPatrick Mooney XHCI_ST_EPCTX_STOPPED, 584c87aefeSPatrick Mooney XHCI_ST_EPCTX_ERROR 594c87aefeSPatrick Mooney }; 604c87aefeSPatrick Mooney 614c87aefeSPatrick Mooney #define XHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128) 624c87aefeSPatrick Mooney #define XHCI_MAX_ENDPOINTS 32 /* hardcoded - do not change */ 634c87aefeSPatrick Mooney #define XHCI_MAX_SCRATCHPADS 32 644c87aefeSPatrick Mooney #define XHCI_MAX_EVENTS (16 * 13) 654c87aefeSPatrick Mooney #define XHCI_MAX_COMMANDS (16 * 1) 664c87aefeSPatrick Mooney #define XHCI_MAX_RSEG 1 674c87aefeSPatrick Mooney #define XHCI_MAX_TRANSFERS 4 684c87aefeSPatrick Mooney #if USB_MAX_EP_STREAMS == 8 694c87aefeSPatrick Mooney #define XHCI_MAX_STREAMS 8 704c87aefeSPatrick Mooney #define XHCI_MAX_STREAMS_LOG 3 714c87aefeSPatrick Mooney #elif USB_MAX_EP_STREAMS == 1 724c87aefeSPatrick Mooney #define XHCI_MAX_STREAMS 1 734c87aefeSPatrick Mooney #define XHCI_MAX_STREAMS_LOG 0 744c87aefeSPatrick Mooney #else 754c87aefeSPatrick Mooney #error "The USB_MAX_EP_STREAMS value is not supported." 764c87aefeSPatrick Mooney #endif 774c87aefeSPatrick Mooney #define XHCI_DEV_CTX_ADDR_ALIGN 64 /* bytes */ 784c87aefeSPatrick Mooney #define XHCI_DEV_CTX_ALIGN 64 /* bytes */ 794c87aefeSPatrick Mooney #define XHCI_INPUT_CTX_ALIGN 64 /* bytes */ 804c87aefeSPatrick Mooney #define XHCI_SLOT_CTX_ALIGN 32 /* bytes */ 814c87aefeSPatrick Mooney #define XHCI_ENDP_CTX_ALIGN 32 /* bytes */ 824c87aefeSPatrick Mooney #define XHCI_STREAM_CTX_ALIGN 16 /* bytes */ 834c87aefeSPatrick Mooney #define XHCI_TRANS_RING_SEG_ALIGN 16 /* bytes */ 844c87aefeSPatrick Mooney #define XHCI_CMD_RING_SEG_ALIGN 64 /* bytes */ 854c87aefeSPatrick Mooney #define XHCI_EVENT_RING_SEG_ALIGN 64 /* bytes */ 864c87aefeSPatrick Mooney #define XHCI_SCRATCH_BUF_ARRAY_ALIGN 64 /* bytes */ 874c87aefeSPatrick Mooney #define XHCI_SCRATCH_BUFFER_ALIGN USB_PAGE_SIZE 884c87aefeSPatrick Mooney #define XHCI_TRB_ALIGN 16 /* bytes */ 894c87aefeSPatrick Mooney #define XHCI_TD_ALIGN 64 /* bytes */ 904c87aefeSPatrick Mooney #define XHCI_PAGE_SIZE 4096 /* bytes */ 914c87aefeSPatrick Mooney 924c87aefeSPatrick Mooney struct xhci_slot_ctx { 93*59d65d31SAndy Fiddaman uint32_t dwSctx0; 944c87aefeSPatrick Mooney #define XHCI_SCTX_0_ROUTE_SET(x) ((x) & 0xFFFFF) 954c87aefeSPatrick Mooney #define XHCI_SCTX_0_ROUTE_GET(x) ((x) & 0xFFFFF) 964c87aefeSPatrick Mooney #define XHCI_SCTX_0_SPEED_SET(x) (((x) & 0xF) << 20) 974c87aefeSPatrick Mooney #define XHCI_SCTX_0_SPEED_GET(x) (((x) >> 20) & 0xF) 984c87aefeSPatrick Mooney #define XHCI_SCTX_0_MTT_SET(x) (((x) & 0x1) << 25) 994c87aefeSPatrick Mooney #define XHCI_SCTX_0_MTT_GET(x) (((x) >> 25) & 0x1) 1004c87aefeSPatrick Mooney #define XHCI_SCTX_0_HUB_SET(x) (((x) & 0x1) << 26) 1014c87aefeSPatrick Mooney #define XHCI_SCTX_0_HUB_GET(x) (((x) >> 26) & 0x1) 1024c87aefeSPatrick Mooney #define XHCI_SCTX_0_CTX_NUM_SET(x) (((x) & 0x1F) << 27) 1034c87aefeSPatrick Mooney #define XHCI_SCTX_0_CTX_NUM_GET(x) (((x) >> 27) & 0x1F) 104*59d65d31SAndy Fiddaman uint32_t dwSctx1; 1054c87aefeSPatrick Mooney #define XHCI_SCTX_1_MAX_EL_SET(x) ((x) & 0xFFFF) 1064c87aefeSPatrick Mooney #define XHCI_SCTX_1_MAX_EL_GET(x) ((x) & 0xFFFF) 1074c87aefeSPatrick Mooney #define XHCI_SCTX_1_RH_PORT_SET(x) (((x) & 0xFF) << 16) 1084c87aefeSPatrick Mooney #define XHCI_SCTX_1_RH_PORT_GET(x) (((x) >> 16) & 0xFF) 1094c87aefeSPatrick Mooney #define XHCI_SCTX_1_NUM_PORTS_SET(x) (((x) & 0xFF) << 24) 1104c87aefeSPatrick Mooney #define XHCI_SCTX_1_NUM_PORTS_GET(x) (((x) >> 24) & 0xFF) 111*59d65d31SAndy Fiddaman uint32_t dwSctx2; 1124c87aefeSPatrick Mooney #define XHCI_SCTX_2_TT_HUB_SID_SET(x) ((x) & 0xFF) 1134c87aefeSPatrick Mooney #define XHCI_SCTX_2_TT_HUB_SID_GET(x) ((x) & 0xFF) 1144c87aefeSPatrick Mooney #define XHCI_SCTX_2_TT_PORT_NUM_SET(x) (((x) & 0xFF) << 8) 1154c87aefeSPatrick Mooney #define XHCI_SCTX_2_TT_PORT_NUM_GET(x) (((x) >> 8) & 0xFF) 1164c87aefeSPatrick Mooney #define XHCI_SCTX_2_TT_THINK_TIME_SET(x) (((x) & 0x3) << 16) 1174c87aefeSPatrick Mooney #define XHCI_SCTX_2_TT_THINK_TIME_GET(x) (((x) >> 16) & 0x3) 1184c87aefeSPatrick Mooney #define XHCI_SCTX_2_IRQ_TARGET_SET(x) (((x) & 0x3FF) << 22) 1194c87aefeSPatrick Mooney #define XHCI_SCTX_2_IRQ_TARGET_GET(x) (((x) >> 22) & 0x3FF) 120*59d65d31SAndy Fiddaman uint32_t dwSctx3; 1214c87aefeSPatrick Mooney #define XHCI_SCTX_3_DEV_ADDR_SET(x) ((x) & 0xFF) 1224c87aefeSPatrick Mooney #define XHCI_SCTX_3_DEV_ADDR_GET(x) ((x) & 0xFF) 1234c87aefeSPatrick Mooney #define XHCI_SCTX_3_SLOT_STATE_SET(x) (((x) & 0x1F) << 27) 1244c87aefeSPatrick Mooney #define XHCI_SCTX_3_SLOT_STATE_GET(x) (((x) >> 27) & 0x1F) 125*59d65d31SAndy Fiddaman uint32_t dwSctx4; 126*59d65d31SAndy Fiddaman uint32_t dwSctx5; 127*59d65d31SAndy Fiddaman uint32_t dwSctx6; 128*59d65d31SAndy Fiddaman uint32_t dwSctx7; 1294c87aefeSPatrick Mooney }; 1304c87aefeSPatrick Mooney 1314c87aefeSPatrick Mooney struct xhci_endp_ctx { 132*59d65d31SAndy Fiddaman uint32_t dwEpCtx0; 1334c87aefeSPatrick Mooney #define XHCI_EPCTX_0_EPSTATE_SET(x) ((x) & 0x7) 1344c87aefeSPatrick Mooney #define XHCI_EPCTX_0_EPSTATE_GET(x) ((x) & 0x7) 1354c87aefeSPatrick Mooney #define XHCI_EPCTX_0_MULT_SET(x) (((x) & 0x3) << 8) 1364c87aefeSPatrick Mooney #define XHCI_EPCTX_0_MULT_GET(x) (((x) >> 8) & 0x3) 1374c87aefeSPatrick Mooney #define XHCI_EPCTX_0_MAXP_STREAMS_SET(x) (((x) & 0x1F) << 10) 1384c87aefeSPatrick Mooney #define XHCI_EPCTX_0_MAXP_STREAMS_GET(x) (((x) >> 10) & 0x1F) 1394c87aefeSPatrick Mooney #define XHCI_EPCTX_0_LSA_SET(x) (((x) & 0x1) << 15) 1404c87aefeSPatrick Mooney #define XHCI_EPCTX_0_LSA_GET(x) (((x) >> 15) & 0x1) 1414c87aefeSPatrick Mooney #define XHCI_EPCTX_0_IVAL_SET(x) (((x) & 0xFF) << 16) 1424c87aefeSPatrick Mooney #define XHCI_EPCTX_0_IVAL_GET(x) (((x) >> 16) & 0xFF) 143*59d65d31SAndy Fiddaman uint32_t dwEpCtx1; 1444c87aefeSPatrick Mooney #define XHCI_EPCTX_1_CERR_SET(x) (((x) & 0x3) << 1) 1454c87aefeSPatrick Mooney #define XHCI_EPCTX_1_CERR_GET(x) (((x) >> 1) & 0x3) 1464c87aefeSPatrick Mooney #define XHCI_EPCTX_1_EPTYPE_SET(x) (((x) & 0x7) << 3) 1474c87aefeSPatrick Mooney #define XHCI_EPCTX_1_EPTYPE_GET(x) (((x) >> 3) & 0x7) 1484c87aefeSPatrick Mooney #define XHCI_EPCTX_1_HID_SET(x) (((x) & 0x1) << 7) 1494c87aefeSPatrick Mooney #define XHCI_EPCTX_1_HID_GET(x) (((x) >> 7) & 0x1) 1504c87aefeSPatrick Mooney #define XHCI_EPCTX_1_MAXB_SET(x) (((x) & 0xFF) << 8) 1514c87aefeSPatrick Mooney #define XHCI_EPCTX_1_MAXB_GET(x) (((x) >> 8) & 0xFF) 1524c87aefeSPatrick Mooney #define XHCI_EPCTX_1_MAXP_SIZE_SET(x) (((x) & 0xFFFF) << 16) 1534c87aefeSPatrick Mooney #define XHCI_EPCTX_1_MAXP_SIZE_GET(x) (((x) >> 16) & 0xFFFF) 154*59d65d31SAndy Fiddaman uint64_t qwEpCtx2; 1554c87aefeSPatrick Mooney #define XHCI_EPCTX_2_DCS_SET(x) ((x) & 0x1) 1564c87aefeSPatrick Mooney #define XHCI_EPCTX_2_DCS_GET(x) ((x) & 0x1) 1574c87aefeSPatrick Mooney #define XHCI_EPCTX_2_TR_DQ_PTR_MASK 0xFFFFFFFFFFFFFFF0U 158*59d65d31SAndy Fiddaman uint32_t dwEpCtx4; 1594c87aefeSPatrick Mooney #define XHCI_EPCTX_4_AVG_TRB_LEN_SET(x) ((x) & 0xFFFF) 1604c87aefeSPatrick Mooney #define XHCI_EPCTX_4_AVG_TRB_LEN_GET(x) ((x) & 0xFFFF) 1614c87aefeSPatrick Mooney #define XHCI_EPCTX_4_MAX_ESIT_PAYLOAD_SET(x) (((x) & 0xFFFF) << 16) 1624c87aefeSPatrick Mooney #define XHCI_EPCTX_4_MAX_ESIT_PAYLOAD_GET(x) (((x) >> 16) & 0xFFFF) 163*59d65d31SAndy Fiddaman uint32_t dwEpCtx5; 164*59d65d31SAndy Fiddaman uint32_t dwEpCtx6; 165*59d65d31SAndy Fiddaman uint32_t dwEpCtx7; 1664c87aefeSPatrick Mooney }; 1674c87aefeSPatrick Mooney 1684c87aefeSPatrick Mooney struct xhci_input_ctx { 1694c87aefeSPatrick Mooney #define XHCI_INCTX_NON_CTRL_MASK 0xFFFFFFFCU 170*59d65d31SAndy Fiddaman uint32_t dwInCtx0; 1714c87aefeSPatrick Mooney #define XHCI_INCTX_0_DROP_MASK(n) (1U << (n)) 172*59d65d31SAndy Fiddaman uint32_t dwInCtx1; 1734c87aefeSPatrick Mooney #define XHCI_INCTX_1_ADD_MASK(n) (1U << (n)) 174*59d65d31SAndy Fiddaman uint32_t dwInCtx2; 175*59d65d31SAndy Fiddaman uint32_t dwInCtx3; 176*59d65d31SAndy Fiddaman uint32_t dwInCtx4; 177*59d65d31SAndy Fiddaman uint32_t dwInCtx5; 178*59d65d31SAndy Fiddaman uint32_t dwInCtx6; 179*59d65d31SAndy Fiddaman uint32_t dwInCtx7; 1804c87aefeSPatrick Mooney }; 1814c87aefeSPatrick Mooney 1824c87aefeSPatrick Mooney struct xhci_input_dev_ctx { 1834c87aefeSPatrick Mooney struct xhci_input_ctx ctx_input; 1844c87aefeSPatrick Mooney union { 1854c87aefeSPatrick Mooney struct xhci_slot_ctx u_slot; 1864c87aefeSPatrick Mooney struct xhci_endp_ctx u_ep[XHCI_MAX_ENDPOINTS]; 1874c87aefeSPatrick Mooney } ctx_dev_slep; 1884c87aefeSPatrick Mooney }; 1894c87aefeSPatrick Mooney 1904c87aefeSPatrick Mooney struct xhci_dev_ctx { 1914c87aefeSPatrick Mooney union { 1924c87aefeSPatrick Mooney struct xhci_slot_ctx u_slot; 1934c87aefeSPatrick Mooney struct xhci_endp_ctx u_ep[XHCI_MAX_ENDPOINTS]; 1944c87aefeSPatrick Mooney } ctx_dev_slep; 1954c87aefeSPatrick Mooney } __aligned(XHCI_DEV_CTX_ALIGN); 1964c87aefeSPatrick Mooney #define ctx_slot ctx_dev_slep.u_slot 1974c87aefeSPatrick Mooney #define ctx_ep ctx_dev_slep.u_ep 1984c87aefeSPatrick Mooney 1994c87aefeSPatrick Mooney struct xhci_stream_ctx { 200*59d65d31SAndy Fiddaman uint64_t qwSctx0; 2014c87aefeSPatrick Mooney #define XHCI_SCTX_0_DCS_GET(x) ((x) & 0x1) 2024c87aefeSPatrick Mooney #define XHCI_SCTX_0_DCS_SET(x) ((x) & 0x1) 2034c87aefeSPatrick Mooney #define XHCI_SCTX_0_SCT_SET(x) (((x) & 0x7) << 1) 2044c87aefeSPatrick Mooney #define XHCI_SCTX_0_SCT_GET(x) (((x) >> 1) & 0x7) 2054c87aefeSPatrick Mooney #define XHCI_SCTX_0_SCT_SEC_TR_RING 0x0 2064c87aefeSPatrick Mooney #define XHCI_SCTX_0_SCT_PRIM_TR_RING 0x1 2074c87aefeSPatrick Mooney #define XHCI_SCTX_0_SCT_PRIM_SSA_8 0x2 2084c87aefeSPatrick Mooney #define XHCI_SCTX_0_SCT_PRIM_SSA_16 0x3 2094c87aefeSPatrick Mooney #define XHCI_SCTX_0_SCT_PRIM_SSA_32 0x4 2104c87aefeSPatrick Mooney #define XHCI_SCTX_0_SCT_PRIM_SSA_64 0x5 2114c87aefeSPatrick Mooney #define XHCI_SCTX_0_SCT_PRIM_SSA_128 0x6 2124c87aefeSPatrick Mooney #define XHCI_SCTX_0_SCT_PRIM_SSA_256 0x7 2134c87aefeSPatrick Mooney #define XHCI_SCTX_0_TR_DQ_PTR_MASK 0xFFFFFFFFFFFFFFF0U 214*59d65d31SAndy Fiddaman uint32_t dwSctx2; 215*59d65d31SAndy Fiddaman uint32_t dwSctx3; 2164c87aefeSPatrick Mooney }; 2174c87aefeSPatrick Mooney 2184c87aefeSPatrick Mooney struct xhci_trb { 219*59d65d31SAndy Fiddaman uint64_t qwTrb0; 2204c87aefeSPatrick Mooney #define XHCI_TRB_0_DIR_IN_MASK (0x80ULL << 0) 2214c87aefeSPatrick Mooney #define XHCI_TRB_0_WLENGTH_MASK (0xFFFFULL << 48) 222*59d65d31SAndy Fiddaman uint32_t dwTrb2; 2234c87aefeSPatrick Mooney #define XHCI_TRB_2_ERROR_GET(x) (((x) >> 24) & 0xFF) 2244c87aefeSPatrick Mooney #define XHCI_TRB_2_ERROR_SET(x) (((x) & 0xFF) << 24) 2254c87aefeSPatrick Mooney #define XHCI_TRB_2_TDSZ_GET(x) (((x) >> 17) & 0x1F) 2264c87aefeSPatrick Mooney #define XHCI_TRB_2_TDSZ_SET(x) (((x) & 0x1F) << 17) 2274c87aefeSPatrick Mooney #define XHCI_TRB_2_REM_GET(x) ((x) & 0xFFFFFF) 2284c87aefeSPatrick Mooney #define XHCI_TRB_2_REM_SET(x) ((x) & 0xFFFFFF) 2294c87aefeSPatrick Mooney #define XHCI_TRB_2_BYTES_GET(x) ((x) & 0x1FFFF) 2304c87aefeSPatrick Mooney #define XHCI_TRB_2_BYTES_SET(x) ((x) & 0x1FFFF) 2314c87aefeSPatrick Mooney #define XHCI_TRB_2_IRQ_GET(x) (((x) >> 22) & 0x3FF) 2324c87aefeSPatrick Mooney #define XHCI_TRB_2_IRQ_SET(x) (((x) & 0x3FF) << 22) 2334c87aefeSPatrick Mooney #define XHCI_TRB_2_STREAM_GET(x) (((x) >> 16) & 0xFFFF) 2344c87aefeSPatrick Mooney #define XHCI_TRB_2_STREAM_SET(x) (((x) & 0xFFFF) << 16) 2354c87aefeSPatrick Mooney 236*59d65d31SAndy Fiddaman uint32_t dwTrb3; 2374c87aefeSPatrick Mooney #define XHCI_TRB_3_TYPE_GET(x) (((x) >> 10) & 0x3F) 2384c87aefeSPatrick Mooney #define XHCI_TRB_3_TYPE_SET(x) (((x) & 0x3F) << 10) 2394c87aefeSPatrick Mooney #define XHCI_TRB_3_CYCLE_BIT (1U << 0) 2404c87aefeSPatrick Mooney #define XHCI_TRB_3_TC_BIT (1U << 1) /* command ring only */ 2414c87aefeSPatrick Mooney #define XHCI_TRB_3_ENT_BIT (1U << 1) /* transfer ring only */ 2424c87aefeSPatrick Mooney #define XHCI_TRB_3_ISP_BIT (1U << 2) 2434c87aefeSPatrick Mooney #define XHCI_TRB_3_ED_BIT (1U << 2) 2444c87aefeSPatrick Mooney #define XHCI_TRB_3_NSNOOP_BIT (1U << 3) 2454c87aefeSPatrick Mooney #define XHCI_TRB_3_CHAIN_BIT (1U << 4) 2464c87aefeSPatrick Mooney #define XHCI_TRB_3_IOC_BIT (1U << 5) 2474c87aefeSPatrick Mooney #define XHCI_TRB_3_IDT_BIT (1U << 6) 2484c87aefeSPatrick Mooney #define XHCI_TRB_3_TBC_GET(x) (((x) >> 7) & 3) 2494c87aefeSPatrick Mooney #define XHCI_TRB_3_TBC_SET(x) (((x) & 3) << 7) 2504c87aefeSPatrick Mooney #define XHCI_TRB_3_BEI_BIT (1U << 9) 2514c87aefeSPatrick Mooney #define XHCI_TRB_3_DCEP_BIT (1U << 9) 2524c87aefeSPatrick Mooney #define XHCI_TRB_3_PRSV_BIT (1U << 9) 2534c87aefeSPatrick Mooney #define XHCI_TRB_3_BSR_BIT (1U << 9) 2544c87aefeSPatrick Mooney #define XHCI_TRB_3_TRT_MASK (3U << 16) 2554c87aefeSPatrick Mooney #define XHCI_TRB_3_TRT_NONE (0U << 16) 2564c87aefeSPatrick Mooney #define XHCI_TRB_3_TRT_OUT (2U << 16) 2574c87aefeSPatrick Mooney #define XHCI_TRB_3_TRT_IN (3U << 16) 2584c87aefeSPatrick Mooney #define XHCI_TRB_3_DIR_IN (1U << 16) 2594c87aefeSPatrick Mooney #define XHCI_TRB_3_TLBPC_GET(x) (((x) >> 16) & 0xF) 2604c87aefeSPatrick Mooney #define XHCI_TRB_3_TLBPC_SET(x) (((x) & 0xF) << 16) 2614c87aefeSPatrick Mooney #define XHCI_TRB_3_EP_GET(x) (((x) >> 16) & 0x1F) 2624c87aefeSPatrick Mooney #define XHCI_TRB_3_EP_SET(x) (((x) & 0x1F) << 16) 2634c87aefeSPatrick Mooney #define XHCI_TRB_3_FRID_GET(x) (((x) >> 20) & 0x7FF) 2644c87aefeSPatrick Mooney #define XHCI_TRB_3_FRID_SET(x) (((x) & 0x7FF) << 20) 2654c87aefeSPatrick Mooney #define XHCI_TRB_3_ISO_SIA_BIT (1U << 31) 2664c87aefeSPatrick Mooney #define XHCI_TRB_3_SUSP_EP_BIT (1U << 23) 2674c87aefeSPatrick Mooney #define XHCI_TRB_3_SLOT_GET(x) (((x) >> 24) & 0xFF) 2684c87aefeSPatrick Mooney #define XHCI_TRB_3_SLOT_SET(x) (((x) & 0xFF) << 24) 2694c87aefeSPatrick Mooney 2704c87aefeSPatrick Mooney /* Commands */ 2714c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_RESERVED 0x00 2724c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_NORMAL 0x01 2734c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_SETUP_STAGE 0x02 2744c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_DATA_STAGE 0x03 2754c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_STATUS_STAGE 0x04 2764c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_ISOCH 0x05 2774c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_LINK 0x06 2784c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_EVENT_DATA 0x07 2794c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_NOOP 0x08 2804c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_ENABLE_SLOT 0x09 2814c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_DISABLE_SLOT 0x0A 2824c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_ADDRESS_DEVICE 0x0B 2834c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_CONFIGURE_EP 0x0C 2844c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_EVALUATE_CTX 0x0D 2854c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_RESET_EP 0x0E 2864c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_STOP_EP 0x0F 2874c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_SET_TR_DEQUEUE 0x10 2884c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_RESET_DEVICE 0x11 2894c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_FORCE_EVENT 0x12 2904c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_NEGOTIATE_BW 0x13 2914c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_SET_LATENCY_TOL 0x14 2924c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_GET_PORT_BW 0x15 2934c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_FORCE_HEADER 0x16 2944c87aefeSPatrick Mooney #define XHCI_TRB_TYPE_NOOP_CMD 0x17 2954c87aefeSPatrick Mooney 2964c87aefeSPatrick Mooney /* Events */ 2974c87aefeSPatrick Mooney #define XHCI_TRB_EVENT_TRANSFER 0x20 2984c87aefeSPatrick Mooney #define XHCI_TRB_EVENT_CMD_COMPLETE 0x21 2994c87aefeSPatrick Mooney #define XHCI_TRB_EVENT_PORT_STS_CHANGE 0x22 3004c87aefeSPatrick Mooney #define XHCI_TRB_EVENT_BW_REQUEST 0x23 3014c87aefeSPatrick Mooney #define XHCI_TRB_EVENT_DOORBELL 0x24 3024c87aefeSPatrick Mooney #define XHCI_TRB_EVENT_HOST_CTRL 0x25 3034c87aefeSPatrick Mooney #define XHCI_TRB_EVENT_DEVICE_NOTIFY 0x26 3044c87aefeSPatrick Mooney #define XHCI_TRB_EVENT_MFINDEX_WRAP 0x27 3054c87aefeSPatrick Mooney 3064c87aefeSPatrick Mooney /* Error codes */ 3074c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_INVALID 0x00 3084c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_SUCCESS 0x01 3094c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_DATA_BUF 0x02 3104c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_BABBLE 0x03 3114c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_XACT 0x04 3124c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_TRB 0x05 3134c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_STALL 0x06 3144c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_RESOURCE 0x07 3154c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_BANDWIDTH 0x08 3164c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_NO_SLOTS 0x09 3174c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_STREAM_TYPE 0x0A 3184c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_SLOT_NOT_ON 0x0B 3194c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_ENDP_NOT_ON 0x0C 3204c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_SHORT_PKT 0x0D 3214c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_RING_UNDERRUN 0x0E 3224c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_RING_OVERRUN 0x0F 3234c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_VF_RING_FULL 0x10 3244c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_PARAMETER 0x11 3254c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_BW_OVERRUN 0x12 3264c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_CONTEXT_STATE 0x13 3274c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_NO_PING_RESP 0x14 3284c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_EV_RING_FULL 0x15 3294c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_INCOMPAT_DEV 0x16 3304c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_MISSED_SERVICE 0x17 3314c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_CMD_RING_STOP 0x18 3324c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_CMD_ABORTED 0x19 3334c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_STOPPED 0x1A 3344c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_LENGTH 0x1B 3354c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_BAD_MELAT 0x1D 3364c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_ISOC_OVERRUN 0x1F 3374c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_EVENT_LOST 0x20 3384c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_UNDEFINED 0x21 3394c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_INVALID_SID 0x22 3404c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_SEC_BW 0x23 3414c87aefeSPatrick Mooney #define XHCI_TRB_ERROR_SPLIT_XACT 0x24 3424c87aefeSPatrick Mooney } __aligned(4); 3434c87aefeSPatrick Mooney 3444c87aefeSPatrick Mooney struct xhci_dev_endpoint_trbs { 3454c87aefeSPatrick Mooney struct xhci_trb trb[(XHCI_MAX_STREAMS * 3464c87aefeSPatrick Mooney XHCI_MAX_TRANSFERS) + XHCI_MAX_STREAMS]; 3474c87aefeSPatrick Mooney }; 3484c87aefeSPatrick Mooney 3494c87aefeSPatrick Mooney struct xhci_event_ring_seg { 350*59d65d31SAndy Fiddaman uint64_t qwEvrsTablePtr; 351*59d65d31SAndy Fiddaman uint32_t dwEvrsTableSize; 352*59d65d31SAndy Fiddaman uint32_t dwEvrsReserved; 3534c87aefeSPatrick Mooney }; 3544c87aefeSPatrick Mooney 3554c87aefeSPatrick Mooney #endif /* _PCI_XHCI_H_ */ 356