1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22/* 23 * Copyright 2007 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27#pragma ident "%Z%%M% %I% %E% SMI" 28 29#pragma dictionary "INTEL" 30 31/* 32 * Eversholt rules for the intel CPU/Memory 33 */ 34 35/* CPU errors detected through MCA */ 36 37fru motherboard/chip; 38 39asru motherboard/chip/cpu; 40 41/* 42 * Ereports for Simple error codes. 43 */ 44 45#define SMPL_EVENT(leafclass, t) \ 46 event ereport.cpu.intel.leafclass@chip/cpu { within(t) } 47 48SMPL_EVENT(unknown, 1s); 49SMPL_EVENT(unclassified, 1s); 50SMPL_EVENT(microcode_rom_parity, 1s); 51SMPL_EVENT(external, 1s); 52SMPL_EVENT(frc, 1s); 53SMPL_EVENT(internal_timer, 1s); 54SMPL_EVENT(internal_unclassified, 1s); 55 56/* 57 * Propogations for all but "external" and "unknown" simple errors. 58 * If the error is uncorrected we produce a fault immediately, otherwise 59 * we diagnose it to an upset and decalre a fault when the SERD engine 60 * trips. 61 */ 62 63/* Simple fault event */ 64event fault.cpu.intel.internal@chip/cpu, 65 ASRU=motherboard/chip/cpu, FRU=motherboard/chip, 66 FITrate=1000; 67 68/* Produced when the correctable engine trips */ 69event ereport.cpu.intel.simple_trip@chip/cpu { within(1s) }; 70 71/* Upset to diagnose corrected events to */ 72event upset.cpu.intel.simple@chip/cpu 73 engine=serd.cpu.intel.simple@chip/cpu; 74 75/* SERD engine for corrected simple errors */ 76engine serd.cpu.intel.simple@chip/cpu, 77 N=3, T=72h, method=persistent, 78 trip=ereport.cpu.intel.simple_trip@chip/cpu; 79 80#define STATUS_UC \ 81 (payloadprop("error_uncorrected") + 0 == 1) 82 83/* Diagnose corrected events to upsets */ 84prop upset.cpu.intel.simple@chip/cpu 85 { !STATUS_UC } (1)-> 86 ereport.cpu.intel.microcode_rom_parity@chip/cpu, 87 ereport.cpu.intel.internal_timer@chip/cpu, 88 ereport.cpu.intel.unclassified@chip/cpu, 89 ereport.cpu.intel.internal_unclassified@chip/cpu, 90 ereport.cpu.intel.frc@chip/cpu; 91 92/* When the correctable engine trips, diagnose a fault */ 93prop fault.cpu.intel.internal@chip/cpu (0)-> 94 ereport.cpu.intel.simple_trip@chip/cpu; 95 96/* Diagnose uncorrected events to faults */ 97prop fault.cpu.intel.internal@chip/cpu 98 { STATUS_UC } (0)-> 99 ereport.cpu.intel.microcode_rom_parity@chip/cpu, 100 ereport.cpu.intel.internal_timer@chip/cpu, 101 ereport.cpu.intel.unclassified@chip/cpu, 102 ereport.cpu.intel.internal_unclassified@chip/cpu, 103 ereport.cpu.intel.frc@chip/cpu; 104 105/* 106 * Ereports for Compound error codes. These are in pairs "foo" and "foo_uc" 107 * for the corrected and uncorrected version of each error type. All are 108 * detected at chip/cpu. 109 */ 110 111#define CMPND_EVENT(leafclass, t) \ 112 event ereport.cpu.intel.leafclass@chip/cpu { within(t) }; \ 113 event ereport.cpu.intel.leafclass/**/_uc@chip/cpu { within(t) } 114 115/* 116 * Ereports for Compound error codes - intel errors 117 */ 118CMPND_EVENT(l0cache, 1s); 119CMPND_EVENT(l1cache, 1s); 120CMPND_EVENT(l2cache, 1s); 121CMPND_EVENT(cache, 1s); 122 123/* 124 * Ereports for Compound error codes - TLB errors 125 */ 126CMPND_EVENT(l0dtlb, 1s); 127CMPND_EVENT(l1dtlb, 1s); 128CMPND_EVENT(l2dtlb, 1s); 129CMPND_EVENT(dtlb, 1s); 130 131CMPND_EVENT(l0itlb, 1s); 132CMPND_EVENT(l1itlb, 1s); 133CMPND_EVENT(l2itlb, 1s); 134CMPND_EVENT(itlb, 1s); 135 136CMPND_EVENT(l0tlb, 1s); 137CMPND_EVENT(l1tlb, 1s); 138CMPND_EVENT(l2tlb, 1s); 139CMPND_EVENT(tlb, 1s); 140 141/* 142 * Ereports for Compound error codes - memory hierarchy errors 143 */ 144CMPND_EVENT(l0dcache, 1s); 145CMPND_EVENT(l1dcache, 1s); 146CMPND_EVENT(l2dcache, 1s); 147CMPND_EVENT(dcache, 1s); 148 149CMPND_EVENT(l0icache, 1s); 150CMPND_EVENT(l1icache, 1s); 151CMPND_EVENT(l2icache, 1s); 152CMPND_EVENT(icache, 1s); 153 154/* 155 * Ereports for Compound error codes - bus and interconnect errors 156 */ 157CMPND_EVENT(bus_interconnect, 1s); 158CMPND_EVENT(bus_interconnect_memory, 1s); 159CMPND_EVENT(bus_interconnect_io, 1s); 160 161/* 162 * Compound error propogations. 163 * 164 * We resist the temptation propogate, for example, a single dcache fault 165 * to all ereports mentioning dcache (l0dcache, l1dcache, l2dcache, dcache). 166 * Instead we will diagnose a distinct fault for each possible cache level, 167 * whether or not current chips have dcaches at all levels. 168 * 169 * Corrected errors are SERDed and produce a fault when the engine fires; 170 * the same fault is diagnosed immediately for a corresponding uncorrected 171 * error. 172 */ 173 174#define CMPND_FLT_PROP_1(erptleaf, fltleaf, n, t) \ 175 /* Declare the fault that we can diagnose here */ \ 176 event fault.cpu.intel.fltleaf@chip/cpu, \ 177 FITrate=1000, \ 178 FRU=motherboard/chip, \ 179 ASRU=motherboard/chip/cpu; \ 180 \ 181 /* Produced when the correctable engine trips */ \ 182 event ereport.cpu.intel.fltleaf/**/_error@chip/cpu { within(1s) }; \ 183 \ 184 /* Upset to diagnose corrected events to */ \ 185 event upset.cpu.intel.fltleaf@chip/cpu, \ 186 engine=serd.cpu.intel.fltleaf@chip/cpu; \ 187 \ 188 /* SERD engine for corrected events */ \ 189 engine serd.cpu.intel.fltleaf@chip/cpu, \ 190 N=n, T=t, method=persistent, \ 191 trip=ereport.cpu.intel.fltleaf/**/_error@chip/cpu; \ 192 \ 193 /* Diagnose corrected events to the corresponding upset */ \ 194 prop upset.cpu.intel.fltleaf@chip/cpu (1)-> \ 195 ereport.cpu.intel.erptleaf@chip/cpu; \ 196 \ 197 /* When the engine trip, diagnose a fault */ \ 198 prop fault.cpu.intel.fltleaf@chip/cpu (0)-> \ 199 ereport.cpu.intel.fltleaf/**/_error@chip/cpu; \ 200 \ 201 /* Produce immediate faults for uncorrected errors */ \ 202 prop fault.cpu.intel.fltleaf@chip/cpu (0)-> \ 203 ereport.cpu.intel.erptleaf/**/_uc@chip/cpu 204 205#define CMPND_FLT_PROP_2(erptleaf, fltleaf, n, t) \ 206 /* Declare the fault that we can diagnose here */ \ 207 event fault.cpu.intel.fltleaf@chip/cpu, \ 208 FITrate=1, \ 209 ASRU=motherboard/chip/cpu; \ 210 \ 211 /* Produced when the correctable engine trips */ \ 212 event ereport.cpu.intel.fltleaf/**/_error@chip/cpu { within(1s) }; \ 213 \ 214 /* Upset to diagnose corrected events to */ \ 215 event upset.cpu.intel.fltleaf@chip/cpu, \ 216 engine=serd.cpu.intel.fltleaf@chip/cpu; \ 217 \ 218 /* SERD engine for corrected events */ \ 219 engine serd.cpu.intel.fltleaf@chip/cpu, \ 220 N=n, T=t, method=persistent, \ 221 trip=ereport.cpu.intel.fltleaf/**/_error@chip/cpu; \ 222 \ 223 /* Diagnose corrected events to the corresponding upset */ \ 224 prop upset.cpu.intel.fltleaf@chip/cpu (1)-> \ 225 ereport.cpu.intel.erptleaf@chip/cpu; \ 226 \ 227 /* When the engine trip, diagnose a fault */ \ 228 prop fault.cpu.intel.fltleaf@chip/cpu (0)-> \ 229 ereport.cpu.intel.fltleaf/**/_error@chip/cpu; \ 230 \ 231 /* Produce immediate faults for uncorrected errors */ \ 232 prop fault.cpu.intel.fltleaf@chip/cpu (0)-> \ 233 ereport.cpu.intel.erptleaf/**/_uc@chip/cpu 234 235 236CMPND_FLT_PROP_1(l0cache, l0cache, 3, 72h); 237CMPND_FLT_PROP_1(l1cache, l1cache, 3, 72h); 238CMPND_FLT_PROP_1(l2cache, l2cache, 3, 72h); 239CMPND_FLT_PROP_1(cache, cache, 12, 72h); 240 241CMPND_FLT_PROP_1(l0dtlb, l0dtlb, 3, 72h); 242CMPND_FLT_PROP_1(l1dtlb, l1dtlb, 3, 72h); 243CMPND_FLT_PROP_1(l2dtlb, l2dtlb, 3, 72h); 244CMPND_FLT_PROP_1(dtlb, dtlb, 12, 72h); 245 246CMPND_FLT_PROP_1(l0itlb, l0itlb, 3, 72h); 247CMPND_FLT_PROP_1(l1itlb, l1itlb, 3, 72h); 248CMPND_FLT_PROP_1(l2itlb, l2itlb, 3, 72h); 249CMPND_FLT_PROP_1(itlb, itlb, 12, 72h); 250 251CMPND_FLT_PROP_1(l0tlb, litlb, 3, 72h); 252CMPND_FLT_PROP_1(l1tlb, litlb, 3, 72h); 253CMPND_FLT_PROP_1(l2tlb, litlb, 3, 72h); 254CMPND_FLT_PROP_1(tlb, tlb, 12, 72h); 255 256CMPND_FLT_PROP_1(l0dcache, l0dcache, 3, 72h); 257CMPND_FLT_PROP_1(l1dcache, l1dcache, 3, 72h); 258CMPND_FLT_PROP_1(l2dcache, l2dcache, 3, 72h); 259CMPND_FLT_PROP_1(dcache, dcache, 12, 72h); 260 261CMPND_FLT_PROP_1(l0icache, l0icache, 3, 72h); 262CMPND_FLT_PROP_1(l1icache, l1icache, 3, 72h); 263CMPND_FLT_PROP_1(l2icache, l2icache, 3, 72h); 264CMPND_FLT_PROP_1(icache, icache, 12, 72h); 265 266CMPND_FLT_PROP_2(bus_interconnect, bus_interconnect, 10, 72h); 267CMPND_FLT_PROP_2(bus_interconnect_memory, bus_interconnect_memory, 10, 72h); 268CMPND_FLT_PROP_2(bus_interconnect_io, bus_interconnect_io, 10, 72h); 269 270event upset.discard@chip/cpu; 271 272prop upset.discard@chip/cpu (0)-> 273 ereport.cpu.intel.external@chip/cpu, 274 ereport.cpu.intel.unknown@chip/cpu; 275 276/* errors detected in northbridge */ 277 278 279/* 280 * SET_ADDR and SET_OFFSET are used to set a payload value in the fault that 281 * we diagnose for page faults, to record the physical address of the faulting 282 * page. The "asru-" prefix is hooked in the "rewrite-ASRU" confcalls made on 283 * diagnosis of associated faults when the libtopo mem scheme rewrites the 284 * asru in "mem" scheme. 285 */ 286#define SET_ADDR (!payloadprop_defined("physaddr") || \ 287 setpayloadprop("asru-physaddr", payloadprop("physaddr"))) 288 289#define SET_OFFSET (!payloadprop_defined("offset") || \ 290 setpayloadprop("asru-offset", payloadprop("offset"))) 291 292#define CE_PGFLTS \ 293 (count(stat.ce_pgflt@motherboard/memory-controller/dram-channel/dimm)) 294#define UE_DIMM \ 295 (count(stat.ue_dimm@motherboard/memory-controller/dram-channel/dimm)) 296 297#define PAGE_FIT 1 298#define PAGE_CE_COUNT 2 299#define PAGE_CE_TIME 72h 300 301fru motherboard; 302asru motherboard; 303fru motherboard/memory-controller/dram-channel; 304asru motherboard/memory-controller/dram-channel; 305fru motherboard/memory-controller/dram-channel/dimm; 306asru motherboard/memory-controller/dram-channel/dimm; 307asru motherboard/memory-controller/dram-channel/dimm/rank; 308asru motherboard/chip; 309 310engine stat.ce_pgflt@motherboard/memory-controller/dram-channel/dimm; 311engine stat.ue_dimm@motherboard/memory-controller/dram-channel/dimm; 312 313event ereport.cpu.intel.nb.mem_ue@motherboard/memory-controller{within(12s)}; 314event ereport.cpu.intel.nb.fbd.ma@motherboard/memory-controller{within(12s)}; 315event fault.memory.intel.page_ue@ 316 motherboard/memory-controller/dram-channel/dimm/rank, 317 FITrate=PAGE_FIT, 318 ASRU=motherboard/memory-controller/dram-channel/dimm/rank, message=0, 319 action=confcall("rewrite-ASRU"); /* rewrite ASRU to identify page in rank */ 320event ereport.memory.page_ue_trip@motherboard/memory-controller{within(12s)}; 321engine serd.memory.intel.page_ue@motherboard/memory-controller, 322 N=0, T=1h, method=persistent, 323 trip=ereport.memory.page_ue_trip@motherboard/memory-controller; 324event upset.memory.intel.page_ue@motherboard/memory-controller, 325 engine=serd.memory.intel.page_ue@motherboard/memory-controller; 326 327prop upset.memory.intel.page_ue@motherboard/memory-controller (0)-> 328 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 329 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 330 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 331 ereport.cpu.intel.bus_interconnect@chip/cpu, 332 ereport.cpu.intel.external@chip/cpu; 333 334prop upset.memory.intel.page_ue@motherboard/memory-controller (1)-> 335 ereport.cpu.intel.nb.mem_ue@motherboard/memory-controller, 336 ereport.cpu.intel.nb.fbd.ma@motherboard/memory-controller; 337 338prop fault.memory.intel.page_ue@ 339 motherboard/memory-controller/dram-channel/dimm/rank[rank_num] 340 { UE_DIMM > 0 && payloadprop_defined("rank") && 341 rank_num == payloadprop("rank") && 342 (payloadprop_defined("physaddr") || payloadprop_defined("offset")) && 343 SET_ADDR && SET_OFFSET } (1)-> 344 ereport.cpu.intel.nb.mem_ue@motherboard/memory-controller, 345 ereport.cpu.intel.nb.fbd.ma@motherboard/memory-controller; 346 347prop fault.memory.intel.page_ue@ 348 motherboard/memory-controller/dram-channel/dimm/rank (1)-> 349 ereport.memory.page_ue_trip@motherboard/memory-controller; 350 351event upset.memory.intel.discard@motherboard/memory-controller{within(1s)}; 352 353prop upset.memory.intel.discard@motherboard/memory-controller 354 { !payloadprop_defined("rank") || (!payloadprop_defined("physaddr") && 355 !payloadprop_defined("offset")) } (1)-> 356 ereport.cpu.intel.nb.mem_ue@motherboard/memory-controller, 357 ereport.cpu.intel.nb.fbd.ma@motherboard/memory-controller; 358 359prop upset.memory.intel.discard@motherboard/memory-controller (0)-> 360 ereport.memory.page_ue_trip@motherboard/memory-controller, 361 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 362 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 363 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 364 ereport.cpu.intel.bus_interconnect@chip/cpu, 365 ereport.cpu.intel.external@chip/cpu; 366 367#define DIMM_UE_FIT 1000 368 369event fault.memory.intel.dimm_ue@ 370 motherboard/memory-controller/dram-channel/dimm/rank, 371 FITrate=DIMM_UE_FIT, FRU=motherboard/memory-controller/dram-channel/dimm, 372 ASRU=motherboard/memory-controller/dram-channel/dimm/rank, 373 count=stat.dimm_flt@motherboard/memory-controller/dram-channel/dimm, 374 action=confcall("rewrite-ASRU"); /* rewrite non-leaf ASRU in mem scheme */ 375event ereport.memory.dimm_ue_trip@motherboard/memory-controller{within(12s)}; 376engine serd.memory.intel.dimm_ue@motherboard/memory-controller, 377 N=0, T=1h, method=persistent, 378 trip=ereport.memory.dimm_ue_trip@motherboard/memory-controller; 379event upset.memory.intel.dimm_ue@motherboard/memory-controller, 380 engine=serd.memory.intel.dimm_ue@motherboard/memory-controller; 381 382prop upset.memory.intel.dimm_ue@ motherboard/memory-controller (1)-> 383 ereport.cpu.intel.nb.mem_ue@motherboard/memory-controller, 384 ereport.cpu.intel.nb.fbd.ma@motherboard/memory-controller; 385 386prop fault.memory.intel.dimm_ue@ 387 motherboard/memory-controller/dram-channel<channel_num>/dimm/rank[rank_num] 388 { payloadprop_defined("rank") && rank_num == payloadprop("rank") } (1)-> 389 ereport.cpu.intel.nb.mem_ue@motherboard/memory-controller, 390 ereport.cpu.intel.nb.fbd.ma@motherboard/memory-controller; 391 392prop upset.memory.intel.dimm_ue@ 393 motherboard/memory-controller (0)-> 394 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 395 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 396 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 397 ereport.cpu.intel.bus_interconnect@chip/cpu, 398 ereport.cpu.intel.external@chip/cpu; 399 400prop fault.memory.intel.dimm_ue@ 401 motherboard/memory-controller/dram-channel/dimm/rank (0)-> 402 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 403 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 404 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 405 ereport.cpu.intel.bus_interconnect@chip/cpu, 406 ereport.cpu.intel.external@chip/cpu; 407 408prop fault.memory.intel.dimm_ue@ 409 motherboard/memory-controller/dram-channel/dimm/rank (1)-> 410 ereport.memory.dimm_ue_trip@motherboard/memory-controller; 411 412event upset.memory.intel.discard1@motherboard/memory-controller{within(1s)}; 413 414prop upset.memory.intel.discard1@motherboard/memory-controller 415 { !payloadprop_defined("rank") } (1)-> 416 ereport.cpu.intel.nb.mem_ue@motherboard/memory-controller, 417 ereport.cpu.intel.nb.fbd.ma@motherboard/memory-controller; 418 419prop upset.memory.intel.discard1@motherboard/memory-controller (0)-> 420 ereport.memory.dimm_ue_trip@motherboard/memory-controller, 421 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 422 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 423 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 424 ereport.cpu.intel.bus_interconnect@chip/cpu, 425 ereport.cpu.intel.external@chip/cpu; 426 427event ereport.memory.intel.page_trip@ 428 motherboard/memory-controller/dram-channel/dimm/rank{within(12s)}; 429event ereport.cpu.intel.nb.mem_ce@ 430 motherboard/memory-controller/dram-channel/dimm/rank{within(12s)}; 431 432engine serd.memory.intel.page_ce@ 433 motherboard/memory-controller/dram-channel/dimm/rank, 434 N=PAGE_CE_COUNT, T=PAGE_CE_TIME, method=persistent, 435 trip=ereport.memory.intel.page_trip@ 436 motherboard/memory-controller/dram-channel/dimm/rank; 437event upset.memory.intel.page_ce@ 438 motherboard/memory-controller/dram-channel/dimm/rank, 439 engine=serd.memory.intel.page_ce@ 440 motherboard/memory-controller/dram-channel/dimm/rank; 441 442event fault.memory.intel.page_ce@ 443 motherboard/memory-controller/dram-channel/dimm/rank, 444 FITrate=PAGE_FIT, 445 ASRU=motherboard/memory-controller/dram-channel/dimm/rank, message=0, 446 count=stat.ce_pgflt@motherboard/memory-controller/dram-channel/dimm, 447 action=confcall("rewrite-ASRU"); /* rewrite ASRU to identify page in rank */ 448 449prop fault.memory.intel.page_ce@ 450 motherboard/memory-controller/dram-channel/dimm/rank (1)-> 451 ereport.memory.intel.page_trip@ 452 motherboard/memory-controller/dram-channel/dimm/rank; 453 454prop fault.memory.intel.page_ce@ 455 motherboard/memory-controller/dram-channel/dimm/rank 456 { (payloadprop_defined("physaddr") || payloadprop_defined("offset")) && 457 SET_ADDR && SET_OFFSET } (0)-> 458 ereport.cpu.intel.nb.mem_ce@ 459 motherboard/memory-controller/dram-channel/dimm/rank; 460 461prop upset.memory.intel.page_ce@ 462 motherboard/memory-controller/dram-channel/dimm/rank 463 { (payloadprop_defined("physaddr") || payloadprop_defined("offset")) && 464 SET_ADDR && SET_OFFSET } (1)-> 465 ereport.cpu.intel.nb.mem_ce@ 466 motherboard/memory-controller/dram-channel/dimm/rank; 467 468#define DIMM_CE_FIT 2000 469#define DIMM_CE_COUNT 10 470#define DIMM_CE_TIME 1week 471 472event fault.memory.intel.dimm_ce@ 473 motherboard/memory-controller/dram-channel/dimm/rank, 474 FITrate=DIMM_CE_FIT, FRU=motherboard/memory-controller/dram-channel/dimm, 475 ASRU=motherboard/memory-controller/dram-channel/dimm/rank, 476 action=confcall("rewrite-ASRU"); /* rewrite non-leaf ASRU in mem scheme */ 477event upset.memory.discard@motherboard/memory-controller/dram-channel/dimm/rank; 478 479event ereport.memory.intel.dimm_trip@ 480 motherboard/memory-controller/dram-channel/dimm/rank{within(1s)}; 481#define DIMM_CE(label, dimm_size, n, t, fault_rate) \ 482 engine serd.memory.intel.dimm_ce.label/**/@ \ 483 motherboard/memory-controller/dram-channel/dimm/rank, \ 484 N=n, T=t, method=persistent, \ 485 trip=ereport.memory.intel.dimm_trip@ \ 486 motherboard/memory-controller/dram-channel/dimm/rank; \ 487 event upset.memory.intel.dimm_ce.label/**/@ \ 488 motherboard/memory-controller/dram-channel/dimm/rank, \ 489 engine=serd.memory.intel.dimm_ce.label/**/@ \ 490 motherboard/memory-controller/dram-channel/dimm/rank; \ 491 prop upset.memory.intel.dimm_ce.label/**/@ \ 492 motherboard/memory-controller/dram-channel/dimm/rank \ 493 {confprop_defined( \ 494 fru(motherboard/memory-controller/dram-channel/dimm), \ 495 "dimm-size") && \ 496 confprop(fru(motherboard/memory-controller/dram-channel/dimm), \ 497 "dimm-size") == dimm_size && CE_PGFLTS > fault_rate} (1)-> \ 498 ereport.cpu.intel.nb.mem_ce@ \ 499 motherboard/memory-controller/dram-channel/dimm/rank; 500 501DIMM_CE(eight_g, "8G", 8, 1week, 2000) 502DIMM_CE(four_g, "4G", 4, 1week, 1500) 503DIMM_CE(two_g, "2G", 4, 2week, 1000) 504DIMM_CE(one_g, "1G", 4, 4week, 500) 505DIMM_CE(half_g, "512M", 4, 8week, 250) 506DIMM_CE(quarter_g, "256M", 4, 16week, 125) 507 508engine serd.memory.intel.dimm_ce@ 509 motherboard/memory-controller/dram-channel/dimm/rank, 510 N=DIMM_CE_COUNT, T=DIMM_CE_TIME, method=persistent, 511 trip=ereport.memory.intel.dimm_trip@ 512 motherboard/memory-controller/dram-channel/dimm/rank; 513event upset.memory.intel.dimm_ce@ 514 motherboard/memory-controller/dram-channel/dimm/rank, 515 engine=serd.memory.intel.dimm_ce@ 516 motherboard/memory-controller/dram-channel/dimm/rank; 517prop upset.memory.intel.dimm_ce@ 518 motherboard/memory-controller/dram-channel/dimm/rank 519 {!confprop_defined(fru(motherboard/memory-controller/dram-channel/dimm), 520 "dimm-size") && CE_PGFLTS > 512} (1)-> 521 ereport.cpu.intel.nb.mem_ce@ 522 motherboard/memory-controller/dram-channel/dimm/rank; 523 524prop fault.memory.intel.dimm_ce@ 525 motherboard/memory-controller/dram-channel/dimm/rank (1)-> 526 ereport.memory.intel.dimm_trip@ 527 motherboard/memory-controller/dram-channel/dimm/rank; 528 529prop upset.memory.discard@ 530 motherboard/memory-controller/dram-channel/dimm/rank (1)-> 531 ereport.memory.intel.dimm_trip@ 532 motherboard/memory-controller/dram-channel/dimm/rank; 533 534event ereport.cpu.intel.nb.fbd.alert@ 535 motherboard/memory-controller/dram-channel/dimm/rank{within(12s)}; 536event fault.memory.intel.fbd.alert@ 537 motherboard/memory-controller/dram-channel/dimm/rank, 538 FITrate=100, ASRU=motherboard/memory-controller/dram-channel/dimm/rank, 539 FRU=motherboard/memory-controller/dram-channel/dimm; 540 541prop fault.memory.intel.fbd.alert@ 542 motherboard/memory-controller/dram-channel/dimm/rank (1)-> 543 ereport.cpu.intel.nb.fbd.alert@ 544 motherboard/memory-controller/dram-channel/dimm/rank; 545 546prop fault.memory.intel.fbd.alert@ 547 motherboard/memory-controller/dram-channel/dimm/rank (0)-> 548 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 549 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 550 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 551 ereport.cpu.intel.bus_interconnect@chip/cpu, 552 ereport.cpu.intel.external@chip/cpu; 553 554event ereport.cpu.intel.nb.fbd.crc@ 555 motherboard/memory-controller/dram-channel/dimm/rank{within(12s)}; 556event fault.memory.intel.fbd.crc@ 557 motherboard/memory-controller/dram-channel/dimm/rank, 558 FITrate=100, ASRU=motherboard/memory-controller/dram-channel/dimm/rank, 559 FRU=motherboard/memory-controller/dram-channel/dimm; 560 561prop fault.memory.intel.fbd.crc@ 562 motherboard/memory-controller/dram-channel/dimm/rank (1)-> 563 ereport.cpu.intel.nb.fbd.crc@ 564 motherboard/memory-controller/dram-channel/dimm/rank; 565 566prop fault.memory.intel.fbd.crc@ 567 motherboard/memory-controller/dram-channel/dimm/rank (0)-> 568 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 569 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 570 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 571 ereport.cpu.intel.bus_interconnect@chip/cpu, 572 ereport.cpu.intel.external@chip/cpu; 573 574event ereport.cpu.intel.nb.fbd.reset_timeout@motherboard/memory-controller 575 {within(12s)}; 576event fault.memory.intel.fbd.reset_timeout@motherboard/memory-controller, 577 FITrate=1000, ASRU=motherboard/memory-controller/dram-channel/dimm, 578 FRU=motherboard/memory-controller/dram-channel/dimm; 579 580prop fault.memory.intel.fbd.reset_timeout@motherboard/memory-controller (1)-> 581 ereport.cpu.intel.nb.fbd.reset_timeout@motherboard/memory-controller; 582 583prop fault.memory.intel.fbd.reset_timeout@motherboard/memory-controller (0)-> 584 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 585 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 586 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 587 ereport.cpu.intel.bus_interconnect@chip/cpu, 588 ereport.cpu.intel.external@chip/cpu; 589 590event ereport.cpu.intel.nb.fbd.ch@motherboard/memory-controller/dram-channel 591 {within(12s)}; 592event fault.memory.intel.fbd.ch@motherboard/memory-controller/dram-channel, 593 FITrate=100, ASRU=motherboard/memory-controller/dram-channel/dimm, 594 FRU=motherboard/memory-controller/dram-channel/dimm; 595event upset.cpu.intel.nb.fbd.ch@motherboard/memory-controller/dram-channel, 596 engine=serd.cpu.intel.nb.fbd.ch@motherboard/memory-controller/dram-channel; 597event ereport.cpu.intel.nb.fbd_ch@motherboard/memory-controller/dram-channel 598 {within(12s)}; 599 600engine serd.cpu.intel.nb.fbd.ch@motherboard/memory-controller/dram-channel, 601 N=2, T=1month, method=persistent, 602 trip=ereport.cpu.intel.nb.fbd_ch@motherboard/memory-controller/dram-channel; 603 604prop upset.cpu.intel.nb.fbd.ch@motherboard/memory-controller/dram-channel (1)-> 605 ereport.cpu.intel.nb.fbd.ch@motherboard/memory-controller/dram-channel; 606 607prop upset.cpu.intel.nb.fbd.ch@motherboard/memory-controller/dram-channel (0)-> 608 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 609 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 610 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 611 ereport.cpu.intel.bus_interconnect@chip/cpu, 612 ereport.cpu.intel.external@chip/cpu; 613 614prop fault.memory.intel.fbd.ch@ 615 motherboard/memory-controller/dram-channel (1)-> 616 ereport.cpu.intel.nb.fbd_ch@motherboard/memory-controller/dram-channel; 617 618event ereport.cpu.intel.nb.fbd.otf@motherboard/memory-controller/dram-channel 619 {within(12s)}; 620event fault.memory.intel.fbd.otf@motherboard/memory-controller/dram-channel, 621 FITrate=100, ASRU=motherboard/memory-controller/dram-channel; 622event upset.cpu.intel.nb.fbd_otf@motherboard/memory-controller/dram-channel, 623 engine=serd.cpu.intel.nb.fbd_otf@motherboard/memory-controller/dram-channel; 624event ereport.cpu.intel.nb.fbd_otf@motherboard/memory-controller/dram-channel 625 {within(12s)}; 626 627engine serd.cpu.intel.nb.fbd_otf@motherboard/memory-controller/dram-channel, 628 N=2, T=1week, method=persistent, 629 trip=ereport.cpu.intel.nb.fbd_otf@ 630 motherboard/memory-controller/dram-channel; 631 632prop upset.cpu.intel.nb.fbd_otf@motherboard/memory-controller/dram-channel (1)-> 633 ereport.cpu.intel.nb.fbd.otf@motherboard/memory-controller/dram-channel; 634 635prop fault.memory.intel.fbd.otf@ 636 motherboard/memory-controller/dram-channel (1)-> 637 ereport.cpu.intel.nb.fbd_otf@motherboard/memory-controller/dram-channel; 638 639event ereport.cpu.intel.nb.unknown@motherboard/memory-controller {within(12s)}; 640event ereport.cpu.intel.nb.unknown@motherboard/memory-controller/dram-channel 641 {within(12s)}; 642event upset.discard@motherboard/memory-controller; 643 644prop upset.discard@motherboard/memory-controller (0)-> 645 ereport.cpu.intel.nb.unknown@motherboard/memory-controller, 646 ereport.cpu.intel.nb.unknown@motherboard/memory-controller/dram-channel; 647 648event ereport.cpu.intel.nb.mem_ds@motherboard/memory-controller{within(30s)}; 649 650event fault.memory.intel.fbd.mem_ds@ 651 motherboard/memory-controller/dram-channel/dimm/rank, 652 FITrate=DIMM_UE_FIT, 653 ASRU=motherboard/memory-controller/dram-channel/dimm/rank, 654 FRU=motherboard/memory-controller/dram-channel/dimm; 655 656prop fault.memory.intel.fbd.mem_ds@ 657 motherboard/memory-controller/dram-channel/dimm/rank[rank_num] 658 { payloadprop_defined("rank") && rank_num == payloadprop("rank") } (1)-> 659 ereport.cpu.intel.nb.mem_ds@motherboard/memory-controller; 660 661event ereport.cpu.intel.nb.fsb@motherboard/chip{within(12s)}; 662event fault.cpu.intel.nb.fsb@motherboard/chip, 663 FITrate=10000, ASRU=motherboard/chip, FRU=motherboard/chip; 664 665prop fault.cpu.intel.nb.fsb@motherboard/chip (1)-> 666 ereport.cpu.intel.nb.fsb@motherboard/chip; 667 668prop fault.cpu.intel.nb.fsb@motherboard/chip (0)-> 669 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 670 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 671 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 672 ereport.cpu.intel.bus_interconnect@chip/cpu, 673 ereport.cpu.intel.external@chip/cpu; 674 675event ereport.cpu.intel.nb.ie@motherboard{within(12s)}; 676event fault.cpu.intel.nb.ie@motherboard, 677 FITrate=10000, ASRU=motherboard, FRU=motherboard; 678 679prop fault.cpu.intel.nb.ie@motherboard (1)-> 680 ereport.cpu.intel.nb.ie@motherboard; 681 682prop fault.cpu.intel.nb.ie@motherboard (0)-> 683 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 684 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 685 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 686 ereport.cpu.intel.bus_interconnect@chip/cpu, 687 ereport.cpu.intel.external@chip/cpu; 688 689event ereport.cpu.intel.nb.dma@motherboard{within(12s)}; 690event fault.cpu.intel.nb.dma@motherboard, 691 FITrate=10000, ASRU=motherboard; 692 693prop fault.cpu.intel.nb.dma@motherboard (1)-> 694 ereport.cpu.intel.nb.dma@motherboard; 695 696prop fault.cpu.intel.nb.dma@motherboard (0)-> 697 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 698 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 699 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 700 ereport.cpu.intel.bus_interconnect@chip/cpu, 701 ereport.cpu.intel.external@chip/cpu; 702 703event ereport.cpu.intel.nb.esi@motherboard{within(12s)}; 704event ereport.cpu.intel.nb.pex@motherboard/hostbridge{within(12s)}; 705event upset.cpu.intel.nb.pex@motherboard/hostbridge; 706 707prop upset.cpu.intel.nb.pex@motherboard/hostbridge (1)-> 708 ereport.cpu.intel.nb.esi@motherboard, 709 ereport.cpu.intel.nb.pex@motherboard/hostbridge; 710 711prop upset.cpu.intel.nb.pex@motherboard/hostbridge (0)-> 712 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 713 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 714 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 715 ereport.cpu.intel.bus_interconnect@chip/cpu, 716 ereport.cpu.intel.external@chip/cpu; 717 718event ereport.cpu.intel.nb.unknown@ 719 motherboard/memory-controller/dram-channel/dimm/rank{within(12s)}; 720event upset.discard@motherboard/memory-controller/dram-channel/dimm/rank; 721 722prop upset.discard@motherboard/memory-controller/dram-channel/dimm/rank (1)-> 723 ereport.cpu.intel.nb.unknown@ 724 motherboard/memory-controller/dram-channel/dimm/rank; 725 726prop upset.discard@motherboard/memory-controller/dram-channel/dimm/rank (0)-> 727 ereport.cpu.intel.bus_interconnect_memory_uc@chip/cpu, 728 ereport.cpu.intel.bus_interconnect_uc@chip/cpu, 729 ereport.cpu.intel.bus_interconnect_memory@chip/cpu, 730 ereport.cpu.intel.bus_interconnect@chip/cpu, 731 ereport.cpu.intel.external@chip/cpu; 732 733