1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2004 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 /* 27 * Copyright (c) 2012, Joyent, Inc. All rights reserved. 28 */ 29 30 /* 31 * User Process Target Intel 32-bit component 32 * 33 * This file provides the ISA-dependent portion of the user process target. 34 * For more details on the implementation refer to mdb_proc.c. 35 */ 36 37 #include <mdb/mdb_proc.h> 38 #include <mdb/mdb_kreg.h> 39 #include <mdb/mdb_err.h> 40 #include <mdb/mdb_amd64util.h> 41 #include <mdb/mdb.h> 42 43 #include <sys/frame.h> 44 #include <libproc.h> 45 #include <sys/fp.h> 46 #include <ieeefp.h> 47 48 const mdb_tgt_regdesc_t pt_regdesc[] = { 49 { "r15", REG_R15, MDB_TGT_R_EXPORT }, 50 { "r15d", REG_R15, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 51 { "r15w", REG_R15, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 52 { "r15l", REG_R15, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 53 { "r14", REG_R14, MDB_TGT_R_EXPORT }, 54 { "r14d", REG_R14, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 55 { "r14w", REG_R14, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 56 { "r14l", REG_R14, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 57 { "r13", REG_R13, MDB_TGT_R_EXPORT }, 58 { "r13d", REG_R13, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 59 { "r13w", REG_R13, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 60 { "r13l", REG_R13, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 61 { "r12", REG_R12, MDB_TGT_R_EXPORT }, 62 { "r12d", REG_R12, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 63 { "r12w", REG_R12, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 64 { "r12l", REG_R12, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 65 { "r11", REG_R11, MDB_TGT_R_EXPORT }, 66 { "r11d", REG_R11, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 67 { "r11w", REG_R11, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 68 { "r11l", REG_R11, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 69 { "r10", REG_R10, MDB_TGT_R_EXPORT }, 70 { "r10d", REG_R10, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 71 { "r10w", REG_R10, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 72 { "r10l", REG_R10, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 73 { "r9", REG_R9, MDB_TGT_R_EXPORT }, 74 { "r9d", REG_R8, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 75 { "r9w", REG_R8, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 76 { "r9l", REG_R8, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 77 { "r8", REG_R8, MDB_TGT_R_EXPORT }, 78 { "r8d", REG_R8, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 79 { "r8w", REG_R8, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 80 { "r8l", REG_R8, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 81 { "rdi", REG_RDI, MDB_TGT_R_EXPORT }, 82 { "edi", REG_RDI, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 83 { "di", REG_RDI, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 84 { "dil", REG_RDI, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 85 { "rsi", REG_RSI, MDB_TGT_R_EXPORT }, 86 { "esi", REG_RSI, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 87 { "si", REG_RSI, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 88 { "sil", REG_RSI, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 89 { "rbp", REG_RBP, MDB_TGT_R_EXPORT }, 90 { "ebp", REG_RBP, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 91 { "bp", REG_RBP, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 92 { "bpl", REG_RBP, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 93 { "rbx", REG_RBX, MDB_TGT_R_EXPORT }, 94 { "ebx", REG_RBX, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 95 { "bx", REG_RBX, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 96 { "bh", REG_RBX, MDB_TGT_R_EXPORT | MDB_TGT_R_8H }, 97 { "bl", REG_RBX, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 98 { "rdx", REG_RDX, MDB_TGT_R_EXPORT }, 99 { "edx", REG_RDX, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 100 { "dx", REG_RDX, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 101 { "dh", REG_RDX, MDB_TGT_R_EXPORT | MDB_TGT_R_8H }, 102 { "dl", REG_RDX, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 103 { "rcx", REG_RCX, MDB_TGT_R_EXPORT }, 104 { "ecx", REG_RCX, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 105 { "cx", REG_RCX, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 106 { "ch", REG_RCX, MDB_TGT_R_EXPORT | MDB_TGT_R_8H }, 107 { "cl", REG_RCX, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 108 { "rax", REG_RAX, MDB_TGT_R_EXPORT }, 109 { "eax", REG_RAX, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 110 { "ax", REG_RAX, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 111 { "ah", REG_RAX, MDB_TGT_R_EXPORT | MDB_TGT_R_8H }, 112 { "al", REG_RAX, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 113 { "trapno", REG_TRAPNO, MDB_TGT_R_EXPORT }, 114 { "err", REG_ERR, MDB_TGT_R_EXPORT }, 115 { "rip", REG_RIP, MDB_TGT_R_EXPORT }, 116 { "cs", REG_CS, MDB_TGT_R_EXPORT }, 117 { "rflags", REG_RFL, MDB_TGT_R_EXPORT }, 118 { "eflags", REG_RFL, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 119 { "rsp", REG_RSP, MDB_TGT_R_EXPORT }, 120 { "esp", REG_RSP, MDB_TGT_R_EXPORT | MDB_TGT_R_32 }, 121 { "sp", REG_RSP, MDB_TGT_R_EXPORT | MDB_TGT_R_16 }, 122 { "spl", REG_RSP, MDB_TGT_R_EXPORT | MDB_TGT_R_8L }, 123 { "ss", REG_SS, MDB_TGT_R_EXPORT }, 124 { "fs", REG_FS, MDB_TGT_R_EXPORT }, 125 { "gs", REG_GS, MDB_TGT_R_EXPORT }, 126 { "es", REG_ES, MDB_TGT_R_EXPORT }, 127 { "ds", REG_DS, MDB_TGT_R_EXPORT }, 128 { "fsbase", REG_FSBASE, MDB_TGT_R_EXPORT }, 129 { "gsbase", REG_GSBASE, MDB_TGT_R_EXPORT }, 130 { NULL, 0, 0 } 131 }; 132 133 /* 134 * We cannot rely on pr_instr, because if we hit a breakpoint or the user has 135 * artifically modified memory, it will no longer be correct. 136 */ 137 static uint8_t 138 pt_read_instr(mdb_tgt_t *t) 139 { 140 const lwpstatus_t *psp = &Pstatus(t->t_pshandle)->pr_lwp; 141 uint8_t ret = 0; 142 143 (void) mdb_tgt_vread(t, &ret, sizeof (ret), psp->pr_reg[REG_RIP]); 144 145 return (ret); 146 } 147 148 /*ARGSUSED*/ 149 int 150 pt_regs(uintptr_t addr, uint_t flags, int argc, const mdb_arg_t *argv) 151 { 152 mdb_tgt_t *t = mdb.m_target; 153 mdb_tgt_tid_t tid; 154 prgregset_t grs; 155 prgreg_t rflags; 156 157 if (argc != 0) 158 return (DCMD_USAGE); 159 160 if (t->t_pshandle == NULL || Pstate(t->t_pshandle) == PS_UNDEAD) { 161 mdb_warn("no process active\n"); 162 return (DCMD_ERR); 163 } 164 165 if (Pstate(t->t_pshandle) == PS_LOST) { 166 mdb_warn("debugger has lost control of process\n"); 167 return (DCMD_ERR); 168 } 169 170 if (flags & DCMD_ADDRSPEC) 171 tid = (mdb_tgt_tid_t)addr; 172 else 173 tid = PTL_TID(t); 174 175 if (PTL_GETREGS(t, tid, grs) != 0) { 176 mdb_warn("failed to get current register set"); 177 return (DCMD_ERR); 178 } 179 180 rflags = grs[REG_RFL]; 181 182 mdb_printf("%%rax = 0x%0?p\t%%r8 = 0x%0?p\n", 183 grs[REG_RAX], grs[REG_R8]); 184 mdb_printf("%%rbx = 0x%0?p\t%%r9 = 0x%0?p\n", 185 grs[REG_RBX], grs[REG_R9]); 186 mdb_printf("%%rcx = 0x%0?p\t%%r10 = 0x%0?p\n", 187 grs[REG_RCX], grs[REG_R10]); 188 mdb_printf("%%rdx = 0x%0?p\t%%r11 = 0x%0?p\n", 189 grs[REG_RDX], grs[REG_R11]); 190 mdb_printf("%%rsi = 0x%0?p\t%%r12 = 0x%0?p\n", 191 grs[REG_RSI], grs[REG_R12]); 192 mdb_printf("%%rdi = 0x%0?p\t%%r13 = 0x%0?p\n", 193 grs[REG_RDI], grs[REG_R13]); 194 mdb_printf(" %?s\t%%r14 = 0x%0?p\n", 195 "", grs[REG_R14]); 196 mdb_printf(" %?s\t%%r15 = 0x%0?p\n", 197 "", grs[REG_R15]); 198 199 mdb_printf("\n"); 200 201 mdb_printf("%%cs = 0x%04x\t%%fs = 0x%04x\t%%gs = 0x%04x\n", 202 grs[REG_CS], grs[REG_FS], grs[REG_GS]); 203 mdb_printf("%%ds = 0x%04x\t%%es = 0x%04x\t%%ss = 0x%04x\n", 204 grs[REG_DS], grs[REG_ES], grs[REG_SS]); 205 206 mdb_printf("\n"); 207 208 mdb_printf("%%rip = 0x%0?p %A\n", grs[REG_RIP], grs[REG_RIP]); 209 mdb_printf("%%rbp = 0x%0?p\n", grs[REG_RBP], grs[REG_RBP]); 210 mdb_printf("%%rsp = 0x%0?p\n", grs[REG_RSP], grs[REG_RSP]); 211 212 mdb_printf("\n"); 213 214 mdb_printf("%%rflags = 0x%08x\n", rflags); 215 216 mdb_printf(" id=%u vip=%u vif=%u ac=%u vm=%u rf=%u nt=%u iopl=0x%x\n", 217 (rflags & KREG_EFLAGS_ID_MASK) >> KREG_EFLAGS_ID_SHIFT, 218 (rflags & KREG_EFLAGS_VIP_MASK) >> KREG_EFLAGS_VIP_SHIFT, 219 (rflags & KREG_EFLAGS_VIF_MASK) >> KREG_EFLAGS_VIF_SHIFT, 220 (rflags & KREG_EFLAGS_AC_MASK) >> KREG_EFLAGS_AC_SHIFT, 221 (rflags & KREG_EFLAGS_VM_MASK) >> KREG_EFLAGS_VM_SHIFT, 222 (rflags & KREG_EFLAGS_RF_MASK) >> KREG_EFLAGS_RF_SHIFT, 223 (rflags & KREG_EFLAGS_NT_MASK) >> KREG_EFLAGS_NT_SHIFT, 224 (rflags & KREG_EFLAGS_IOPL_MASK) >> KREG_EFLAGS_IOPL_SHIFT); 225 226 mdb_printf(" status=<%s,%s,%s,%s,%s,%s,%s,%s,%s>\n", 227 (rflags & KREG_EFLAGS_OF_MASK) ? "OF" : "of", 228 (rflags & KREG_EFLAGS_DF_MASK) ? "DF" : "df", 229 (rflags & KREG_EFLAGS_IF_MASK) ? "IF" : "if", 230 (rflags & KREG_EFLAGS_TF_MASK) ? "TF" : "tf", 231 (rflags & KREG_EFLAGS_SF_MASK) ? "SF" : "sf", 232 (rflags & KREG_EFLAGS_ZF_MASK) ? "ZF" : "zf", 233 (rflags & KREG_EFLAGS_AF_MASK) ? "AF" : "af", 234 (rflags & KREG_EFLAGS_PF_MASK) ? "PF" : "pf", 235 (rflags & KREG_EFLAGS_CF_MASK) ? "CF" : "cf"); 236 237 mdb_printf("\n"); 238 239 mdb_printf("%%gsbase = 0x%0?p\n", grs[REG_GSBASE]); 240 mdb_printf("%%fsbase = 0x%0?p\n", grs[REG_FSBASE]); 241 mdb_printf("%%trapno = 0x%x\n", grs[REG_TRAPNO]); 242 mdb_printf(" %%err = 0x%x\n", grs[REG_ERR]); 243 244 return (set_errno(ENOTSUP)); 245 } 246 247 static const char * 248 fpcw2str(uint32_t cw, char *buf, size_t nbytes) 249 { 250 char *end = buf + nbytes; 251 char *p = buf; 252 253 buf[0] = '\0'; 254 255 /* 256 * Decode all masks in the 80387 control word. 257 */ 258 if (cw & FPIM) 259 p += mdb_snprintf(p, (size_t)(end - p), "|IM"); 260 if (cw & FPDM) 261 p += mdb_snprintf(p, (size_t)(end - p), "|DM"); 262 if (cw & FPZM) 263 p += mdb_snprintf(p, (size_t)(end - p), "|ZM"); 264 if (cw & FPOM) 265 p += mdb_snprintf(p, (size_t)(end - p), "|OM"); 266 if (cw & FPUM) 267 p += mdb_snprintf(p, (size_t)(end - p), "|UM"); 268 if (cw & FPPM) 269 p += mdb_snprintf(p, (size_t)(end - p), "|PM"); 270 if (cw & FPPC) 271 p += mdb_snprintf(p, (size_t)(end - p), "|PC"); 272 if (cw & FPRC) 273 p += mdb_snprintf(p, (size_t)(end - p), "|RC"); 274 if (cw & FPIC) 275 p += mdb_snprintf(p, (size_t)(end - p), "|IC"); 276 277 /* 278 * Decode precision, rounding, and infinity options in control word. 279 */ 280 if (cw & FPSIG24) 281 p += mdb_snprintf(p, (size_t)(end - p), "|SIG24"); 282 if (cw & FPSIG53) 283 p += mdb_snprintf(p, (size_t)(end - p), "|SIG53"); 284 if (cw & FPSIG64) 285 p += mdb_snprintf(p, (size_t)(end - p), "|SIG64"); 286 287 if ((cw & FPRC) == (FPRD|FPRU)) 288 p += mdb_snprintf(p, (size_t)(end - p), "|RTZ"); 289 else if (cw & FPRD) 290 p += mdb_snprintf(p, (size_t)(end - p), "|RD"); 291 else if (cw & FPRU) 292 p += mdb_snprintf(p, (size_t)(end - p), "|RU"); 293 else 294 p += mdb_snprintf(p, (size_t)(end - p), "|RTN"); 295 296 if (cw & FPA) 297 p += mdb_snprintf(p, (size_t)(end - p), "|A"); 298 else 299 p += mdb_snprintf(p, (size_t)(end - p), "|P"); 300 if (cw & WFPB17) 301 p += mdb_snprintf(p, (size_t)(end - p), "|WFPB17"); 302 if (cw & WFPB24) 303 p += mdb_snprintf(p, (size_t)(end - p), "|WFPB24"); 304 305 if (buf[0] == '|') 306 return (buf + 1); 307 308 return ("0"); 309 } 310 311 static const char * 312 fpsw2str(uint32_t cw, char *buf, size_t nbytes) 313 { 314 char *end = buf + nbytes; 315 char *p = buf; 316 317 buf[0] = '\0'; 318 319 /* 320 * Decode all masks in the 80387 status word. 321 */ 322 if (cw & FPS_IE) 323 p += mdb_snprintf(p, (size_t)(end - p), "|IE"); 324 if (cw & FPS_DE) 325 p += mdb_snprintf(p, (size_t)(end - p), "|DE"); 326 if (cw & FPS_ZE) 327 p += mdb_snprintf(p, (size_t)(end - p), "|ZE"); 328 if (cw & FPS_OE) 329 p += mdb_snprintf(p, (size_t)(end - p), "|OE"); 330 if (cw & FPS_UE) 331 p += mdb_snprintf(p, (size_t)(end - p), "|UE"); 332 if (cw & FPS_PE) 333 p += mdb_snprintf(p, (size_t)(end - p), "|PE"); 334 if (cw & FPS_SF) 335 p += mdb_snprintf(p, (size_t)(end - p), "|SF"); 336 if (cw & FPS_ES) 337 p += mdb_snprintf(p, (size_t)(end - p), "|ES"); 338 if (cw & FPS_C0) 339 p += mdb_snprintf(p, (size_t)(end - p), "|C0"); 340 if (cw & FPS_C1) 341 p += mdb_snprintf(p, (size_t)(end - p), "|C1"); 342 if (cw & FPS_C2) 343 p += mdb_snprintf(p, (size_t)(end - p), "|C2"); 344 if (cw & FPS_C3) 345 p += mdb_snprintf(p, (size_t)(end - p), "|C3"); 346 if (cw & FPS_B) 347 p += mdb_snprintf(p, (size_t)(end - p), "|B"); 348 349 if (buf[0] == '|') 350 return (buf + 1); 351 352 return ("0"); 353 } 354 355 static const char * 356 fpmxcsr2str(uint32_t mxcsr, char *buf, size_t nbytes) 357 { 358 char *end = buf + nbytes; 359 char *p = buf; 360 361 buf[0] = '\0'; 362 363 /* 364 * Decode the MXCSR word 365 */ 366 if (mxcsr & SSE_IE) 367 p += mdb_snprintf(p, (size_t)(end - p), "|IE"); 368 if (mxcsr & SSE_DE) 369 p += mdb_snprintf(p, (size_t)(end - p), "|DE"); 370 if (mxcsr & SSE_ZE) 371 p += mdb_snprintf(p, (size_t)(end - p), "|ZE"); 372 if (mxcsr & SSE_OE) 373 p += mdb_snprintf(p, (size_t)(end - p), "|OE"); 374 if (mxcsr & SSE_UE) 375 p += mdb_snprintf(p, (size_t)(end - p), "|UE"); 376 if (mxcsr & SSE_PE) 377 p += mdb_snprintf(p, (size_t)(end - p), "|PE"); 378 379 if (mxcsr & SSE_DAZ) 380 p += mdb_snprintf(p, (size_t)(end - p), "|DAZ"); 381 382 if (mxcsr & SSE_IM) 383 p += mdb_snprintf(p, (size_t)(end - p), "|IM"); 384 if (mxcsr & SSE_DM) 385 p += mdb_snprintf(p, (size_t)(end - p), "|DM"); 386 if (mxcsr & SSE_ZM) 387 p += mdb_snprintf(p, (size_t)(end - p), "|ZM"); 388 if (mxcsr & SSE_OM) 389 p += mdb_snprintf(p, (size_t)(end - p), "|OM"); 390 if (mxcsr & SSE_UM) 391 p += mdb_snprintf(p, (size_t)(end - p), "|UM"); 392 if (mxcsr & SSE_PM) 393 p += mdb_snprintf(p, (size_t)(end - p), "|PM"); 394 395 if ((mxcsr & SSE_RC) == (SSE_RD|SSE_RU)) 396 p += mdb_snprintf(p, (size_t)(end - p), "|RTZ"); 397 else if (mxcsr & SSE_RD) 398 p += mdb_snprintf(p, (size_t)(end - p), "|RD"); 399 else if (mxcsr & SSE_RU) 400 p += mdb_snprintf(p, (size_t)(end - p), "|RU"); 401 else 402 p += mdb_snprintf(p, (size_t)(end - p), "|RTN"); 403 404 if (mxcsr & SSE_FZ) 405 p += mdb_snprintf(p, (size_t)(end - p), "|FZ"); 406 407 if (buf[0] == '|') 408 return (buf + 1); 409 return ("0"); 410 } 411 412 /*ARGSUSED*/ 413 int 414 pt_fpregs(uintptr_t addr, uint_t flags, int argc, const mdb_arg_t *argv) 415 { 416 mdb_tgt_t *t = mdb.m_target; 417 mdb_tgt_tid_t tid; 418 prfpregset_t fprs; 419 struct fpchip_state fps; 420 char buf[256]; 421 uint_t top; 422 int i; 423 424 /* 425 * Union for overlaying _fpreg structure on to quad-precision 426 * floating-point value (long double). 427 */ 428 union { 429 struct _fpreg reg; 430 long double ld; 431 } fpru; 432 433 /* 434 * Array of strings corresponding to FPU tag word values (see 435 * section 7.3.6 of the Intel Programmer's Reference Manual). 436 */ 437 const char *tag_strings[] = { "valid", "zero", "special", "empty" }; 438 439 if (argc != 0) 440 return (DCMD_USAGE); 441 442 if (t->t_pshandle == NULL || Pstate(t->t_pshandle) == PS_UNDEAD) { 443 mdb_warn("no process active\n"); 444 return (DCMD_ERR); 445 } 446 447 if (Pstate(t->t_pshandle) == PS_LOST) { 448 mdb_warn("debugger has lost control of process\n"); 449 return (DCMD_ERR); 450 } 451 452 if (flags & DCMD_ADDRSPEC) 453 tid = (mdb_tgt_tid_t)addr; 454 else 455 tid = PTL_TID(t); 456 457 mdb_printf("AMD64 (80486 chip with SSE)\n"); 458 459 if (PTL_GETFPREGS(t, tid, &fprs) != 0) { 460 mdb_warn("failed to get floating point registers"); 461 return (DCMD_ERR); 462 } 463 464 bcopy(&fprs.fp_reg_set.fpchip_state, &fps, sizeof (fps)); 465 466 fps.status &= 0xffff; /* saved status word is really 16 bits */ 467 468 mdb_printf("cw 0x%04x (%s)\n", fps.cw, 469 fpcw2str(fps.cw, buf, sizeof (buf))); 470 471 top = (fps.sw & FPS_TOP) >> 11; 472 mdb_printf("sw 0x%04x (TOP=0t%u) (%s)\n", fps.sw, 473 top, fpsw2str(fps.sw, buf, sizeof (buf))); 474 475 mdb_printf("xcp sw 0x%04x (%s)\n\n", fps.status, 476 fpsw2str(fps.status, buf, sizeof (buf))); 477 478 mdb_printf("fop 0x%x\n", fps.fop); 479 mdb_printf("rip 0x%x\n", fps.rip); 480 mdb_printf("rdp 0x%x\n\n", fps.rdp); 481 482 for (i = 0; i < 8; i++) { 483 /* 484 * Recall that we need to use the current TOP-of-stack value to 485 * associate the _st[] index back to a physical register number, 486 * since tag word indices are physical register numbers. Then 487 * to get the tag value, we shift over two bits for each tag 488 * index, and then grab the bottom two bits. 489 */ 490 uint_t tag_index = (i + top) & 7; 491 uint_t tag_fctw = (fps.fctw >> tag_index) & 1; 492 uint_t tag_value; 493 uint_t exp; 494 495 /* 496 * AMD64 stores the tag in a compressed form. It is 497 * necessary to extract the original 2-bit tag value. 498 * See AMD64 Architecture Programmer's Manual Volume 2: 499 * System Programming, Chapter 11. 500 */ 501 502 fpru.ld = fps.st[i].__fpr_pad._q; 503 exp = fpru.reg.exponent & 0x7fff; 504 505 if (tag_fctw == 0) { 506 tag_value = 3; /* empty */ 507 } else if (exp == 0) { 508 if (fpru.reg.significand[0] == 0 && 509 fpru.reg.significand[1] == 0 && 510 fpru.reg.significand[2] == 0 && 511 fpru.reg.significand[3] == 0) 512 tag_value = 1; /* zero */ 513 else 514 tag_value = 2; /* special: denormal */ 515 } else if (exp == 0x7fff) { 516 tag_value = 2; /* special: infinity or NaN */ 517 } else if (fpru.reg.significand[3] & 0x8000) { 518 tag_value = 0; /* valid */ 519 } else { 520 tag_value = 2; /* special: unnormal */ 521 } 522 523 mdb_printf("%%st%d 0x%04x.%04x%04x%04x%04x = %lg %s\n", 524 i, fpru.reg.exponent, 525 fpru.reg.significand[3], fpru.reg.significand[2], 526 fpru.reg.significand[1], fpru.reg.significand[0], 527 fpru.ld, tag_strings[tag_value]); 528 } 529 530 mdb_printf("\nmxcsr 0x%04x (%s)\n", fps.mxcsr, 531 fpmxcsr2str(fps.mxcsr, buf, sizeof (buf))); 532 mdb_printf("xcp 0x%04x (%s)\n\n", fps.xstatus, 533 fpmxcsr2str(fps.xstatus, buf, sizeof (buf))); 534 535 for (i = 0; i < 8; i++) 536 mdb_printf("%%xmm%d 0x%08x%08x%08x%08x\n", i, 537 fps.xmm[i]._l[3], fps.xmm[i]._l[2], 538 fps.xmm[i]._l[1], fps.xmm[i]._l[0]); 539 540 return (DCMD_OK); 541 } 542 543 /*ARGSUSED*/ 544 int 545 pt_getfpreg(mdb_tgt_t *t, mdb_tgt_tid_t tid, ushort_t rd_num, 546 ushort_t rd_flags, mdb_tgt_reg_t *rp) 547 { 548 return (set_errno(ENOTSUP)); 549 } 550 551 /*ARGSUSED*/ 552 int 553 pt_putfpreg(mdb_tgt_t *t, mdb_tgt_tid_t tid, ushort_t rd_num, 554 ushort_t rd_flags, mdb_tgt_reg_t rval) 555 { 556 return (set_errno(ENOTSUP)); 557 } 558 559 /*ARGSUSED*/ 560 void 561 pt_addfpregs(mdb_tgt_t *t) 562 { 563 /* not implemented */ 564 } 565 566 /*ARGSUSED*/ 567 int 568 pt_frameregs(void *arglim, uintptr_t pc, uint_t argc, const long *argv, 569 const mdb_tgt_gregset_t *gregs, boolean_t pc_faked) 570 { 571 return (set_errno(ENOTSUP)); 572 } 573 574 /*ARGSUSED*/ 575 const char * 576 pt_disasm(const GElf_Ehdr *ehp) 577 { 578 return ("amd64"); 579 } 580 581 /* 582 * Determine the return address for the current frame. 583 */ 584 int 585 pt_step_out(mdb_tgt_t *t, uintptr_t *p) 586 { 587 const lwpstatus_t *psp = &Pstatus(t->t_pshandle)->pr_lwp; 588 589 if (Pstate(t->t_pshandle) != PS_STOP) 590 return (set_errno(EMDB_TGTBUSY)); 591 592 return (mdb_amd64_step_out(t, p, psp->pr_reg[EIP], psp->pr_reg[EBP], 593 psp->pr_reg[UESP], psp->pr_instr)); 594 } 595 596 /* 597 * Return the address of the next instruction following a call, or return -1 598 * and set errno to EAGAIN if the target should just single-step. 599 */ 600 int 601 pt_next(mdb_tgt_t *t, uintptr_t *p) 602 { 603 const lwpstatus_t *psp = &Pstatus(t->t_pshandle)->pr_lwp; 604 605 if (Pstate(t->t_pshandle) != PS_STOP) 606 return (set_errno(EMDB_TGTBUSY)); 607 608 return (mdb_amd64_next(t, p, psp->pr_reg[REG_RIP], pt_read_instr(t))); 609 } 610