1*1b8adde7SWilliam Kucharski /* rtl8139.c - etherboot driver for the Realtek 8139 chipset
2*1b8adde7SWilliam Kucharski
3*1b8adde7SWilliam Kucharski ported from the linux driver written by Donald Becker
4*1b8adde7SWilliam Kucharski by Rainer Bawidamann (Rainer.Bawidamann@informatik.uni-ulm.de) 1999
5*1b8adde7SWilliam Kucharski
6*1b8adde7SWilliam Kucharski This software may be used and distributed according to the terms
7*1b8adde7SWilliam Kucharski of the GNU Public License, incorporated herein by reference.
8*1b8adde7SWilliam Kucharski
9*1b8adde7SWilliam Kucharski changes to the original driver:
10*1b8adde7SWilliam Kucharski - removed support for interrupts, switching to polling mode (yuck!)
11*1b8adde7SWilliam Kucharski - removed support for the 8129 chip (external MII)
12*1b8adde7SWilliam Kucharski
13*1b8adde7SWilliam Kucharski */
14*1b8adde7SWilliam Kucharski
15*1b8adde7SWilliam Kucharski /*********************************************************************/
16*1b8adde7SWilliam Kucharski /* Revision History */
17*1b8adde7SWilliam Kucharski /*********************************************************************/
18*1b8adde7SWilliam Kucharski
19*1b8adde7SWilliam Kucharski /*
20*1b8adde7SWilliam Kucharski 28 Dec 2002 ken_yap@users.sourceforge.net (Ken Yap)
21*1b8adde7SWilliam Kucharski Put in virt_to_bus calls to allow Etherboot relocation.
22*1b8adde7SWilliam Kucharski
23*1b8adde7SWilliam Kucharski 06 Apr 2001 ken_yap@users.sourceforge.net (Ken Yap)
24*1b8adde7SWilliam Kucharski Following email from Hyun-Joon Cha, added a disable routine, otherwise
25*1b8adde7SWilliam Kucharski NIC remains live and can crash the kernel later.
26*1b8adde7SWilliam Kucharski
27*1b8adde7SWilliam Kucharski 4 Feb 2000 espenlaub@informatik.uni-ulm.de (Klaus Espenlaub)
28*1b8adde7SWilliam Kucharski Shuffled things around, removed the leftovers from the 8129 support
29*1b8adde7SWilliam Kucharski that was in the Linux driver and added a bit more 8139 definitions.
30*1b8adde7SWilliam Kucharski Moved the 8K receive buffer to a fixed, available address outside the
31*1b8adde7SWilliam Kucharski 0x98000-0x9ffff range. This is a bit of a hack, but currently the only
32*1b8adde7SWilliam Kucharski way to make room for the Etherboot features that need substantial amounts
33*1b8adde7SWilliam Kucharski of code like the ANSI console support. Currently the buffer is just below
34*1b8adde7SWilliam Kucharski 0x10000, so this even conforms to the tagged boot image specification,
35*1b8adde7SWilliam Kucharski which reserves the ranges 0x00000-0x10000 and 0x98000-0xA0000. My
36*1b8adde7SWilliam Kucharski interpretation of this "reserved" is that Etherboot may do whatever it
37*1b8adde7SWilliam Kucharski likes, as long as its environment is kept intact (like the BIOS
38*1b8adde7SWilliam Kucharski variables). Hopefully fixed rtl_poll() once and for all. The symptoms
39*1b8adde7SWilliam Kucharski were that if Etherboot was left at the boot menu for several minutes, the
40*1b8adde7SWilliam Kucharski first eth_poll failed. Seems like I am the only person who does this.
41*1b8adde7SWilliam Kucharski First of all I fixed the debugging code and then set out for a long bug
42*1b8adde7SWilliam Kucharski hunting session. It took me about a week full time work - poking around
43*1b8adde7SWilliam Kucharski various places in the driver, reading Don Becker's and Jeff Garzik's Linux
44*1b8adde7SWilliam Kucharski driver and even the FreeBSD driver (what a piece of crap!) - and
45*1b8adde7SWilliam Kucharski eventually spotted the nasty thing: the transmit routine was acknowledging
46*1b8adde7SWilliam Kucharski each and every interrupt pending, including the RxOverrun and RxFIFIOver
47*1b8adde7SWilliam Kucharski interrupts. This confused the RTL8139 thoroughly. It destroyed the
48*1b8adde7SWilliam Kucharski Rx ring contents by dumping the 2K FIFO contents right where we wanted to
49*1b8adde7SWilliam Kucharski get the next packet. Oh well, what fun.
50*1b8adde7SWilliam Kucharski
51*1b8adde7SWilliam Kucharski 18 Jan 2000 mdc@thinguin.org (Marty Connor)
52*1b8adde7SWilliam Kucharski Drastically simplified error handling. Basically, if any error
53*1b8adde7SWilliam Kucharski in transmission or reception occurs, the card is reset.
54*1b8adde7SWilliam Kucharski Also, pointed all transmit descriptors to the same buffer to
55*1b8adde7SWilliam Kucharski save buffer space. This should decrease driver size and avoid
56*1b8adde7SWilliam Kucharski corruption because of exceeding 32K during runtime.
57*1b8adde7SWilliam Kucharski
58*1b8adde7SWilliam Kucharski 28 Jul 1999 (Matthias Meixner - meixner@rbg.informatik.tu-darmstadt.de)
59*1b8adde7SWilliam Kucharski rtl_poll was quite broken: it used the RxOK interrupt flag instead
60*1b8adde7SWilliam Kucharski of the RxBufferEmpty flag which often resulted in very bad
61*1b8adde7SWilliam Kucharski transmission performace - below 1kBytes/s.
62*1b8adde7SWilliam Kucharski
63*1b8adde7SWilliam Kucharski */
64*1b8adde7SWilliam Kucharski
65*1b8adde7SWilliam Kucharski #include "etherboot.h"
66*1b8adde7SWilliam Kucharski #include "nic.h"
67*1b8adde7SWilliam Kucharski #include "pci.h"
68*1b8adde7SWilliam Kucharski #include "timer.h"
69*1b8adde7SWilliam Kucharski
70*1b8adde7SWilliam Kucharski #define RTL_TIMEOUT (1*TICKS_PER_SEC)
71*1b8adde7SWilliam Kucharski
72*1b8adde7SWilliam Kucharski /* PCI Tuning Parameters
73*1b8adde7SWilliam Kucharski Threshold is bytes transferred to chip before transmission starts. */
74*1b8adde7SWilliam Kucharski #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
75*1b8adde7SWilliam Kucharski #define RX_FIFO_THRESH 4 /* Rx buffer level before first PCI xfer. */
76*1b8adde7SWilliam Kucharski #define RX_DMA_BURST 4 /* Maximum PCI burst, '4' is 256 bytes */
77*1b8adde7SWilliam Kucharski #define TX_DMA_BURST 4 /* Calculate as 16<<val. */
78*1b8adde7SWilliam Kucharski #define NUM_TX_DESC 4 /* Number of Tx descriptor registers. */
79*1b8adde7SWilliam Kucharski #define TX_BUF_SIZE ETH_FRAME_LEN /* FCS is added by the chip */
80*1b8adde7SWilliam Kucharski #define RX_BUF_LEN_IDX 0 /* 0, 1, 2 is allowed - 8,16,32K rx buffer */
81*1b8adde7SWilliam Kucharski #define RX_BUF_LEN (8192 << RX_BUF_LEN_IDX)
82*1b8adde7SWilliam Kucharski
83*1b8adde7SWilliam Kucharski #undef DEBUG_TX
84*1b8adde7SWilliam Kucharski #undef DEBUG_RX
85*1b8adde7SWilliam Kucharski
86*1b8adde7SWilliam Kucharski /* Symbolic offsets to registers. */
87*1b8adde7SWilliam Kucharski enum RTL8139_registers {
88*1b8adde7SWilliam Kucharski MAC0=0, /* Ethernet hardware address. */
89*1b8adde7SWilliam Kucharski MAR0=8, /* Multicast filter. */
90*1b8adde7SWilliam Kucharski TxStatus0=0x10, /* Transmit status (four 32bit registers). */
91*1b8adde7SWilliam Kucharski TxAddr0=0x20, /* Tx descriptors (also four 32bit). */
92*1b8adde7SWilliam Kucharski RxBuf=0x30, RxEarlyCnt=0x34, RxEarlyStatus=0x36,
93*1b8adde7SWilliam Kucharski ChipCmd=0x37, RxBufPtr=0x38, RxBufAddr=0x3A,
94*1b8adde7SWilliam Kucharski IntrMask=0x3C, IntrStatus=0x3E,
95*1b8adde7SWilliam Kucharski TxConfig=0x40, RxConfig=0x44,
96*1b8adde7SWilliam Kucharski Timer=0x48, /* general-purpose counter. */
97*1b8adde7SWilliam Kucharski RxMissed=0x4C, /* 24 bits valid, write clears. */
98*1b8adde7SWilliam Kucharski Cfg9346=0x50, Config0=0x51, Config1=0x52,
99*1b8adde7SWilliam Kucharski TimerIntrReg=0x54, /* intr if gp counter reaches this value */
100*1b8adde7SWilliam Kucharski MediaStatus=0x58,
101*1b8adde7SWilliam Kucharski Config3=0x59,
102*1b8adde7SWilliam Kucharski MultiIntr=0x5C,
103*1b8adde7SWilliam Kucharski RevisionID=0x5E, /* revision of the RTL8139 chip */
104*1b8adde7SWilliam Kucharski TxSummary=0x60,
105*1b8adde7SWilliam Kucharski MII_BMCR=0x62, MII_BMSR=0x64, NWayAdvert=0x66, NWayLPAR=0x68,
106*1b8adde7SWilliam Kucharski NWayExpansion=0x6A,
107*1b8adde7SWilliam Kucharski DisconnectCnt=0x6C, FalseCarrierCnt=0x6E,
108*1b8adde7SWilliam Kucharski NWayTestReg=0x70,
109*1b8adde7SWilliam Kucharski RxCnt=0x72, /* packet received counter */
110*1b8adde7SWilliam Kucharski CSCR=0x74, /* chip status and configuration register */
111*1b8adde7SWilliam Kucharski PhyParm1=0x78,TwisterParm=0x7c,PhyParm2=0x80, /* undocumented */
112*1b8adde7SWilliam Kucharski /* from 0x84 onwards are a number of power management/wakeup frame
113*1b8adde7SWilliam Kucharski * definitions we will probably never need to know about. */
114*1b8adde7SWilliam Kucharski };
115*1b8adde7SWilliam Kucharski
116*1b8adde7SWilliam Kucharski enum RxEarlyStatusBits {
117*1b8adde7SWilliam Kucharski ERGood=0x08, ERBad=0x04, EROVW=0x02, EROK=0x01
118*1b8adde7SWilliam Kucharski };
119*1b8adde7SWilliam Kucharski
120*1b8adde7SWilliam Kucharski enum ChipCmdBits {
121*1b8adde7SWilliam Kucharski CmdReset=0x10, CmdRxEnb=0x08, CmdTxEnb=0x04, RxBufEmpty=0x01, };
122*1b8adde7SWilliam Kucharski
123*1b8adde7SWilliam Kucharski enum IntrMaskBits {
124*1b8adde7SWilliam Kucharski SERR=0x8000, TimeOut=0x4000, LenChg=0x2000,
125*1b8adde7SWilliam Kucharski FOVW=0x40, PUN_LinkChg=0x20, RXOVW=0x10,
126*1b8adde7SWilliam Kucharski TER=0x08, TOK=0x04, RER=0x02, ROK=0x01
127*1b8adde7SWilliam Kucharski };
128*1b8adde7SWilliam Kucharski
129*1b8adde7SWilliam Kucharski /* Interrupt register bits, using my own meaningful names. */
130*1b8adde7SWilliam Kucharski enum IntrStatusBits {
131*1b8adde7SWilliam Kucharski PCIErr=0x8000, PCSTimeout=0x4000, CableLenChange= 0x2000,
132*1b8adde7SWilliam Kucharski RxFIFOOver=0x40, RxUnderrun=0x20, RxOverflow=0x10,
133*1b8adde7SWilliam Kucharski TxErr=0x08, TxOK=0x04, RxErr=0x02, RxOK=0x01,
134*1b8adde7SWilliam Kucharski };
135*1b8adde7SWilliam Kucharski enum TxStatusBits {
136*1b8adde7SWilliam Kucharski TxHostOwns=0x2000, TxUnderrun=0x4000, TxStatOK=0x8000,
137*1b8adde7SWilliam Kucharski TxOutOfWindow=0x20000000, TxAborted=0x40000000,
138*1b8adde7SWilliam Kucharski TxCarrierLost=0x80000000,
139*1b8adde7SWilliam Kucharski };
140*1b8adde7SWilliam Kucharski enum RxStatusBits {
141*1b8adde7SWilliam Kucharski RxMulticast=0x8000, RxPhysical=0x4000, RxBroadcast=0x2000,
142*1b8adde7SWilliam Kucharski RxBadSymbol=0x0020, RxRunt=0x0010, RxTooLong=0x0008, RxCRCErr=0x0004,
143*1b8adde7SWilliam Kucharski RxBadAlign=0x0002, RxStatusOK=0x0001,
144*1b8adde7SWilliam Kucharski };
145*1b8adde7SWilliam Kucharski
146*1b8adde7SWilliam Kucharski enum MediaStatusBits {
147*1b8adde7SWilliam Kucharski MSRTxFlowEnable=0x80, MSRRxFlowEnable=0x40, MSRSpeed10=0x08,
148*1b8adde7SWilliam Kucharski MSRLinkFail=0x04, MSRRxPauseFlag=0x02, MSRTxPauseFlag=0x01,
149*1b8adde7SWilliam Kucharski };
150*1b8adde7SWilliam Kucharski
151*1b8adde7SWilliam Kucharski enum MIIBMCRBits {
152*1b8adde7SWilliam Kucharski BMCRReset=0x8000, BMCRSpeed100=0x2000, BMCRNWayEnable=0x1000,
153*1b8adde7SWilliam Kucharski BMCRRestartNWay=0x0200, BMCRDuplex=0x0100,
154*1b8adde7SWilliam Kucharski };
155*1b8adde7SWilliam Kucharski
156*1b8adde7SWilliam Kucharski enum CSCRBits {
157*1b8adde7SWilliam Kucharski CSCR_LinkOKBit=0x0400, CSCR_LinkChangeBit=0x0800,
158*1b8adde7SWilliam Kucharski CSCR_LinkStatusBits=0x0f000, CSCR_LinkDownOffCmd=0x003c0,
159*1b8adde7SWilliam Kucharski CSCR_LinkDownCmd=0x0f3c0,
160*1b8adde7SWilliam Kucharski };
161*1b8adde7SWilliam Kucharski
162*1b8adde7SWilliam Kucharski /* Bits in RxConfig. */
163*1b8adde7SWilliam Kucharski enum rx_mode_bits {
164*1b8adde7SWilliam Kucharski RxCfgWrap=0x80,
165*1b8adde7SWilliam Kucharski AcceptErr=0x20, AcceptRunt=0x10, AcceptBroadcast=0x08,
166*1b8adde7SWilliam Kucharski AcceptMulticast=0x04, AcceptMyPhys=0x02, AcceptAllPhys=0x01,
167*1b8adde7SWilliam Kucharski };
168*1b8adde7SWilliam Kucharski
169*1b8adde7SWilliam Kucharski static unsigned int cur_rx,cur_tx;
170*1b8adde7SWilliam Kucharski
171*1b8adde7SWilliam Kucharski /* The RTL8139 can only transmit from a contiguous, aligned memory block. */
172*1b8adde7SWilliam Kucharski static unsigned char tx_buffer[TX_BUF_SIZE] __attribute__((aligned(4)));
173*1b8adde7SWilliam Kucharski static unsigned char rx_ring[RX_BUF_LEN+16] __attribute__((aligned(4)));
174*1b8adde7SWilliam Kucharski
175*1b8adde7SWilliam Kucharski static int rtl8139_probe(struct dev *dev, struct pci_device *pci);
176*1b8adde7SWilliam Kucharski static int read_eeprom(struct nic *nic, int location, int addr_len);
177*1b8adde7SWilliam Kucharski static void rtl_reset(struct nic *nic);
178*1b8adde7SWilliam Kucharski static void rtl_transmit(struct nic *nic, const char *destaddr,
179*1b8adde7SWilliam Kucharski unsigned int type, unsigned int len, const char *data);
180*1b8adde7SWilliam Kucharski static int rtl_poll(struct nic *nic, int retrieve);
181*1b8adde7SWilliam Kucharski static void rtl_disable(struct dev *);
182*1b8adde7SWilliam Kucharski static void rtl_irq(struct nic *nic, irq_action_t action);
183*1b8adde7SWilliam Kucharski
184*1b8adde7SWilliam Kucharski
rtl8139_probe(struct dev * dev,struct pci_device * pci)185*1b8adde7SWilliam Kucharski static int rtl8139_probe(struct dev *dev, struct pci_device *pci)
186*1b8adde7SWilliam Kucharski {
187*1b8adde7SWilliam Kucharski struct nic *nic = (struct nic *)dev;
188*1b8adde7SWilliam Kucharski int i;
189*1b8adde7SWilliam Kucharski int speed10, fullduplex;
190*1b8adde7SWilliam Kucharski int addr_len;
191*1b8adde7SWilliam Kucharski unsigned short *ap = (unsigned short*)nic->node_addr;
192*1b8adde7SWilliam Kucharski
193*1b8adde7SWilliam Kucharski /* There are enough "RTL8139" strings on the console already, so
194*1b8adde7SWilliam Kucharski * be brief and concentrate on the interesting pieces of info... */
195*1b8adde7SWilliam Kucharski printf(" - ");
196*1b8adde7SWilliam Kucharski
197*1b8adde7SWilliam Kucharski /* Mask the bit that says "this is an io addr" */
198*1b8adde7SWilliam Kucharski nic->ioaddr = pci->ioaddr & ~3;
199*1b8adde7SWilliam Kucharski
200*1b8adde7SWilliam Kucharski /* Copy IRQ from PCI information */
201*1b8adde7SWilliam Kucharski nic->irqno = pci->irq;
202*1b8adde7SWilliam Kucharski
203*1b8adde7SWilliam Kucharski adjust_pci_device(pci);
204*1b8adde7SWilliam Kucharski
205*1b8adde7SWilliam Kucharski /* Bring the chip out of low-power mode. */
206*1b8adde7SWilliam Kucharski outb(0x00, nic->ioaddr + Config1);
207*1b8adde7SWilliam Kucharski
208*1b8adde7SWilliam Kucharski addr_len = read_eeprom(nic,0,8) == 0x8129 ? 8 : 6;
209*1b8adde7SWilliam Kucharski for (i = 0; i < 3; i++)
210*1b8adde7SWilliam Kucharski *ap++ = read_eeprom(nic,i + 7,addr_len);
211*1b8adde7SWilliam Kucharski
212*1b8adde7SWilliam Kucharski speed10 = inb(nic->ioaddr + MediaStatus) & MSRSpeed10;
213*1b8adde7SWilliam Kucharski fullduplex = inw(nic->ioaddr + MII_BMCR) & BMCRDuplex;
214*1b8adde7SWilliam Kucharski printf("ioaddr %#hX, irq %d, addr %! %sMbps %s-duplex\n", nic->ioaddr,
215*1b8adde7SWilliam Kucharski nic->irqno, nic->node_addr, speed10 ? "10" : "100",
216*1b8adde7SWilliam Kucharski fullduplex ? "full" : "half");
217*1b8adde7SWilliam Kucharski
218*1b8adde7SWilliam Kucharski rtl_reset(nic);
219*1b8adde7SWilliam Kucharski
220*1b8adde7SWilliam Kucharski if (inb(nic->ioaddr + MediaStatus) & MSRLinkFail) {
221*1b8adde7SWilliam Kucharski printf("Cable not connected or other link failure\n");
222*1b8adde7SWilliam Kucharski return(0);
223*1b8adde7SWilliam Kucharski }
224*1b8adde7SWilliam Kucharski
225*1b8adde7SWilliam Kucharski dev->disable = rtl_disable;
226*1b8adde7SWilliam Kucharski nic->poll = rtl_poll;
227*1b8adde7SWilliam Kucharski nic->transmit = rtl_transmit;
228*1b8adde7SWilliam Kucharski nic->irq = rtl_irq;
229*1b8adde7SWilliam Kucharski
230*1b8adde7SWilliam Kucharski return 1;
231*1b8adde7SWilliam Kucharski }
232*1b8adde7SWilliam Kucharski
233*1b8adde7SWilliam Kucharski /* Serial EEPROM section. */
234*1b8adde7SWilliam Kucharski
235*1b8adde7SWilliam Kucharski /* EEPROM_Ctrl bits. */
236*1b8adde7SWilliam Kucharski #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */
237*1b8adde7SWilliam Kucharski #define EE_CS 0x08 /* EEPROM chip select. */
238*1b8adde7SWilliam Kucharski #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */
239*1b8adde7SWilliam Kucharski #define EE_WRITE_0 0x00
240*1b8adde7SWilliam Kucharski #define EE_WRITE_1 0x02
241*1b8adde7SWilliam Kucharski #define EE_DATA_READ 0x01 /* EEPROM chip data out. */
242*1b8adde7SWilliam Kucharski #define EE_ENB (0x80 | EE_CS)
243*1b8adde7SWilliam Kucharski
244*1b8adde7SWilliam Kucharski /*
245*1b8adde7SWilliam Kucharski Delay between EEPROM clock transitions.
246*1b8adde7SWilliam Kucharski No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
247*1b8adde7SWilliam Kucharski */
248*1b8adde7SWilliam Kucharski
249*1b8adde7SWilliam Kucharski #define eeprom_delay() inl(ee_addr)
250*1b8adde7SWilliam Kucharski
251*1b8adde7SWilliam Kucharski /* The EEPROM commands include the alway-set leading bit. */
252*1b8adde7SWilliam Kucharski #define EE_WRITE_CMD (5)
253*1b8adde7SWilliam Kucharski #define EE_READ_CMD (6)
254*1b8adde7SWilliam Kucharski #define EE_ERASE_CMD (7)
255*1b8adde7SWilliam Kucharski
read_eeprom(struct nic * nic,int location,int addr_len)256*1b8adde7SWilliam Kucharski static int read_eeprom(struct nic *nic, int location, int addr_len)
257*1b8adde7SWilliam Kucharski {
258*1b8adde7SWilliam Kucharski int i;
259*1b8adde7SWilliam Kucharski unsigned int retval = 0;
260*1b8adde7SWilliam Kucharski long ee_addr = nic->ioaddr + Cfg9346;
261*1b8adde7SWilliam Kucharski int read_cmd = location | (EE_READ_CMD << addr_len);
262*1b8adde7SWilliam Kucharski
263*1b8adde7SWilliam Kucharski outb(EE_ENB & ~EE_CS, ee_addr);
264*1b8adde7SWilliam Kucharski outb(EE_ENB, ee_addr);
265*1b8adde7SWilliam Kucharski eeprom_delay();
266*1b8adde7SWilliam Kucharski
267*1b8adde7SWilliam Kucharski /* Shift the read command bits out. */
268*1b8adde7SWilliam Kucharski for (i = 4 + addr_len; i >= 0; i--) {
269*1b8adde7SWilliam Kucharski int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0;
270*1b8adde7SWilliam Kucharski outb(EE_ENB | dataval, ee_addr);
271*1b8adde7SWilliam Kucharski eeprom_delay();
272*1b8adde7SWilliam Kucharski outb(EE_ENB | dataval | EE_SHIFT_CLK, ee_addr);
273*1b8adde7SWilliam Kucharski eeprom_delay();
274*1b8adde7SWilliam Kucharski }
275*1b8adde7SWilliam Kucharski outb(EE_ENB, ee_addr);
276*1b8adde7SWilliam Kucharski eeprom_delay();
277*1b8adde7SWilliam Kucharski
278*1b8adde7SWilliam Kucharski for (i = 16; i > 0; i--) {
279*1b8adde7SWilliam Kucharski outb(EE_ENB | EE_SHIFT_CLK, ee_addr);
280*1b8adde7SWilliam Kucharski eeprom_delay();
281*1b8adde7SWilliam Kucharski retval = (retval << 1) | ((inb(ee_addr) & EE_DATA_READ) ? 1 : 0);
282*1b8adde7SWilliam Kucharski outb(EE_ENB, ee_addr);
283*1b8adde7SWilliam Kucharski eeprom_delay();
284*1b8adde7SWilliam Kucharski }
285*1b8adde7SWilliam Kucharski
286*1b8adde7SWilliam Kucharski /* Terminate the EEPROM access. */
287*1b8adde7SWilliam Kucharski outb(~EE_CS, ee_addr);
288*1b8adde7SWilliam Kucharski eeprom_delay();
289*1b8adde7SWilliam Kucharski return retval;
290*1b8adde7SWilliam Kucharski }
291*1b8adde7SWilliam Kucharski
292*1b8adde7SWilliam Kucharski static const unsigned int rtl8139_rx_config =
293*1b8adde7SWilliam Kucharski (RX_BUF_LEN_IDX << 11) |
294*1b8adde7SWilliam Kucharski (RX_FIFO_THRESH << 13) |
295*1b8adde7SWilliam Kucharski (RX_DMA_BURST << 8);
296*1b8adde7SWilliam Kucharski
set_rx_mode(struct nic * nic)297*1b8adde7SWilliam Kucharski static void set_rx_mode(struct nic *nic) {
298*1b8adde7SWilliam Kucharski unsigned int mc_filter[2];
299*1b8adde7SWilliam Kucharski int rx_mode;
300*1b8adde7SWilliam Kucharski /* !IFF_PROMISC */
301*1b8adde7SWilliam Kucharski rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys;
302*1b8adde7SWilliam Kucharski mc_filter[1] = mc_filter[0] = 0xffffffff;
303*1b8adde7SWilliam Kucharski
304*1b8adde7SWilliam Kucharski outl(rtl8139_rx_config | rx_mode, nic->ioaddr + RxConfig);
305*1b8adde7SWilliam Kucharski
306*1b8adde7SWilliam Kucharski outl(mc_filter[0], nic->ioaddr + MAR0 + 0);
307*1b8adde7SWilliam Kucharski outl(mc_filter[1], nic->ioaddr + MAR0 + 4);
308*1b8adde7SWilliam Kucharski }
309*1b8adde7SWilliam Kucharski
rtl_reset(struct nic * nic)310*1b8adde7SWilliam Kucharski static void rtl_reset(struct nic* nic)
311*1b8adde7SWilliam Kucharski {
312*1b8adde7SWilliam Kucharski int i;
313*1b8adde7SWilliam Kucharski
314*1b8adde7SWilliam Kucharski outb(CmdReset, nic->ioaddr + ChipCmd);
315*1b8adde7SWilliam Kucharski
316*1b8adde7SWilliam Kucharski cur_rx = 0;
317*1b8adde7SWilliam Kucharski cur_tx = 0;
318*1b8adde7SWilliam Kucharski
319*1b8adde7SWilliam Kucharski /* Give the chip 10ms to finish the reset. */
320*1b8adde7SWilliam Kucharski load_timer2(10*TICKS_PER_MS);
321*1b8adde7SWilliam Kucharski while ((inb(nic->ioaddr + ChipCmd) & CmdReset) != 0 &&
322*1b8adde7SWilliam Kucharski timer2_running())
323*1b8adde7SWilliam Kucharski /* wait */;
324*1b8adde7SWilliam Kucharski
325*1b8adde7SWilliam Kucharski for (i = 0; i < ETH_ALEN; i++)
326*1b8adde7SWilliam Kucharski outb(nic->node_addr[i], nic->ioaddr + MAC0 + i);
327*1b8adde7SWilliam Kucharski
328*1b8adde7SWilliam Kucharski /* Must enable Tx/Rx before setting transfer thresholds! */
329*1b8adde7SWilliam Kucharski outb(CmdRxEnb | CmdTxEnb, nic->ioaddr + ChipCmd);
330*1b8adde7SWilliam Kucharski outl((RX_FIFO_THRESH<<13) | (RX_BUF_LEN_IDX<<11) | (RX_DMA_BURST<<8),
331*1b8adde7SWilliam Kucharski nic->ioaddr + RxConfig); /* accept no frames yet! */
332*1b8adde7SWilliam Kucharski outl((TX_DMA_BURST<<8)|0x03000000, nic->ioaddr + TxConfig);
333*1b8adde7SWilliam Kucharski
334*1b8adde7SWilliam Kucharski /* The Linux driver changes Config1 here to use a different LED pattern
335*1b8adde7SWilliam Kucharski * for half duplex or full/autodetect duplex (for full/autodetect, the
336*1b8adde7SWilliam Kucharski * outputs are TX/RX, Link10/100, FULL, while for half duplex it uses
337*1b8adde7SWilliam Kucharski * TX/RX, Link100, Link10). This is messy, because it doesn't match
338*1b8adde7SWilliam Kucharski * the inscription on the mounting bracket. It should not be changed
339*1b8adde7SWilliam Kucharski * from the configuration EEPROM default, because the card manufacturer
340*1b8adde7SWilliam Kucharski * should have set that to match the card. */
341*1b8adde7SWilliam Kucharski
342*1b8adde7SWilliam Kucharski #ifdef DEBUG_RX
343*1b8adde7SWilliam Kucharski printf("rx ring address is %X\n",(unsigned long)rx_ring);
344*1b8adde7SWilliam Kucharski #endif
345*1b8adde7SWilliam Kucharski outl((unsigned long)virt_to_bus(rx_ring), nic->ioaddr + RxBuf);
346*1b8adde7SWilliam Kucharski
347*1b8adde7SWilliam Kucharski
348*1b8adde7SWilliam Kucharski
349*1b8adde7SWilliam Kucharski /* If we add multicast support, the MAR0 register would have to be
350*1b8adde7SWilliam Kucharski * initialized to 0xffffffffffffffff (two 32 bit accesses). Etherboot
351*1b8adde7SWilliam Kucharski * only needs broadcast (for ARP/RARP/BOOTP/DHCP) and unicast. */
352*1b8adde7SWilliam Kucharski
353*1b8adde7SWilliam Kucharski outb(CmdRxEnb | CmdTxEnb, nic->ioaddr + ChipCmd);
354*1b8adde7SWilliam Kucharski
355*1b8adde7SWilliam Kucharski outl(rtl8139_rx_config, nic->ioaddr + RxConfig);
356*1b8adde7SWilliam Kucharski
357*1b8adde7SWilliam Kucharski /* Start the chip's Tx and Rx process. */
358*1b8adde7SWilliam Kucharski outl(0, nic->ioaddr + RxMissed);
359*1b8adde7SWilliam Kucharski
360*1b8adde7SWilliam Kucharski /* set_rx_mode */
361*1b8adde7SWilliam Kucharski set_rx_mode(nic);
362*1b8adde7SWilliam Kucharski
363*1b8adde7SWilliam Kucharski /* Disable all known interrupts by setting the interrupt mask. */
364*1b8adde7SWilliam Kucharski outw(0, nic->ioaddr + IntrMask);
365*1b8adde7SWilliam Kucharski }
366*1b8adde7SWilliam Kucharski
rtl_transmit(struct nic * nic,const char * destaddr,unsigned int type,unsigned int len,const char * data)367*1b8adde7SWilliam Kucharski static void rtl_transmit(struct nic *nic, const char *destaddr,
368*1b8adde7SWilliam Kucharski unsigned int type, unsigned int len, const char *data)
369*1b8adde7SWilliam Kucharski {
370*1b8adde7SWilliam Kucharski unsigned int status, to, nstype;
371*1b8adde7SWilliam Kucharski unsigned long txstatus;
372*1b8adde7SWilliam Kucharski
373*1b8adde7SWilliam Kucharski /* nstype assignment moved up here to avoid gcc 3.0.3 compiler bug */
374*1b8adde7SWilliam Kucharski nstype = htons(type);
375*1b8adde7SWilliam Kucharski memcpy(tx_buffer, destaddr, ETH_ALEN);
376*1b8adde7SWilliam Kucharski memcpy(tx_buffer + ETH_ALEN, nic->node_addr, ETH_ALEN);
377*1b8adde7SWilliam Kucharski memcpy(tx_buffer + 2 * ETH_ALEN, &nstype, 2);
378*1b8adde7SWilliam Kucharski memcpy(tx_buffer + ETH_HLEN, data, len);
379*1b8adde7SWilliam Kucharski
380*1b8adde7SWilliam Kucharski len += ETH_HLEN;
381*1b8adde7SWilliam Kucharski #ifdef DEBUG_TX
382*1b8adde7SWilliam Kucharski printf("sending %d bytes ethtype %hX\n", len, type);
383*1b8adde7SWilliam Kucharski #endif
384*1b8adde7SWilliam Kucharski
385*1b8adde7SWilliam Kucharski /* Note: RTL8139 doesn't auto-pad, send minimum payload (another 4
386*1b8adde7SWilliam Kucharski * bytes are sent automatically for the FCS, totalling to 64 bytes). */
387*1b8adde7SWilliam Kucharski while (len < ETH_ZLEN) {
388*1b8adde7SWilliam Kucharski tx_buffer[len++] = '\0';
389*1b8adde7SWilliam Kucharski }
390*1b8adde7SWilliam Kucharski
391*1b8adde7SWilliam Kucharski outl((unsigned long)virt_to_bus(tx_buffer), nic->ioaddr + TxAddr0 + cur_tx*4);
392*1b8adde7SWilliam Kucharski outl(((TX_FIFO_THRESH<<11) & 0x003f0000) | len,
393*1b8adde7SWilliam Kucharski nic->ioaddr + TxStatus0 + cur_tx*4);
394*1b8adde7SWilliam Kucharski
395*1b8adde7SWilliam Kucharski to = currticks() + RTL_TIMEOUT;
396*1b8adde7SWilliam Kucharski
397*1b8adde7SWilliam Kucharski do {
398*1b8adde7SWilliam Kucharski status = inw(nic->ioaddr + IntrStatus);
399*1b8adde7SWilliam Kucharski /* Only acknlowledge interrupt sources we can properly handle
400*1b8adde7SWilliam Kucharski * here - the RxOverflow/RxFIFOOver MUST be handled in the
401*1b8adde7SWilliam Kucharski * rtl_poll() function. */
402*1b8adde7SWilliam Kucharski outw(status & (TxOK | TxErr | PCIErr), nic->ioaddr + IntrStatus);
403*1b8adde7SWilliam Kucharski if ((status & (TxOK | TxErr | PCIErr)) != 0) break;
404*1b8adde7SWilliam Kucharski } while (currticks() < to);
405*1b8adde7SWilliam Kucharski
406*1b8adde7SWilliam Kucharski txstatus = inl(nic->ioaddr+ TxStatus0 + cur_tx*4);
407*1b8adde7SWilliam Kucharski
408*1b8adde7SWilliam Kucharski if (status & TxOK) {
409*1b8adde7SWilliam Kucharski cur_tx = (cur_tx + 1) % NUM_TX_DESC;
410*1b8adde7SWilliam Kucharski #ifdef DEBUG_TX
411*1b8adde7SWilliam Kucharski printf("tx done (%d ticks), status %hX txstatus %X\n",
412*1b8adde7SWilliam Kucharski to-currticks(), status, txstatus);
413*1b8adde7SWilliam Kucharski #endif
414*1b8adde7SWilliam Kucharski } else {
415*1b8adde7SWilliam Kucharski #ifdef DEBUG_TX
416*1b8adde7SWilliam Kucharski printf("tx timeout/error (%d ticks), status %hX txstatus %X\n",
417*1b8adde7SWilliam Kucharski currticks()-to, status, txstatus);
418*1b8adde7SWilliam Kucharski #endif
419*1b8adde7SWilliam Kucharski rtl_reset(nic);
420*1b8adde7SWilliam Kucharski }
421*1b8adde7SWilliam Kucharski }
422*1b8adde7SWilliam Kucharski
rtl_poll(struct nic * nic,int retrieve)423*1b8adde7SWilliam Kucharski static int rtl_poll(struct nic *nic, int retrieve)
424*1b8adde7SWilliam Kucharski {
425*1b8adde7SWilliam Kucharski unsigned int status;
426*1b8adde7SWilliam Kucharski unsigned int ring_offs;
427*1b8adde7SWilliam Kucharski unsigned int rx_size, rx_status;
428*1b8adde7SWilliam Kucharski
429*1b8adde7SWilliam Kucharski if (inb(nic->ioaddr + ChipCmd) & RxBufEmpty) {
430*1b8adde7SWilliam Kucharski return 0;
431*1b8adde7SWilliam Kucharski }
432*1b8adde7SWilliam Kucharski
433*1b8adde7SWilliam Kucharski /* There is a packet ready */
434*1b8adde7SWilliam Kucharski if ( ! retrieve ) return 1;
435*1b8adde7SWilliam Kucharski
436*1b8adde7SWilliam Kucharski status = inw(nic->ioaddr + IntrStatus);
437*1b8adde7SWilliam Kucharski /* See below for the rest of the interrupt acknowledges. */
438*1b8adde7SWilliam Kucharski outw(status & ~(RxFIFOOver | RxOverflow | RxOK), nic->ioaddr + IntrStatus);
439*1b8adde7SWilliam Kucharski
440*1b8adde7SWilliam Kucharski #ifdef DEBUG_RX
441*1b8adde7SWilliam Kucharski printf("rtl_poll: int %hX ", status);
442*1b8adde7SWilliam Kucharski #endif
443*1b8adde7SWilliam Kucharski
444*1b8adde7SWilliam Kucharski ring_offs = cur_rx % RX_BUF_LEN;
445*1b8adde7SWilliam Kucharski rx_status = *(unsigned int*)(rx_ring + ring_offs);
446*1b8adde7SWilliam Kucharski rx_size = rx_status >> 16;
447*1b8adde7SWilliam Kucharski rx_status &= 0xffff;
448*1b8adde7SWilliam Kucharski
449*1b8adde7SWilliam Kucharski if ((rx_status & (RxBadSymbol|RxRunt|RxTooLong|RxCRCErr|RxBadAlign)) ||
450*1b8adde7SWilliam Kucharski (rx_size < ETH_ZLEN) || (rx_size > ETH_FRAME_LEN + 4)) {
451*1b8adde7SWilliam Kucharski printf("rx error %hX\n", rx_status);
452*1b8adde7SWilliam Kucharski rtl_reset(nic); /* this clears all interrupts still pending */
453*1b8adde7SWilliam Kucharski return 0;
454*1b8adde7SWilliam Kucharski }
455*1b8adde7SWilliam Kucharski
456*1b8adde7SWilliam Kucharski /* Received a good packet */
457*1b8adde7SWilliam Kucharski nic->packetlen = rx_size - 4; /* no one cares about the FCS */
458*1b8adde7SWilliam Kucharski if (ring_offs+4+rx_size-4 > RX_BUF_LEN) {
459*1b8adde7SWilliam Kucharski int semi_count = RX_BUF_LEN - ring_offs - 4;
460*1b8adde7SWilliam Kucharski
461*1b8adde7SWilliam Kucharski memcpy(nic->packet, rx_ring + ring_offs + 4, semi_count);
462*1b8adde7SWilliam Kucharski memcpy(nic->packet+semi_count, rx_ring, rx_size-4-semi_count);
463*1b8adde7SWilliam Kucharski #ifdef DEBUG_RX
464*1b8adde7SWilliam Kucharski printf("rx packet %d+%d bytes", semi_count,rx_size-4-semi_count);
465*1b8adde7SWilliam Kucharski #endif
466*1b8adde7SWilliam Kucharski } else {
467*1b8adde7SWilliam Kucharski memcpy(nic->packet, rx_ring + ring_offs + 4, nic->packetlen);
468*1b8adde7SWilliam Kucharski #ifdef DEBUG_RX
469*1b8adde7SWilliam Kucharski printf("rx packet %d bytes", rx_size-4);
470*1b8adde7SWilliam Kucharski #endif
471*1b8adde7SWilliam Kucharski }
472*1b8adde7SWilliam Kucharski #ifdef DEBUG_RX
473*1b8adde7SWilliam Kucharski printf(" at %X type %hhX%hhX rxstatus %hX\n",
474*1b8adde7SWilliam Kucharski (unsigned long)(rx_ring+ring_offs+4),
475*1b8adde7SWilliam Kucharski nic->packet[12], nic->packet[13], rx_status);
476*1b8adde7SWilliam Kucharski #endif
477*1b8adde7SWilliam Kucharski cur_rx = (cur_rx + rx_size + 4 + 3) & ~3;
478*1b8adde7SWilliam Kucharski outw(cur_rx - 16, nic->ioaddr + RxBufPtr);
479*1b8adde7SWilliam Kucharski /* See RTL8139 Programming Guide V0.1 for the official handling of
480*1b8adde7SWilliam Kucharski * Rx overflow situations. The document itself contains basically no
481*1b8adde7SWilliam Kucharski * usable information, except for a few exception handling rules. */
482*1b8adde7SWilliam Kucharski outw(status & (RxFIFOOver | RxOverflow | RxOK), nic->ioaddr + IntrStatus);
483*1b8adde7SWilliam Kucharski return 1;
484*1b8adde7SWilliam Kucharski }
485*1b8adde7SWilliam Kucharski
rtl_irq(struct nic * nic,irq_action_t action)486*1b8adde7SWilliam Kucharski static void rtl_irq(struct nic *nic, irq_action_t action)
487*1b8adde7SWilliam Kucharski {
488*1b8adde7SWilliam Kucharski unsigned int mask;
489*1b8adde7SWilliam Kucharski /* Bit of a guess as to which interrupts we should allow */
490*1b8adde7SWilliam Kucharski unsigned int interested = ROK | RER | RXOVW | FOVW | SERR;
491*1b8adde7SWilliam Kucharski
492*1b8adde7SWilliam Kucharski switch ( action ) {
493*1b8adde7SWilliam Kucharski case DISABLE :
494*1b8adde7SWilliam Kucharski case ENABLE :
495*1b8adde7SWilliam Kucharski mask = inw(nic->ioaddr + IntrMask);
496*1b8adde7SWilliam Kucharski mask = mask & ~interested;
497*1b8adde7SWilliam Kucharski if ( action == ENABLE ) mask = mask | interested;
498*1b8adde7SWilliam Kucharski outw(mask, nic->ioaddr + IntrMask);
499*1b8adde7SWilliam Kucharski break;
500*1b8adde7SWilliam Kucharski case FORCE :
501*1b8adde7SWilliam Kucharski /* Apparently writing a 1 to this read-only bit of a
502*1b8adde7SWilliam Kucharski * read-only and otherwise unrelated register will
503*1b8adde7SWilliam Kucharski * force an interrupt. If you ever want to see how
504*1b8adde7SWilliam Kucharski * not to write a datasheet, read the one for the
505*1b8adde7SWilliam Kucharski * RTL8139...
506*1b8adde7SWilliam Kucharski */
507*1b8adde7SWilliam Kucharski outb(EROK, nic->ioaddr + RxEarlyStatus);
508*1b8adde7SWilliam Kucharski break;
509*1b8adde7SWilliam Kucharski }
510*1b8adde7SWilliam Kucharski }
511*1b8adde7SWilliam Kucharski
rtl_disable(struct dev * dev)512*1b8adde7SWilliam Kucharski static void rtl_disable(struct dev *dev)
513*1b8adde7SWilliam Kucharski {
514*1b8adde7SWilliam Kucharski struct nic *nic = (struct nic *)dev;
515*1b8adde7SWilliam Kucharski /* merge reset and disable */
516*1b8adde7SWilliam Kucharski rtl_reset(nic);
517*1b8adde7SWilliam Kucharski
518*1b8adde7SWilliam Kucharski /* reset the chip */
519*1b8adde7SWilliam Kucharski outb(CmdReset, nic->ioaddr + ChipCmd);
520*1b8adde7SWilliam Kucharski
521*1b8adde7SWilliam Kucharski /* 10 ms timeout */
522*1b8adde7SWilliam Kucharski load_timer2(10*TICKS_PER_MS);
523*1b8adde7SWilliam Kucharski while ((inb(nic->ioaddr + ChipCmd) & CmdReset) != 0 && timer2_running())
524*1b8adde7SWilliam Kucharski /* wait */;
525*1b8adde7SWilliam Kucharski }
526*1b8adde7SWilliam Kucharski
527*1b8adde7SWilliam Kucharski static struct pci_id rtl8139_nics[] = {
528*1b8adde7SWilliam Kucharski PCI_ROM(0x10ec, 0x8129, "rtl8129", "Realtek 8129"),
529*1b8adde7SWilliam Kucharski PCI_ROM(0x10ec, 0x8139, "rtl8139", "Realtek 8139"),
530*1b8adde7SWilliam Kucharski PCI_ROM(0x10ec, 0x8138, "rtl8139b", "Realtek 8139B"),
531*1b8adde7SWilliam Kucharski PCI_ROM(0x1186, 0x1300, "dfe538", "DFE530TX+/DFE538TX"),
532*1b8adde7SWilliam Kucharski PCI_ROM(0x1113, 0x1211, "smc1211-1", "SMC EZ10/100"),
533*1b8adde7SWilliam Kucharski PCI_ROM(0x1112, 0x1211, "smc1211", "SMC EZ10/100"),
534*1b8adde7SWilliam Kucharski PCI_ROM(0x1500, 0x1360, "delta8139", "Delta Electronics 8139"),
535*1b8adde7SWilliam Kucharski PCI_ROM(0x4033, 0x1360, "addtron8139", "Addtron Technology 8139"),
536*1b8adde7SWilliam Kucharski PCI_ROM(0x1186, 0x1340, "dfe690txd", "D-Link DFE690TXD"),
537*1b8adde7SWilliam Kucharski PCI_ROM(0x13d1, 0xab06, "fe2000vx", "AboCom FE2000VX"),
538*1b8adde7SWilliam Kucharski PCI_ROM(0x1259, 0xa117, "allied8139", "Allied Telesyn 8139"),
539*1b8adde7SWilliam Kucharski PCI_ROM(0x14ea, 0xab06, "fnw3603tx", "Planex FNW-3603-TX"),
540*1b8adde7SWilliam Kucharski PCI_ROM(0x14ea, 0xab07, "fnw3800tx", "Planex FNW-3800-TX"),
541*1b8adde7SWilliam Kucharski PCI_ROM(0xffff, 0x8139, "clone-rtl8139", "Cloned 8139"),
542*1b8adde7SWilliam Kucharski };
543*1b8adde7SWilliam Kucharski
544*1b8adde7SWilliam Kucharski struct pci_driver rtl8139_driver = {
545*1b8adde7SWilliam Kucharski .type = NIC_DRIVER,
546*1b8adde7SWilliam Kucharski .name = "RTL8139",
547*1b8adde7SWilliam Kucharski .probe = rtl8139_probe,
548*1b8adde7SWilliam Kucharski .ids = rtl8139_nics,
549*1b8adde7SWilliam Kucharski .id_count = sizeof(rtl8139_nics)/sizeof(rtl8139_nics[0]),
550*1b8adde7SWilliam Kucharski .class = 0,
551*1b8adde7SWilliam Kucharski };
552