1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 1999-2003 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef	_SYS_LIBPRTDIAG_H
28 #define	_SYS_LIBPRTDIAG_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 #ifdef	__cplusplus
33 extern "C" {
34 #endif
35 
36 #include <sys/openpromio.h>
37 #include <sys/cheetahregs.h>
38 #include "pdevinfo.h"
39 #include "display.h"
40 #include "pdevinfo_sun4u.h"
41 #include "display_sun4u.h"
42 
43 #ifdef DEBUG
44 #define	D_PRINTF printf
45 #else
46 #define	D_PRINTF
47 #endif
48 
49 #define	EXIT_MSG(msg, err) \
50 	{ printf("\n%s failed with %d\n", msg, err); exit(err); }
51 
52 /* global data */
53 #define	PCI_DEVICE(x)		((x  >> 11) & 0x1f)
54 #define	PCI_REG_TO_DEV(x)	((x & 0xf800) >> 11)
55 #define	PCI_REG_TO_FUNC(x)	((x & 0x700) >> 8)
56 #define	BUS_TYPE		"UPA"
57 #define	MAX_SLOTS_PER_IO_BD	8
58 
59 
60 int	sys_clk;  /* System clock freq. (in MHz) */
61 
62 /*
63  * Defines for identifying PCI devices
64  */
65 #define	PCI_BRIDGE_CLASS		0x6
66 #define	PCI_CLASS_SHIFT			0x10
67 #define	PCI_PCI_BRIDGE_SUBCLASS		0x4
68 #define	PCI_SUBCLASS_SHIFT		0x8
69 #define	PCI_SUBCLASS_MASK		0xFF00
70 #define	PCI_SUBCLASS_OTHER		0x80
71 
72 #define	CLASS_REG_TO_SUBCLASS(class)	(((class) & PCI_SUBCLASS_MASK) \
73 						>> PCI_SUBCLASS_SHIFT)
74 #define	CLASS_REG_TO_CLASS(class)	((class) >> PCI_CLASS_SHIFT)
75 
76 /*
77  * display functions
78  */
79 int	error_check(Sys_tree *tree, struct system_kstat_data *kstats);
80 int	disp_fail_parts(Sys_tree *tree);
81 void	display_hp_fail_fault(Sys_tree *tree, struct system_kstat_data *kstats);
82 void	display_diaginfo(int flag, Prom_node *root, Sys_tree *tree,
83 	    struct system_kstat_data *kstats);
84 void	resolve_board_types(Sys_tree *);
85 void	display_boardnum(int num);
86 void	display_platform_specific_header(void);
87 
88 /*
89  * cpu functions
90  */
91 void	display_cpu_devices(Sys_tree *);
92 void	display_cpus(Board_node *);
93 void	display_mid(int mid);
94 int	get_cpu_freq(Prom_node *);
95 int	get_ecache_size(Prom_node *);
96 
97 /*
98  * io functions
99  */
100 Prom_node *find_pci_bus(Prom_node *, int, int);
101 int	get_pci_bus(Prom_node *);
102 int	get_pci_device(Prom_node *);
103 int	get_pci_to_pci_device(Prom_node *);
104 void	free_io_cards(struct io_card *);
105 struct	io_card *insert_io_card(struct io_card *, struct io_card *);
106 char	*fmt_manf_id(unsigned int, char *);
107 int	get_sbus_slot(Prom_node *);
108 void	display_io_devices(Sys_tree *tree);
109 void	display_pci(Board_node *bnode);
110 void	display_io_cards(struct io_card *);
111 void	display_ffb(Board_node *, int);
112 void	display_sbus(Board_node *);
113 int	populate_slot_name_arr(Prom_node *pci, int *slot_name_bits,
114 	char **slot_name_arr, int num_slots);
115 int	get_card_frequency(Prom_node *pci);
116 void	get_dev_func_num(Prom_node *card_node, int *dev_no, int *func_no);
117 void	get_pci_class_codes(Prom_node *card_node, int *class_code,
118 	int *subclass_code);
119 int	is_pci_bridge(Prom_node *card_node, char *name);
120 int	is_pci_bridge_other(Prom_node *card_node, char *name);
121 void	get_pci_card_model(Prom_node *card_node, char *model);
122 void	create_io_card_name(Prom_node *card_node, char *name,
123 	char *card_name);
124 void	display_psycho_pci(Board_node *bnode);
125 void	get_slot_number_str(struct io_card *card, char **slot_name_arr,
126 	int slot_name_bits);
127 void	distinguish_identical_io_cards(char *name, Prom_node *node,
128 		struct io_card *card);
129 void	decode_qlc_card_model_prop(Prom_node *card_node, struct io_card *card);
130 
131 /*
132  * kstat functions
133  */
134 void	read_platform_kstats(Sys_tree *tree,
135 	    struct system_kstat_data *sys_kstat,
136 	    struct bd_kstat_data *bdp, struct envctrl_kstat_data *ep);
137 void	read_sun4u_kstats(Sys_tree *, struct system_kstat_data *);
138 
139 /*
140  * memory functions
141  */
142 void	display_memorysize(Sys_tree *tree, struct system_kstat_data *kstats,
143 	    struct grp_info *grps, struct mem_total *memory_total);
144 void	display_memoryconf(Sys_tree *tree, struct grp_info *grps);
145 
146 /*
147  * prom functions
148  */
149 void	platform_disp_prom_version(Sys_tree *);
150 void	disp_prom_version(Prom_node *);
151 void	add_node(Sys_tree *, Prom_node *);
152 Prom_node *find_device(Board_node *, int, char *);
153 Prom_node *walk(Sys_tree *, Prom_node *, int);
154 int	get_pci_class_code_reg(Prom_node *);
155 
156 /*
157  * libdevinfo functions
158  */
159 int	do_devinfo(int, char *, int, int);
160 
161 /*
162  * mc-us3 memory functions and structs
163  */
164 typedef struct memory_bank {
165 	int			id;
166 	int			portid;
167 	ushort_t		valid;
168 	ushort_t		uk;
169 	uint_t			um;
170 	uchar_t			lk;
171 	uchar_t			lm;
172 	uint64_t		bank_size;
173 	char			*bank_status;
174 	struct memory_bank	*next;		/* mc in the devtree */
175 	struct memory_bank	*seg_next;	/* in the segment */
176 } memory_bank_t;
177 
178 typedef struct memory_seg {
179 	int			id;
180 	int			intlv;  /* interleave for this segment */
181 	uint64_t		base;   /* base address for this segment */
182 	uint64_t		size;   /* size of this segment */
183 	int			nbanks; /* number of banks in this segment */
184 	memory_bank_t		*banks; /* pointer to the banks of this seg */
185 	struct memory_seg	*next;
186 } memory_seg_t;
187 
188 #define	NUM_MBANKS_PER_MC		4
189 
190 int	get_us3_mem_regs(Board_node *bnode);
191 void	display_us3_banks(void);
192 int	display_us3_failed_banks(int system_failed);
193 void    print_us3_memory_line(int portid, int bank_id, uint64_t bank_size,
194 	    char *bank_status, uint64_t dimm_size, uint32_t intlv, int seg_id);
195 void	print_us3_failed_memory_line(int portid, int bank_id,
196 	    char *bank_status);
197 
198 #ifdef	__cplusplus
199 }
200 #endif
201 
202 #endif	/* _SYS_LIBPRTDIAG_H */
203