1*d14abf15SRobert Mustacchi #ifndef ECORE_SP_VERBS
2*d14abf15SRobert Mustacchi #define ECORE_SP_VERBS
3*d14abf15SRobert Mustacchi 
4*d14abf15SRobert Mustacchi #ifndef ECORE_ERASE
5*d14abf15SRobert Mustacchi #define ETH_ALEN 6
6*d14abf15SRobert Mustacchi 
7*d14abf15SRobert Mustacchi #include "lm_defs.h"
8*d14abf15SRobert Mustacchi #include "listq.h"
9*d14abf15SRobert Mustacchi #include "eth_constants.h"
10*d14abf15SRobert Mustacchi #include "bcm_utils.h"
11*d14abf15SRobert Mustacchi #include "mm.h"
12*d14abf15SRobert Mustacchi 
13*d14abf15SRobert Mustacchi #ifdef __LINUX
14*d14abf15SRobert Mustacchi #include <linux/time.h>
15*d14abf15SRobert Mustacchi #include <linux/mutex.h>
16*d14abf15SRobert Mustacchi #define ECORE_ALIGN(x, a) ALIGN(x, a)
17*d14abf15SRobert Mustacchi #else
18*d14abf15SRobert Mustacchi #define ECORE_ALIGN(x, a) ((((x) + (a) - 1) / (a)) * (a))
19*d14abf15SRobert Mustacchi 
20*d14abf15SRobert Mustacchi typedef volatile unsigned long atomic_t;
21*d14abf15SRobert Mustacchi #endif
22*d14abf15SRobert Mustacchi 
23*d14abf15SRobert Mustacchi /* FIXME (MichalS): move to bcmtypes.h 26-Sep-10 */
24*d14abf15SRobert Mustacchi typedef int BOOL;
25*d14abf15SRobert Mustacchi 
26*d14abf15SRobert Mustacchi /* None-atomic macros */
27*d14abf15SRobert Mustacchi #define ECORE_SET_BIT_NA(bit, var) SET_BIT(*(var), bit)
28*d14abf15SRobert Mustacchi #define ECORE_CLEAR_BIT_NA(bit, var) RESET_BIT(*(var), bit)
29*d14abf15SRobert Mustacchi 
30*d14abf15SRobert Mustacchi #ifdef __LINUX
31*d14abf15SRobert Mustacchi typedef struct mutex ECORE_MUTEX;
32*d14abf15SRobert Mustacchi 
33*d14abf15SRobert Mustacchi /* Bits tweaking */
34*d14abf15SRobert Mustacchi #define ECORE_SET_BIT(bit, var)   mm_atomic_or(var, (1<<bit))
35*d14abf15SRobert Mustacchi #define ECORE_CLEAR_BIT(bit, var) mm_atomic_and(var, ~(1<<bit))
36*d14abf15SRobert Mustacchi 
37*d14abf15SRobert Mustacchi #elif defined(USER_LINUX)
38*d14abf15SRobert Mustacchi typedef int ECORE_MUTEX;
39*d14abf15SRobert Mustacchi 
40*d14abf15SRobert Mustacchi /* Bits tweaking */
41*d14abf15SRobert Mustacchi #define ECORE_SET_BIT(bit, var)   set_bit(bit, var)
42*d14abf15SRobert Mustacchi #define ECORE_CLEAR_BIT(bit, var) clear_bit(bit, var)
43*d14abf15SRobert Mustacchi #else /* VBD */
44*d14abf15SRobert Mustacchi 
45*d14abf15SRobert Mustacchi typedef int ECORE_MUTEX;
46*d14abf15SRobert Mustacchi 
47*d14abf15SRobert Mustacchi /* Bits tweaking */
48*d14abf15SRobert Mustacchi #define ECORE_SET_BIT(bit, var)   mm_atomic_long_or(var, (1<<bit))
49*d14abf15SRobert Mustacchi #define ECORE_CLEAR_BIT(bit, var) mm_atomic_long_and(var, ~(1<<bit))
50*d14abf15SRobert Mustacchi #endif
51*d14abf15SRobert Mustacchi 
52*d14abf15SRobert Mustacchi /************************ Types used in ecore *********************************/
53*d14abf15SRobert Mustacchi 
54*d14abf15SRobert Mustacchi enum _ecore_status_t {
55*d14abf15SRobert Mustacchi 	ECORE_EXISTS  = -6,
56*d14abf15SRobert Mustacchi 	ECORE_IO      = -5,
57*d14abf15SRobert Mustacchi 	ECORE_TIMEOUT = -4,
58*d14abf15SRobert Mustacchi 	ECORE_INVAL   = -3,
59*d14abf15SRobert Mustacchi 	ECORE_BUSY    = -2,
60*d14abf15SRobert Mustacchi 	ECORE_NOMEM   = -1,
61*d14abf15SRobert Mustacchi 	ECORE_SUCCESS = 0,
62*d14abf15SRobert Mustacchi 	/* PENDING is not an error and should be positive */
63*d14abf15SRobert Mustacchi 	ECORE_PENDING = 1,
64*d14abf15SRobert Mustacchi };
65*d14abf15SRobert Mustacchi 
66*d14abf15SRobert Mustacchi #endif
67*d14abf15SRobert Mustacchi 
68*d14abf15SRobert Mustacchi struct _lm_device_t;
69*d14abf15SRobert Mustacchi struct eth_context;
70*d14abf15SRobert Mustacchi 
71*d14abf15SRobert Mustacchi /* Bits representing general command's configuration */
72*d14abf15SRobert Mustacchi enum {
73*d14abf15SRobert Mustacchi 	RAMROD_TX,
74*d14abf15SRobert Mustacchi 	RAMROD_RX,
75*d14abf15SRobert Mustacchi 	/* Wait until all pending commands complete */
76*d14abf15SRobert Mustacchi 	RAMROD_COMP_WAIT,
77*d14abf15SRobert Mustacchi 	/* Don't send a ramrod, only update a registry */
78*d14abf15SRobert Mustacchi 	RAMROD_DRV_CLR_ONLY,
79*d14abf15SRobert Mustacchi 	/* Configure HW according to the current object state */
80*d14abf15SRobert Mustacchi 	RAMROD_RESTORE,
81*d14abf15SRobert Mustacchi 	 /* Execute the next command now */
82*d14abf15SRobert Mustacchi 	RAMROD_EXEC,
83*d14abf15SRobert Mustacchi 	/* Don't add a new command and continue execution of posponed
84*d14abf15SRobert Mustacchi 	 * commands. If not set a new command will be added to the
85*d14abf15SRobert Mustacchi 	 * pending commands list.
86*d14abf15SRobert Mustacchi 	 */
87*d14abf15SRobert Mustacchi 	RAMROD_CONT,
88*d14abf15SRobert Mustacchi 	/* If there is another pending ramrod, wait until it finishes and
89*d14abf15SRobert Mustacchi 	 * re-try to submit this one. This flag can be set only in sleepable
90*d14abf15SRobert Mustacchi 	 * context, and should not be set from the context that completes the
91*d14abf15SRobert Mustacchi 	 * ramrods as deadlock will occur.
92*d14abf15SRobert Mustacchi 	 */
93*d14abf15SRobert Mustacchi 	RAMROD_RETRY,
94*d14abf15SRobert Mustacchi };
95*d14abf15SRobert Mustacchi 
96*d14abf15SRobert Mustacchi typedef enum {
97*d14abf15SRobert Mustacchi 	ECORE_OBJ_TYPE_RX,
98*d14abf15SRobert Mustacchi 	ECORE_OBJ_TYPE_TX,
99*d14abf15SRobert Mustacchi 	ECORE_OBJ_TYPE_RX_TX,
100*d14abf15SRobert Mustacchi } ecore_obj_type;
101*d14abf15SRobert Mustacchi 
102*d14abf15SRobert Mustacchi /* Public slow path states */
103*d14abf15SRobert Mustacchi enum {
104*d14abf15SRobert Mustacchi 	ECORE_FILTER_MAC_PENDING,
105*d14abf15SRobert Mustacchi 	ECORE_FILTER_VLAN_PENDING,
106*d14abf15SRobert Mustacchi 	ECORE_FILTER_VLAN_MAC_PENDING,
107*d14abf15SRobert Mustacchi 	ECORE_FILTER_RX_MODE_PENDING,
108*d14abf15SRobert Mustacchi 	ECORE_FILTER_RX_MODE_SCHED,
109*d14abf15SRobert Mustacchi 	ECORE_FILTER_ISCSI_ETH_START_SCHED,
110*d14abf15SRobert Mustacchi 	ECORE_FILTER_ISCSI_ETH_STOP_SCHED,
111*d14abf15SRobert Mustacchi 	ECORE_FILTER_FCOE_ETH_START_SCHED,
112*d14abf15SRobert Mustacchi 	ECORE_FILTER_FCOE_ETH_STOP_SCHED,
113*d14abf15SRobert Mustacchi #ifdef ECORE_CHAR_DEV /* ! ECORE_UPSTREAM */
114*d14abf15SRobert Mustacchi 	ECORE_FILTER_BYPASS_RX_MODE_PENDING,
115*d14abf15SRobert Mustacchi 	ECORE_FILTER_BYPASS_MAC_PENDING,
116*d14abf15SRobert Mustacchi 	ECORE_FILTER_BYPASS_RSS_CONF_PENDING,
117*d14abf15SRobert Mustacchi #endif
118*d14abf15SRobert Mustacchi 	ECORE_FILTER_MCAST_PENDING,
119*d14abf15SRobert Mustacchi 	ECORE_FILTER_MCAST_SCHED,
120*d14abf15SRobert Mustacchi 	ECORE_FILTER_RSS_CONF_PENDING,
121*d14abf15SRobert Mustacchi 	ECORE_AFEX_FCOE_Q_UPDATE_PENDING,
122*d14abf15SRobert Mustacchi 	ECORE_AFEX_PENDING_VIFSET_MCP_ACK
123*d14abf15SRobert Mustacchi };
124*d14abf15SRobert Mustacchi 
125*d14abf15SRobert Mustacchi struct ecore_raw_obj {
126*d14abf15SRobert Mustacchi 	u8		func_id;
127*d14abf15SRobert Mustacchi 
128*d14abf15SRobert Mustacchi 	/* Queue params */
129*d14abf15SRobert Mustacchi 	u8		cl_id;
130*d14abf15SRobert Mustacchi 	u32		cid;
131*d14abf15SRobert Mustacchi 
132*d14abf15SRobert Mustacchi 	/* Ramrod data buffer params */
133*d14abf15SRobert Mustacchi 	void		*rdata;
134*d14abf15SRobert Mustacchi 	lm_address_t	rdata_mapping;
135*d14abf15SRobert Mustacchi 
136*d14abf15SRobert Mustacchi 	/* Ramrod state params */
137*d14abf15SRobert Mustacchi 	int		state;   /* "ramrod is pending" state bit */
138*d14abf15SRobert Mustacchi 	unsigned long	*pstate; /* pointer to state buffer */
139*d14abf15SRobert Mustacchi 
140*d14abf15SRobert Mustacchi 	ecore_obj_type	obj_type;
141*d14abf15SRobert Mustacchi 
142*d14abf15SRobert Mustacchi 	int (*wait_comp)(struct _lm_device_t *pdev,
143*d14abf15SRobert Mustacchi 			 struct ecore_raw_obj *o);
144*d14abf15SRobert Mustacchi 
145*d14abf15SRobert Mustacchi 	BOOL (*check_pending)(struct ecore_raw_obj *o);
146*d14abf15SRobert Mustacchi 	void (*clear_pending)(struct ecore_raw_obj *o);
147*d14abf15SRobert Mustacchi 	void (*set_pending)(struct ecore_raw_obj *o);
148*d14abf15SRobert Mustacchi };
149*d14abf15SRobert Mustacchi 
150*d14abf15SRobert Mustacchi /************************* VLAN-MAC commands related parameters ***************/
151*d14abf15SRobert Mustacchi struct ecore_mac_ramrod_data {
152*d14abf15SRobert Mustacchi 	u8 mac[ETH_ALEN];
153*d14abf15SRobert Mustacchi 	u8 is_inner_mac;
154*d14abf15SRobert Mustacchi };
155*d14abf15SRobert Mustacchi 
156*d14abf15SRobert Mustacchi struct ecore_vlan_ramrod_data {
157*d14abf15SRobert Mustacchi 	u16 vlan;
158*d14abf15SRobert Mustacchi };
159*d14abf15SRobert Mustacchi 
160*d14abf15SRobert Mustacchi struct ecore_vlan_mac_ramrod_data {
161*d14abf15SRobert Mustacchi 	u8 mac[ETH_ALEN];
162*d14abf15SRobert Mustacchi 	u8 is_inner_mac;
163*d14abf15SRobert Mustacchi 	u16 vlan;
164*d14abf15SRobert Mustacchi };
165*d14abf15SRobert Mustacchi 
166*d14abf15SRobert Mustacchi union ecore_classification_ramrod_data {
167*d14abf15SRobert Mustacchi 	struct ecore_mac_ramrod_data mac;
168*d14abf15SRobert Mustacchi 	struct ecore_vlan_ramrod_data vlan;
169*d14abf15SRobert Mustacchi 	struct ecore_vlan_mac_ramrod_data vlan_mac;
170*d14abf15SRobert Mustacchi };
171*d14abf15SRobert Mustacchi 
172*d14abf15SRobert Mustacchi /* VLAN_MAC commands */
173*d14abf15SRobert Mustacchi enum ecore_vlan_mac_cmd {
174*d14abf15SRobert Mustacchi 	ECORE_VLAN_MAC_ADD,
175*d14abf15SRobert Mustacchi 	ECORE_VLAN_MAC_DEL,
176*d14abf15SRobert Mustacchi 	ECORE_VLAN_MAC_MOVE,
177*d14abf15SRobert Mustacchi };
178*d14abf15SRobert Mustacchi 
179*d14abf15SRobert Mustacchi struct ecore_vlan_mac_data {
180*d14abf15SRobert Mustacchi 	/* Requested command: ECORE_VLAN_MAC_XX */
181*d14abf15SRobert Mustacchi 	enum ecore_vlan_mac_cmd cmd;
182*d14abf15SRobert Mustacchi 	/* used to contain the data related vlan_mac_flags bits from
183*d14abf15SRobert Mustacchi 	 * ramrod parameters.
184*d14abf15SRobert Mustacchi 	 */
185*d14abf15SRobert Mustacchi 	unsigned long vlan_mac_flags;
186*d14abf15SRobert Mustacchi 
187*d14abf15SRobert Mustacchi 	/* Needed for MOVE command */
188*d14abf15SRobert Mustacchi 	struct ecore_vlan_mac_obj *target_obj;
189*d14abf15SRobert Mustacchi 
190*d14abf15SRobert Mustacchi 	union ecore_classification_ramrod_data u;
191*d14abf15SRobert Mustacchi };
192*d14abf15SRobert Mustacchi 
193*d14abf15SRobert Mustacchi /*************************** Exe Queue obj ************************************/
194*d14abf15SRobert Mustacchi union ecore_exe_queue_cmd_data {
195*d14abf15SRobert Mustacchi 	struct ecore_vlan_mac_data vlan_mac;
196*d14abf15SRobert Mustacchi 
197*d14abf15SRobert Mustacchi 	struct {
198*d14abf15SRobert Mustacchi 		/* TODO */
199*d14abf15SRobert Mustacchi #ifndef ECORE_ERASE
200*d14abf15SRobert Mustacchi 		int TODO;
201*d14abf15SRobert Mustacchi #endif
202*d14abf15SRobert Mustacchi 	} mcast;
203*d14abf15SRobert Mustacchi };
204*d14abf15SRobert Mustacchi 
205*d14abf15SRobert Mustacchi struct ecore_exeq_elem {
206*d14abf15SRobert Mustacchi 	d_list_entry_t		link;
207*d14abf15SRobert Mustacchi 
208*d14abf15SRobert Mustacchi 	/* Length of this element in the exe_chunk. */
209*d14abf15SRobert Mustacchi 	int				cmd_len;
210*d14abf15SRobert Mustacchi 
211*d14abf15SRobert Mustacchi 	union ecore_exe_queue_cmd_data	cmd_data;
212*d14abf15SRobert Mustacchi };
213*d14abf15SRobert Mustacchi 
214*d14abf15SRobert Mustacchi union ecore_qable_obj;
215*d14abf15SRobert Mustacchi 
216*d14abf15SRobert Mustacchi union ecore_exeq_comp_elem {
217*d14abf15SRobert Mustacchi 	union event_ring_elem *elem;
218*d14abf15SRobert Mustacchi };
219*d14abf15SRobert Mustacchi 
220*d14abf15SRobert Mustacchi struct ecore_exe_queue_obj;
221*d14abf15SRobert Mustacchi 
222*d14abf15SRobert Mustacchi typedef int (*exe_q_validate)(struct _lm_device_t *pdev,
223*d14abf15SRobert Mustacchi 			      union ecore_qable_obj *o,
224*d14abf15SRobert Mustacchi 			      struct ecore_exeq_elem *elem);
225*d14abf15SRobert Mustacchi 
226*d14abf15SRobert Mustacchi typedef int (*exe_q_remove)(struct _lm_device_t *pdev,
227*d14abf15SRobert Mustacchi 			    union ecore_qable_obj *o,
228*d14abf15SRobert Mustacchi 			    struct ecore_exeq_elem *elem);
229*d14abf15SRobert Mustacchi 
230*d14abf15SRobert Mustacchi /* Return positive if entry was optimized, 0 - if not, negative
231*d14abf15SRobert Mustacchi  * in case of an error.
232*d14abf15SRobert Mustacchi  */
233*d14abf15SRobert Mustacchi typedef int (*exe_q_optimize)(struct _lm_device_t *pdev,
234*d14abf15SRobert Mustacchi 			      union ecore_qable_obj *o,
235*d14abf15SRobert Mustacchi 			      struct ecore_exeq_elem *elem);
236*d14abf15SRobert Mustacchi typedef int (*exe_q_execute)(struct _lm_device_t *pdev,
237*d14abf15SRobert Mustacchi 			     union ecore_qable_obj *o,
238*d14abf15SRobert Mustacchi 			     d_list_t *exe_chunk,
239*d14abf15SRobert Mustacchi 			     unsigned long *ramrod_flags);
240*d14abf15SRobert Mustacchi typedef struct ecore_exeq_elem *
241*d14abf15SRobert Mustacchi 			(*exe_q_get)(struct ecore_exe_queue_obj *o,
242*d14abf15SRobert Mustacchi 				     struct ecore_exeq_elem *elem);
243*d14abf15SRobert Mustacchi 
244*d14abf15SRobert Mustacchi struct ecore_exe_queue_obj {
245*d14abf15SRobert Mustacchi 	/* Commands pending for an execution. */
246*d14abf15SRobert Mustacchi 	d_list_t	exe_queue;
247*d14abf15SRobert Mustacchi 
248*d14abf15SRobert Mustacchi 	/* Commands pending for an completion. */
249*d14abf15SRobert Mustacchi 	d_list_t	pending_comp;
250*d14abf15SRobert Mustacchi 
251*d14abf15SRobert Mustacchi 	mm_spin_lock_t		lock;
252*d14abf15SRobert Mustacchi 
253*d14abf15SRobert Mustacchi 	/* Maximum length of commands' list for one execution */
254*d14abf15SRobert Mustacchi 	int			exe_chunk_len;
255*d14abf15SRobert Mustacchi 
256*d14abf15SRobert Mustacchi 	union ecore_qable_obj	*owner;
257*d14abf15SRobert Mustacchi 
258*d14abf15SRobert Mustacchi 	/****** Virtual functions ******/
259*d14abf15SRobert Mustacchi 	/**
260*d14abf15SRobert Mustacchi 	 * Called before commands execution for commands that are really
261*d14abf15SRobert Mustacchi 	 * going to be executed (after 'optimize').
262*d14abf15SRobert Mustacchi 	 *
263*d14abf15SRobert Mustacchi 	 * Must run under exe_queue->lock
264*d14abf15SRobert Mustacchi 	 */
265*d14abf15SRobert Mustacchi 	exe_q_validate		validate;
266*d14abf15SRobert Mustacchi 
267*d14abf15SRobert Mustacchi 	/**
268*d14abf15SRobert Mustacchi 	 * Called before removing pending commands, cleaning allocated
269*d14abf15SRobert Mustacchi 	 * resources (e.g., credits from validate)
270*d14abf15SRobert Mustacchi 	 */
271*d14abf15SRobert Mustacchi 	 exe_q_remove		remove;
272*d14abf15SRobert Mustacchi 
273*d14abf15SRobert Mustacchi 	/**
274*d14abf15SRobert Mustacchi 	 * This will try to cancel the current pending commands list
275*d14abf15SRobert Mustacchi 	 * considering the new command.
276*d14abf15SRobert Mustacchi 	 *
277*d14abf15SRobert Mustacchi 	 * Returns the number of optimized commands or a negative error code
278*d14abf15SRobert Mustacchi 	 *
279*d14abf15SRobert Mustacchi 	 * Must run under exe_queue->lock
280*d14abf15SRobert Mustacchi 	 */
281*d14abf15SRobert Mustacchi 	exe_q_optimize		optimize;
282*d14abf15SRobert Mustacchi 
283*d14abf15SRobert Mustacchi 	/**
284*d14abf15SRobert Mustacchi 	 * Run the next commands chunk (owner specific).
285*d14abf15SRobert Mustacchi 	 */
286*d14abf15SRobert Mustacchi 	exe_q_execute		execute;
287*d14abf15SRobert Mustacchi 
288*d14abf15SRobert Mustacchi 	/**
289*d14abf15SRobert Mustacchi 	 * Return the exe_queue element containing the specific command
290*d14abf15SRobert Mustacchi 	 * if any. Otherwise return NULL.
291*d14abf15SRobert Mustacchi 	 */
292*d14abf15SRobert Mustacchi 	exe_q_get		get;
293*d14abf15SRobert Mustacchi };
294*d14abf15SRobert Mustacchi /***************** Classification verbs: Set/Del MAC/VLAN/VLAN-MAC ************/
295*d14abf15SRobert Mustacchi /*
296*d14abf15SRobert Mustacchi  * Element in the VLAN_MAC registry list having all current configured
297*d14abf15SRobert Mustacchi  * rules.
298*d14abf15SRobert Mustacchi  */
299*d14abf15SRobert Mustacchi struct ecore_vlan_mac_registry_elem {
300*d14abf15SRobert Mustacchi 	d_list_entry_t	link;
301*d14abf15SRobert Mustacchi 
302*d14abf15SRobert Mustacchi 	/* Used to store the cam offset used for the mac/vlan/vlan-mac.
303*d14abf15SRobert Mustacchi 	 * Relevant for 57710 and 57711 only. VLANs and MACs share the
304*d14abf15SRobert Mustacchi 	 * same CAM for these chips.
305*d14abf15SRobert Mustacchi 	 */
306*d14abf15SRobert Mustacchi 	int			cam_offset;
307*d14abf15SRobert Mustacchi 
308*d14abf15SRobert Mustacchi 	/* Needed for DEL and RESTORE flows */
309*d14abf15SRobert Mustacchi 	unsigned long		vlan_mac_flags;
310*d14abf15SRobert Mustacchi 
311*d14abf15SRobert Mustacchi 	union ecore_classification_ramrod_data u;
312*d14abf15SRobert Mustacchi };
313*d14abf15SRobert Mustacchi 
314*d14abf15SRobert Mustacchi /* Bits representing VLAN_MAC commands specific flags */
315*d14abf15SRobert Mustacchi enum {
316*d14abf15SRobert Mustacchi 	ECORE_UC_LIST_MAC,
317*d14abf15SRobert Mustacchi 	ECORE_ETH_MAC,
318*d14abf15SRobert Mustacchi 	ECORE_ISCSI_ETH_MAC,
319*d14abf15SRobert Mustacchi 	ECORE_NETQ_ETH_MAC,
320*d14abf15SRobert Mustacchi 	ECORE_DONT_CONSUME_CAM_CREDIT,
321*d14abf15SRobert Mustacchi 	ECORE_DONT_CONSUME_CAM_CREDIT_DEST,
322*d14abf15SRobert Mustacchi };
323*d14abf15SRobert Mustacchi /* When looking for matching filters, some flags are not interesting */
324*d14abf15SRobert Mustacchi #define ECORE_VLAN_MAC_CMP_MASK	(1 << ECORE_UC_LIST_MAC | \
325*d14abf15SRobert Mustacchi 				 1 << ECORE_ETH_MAC | \
326*d14abf15SRobert Mustacchi 				 1 << ECORE_ISCSI_ETH_MAC | \
327*d14abf15SRobert Mustacchi 				 1 << ECORE_NETQ_ETH_MAC)
328*d14abf15SRobert Mustacchi #define ECORE_VLAN_MAC_CMP_FLAGS(flags) \
329*d14abf15SRobert Mustacchi 	((flags) & ECORE_VLAN_MAC_CMP_MASK)
330*d14abf15SRobert Mustacchi 
331*d14abf15SRobert Mustacchi struct ecore_vlan_mac_ramrod_params {
332*d14abf15SRobert Mustacchi 	/* Object to run the command from */
333*d14abf15SRobert Mustacchi 	struct ecore_vlan_mac_obj *vlan_mac_obj;
334*d14abf15SRobert Mustacchi 
335*d14abf15SRobert Mustacchi 	/* General command flags: COMP_WAIT, etc. */
336*d14abf15SRobert Mustacchi 	unsigned long ramrod_flags;
337*d14abf15SRobert Mustacchi 
338*d14abf15SRobert Mustacchi 	/* Command specific configuration request */
339*d14abf15SRobert Mustacchi 	struct ecore_vlan_mac_data user_req;
340*d14abf15SRobert Mustacchi };
341*d14abf15SRobert Mustacchi 
342*d14abf15SRobert Mustacchi struct ecore_vlan_mac_obj {
343*d14abf15SRobert Mustacchi 	struct ecore_raw_obj raw;
344*d14abf15SRobert Mustacchi 
345*d14abf15SRobert Mustacchi 	/* Bookkeeping list: will prevent the addition of already existing
346*d14abf15SRobert Mustacchi 	 * entries.
347*d14abf15SRobert Mustacchi 	 */
348*d14abf15SRobert Mustacchi 	d_list_t		head;
349*d14abf15SRobert Mustacchi 	/* Implement a simple reader/writer lock on the head list.
350*d14abf15SRobert Mustacchi 	 * all these fields should only be accessed under the exe_queue lock
351*d14abf15SRobert Mustacchi 	 */
352*d14abf15SRobert Mustacchi 	u8		head_reader; /* Num. of readers accessing head list */
353*d14abf15SRobert Mustacchi 	BOOL		head_exe_request; /* Pending execution request. */
354*d14abf15SRobert Mustacchi 	unsigned long	saved_ramrod_flags; /* Ramrods of pending execution */
355*d14abf15SRobert Mustacchi 
356*d14abf15SRobert Mustacchi 	/* Execution queue interface instance */
357*d14abf15SRobert Mustacchi 	struct ecore_exe_queue_obj	exe_queue;
358*d14abf15SRobert Mustacchi 
359*d14abf15SRobert Mustacchi 	/* MACs credit pool */
360*d14abf15SRobert Mustacchi 	struct ecore_credit_pool_obj	*macs_pool;
361*d14abf15SRobert Mustacchi 
362*d14abf15SRobert Mustacchi 	/* VLANs credit pool */
363*d14abf15SRobert Mustacchi 	struct ecore_credit_pool_obj	*vlans_pool;
364*d14abf15SRobert Mustacchi 
365*d14abf15SRobert Mustacchi 	/* RAMROD command to be used */
366*d14abf15SRobert Mustacchi 	int				ramrod_cmd;
367*d14abf15SRobert Mustacchi 
368*d14abf15SRobert Mustacchi 	/* copy first n elements onto preallocated buffer
369*d14abf15SRobert Mustacchi 	 *
370*d14abf15SRobert Mustacchi 	 * @param n number of elements to get
371*d14abf15SRobert Mustacchi 	 * @param buf buffer preallocated by caller into which elements
372*d14abf15SRobert Mustacchi 	 *            will be copied. Note elements are 4-byte aligned
373*d14abf15SRobert Mustacchi 	 *            so buffer size must be able to accommodate the
374*d14abf15SRobert Mustacchi 	 *            aligned elements.
375*d14abf15SRobert Mustacchi 	 *
376*d14abf15SRobert Mustacchi 	 * @return number of copied bytes
377*d14abf15SRobert Mustacchi 	 */
378*d14abf15SRobert Mustacchi 
379*d14abf15SRobert Mustacchi 	int (*get_n_elements)(struct _lm_device_t *pdev,
380*d14abf15SRobert Mustacchi 			      struct ecore_vlan_mac_obj *o, int n, u8 *base,
381*d14abf15SRobert Mustacchi 			      u8 stride, u8 size);
382*d14abf15SRobert Mustacchi 
383*d14abf15SRobert Mustacchi 	/**
384*d14abf15SRobert Mustacchi 	 * Checks if ADD-ramrod with the given params may be performed.
385*d14abf15SRobert Mustacchi 	 *
386*d14abf15SRobert Mustacchi 	 * @return zero if the element may be added
387*d14abf15SRobert Mustacchi 	 */
388*d14abf15SRobert Mustacchi 
389*d14abf15SRobert Mustacchi 	int (*check_add)(struct _lm_device_t *pdev,
390*d14abf15SRobert Mustacchi 			 struct ecore_vlan_mac_obj *o,
391*d14abf15SRobert Mustacchi 			 union ecore_classification_ramrod_data *data);
392*d14abf15SRobert Mustacchi 
393*d14abf15SRobert Mustacchi 	/**
394*d14abf15SRobert Mustacchi 	 * Checks if DEL-ramrod with the given params may be performed.
395*d14abf15SRobert Mustacchi 	 *
396*d14abf15SRobert Mustacchi 	 * @return TRUE if the element may be deleted
397*d14abf15SRobert Mustacchi 	 */
398*d14abf15SRobert Mustacchi 	struct ecore_vlan_mac_registry_elem *
399*d14abf15SRobert Mustacchi 		(*check_del)(struct _lm_device_t *pdev,
400*d14abf15SRobert Mustacchi 			     struct ecore_vlan_mac_obj *o,
401*d14abf15SRobert Mustacchi 			     union ecore_classification_ramrod_data *data);
402*d14abf15SRobert Mustacchi 
403*d14abf15SRobert Mustacchi 	/**
404*d14abf15SRobert Mustacchi 	 * Checks if DEL-ramrod with the given params may be performed.
405*d14abf15SRobert Mustacchi 	 *
406*d14abf15SRobert Mustacchi 	 * @return TRUE if the element may be deleted
407*d14abf15SRobert Mustacchi 	 */
408*d14abf15SRobert Mustacchi 	BOOL (*check_move)(struct _lm_device_t *pdev,
409*d14abf15SRobert Mustacchi 			   struct ecore_vlan_mac_obj *src_o,
410*d14abf15SRobert Mustacchi 			   struct ecore_vlan_mac_obj *dst_o,
411*d14abf15SRobert Mustacchi 			   union ecore_classification_ramrod_data *data);
412*d14abf15SRobert Mustacchi 
413*d14abf15SRobert Mustacchi 	/**
414*d14abf15SRobert Mustacchi 	 *  Update the relevant credit object(s) (consume/return
415*d14abf15SRobert Mustacchi 	 *  correspondingly).
416*d14abf15SRobert Mustacchi 	 */
417*d14abf15SRobert Mustacchi 	BOOL (*get_credit)(struct ecore_vlan_mac_obj *o);
418*d14abf15SRobert Mustacchi 	BOOL (*put_credit)(struct ecore_vlan_mac_obj *o);
419*d14abf15SRobert Mustacchi 	BOOL (*get_cam_offset)(struct ecore_vlan_mac_obj *o, int *offset);
420*d14abf15SRobert Mustacchi 	BOOL (*put_cam_offset)(struct ecore_vlan_mac_obj *o, int offset);
421*d14abf15SRobert Mustacchi 
422*d14abf15SRobert Mustacchi 	/**
423*d14abf15SRobert Mustacchi 	 * Configures one rule in the ramrod data buffer.
424*d14abf15SRobert Mustacchi 	 */
425*d14abf15SRobert Mustacchi 	void (*set_one_rule)(struct _lm_device_t *pdev,
426*d14abf15SRobert Mustacchi 			     struct ecore_vlan_mac_obj *o,
427*d14abf15SRobert Mustacchi 			     struct ecore_exeq_elem *elem, int rule_idx,
428*d14abf15SRobert Mustacchi 			     int cam_offset);
429*d14abf15SRobert Mustacchi 
430*d14abf15SRobert Mustacchi 	/**
431*d14abf15SRobert Mustacchi 	*  Delete all configured elements having the given
432*d14abf15SRobert Mustacchi 	*  vlan_mac_flags specification. Assumes no pending for
433*d14abf15SRobert Mustacchi 	*  execution commands. Will schedule all all currently
434*d14abf15SRobert Mustacchi 	*  configured MACs/VLANs/VLAN-MACs matching the vlan_mac_flags
435*d14abf15SRobert Mustacchi 	*  specification for deletion and will use the given
436*d14abf15SRobert Mustacchi 	*  ramrod_flags for the last DEL operation.
437*d14abf15SRobert Mustacchi 	 *
438*d14abf15SRobert Mustacchi 	 * @param pdev
439*d14abf15SRobert Mustacchi 	 * @param o
440*d14abf15SRobert Mustacchi 	 * @param ramrod_flags RAMROD_XX flags
441*d14abf15SRobert Mustacchi 	 *
442*d14abf15SRobert Mustacchi 	 * @return 0 if the last operation has completed successfully
443*d14abf15SRobert Mustacchi 	 *         and there are no more elements left, positive value
444*d14abf15SRobert Mustacchi 	 *         if there are pending for completion commands,
445*d14abf15SRobert Mustacchi 	 *         negative value in case of failure.
446*d14abf15SRobert Mustacchi 	 */
447*d14abf15SRobert Mustacchi 	int (*delete_all)(struct _lm_device_t *pdev,
448*d14abf15SRobert Mustacchi 			  struct ecore_vlan_mac_obj *o,
449*d14abf15SRobert Mustacchi 			  unsigned long *vlan_mac_flags,
450*d14abf15SRobert Mustacchi 			  unsigned long *ramrod_flags);
451*d14abf15SRobert Mustacchi 
452*d14abf15SRobert Mustacchi 	/**
453*d14abf15SRobert Mustacchi 	 * Reconfigures the next MAC/VLAN/VLAN-MAC element from the previously
454*d14abf15SRobert Mustacchi 	 * configured elements list.
455*d14abf15SRobert Mustacchi 	 *
456*d14abf15SRobert Mustacchi 	 * @param pdev
457*d14abf15SRobert Mustacchi 	 * @param p Command parameters (RAMROD_COMP_WAIT bit in
458*d14abf15SRobert Mustacchi 	 *          ramrod_flags is only taken into an account)
459*d14abf15SRobert Mustacchi 	 * @param ppos a pointer to the cookie that should be given back in the
460*d14abf15SRobert Mustacchi 	 *        next call to make function handle the next element. If
461*d14abf15SRobert Mustacchi 	 *        *ppos is set to NULL it will restart the iterator.
462*d14abf15SRobert Mustacchi 	 *        If returned *ppos == NULL this means that the last
463*d14abf15SRobert Mustacchi 	 *        element has been handled.
464*d14abf15SRobert Mustacchi 	 *
465*d14abf15SRobert Mustacchi 	 * @return int
466*d14abf15SRobert Mustacchi 	 */
467*d14abf15SRobert Mustacchi 	int (*restore)(struct _lm_device_t *pdev,
468*d14abf15SRobert Mustacchi 		       struct ecore_vlan_mac_ramrod_params *p,
469*d14abf15SRobert Mustacchi 		       struct ecore_vlan_mac_registry_elem **ppos);
470*d14abf15SRobert Mustacchi 
471*d14abf15SRobert Mustacchi 	/**
472*d14abf15SRobert Mustacchi 	 * Should be called on a completion arrival.
473*d14abf15SRobert Mustacchi 	 *
474*d14abf15SRobert Mustacchi 	 * @param pdev
475*d14abf15SRobert Mustacchi 	 * @param o
476*d14abf15SRobert Mustacchi 	 * @param cqe Completion element we are handling
477*d14abf15SRobert Mustacchi 	 * @param ramrod_flags if RAMROD_CONT is set the next bulk of
478*d14abf15SRobert Mustacchi 	 *		       pending commands will be executed.
479*d14abf15SRobert Mustacchi 	 *		       RAMROD_DRV_CLR_ONLY and RAMROD_RESTORE
480*d14abf15SRobert Mustacchi 	 *		       may also be set if needed.
481*d14abf15SRobert Mustacchi 	 *
482*d14abf15SRobert Mustacchi 	 * @return 0 if there are neither pending nor waiting for
483*d14abf15SRobert Mustacchi 	 *         completion commands. Positive value if there are
484*d14abf15SRobert Mustacchi 	 *         pending for execution or for completion commands.
485*d14abf15SRobert Mustacchi 	 *         Negative value in case of an error (including an
486*d14abf15SRobert Mustacchi 	 *         error in the cqe).
487*d14abf15SRobert Mustacchi 	 */
488*d14abf15SRobert Mustacchi 	int (*complete)(struct _lm_device_t *pdev, struct ecore_vlan_mac_obj *o,
489*d14abf15SRobert Mustacchi 			union event_ring_elem *cqe,
490*d14abf15SRobert Mustacchi 			unsigned long *ramrod_flags);
491*d14abf15SRobert Mustacchi 
492*d14abf15SRobert Mustacchi 	/**
493*d14abf15SRobert Mustacchi 	 * Wait for completion of all commands. Don't schedule new ones,
494*d14abf15SRobert Mustacchi 	 * just wait. It assumes that the completion code will schedule
495*d14abf15SRobert Mustacchi 	 * for new commands.
496*d14abf15SRobert Mustacchi 	 */
497*d14abf15SRobert Mustacchi 	int (*wait)(struct _lm_device_t *pdev, struct ecore_vlan_mac_obj *o);
498*d14abf15SRobert Mustacchi };
499*d14abf15SRobert Mustacchi 
500*d14abf15SRobert Mustacchi enum {
501*d14abf15SRobert Mustacchi 	ECORE_LLH_CAM_ISCSI_ETH_LINE = 0,
502*d14abf15SRobert Mustacchi 	ECORE_LLH_CAM_ETH_LINE,
503*d14abf15SRobert Mustacchi 	ECORE_LLH_CAM_MAX_PF_LINE = NIG_REG_LLH1_FUNC_MEM_SIZE / 2
504*d14abf15SRobert Mustacchi };
505*d14abf15SRobert Mustacchi 
506*d14abf15SRobert Mustacchi void ecore_set_mac_in_nig(struct _lm_device_t *pdev,
507*d14abf15SRobert Mustacchi 			  BOOL add, unsigned char *dev_addr, int index);
508*d14abf15SRobert Mustacchi 
509*d14abf15SRobert Mustacchi /** RX_MODE verbs:DROP_ALL/ACCEPT_ALL/ACCEPT_ALL_MULTI/ACCEPT_ALL_VLAN/NORMAL */
510*d14abf15SRobert Mustacchi 
511*d14abf15SRobert Mustacchi /* RX_MODE ramrod special flags: set in rx_mode_flags field in
512*d14abf15SRobert Mustacchi  * a ecore_rx_mode_ramrod_params.
513*d14abf15SRobert Mustacchi  */
514*d14abf15SRobert Mustacchi enum {
515*d14abf15SRobert Mustacchi 	ECORE_RX_MODE_FCOE_ETH,
516*d14abf15SRobert Mustacchi 	ECORE_RX_MODE_ISCSI_ETH,
517*d14abf15SRobert Mustacchi };
518*d14abf15SRobert Mustacchi 
519*d14abf15SRobert Mustacchi enum {
520*d14abf15SRobert Mustacchi 	ECORE_ACCEPT_UNICAST,
521*d14abf15SRobert Mustacchi 	ECORE_ACCEPT_MULTICAST,
522*d14abf15SRobert Mustacchi 	ECORE_ACCEPT_ALL_UNICAST,
523*d14abf15SRobert Mustacchi 	ECORE_ACCEPT_ALL_MULTICAST,
524*d14abf15SRobert Mustacchi 	ECORE_ACCEPT_BROADCAST,
525*d14abf15SRobert Mustacchi 	ECORE_ACCEPT_UNMATCHED,
526*d14abf15SRobert Mustacchi 	ECORE_ACCEPT_ANY_VLAN
527*d14abf15SRobert Mustacchi };
528*d14abf15SRobert Mustacchi 
529*d14abf15SRobert Mustacchi struct ecore_rx_mode_ramrod_params {
530*d14abf15SRobert Mustacchi 	struct ecore_rx_mode_obj *rx_mode_obj;
531*d14abf15SRobert Mustacchi 	unsigned long *pstate;
532*d14abf15SRobert Mustacchi 	int state;
533*d14abf15SRobert Mustacchi 	u8 cl_id;
534*d14abf15SRobert Mustacchi 	u32 cid;
535*d14abf15SRobert Mustacchi 	u8 func_id;
536*d14abf15SRobert Mustacchi 	unsigned long ramrod_flags;
537*d14abf15SRobert Mustacchi 	unsigned long rx_mode_flags;
538*d14abf15SRobert Mustacchi 
539*d14abf15SRobert Mustacchi 	/* rdata is either a pointer to eth_filter_rules_ramrod_data(e2) or to
540*d14abf15SRobert Mustacchi 	 * a tstorm_eth_mac_filter_config (e1x).
541*d14abf15SRobert Mustacchi 	 */
542*d14abf15SRobert Mustacchi 	void *rdata;
543*d14abf15SRobert Mustacchi 	lm_address_t rdata_mapping;
544*d14abf15SRobert Mustacchi 
545*d14abf15SRobert Mustacchi 	/* Rx mode settings */
546*d14abf15SRobert Mustacchi 	unsigned long rx_accept_flags;
547*d14abf15SRobert Mustacchi 
548*d14abf15SRobert Mustacchi 	/* internal switching settings */
549*d14abf15SRobert Mustacchi 	unsigned long tx_accept_flags;
550*d14abf15SRobert Mustacchi };
551*d14abf15SRobert Mustacchi 
552*d14abf15SRobert Mustacchi struct ecore_rx_mode_obj {
553*d14abf15SRobert Mustacchi 	int (*config_rx_mode)(struct _lm_device_t *pdev,
554*d14abf15SRobert Mustacchi 			      struct ecore_rx_mode_ramrod_params *p);
555*d14abf15SRobert Mustacchi 
556*d14abf15SRobert Mustacchi 	int (*wait_comp)(struct _lm_device_t *pdev,
557*d14abf15SRobert Mustacchi 			 struct ecore_rx_mode_ramrod_params *p);
558*d14abf15SRobert Mustacchi };
559*d14abf15SRobert Mustacchi 
560*d14abf15SRobert Mustacchi /********************** Set multicast group ***********************************/
561*d14abf15SRobert Mustacchi 
562*d14abf15SRobert Mustacchi struct ecore_mcast_list_elem {
563*d14abf15SRobert Mustacchi 	d_list_entry_t link;
564*d14abf15SRobert Mustacchi 	u8 *mac;
565*d14abf15SRobert Mustacchi };
566*d14abf15SRobert Mustacchi 
567*d14abf15SRobert Mustacchi union ecore_mcast_config_data {
568*d14abf15SRobert Mustacchi 	u8 *mac;
569*d14abf15SRobert Mustacchi 	u8 bin; /* used in a RESTORE flow */
570*d14abf15SRobert Mustacchi };
571*d14abf15SRobert Mustacchi 
572*d14abf15SRobert Mustacchi struct ecore_mcast_ramrod_params {
573*d14abf15SRobert Mustacchi 	struct ecore_mcast_obj *mcast_obj;
574*d14abf15SRobert Mustacchi 
575*d14abf15SRobert Mustacchi 	/* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */
576*d14abf15SRobert Mustacchi 	unsigned long ramrod_flags;
577*d14abf15SRobert Mustacchi 
578*d14abf15SRobert Mustacchi 	d_list_t mcast_list; /* list of struct ecore_mcast_list_elem */
579*d14abf15SRobert Mustacchi 	/** TODO:
580*d14abf15SRobert Mustacchi 	 *      - rename it to macs_num.
581*d14abf15SRobert Mustacchi 	 *      - Add a new command type for handling pending commands
582*d14abf15SRobert Mustacchi 	 *        (remove "zero semantics").
583*d14abf15SRobert Mustacchi 	 *
584*d14abf15SRobert Mustacchi 	 *  Length of mcast_list. If zero and ADD_CONT command - post
585*d14abf15SRobert Mustacchi 	 *  pending commands.
586*d14abf15SRobert Mustacchi 	 */
587*d14abf15SRobert Mustacchi 	int mcast_list_len;
588*d14abf15SRobert Mustacchi };
589*d14abf15SRobert Mustacchi 
590*d14abf15SRobert Mustacchi enum ecore_mcast_cmd {
591*d14abf15SRobert Mustacchi 	ECORE_MCAST_CMD_ADD,
592*d14abf15SRobert Mustacchi 	ECORE_MCAST_CMD_CONT,
593*d14abf15SRobert Mustacchi 	ECORE_MCAST_CMD_DEL,
594*d14abf15SRobert Mustacchi 	ECORE_MCAST_CMD_RESTORE,
595*d14abf15SRobert Mustacchi };
596*d14abf15SRobert Mustacchi 
597*d14abf15SRobert Mustacchi struct ecore_mcast_obj {
598*d14abf15SRobert Mustacchi 	struct ecore_raw_obj raw;
599*d14abf15SRobert Mustacchi 
600*d14abf15SRobert Mustacchi 	union {
601*d14abf15SRobert Mustacchi 		struct {
602*d14abf15SRobert Mustacchi 		#define ECORE_MCAST_BINS_NUM	256
603*d14abf15SRobert Mustacchi 		#define ECORE_MCAST_VEC_SZ	(ECORE_MCAST_BINS_NUM / 64)
604*d14abf15SRobert Mustacchi 			u64 vec[ECORE_MCAST_VEC_SZ];
605*d14abf15SRobert Mustacchi 
606*d14abf15SRobert Mustacchi 			/** Number of BINs to clear. Should be updated
607*d14abf15SRobert Mustacchi 			 *  immediately when a command arrives in order to
608*d14abf15SRobert Mustacchi 			 *  properly create DEL commands.
609*d14abf15SRobert Mustacchi 			 */
610*d14abf15SRobert Mustacchi 			int num_bins_set;
611*d14abf15SRobert Mustacchi 		} aprox_match;
612*d14abf15SRobert Mustacchi 
613*d14abf15SRobert Mustacchi 		struct {
614*d14abf15SRobert Mustacchi 			d_list_t macs;
615*d14abf15SRobert Mustacchi 			int num_macs_set;
616*d14abf15SRobert Mustacchi 		} exact_match;
617*d14abf15SRobert Mustacchi 	} registry;
618*d14abf15SRobert Mustacchi 
619*d14abf15SRobert Mustacchi 	/* Pending commands */
620*d14abf15SRobert Mustacchi 	d_list_t pending_cmds_head;
621*d14abf15SRobert Mustacchi 
622*d14abf15SRobert Mustacchi 	/* A state that is set in raw.pstate, when there are pending commands */
623*d14abf15SRobert Mustacchi 	int sched_state;
624*d14abf15SRobert Mustacchi 
625*d14abf15SRobert Mustacchi 	/* Maximal number of mcast MACs configured in one command */
626*d14abf15SRobert Mustacchi 	int max_cmd_len;
627*d14abf15SRobert Mustacchi 
628*d14abf15SRobert Mustacchi 	/* Total number of currently pending MACs to configure: both
629*d14abf15SRobert Mustacchi 	 * in the pending commands list and in the current command.
630*d14abf15SRobert Mustacchi 	 */
631*d14abf15SRobert Mustacchi 	int total_pending_num;
632*d14abf15SRobert Mustacchi 
633*d14abf15SRobert Mustacchi 	u8 engine_id;
634*d14abf15SRobert Mustacchi 
635*d14abf15SRobert Mustacchi 	/**
636*d14abf15SRobert Mustacchi 	 * @param cmd command to execute (ECORE_MCAST_CMD_X, see above)
637*d14abf15SRobert Mustacchi 	 */
638*d14abf15SRobert Mustacchi 	int (*config_mcast)(struct _lm_device_t *pdev,
639*d14abf15SRobert Mustacchi 			    struct ecore_mcast_ramrod_params *p,
640*d14abf15SRobert Mustacchi 			    enum ecore_mcast_cmd cmd);
641*d14abf15SRobert Mustacchi 
642*d14abf15SRobert Mustacchi 	/**
643*d14abf15SRobert Mustacchi 	 * Fills the ramrod data during the RESTORE flow.
644*d14abf15SRobert Mustacchi 	 *
645*d14abf15SRobert Mustacchi 	 * @param pdev
646*d14abf15SRobert Mustacchi 	 * @param o
647*d14abf15SRobert Mustacchi 	 * @param start_idx Registry index to start from
648*d14abf15SRobert Mustacchi 	 * @param rdata_idx Index in the ramrod data to start from
649*d14abf15SRobert Mustacchi 	 *
650*d14abf15SRobert Mustacchi 	 * @return -1 if we handled the whole registry or index of the last
651*d14abf15SRobert Mustacchi 	 *         handled registry element.
652*d14abf15SRobert Mustacchi 	 */
653*d14abf15SRobert Mustacchi 	int (*hdl_restore)(struct _lm_device_t *pdev, struct ecore_mcast_obj *o,
654*d14abf15SRobert Mustacchi 			   int start_bin, int *rdata_idx);
655*d14abf15SRobert Mustacchi 
656*d14abf15SRobert Mustacchi 	int (*enqueue_cmd)(struct _lm_device_t *pdev, struct ecore_mcast_obj *o,
657*d14abf15SRobert Mustacchi 			   struct ecore_mcast_ramrod_params *p,
658*d14abf15SRobert Mustacchi 			   enum ecore_mcast_cmd cmd);
659*d14abf15SRobert Mustacchi 
660*d14abf15SRobert Mustacchi 	void (*set_one_rule)(struct _lm_device_t *pdev,
661*d14abf15SRobert Mustacchi 			     struct ecore_mcast_obj *o, int idx,
662*d14abf15SRobert Mustacchi 			     union ecore_mcast_config_data *cfg_data,
663*d14abf15SRobert Mustacchi 			     enum ecore_mcast_cmd cmd);
664*d14abf15SRobert Mustacchi 
665*d14abf15SRobert Mustacchi 	/** Checks if there are more mcast MACs to be set or a previous
666*d14abf15SRobert Mustacchi 	 *  command is still pending.
667*d14abf15SRobert Mustacchi 	 */
668*d14abf15SRobert Mustacchi 	BOOL (*check_pending)(struct ecore_mcast_obj *o);
669*d14abf15SRobert Mustacchi 
670*d14abf15SRobert Mustacchi 	/**
671*d14abf15SRobert Mustacchi 	 * Set/Clear/Check SCHEDULED state of the object
672*d14abf15SRobert Mustacchi 	 */
673*d14abf15SRobert Mustacchi 	void (*set_sched)(struct ecore_mcast_obj *o);
674*d14abf15SRobert Mustacchi 	void (*clear_sched)(struct ecore_mcast_obj *o);
675*d14abf15SRobert Mustacchi 	BOOL (*check_sched)(struct ecore_mcast_obj *o);
676*d14abf15SRobert Mustacchi 
677*d14abf15SRobert Mustacchi 	/* Wait until all pending commands complete */
678*d14abf15SRobert Mustacchi 	int (*wait_comp)(struct _lm_device_t *pdev, struct ecore_mcast_obj *o);
679*d14abf15SRobert Mustacchi 
680*d14abf15SRobert Mustacchi 	/**
681*d14abf15SRobert Mustacchi 	 * Handle the internal object counters needed for proper
682*d14abf15SRobert Mustacchi 	 * commands handling. Checks that the provided parameters are
683*d14abf15SRobert Mustacchi 	 * feasible.
684*d14abf15SRobert Mustacchi 	 */
685*d14abf15SRobert Mustacchi 	int (*validate)(struct _lm_device_t *pdev,
686*d14abf15SRobert Mustacchi 			struct ecore_mcast_ramrod_params *p,
687*d14abf15SRobert Mustacchi 			enum ecore_mcast_cmd cmd);
688*d14abf15SRobert Mustacchi 
689*d14abf15SRobert Mustacchi 	/**
690*d14abf15SRobert Mustacchi 	 * Restore the values of internal counters in case of a failure.
691*d14abf15SRobert Mustacchi 	 */
692*d14abf15SRobert Mustacchi 	void (*revert)(struct _lm_device_t *pdev,
693*d14abf15SRobert Mustacchi 		       struct ecore_mcast_ramrod_params *p,
694*d14abf15SRobert Mustacchi 		       int old_num_bins);
695*d14abf15SRobert Mustacchi 
696*d14abf15SRobert Mustacchi 	int (*get_registry_size)(struct ecore_mcast_obj *o);
697*d14abf15SRobert Mustacchi 	void (*set_registry_size)(struct ecore_mcast_obj *o, int n);
698*d14abf15SRobert Mustacchi };
699*d14abf15SRobert Mustacchi 
700*d14abf15SRobert Mustacchi /*************************** Credit handling **********************************/
701*d14abf15SRobert Mustacchi struct ecore_credit_pool_obj {
702*d14abf15SRobert Mustacchi 
703*d14abf15SRobert Mustacchi 	/* Current amount of credit in the pool */
704*d14abf15SRobert Mustacchi 	atomic_t	credit;
705*d14abf15SRobert Mustacchi 
706*d14abf15SRobert Mustacchi 	/* Maximum allowed credit. put() will check against it. */
707*d14abf15SRobert Mustacchi 	int		pool_sz;
708*d14abf15SRobert Mustacchi 
709*d14abf15SRobert Mustacchi 	/* Allocate a pool table statically.
710*d14abf15SRobert Mustacchi 	 *
711*d14abf15SRobert Mustacchi 	 * Currently the maximum allowed size is MAX_MAC_CREDIT_E2(272)
712*d14abf15SRobert Mustacchi 	 *
713*d14abf15SRobert Mustacchi 	 * The set bit in the table will mean that the entry is available.
714*d14abf15SRobert Mustacchi 	 */
715*d14abf15SRobert Mustacchi #define ECORE_POOL_VEC_SIZE	(MAX_MAC_CREDIT_E2 / 64)
716*d14abf15SRobert Mustacchi 	u64		pool_mirror[ECORE_POOL_VEC_SIZE];
717*d14abf15SRobert Mustacchi 
718*d14abf15SRobert Mustacchi 	/* Base pool offset (initialized differently */
719*d14abf15SRobert Mustacchi 	int		base_pool_offset;
720*d14abf15SRobert Mustacchi 
721*d14abf15SRobert Mustacchi 	/**
722*d14abf15SRobert Mustacchi 	 * Get the next free pool entry.
723*d14abf15SRobert Mustacchi 	 *
724*d14abf15SRobert Mustacchi 	 * @return TRUE if there was a free entry in the pool
725*d14abf15SRobert Mustacchi 	 */
726*d14abf15SRobert Mustacchi 	BOOL (*get_entry)(struct ecore_credit_pool_obj *o, int *entry);
727*d14abf15SRobert Mustacchi 
728*d14abf15SRobert Mustacchi 	/**
729*d14abf15SRobert Mustacchi 	 * Return the entry back to the pool.
730*d14abf15SRobert Mustacchi 	 *
731*d14abf15SRobert Mustacchi 	 * @return TRUE if entry is legal and has been successfully
732*d14abf15SRobert Mustacchi 	 *         returned to the pool.
733*d14abf15SRobert Mustacchi 	 */
734*d14abf15SRobert Mustacchi 	BOOL (*put_entry)(struct ecore_credit_pool_obj *o, int entry);
735*d14abf15SRobert Mustacchi 
736*d14abf15SRobert Mustacchi 	/**
737*d14abf15SRobert Mustacchi 	 * Get the requested amount of credit from the pool.
738*d14abf15SRobert Mustacchi 	 *
739*d14abf15SRobert Mustacchi 	 * @param cnt Amount of requested credit
740*d14abf15SRobert Mustacchi 	 * @return TRUE if the operation is successful
741*d14abf15SRobert Mustacchi 	 */
742*d14abf15SRobert Mustacchi 	BOOL (*get)(struct ecore_credit_pool_obj *o, int cnt);
743*d14abf15SRobert Mustacchi 
744*d14abf15SRobert Mustacchi 	/**
745*d14abf15SRobert Mustacchi 	 * Returns the credit to the pool.
746*d14abf15SRobert Mustacchi 	 *
747*d14abf15SRobert Mustacchi 	 * @param cnt Amount of credit to return
748*d14abf15SRobert Mustacchi 	 * @return TRUE if the operation is successful
749*d14abf15SRobert Mustacchi 	 */
750*d14abf15SRobert Mustacchi 	BOOL (*put)(struct ecore_credit_pool_obj *o, int cnt);
751*d14abf15SRobert Mustacchi 
752*d14abf15SRobert Mustacchi 	/**
753*d14abf15SRobert Mustacchi 	 * Reads the current amount of credit.
754*d14abf15SRobert Mustacchi 	 */
755*d14abf15SRobert Mustacchi 	int (*check)(struct ecore_credit_pool_obj *o);
756*d14abf15SRobert Mustacchi };
757*d14abf15SRobert Mustacchi 
758*d14abf15SRobert Mustacchi /*************************** RSS configuration ********************************/
759*d14abf15SRobert Mustacchi enum {
760*d14abf15SRobert Mustacchi 	/* RSS_MODE bits are mutually exclusive */
761*d14abf15SRobert Mustacchi 	ECORE_RSS_MODE_DISABLED,
762*d14abf15SRobert Mustacchi 	ECORE_RSS_MODE_REGULAR,
763*d14abf15SRobert Mustacchi 
764*d14abf15SRobert Mustacchi 	ECORE_RSS_SET_SRCH, /* Setup searcher, E1x specific flag */
765*d14abf15SRobert Mustacchi 
766*d14abf15SRobert Mustacchi 	ECORE_RSS_IPV4,
767*d14abf15SRobert Mustacchi 	ECORE_RSS_IPV4_TCP,
768*d14abf15SRobert Mustacchi 	ECORE_RSS_IPV4_UDP,
769*d14abf15SRobert Mustacchi 	ECORE_RSS_IPV6,
770*d14abf15SRobert Mustacchi 	ECORE_RSS_IPV6_TCP,
771*d14abf15SRobert Mustacchi 	ECORE_RSS_IPV6_UDP,
772*d14abf15SRobert Mustacchi 
773*d14abf15SRobert Mustacchi #if defined(__VMKLNX__) && (VMWARE_ESX_DDK_VERSION < 55000) /* ! BNX2X_UPSTREAM */
774*d14abf15SRobert Mustacchi 	ECORE_RSS_MODE_ESX51,
775*d14abf15SRobert Mustacchi #endif
776*d14abf15SRobert Mustacchi 	ECORE_RSS_IPV4_VXLAN,
777*d14abf15SRobert Mustacchi 	ECORE_RSS_IPV6_VXLAN,
778*d14abf15SRobert Mustacchi 	ECORE_RSS_NVGRE_KEY_ENTROPY,
779*d14abf15SRobert Mustacchi 	ECORE_RSS_GRE_INNER_HDRS,
780*d14abf15SRobert Mustacchi };
781*d14abf15SRobert Mustacchi 
782*d14abf15SRobert Mustacchi struct ecore_config_rss_params {
783*d14abf15SRobert Mustacchi 	struct ecore_rss_config_obj *rss_obj;
784*d14abf15SRobert Mustacchi 
785*d14abf15SRobert Mustacchi 	/* may have RAMROD_COMP_WAIT set only */
786*d14abf15SRobert Mustacchi 	unsigned long	ramrod_flags;
787*d14abf15SRobert Mustacchi 
788*d14abf15SRobert Mustacchi 	/* ECORE_RSS_X bits */
789*d14abf15SRobert Mustacchi 	unsigned long	rss_flags;
790*d14abf15SRobert Mustacchi 
791*d14abf15SRobert Mustacchi 	/* Number hash bits to take into an account */
792*d14abf15SRobert Mustacchi 	u8		rss_result_mask;
793*d14abf15SRobert Mustacchi 
794*d14abf15SRobert Mustacchi 	/* Indirection table */
795*d14abf15SRobert Mustacchi 	u8		ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
796*d14abf15SRobert Mustacchi 
797*d14abf15SRobert Mustacchi 	/* RSS hash values */
798*d14abf15SRobert Mustacchi 	u32		rss_key[10];
799*d14abf15SRobert Mustacchi 
800*d14abf15SRobert Mustacchi 	/* valid only iff ECORE_RSS_UPDATE_TOE is set */
801*d14abf15SRobert Mustacchi 	u16		toe_rss_bitmap;
802*d14abf15SRobert Mustacchi };
803*d14abf15SRobert Mustacchi 
804*d14abf15SRobert Mustacchi struct ecore_rss_config_obj {
805*d14abf15SRobert Mustacchi 	struct ecore_raw_obj	raw;
806*d14abf15SRobert Mustacchi 
807*d14abf15SRobert Mustacchi 	/* RSS engine to use */
808*d14abf15SRobert Mustacchi 	u8			engine_id;
809*d14abf15SRobert Mustacchi 
810*d14abf15SRobert Mustacchi 	/* Last configured indirection table */
811*d14abf15SRobert Mustacchi 	u8			ind_table[T_ETH_INDIRECTION_TABLE_SIZE];
812*d14abf15SRobert Mustacchi 
813*d14abf15SRobert Mustacchi 	/* flags for enabling 4-tupple hash on UDP */
814*d14abf15SRobert Mustacchi 	u8			udp_rss_v4;
815*d14abf15SRobert Mustacchi 	u8			udp_rss_v6;
816*d14abf15SRobert Mustacchi 
817*d14abf15SRobert Mustacchi 	int (*config_rss)(struct _lm_device_t *pdev,
818*d14abf15SRobert Mustacchi 			  struct ecore_config_rss_params *p);
819*d14abf15SRobert Mustacchi };
820*d14abf15SRobert Mustacchi 
821*d14abf15SRobert Mustacchi /*********************** Queue state update ***********************************/
822*d14abf15SRobert Mustacchi 
823*d14abf15SRobert Mustacchi /* UPDATE command options */
824*d14abf15SRobert Mustacchi enum {
825*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_IN_VLAN_REM,
826*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_IN_VLAN_REM_CHNG,
827*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_OUT_VLAN_REM,
828*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_OUT_VLAN_REM_CHNG,
829*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_ANTI_SPOOF,
830*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_ANTI_SPOOF_CHNG,
831*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_ACTIVATE,
832*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_ACTIVATE_CHNG,
833*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_DEF_VLAN_EN,
834*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_DEF_VLAN_EN_CHNG,
835*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_SILENT_VLAN_REM_CHNG,
836*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_SILENT_VLAN_REM,
837*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_TX_SWITCHING_CHNG,
838*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_TX_SWITCHING,
839*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_PTP_PKTS_CHNG,
840*d14abf15SRobert Mustacchi 	ECORE_Q_UPDATE_PTP_PKTS,
841*d14abf15SRobert Mustacchi };
842*d14abf15SRobert Mustacchi 
843*d14abf15SRobert Mustacchi /* Allowed Queue states */
844*d14abf15SRobert Mustacchi enum ecore_q_state {
845*d14abf15SRobert Mustacchi 	ECORE_Q_STATE_RESET,
846*d14abf15SRobert Mustacchi 	ECORE_Q_STATE_INITIALIZED,
847*d14abf15SRobert Mustacchi 	ECORE_Q_STATE_ACTIVE,
848*d14abf15SRobert Mustacchi 	ECORE_Q_STATE_MULTI_COS,
849*d14abf15SRobert Mustacchi 	ECORE_Q_STATE_MCOS_TERMINATED,
850*d14abf15SRobert Mustacchi 	ECORE_Q_STATE_INACTIVE,
851*d14abf15SRobert Mustacchi 	ECORE_Q_STATE_STOPPED,
852*d14abf15SRobert Mustacchi 	ECORE_Q_STATE_TERMINATED,
853*d14abf15SRobert Mustacchi 	ECORE_Q_STATE_FLRED,
854*d14abf15SRobert Mustacchi 	ECORE_Q_STATE_MAX,
855*d14abf15SRobert Mustacchi };
856*d14abf15SRobert Mustacchi 
857*d14abf15SRobert Mustacchi /* Allowed Queue states */
858*d14abf15SRobert Mustacchi enum ecore_q_logical_state {
859*d14abf15SRobert Mustacchi 	ECORE_Q_LOGICAL_STATE_ACTIVE,
860*d14abf15SRobert Mustacchi 	ECORE_Q_LOGICAL_STATE_STOPPED,
861*d14abf15SRobert Mustacchi };
862*d14abf15SRobert Mustacchi 
863*d14abf15SRobert Mustacchi /* Allowed commands */
864*d14abf15SRobert Mustacchi enum ecore_queue_cmd {
865*d14abf15SRobert Mustacchi 	ECORE_Q_CMD_INIT,
866*d14abf15SRobert Mustacchi 	ECORE_Q_CMD_SETUP,
867*d14abf15SRobert Mustacchi 	ECORE_Q_CMD_SETUP_TX_ONLY,
868*d14abf15SRobert Mustacchi 	ECORE_Q_CMD_DEACTIVATE,
869*d14abf15SRobert Mustacchi 	ECORE_Q_CMD_ACTIVATE,
870*d14abf15SRobert Mustacchi 	ECORE_Q_CMD_UPDATE,
871*d14abf15SRobert Mustacchi 	ECORE_Q_CMD_UPDATE_TPA,
872*d14abf15SRobert Mustacchi 	ECORE_Q_CMD_HALT,
873*d14abf15SRobert Mustacchi 	ECORE_Q_CMD_CFC_DEL,
874*d14abf15SRobert Mustacchi 	ECORE_Q_CMD_TERMINATE,
875*d14abf15SRobert Mustacchi 	ECORE_Q_CMD_EMPTY,
876*d14abf15SRobert Mustacchi 	ECORE_Q_CMD_MAX,
877*d14abf15SRobert Mustacchi };
878*d14abf15SRobert Mustacchi 
879*d14abf15SRobert Mustacchi /* queue SETUP + INIT flags */
880*d14abf15SRobert Mustacchi enum {
881*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_TPA,
882*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_TPA_IPV6,
883*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_TPA_GRO,
884*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_STATS,
885*d14abf15SRobert Mustacchi #ifndef ECORE_UPSTREAM /* ! ECORE_UPSTREAM */
886*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_VMQUEUE_MODE,
887*d14abf15SRobert Mustacchi #endif
888*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_ZERO_STATS,
889*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_ACTIVE,
890*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_OV,
891*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_VLAN,
892*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_COS,
893*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_HC,
894*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_HC_EN,
895*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_DHC,
896*d14abf15SRobert Mustacchi #ifdef ECORE_OOO /* ! ECORE_UPSTREAM */
897*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_OOO,
898*d14abf15SRobert Mustacchi #endif
899*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_FCOE,
900*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_LEADING_RSS,
901*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_MCAST,
902*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_DEF_VLAN,
903*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_TX_SWITCH,
904*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_TX_SEC,
905*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_ANTI_SPOOF,
906*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_SILENT_VLAN_REM,
907*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_FORCE_DEFAULT_PRI,
908*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_REFUSE_OUTBAND_VLAN,
909*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_PCSUM_ON_PKT,
910*d14abf15SRobert Mustacchi 	ECORE_Q_FLG_TUN_INC_INNER_IP_ID
911*d14abf15SRobert Mustacchi };
912*d14abf15SRobert Mustacchi 
913*d14abf15SRobert Mustacchi /* Queue type options: queue type may be a combination of below. */
914*d14abf15SRobert Mustacchi enum ecore_q_type {
915*d14abf15SRobert Mustacchi #ifdef ECORE_OOO /* ! ECORE_UPSTREAM */
916*d14abf15SRobert Mustacchi 	ECORE_Q_TYPE_FWD,
917*d14abf15SRobert Mustacchi #endif
918*d14abf15SRobert Mustacchi 	/** TODO: Consider moving both these flags into the init()
919*d14abf15SRobert Mustacchi 	 *        ramrod params.
920*d14abf15SRobert Mustacchi 	 */
921*d14abf15SRobert Mustacchi 	ECORE_Q_TYPE_HAS_RX,
922*d14abf15SRobert Mustacchi 	ECORE_Q_TYPE_HAS_TX,
923*d14abf15SRobert Mustacchi };
924*d14abf15SRobert Mustacchi 
925*d14abf15SRobert Mustacchi #define ECORE_PRIMARY_CID_INDEX			0
926*d14abf15SRobert Mustacchi #define ECORE_MULTI_TX_COS_E1X			3 /* QM only */
927*d14abf15SRobert Mustacchi #define ECORE_MULTI_TX_COS_E2_E3A0		2
928*d14abf15SRobert Mustacchi #define ECORE_MULTI_TX_COS_E3B0			3
929*d14abf15SRobert Mustacchi #define ECORE_MULTI_TX_COS			3 /* Maximum possible */
930*d14abf15SRobert Mustacchi #define MAC_PAD (ECORE_ALIGN(ETH_ALEN, sizeof(u32)) - ETH_ALEN)
931*d14abf15SRobert Mustacchi /* DMAE channel to be used by FW for timesync workaroun. A driver that sends
932*d14abf15SRobert Mustacchi  * timesync-related ramrods must not use this DMAE command ID.
933*d14abf15SRobert Mustacchi  */
934*d14abf15SRobert Mustacchi #define FW_DMAE_CMD_ID 6
935*d14abf15SRobert Mustacchi 
936*d14abf15SRobert Mustacchi struct ecore_queue_init_params {
937*d14abf15SRobert Mustacchi 	struct {
938*d14abf15SRobert Mustacchi 		unsigned long	flags;
939*d14abf15SRobert Mustacchi 		u16		hc_rate;
940*d14abf15SRobert Mustacchi 		u8		fw_sb_id;
941*d14abf15SRobert Mustacchi 		u8		sb_cq_index;
942*d14abf15SRobert Mustacchi 	} tx;
943*d14abf15SRobert Mustacchi 
944*d14abf15SRobert Mustacchi 	struct {
945*d14abf15SRobert Mustacchi 		unsigned long	flags;
946*d14abf15SRobert Mustacchi 		u16		hc_rate;
947*d14abf15SRobert Mustacchi 		u8		fw_sb_id;
948*d14abf15SRobert Mustacchi 		u8		sb_cq_index;
949*d14abf15SRobert Mustacchi 	} rx;
950*d14abf15SRobert Mustacchi 
951*d14abf15SRobert Mustacchi 	/* CID context in the host memory */
952*d14abf15SRobert Mustacchi 	struct eth_context *cxts[ECORE_MULTI_TX_COS];
953*d14abf15SRobert Mustacchi 
954*d14abf15SRobert Mustacchi 	/* maximum number of cos supported by hardware */
955*d14abf15SRobert Mustacchi 	u8 max_cos;
956*d14abf15SRobert Mustacchi };
957*d14abf15SRobert Mustacchi 
958*d14abf15SRobert Mustacchi struct ecore_queue_terminate_params {
959*d14abf15SRobert Mustacchi 	/* index within the tx_only cids of this queue object */
960*d14abf15SRobert Mustacchi 	u8 cid_index;
961*d14abf15SRobert Mustacchi };
962*d14abf15SRobert Mustacchi 
963*d14abf15SRobert Mustacchi struct ecore_queue_cfc_del_params {
964*d14abf15SRobert Mustacchi 	/* index within the tx_only cids of this queue object */
965*d14abf15SRobert Mustacchi 	u8 cid_index;
966*d14abf15SRobert Mustacchi };
967*d14abf15SRobert Mustacchi 
968*d14abf15SRobert Mustacchi struct ecore_queue_update_params {
969*d14abf15SRobert Mustacchi 	unsigned long	update_flags; /* ECORE_Q_UPDATE_XX bits */
970*d14abf15SRobert Mustacchi 	u16		def_vlan;
971*d14abf15SRobert Mustacchi 	u16		silent_removal_value;
972*d14abf15SRobert Mustacchi 	u16		silent_removal_mask;
973*d14abf15SRobert Mustacchi /* index within the tx_only cids of this queue object */
974*d14abf15SRobert Mustacchi 	u8		cid_index;
975*d14abf15SRobert Mustacchi };
976*d14abf15SRobert Mustacchi 
977*d14abf15SRobert Mustacchi struct ecore_queue_update_tpa_params {
978*d14abf15SRobert Mustacchi 	lm_address_t sge_map;
979*d14abf15SRobert Mustacchi 	u8 update_ipv4;
980*d14abf15SRobert Mustacchi 	u8 update_ipv6;
981*d14abf15SRobert Mustacchi 	u8 max_tpa_queues;
982*d14abf15SRobert Mustacchi 	u8 max_sges_pkt;
983*d14abf15SRobert Mustacchi 	u8 complete_on_both_clients;
984*d14abf15SRobert Mustacchi 	u8 dont_verify_thr;
985*d14abf15SRobert Mustacchi 	u8 tpa_mode;
986*d14abf15SRobert Mustacchi 	u8 _pad;
987*d14abf15SRobert Mustacchi 
988*d14abf15SRobert Mustacchi 	u16 sge_buff_sz;
989*d14abf15SRobert Mustacchi 	u16 max_agg_sz;
990*d14abf15SRobert Mustacchi 
991*d14abf15SRobert Mustacchi 	u16 sge_pause_thr_low;
992*d14abf15SRobert Mustacchi 	u16 sge_pause_thr_high;
993*d14abf15SRobert Mustacchi };
994*d14abf15SRobert Mustacchi 
995*d14abf15SRobert Mustacchi struct rxq_pause_params {
996*d14abf15SRobert Mustacchi 	u16		bd_th_lo;
997*d14abf15SRobert Mustacchi 	u16		bd_th_hi;
998*d14abf15SRobert Mustacchi 	u16		rcq_th_lo;
999*d14abf15SRobert Mustacchi 	u16		rcq_th_hi;
1000*d14abf15SRobert Mustacchi 	u16		sge_th_lo; /* valid iff ECORE_Q_FLG_TPA */
1001*d14abf15SRobert Mustacchi 	u16		sge_th_hi; /* valid iff ECORE_Q_FLG_TPA */
1002*d14abf15SRobert Mustacchi 	u16		pri_map;
1003*d14abf15SRobert Mustacchi };
1004*d14abf15SRobert Mustacchi 
1005*d14abf15SRobert Mustacchi /* general */
1006*d14abf15SRobert Mustacchi struct ecore_general_setup_params {
1007*d14abf15SRobert Mustacchi 	/* valid iff ECORE_Q_FLG_STATS */
1008*d14abf15SRobert Mustacchi 	u8		stat_id;
1009*d14abf15SRobert Mustacchi 
1010*d14abf15SRobert Mustacchi 	u8		spcl_id;
1011*d14abf15SRobert Mustacchi 	u16		mtu;
1012*d14abf15SRobert Mustacchi 	u8		cos;
1013*d14abf15SRobert Mustacchi };
1014*d14abf15SRobert Mustacchi 
1015*d14abf15SRobert Mustacchi struct ecore_rxq_setup_params {
1016*d14abf15SRobert Mustacchi 	/* dma */
1017*d14abf15SRobert Mustacchi 	lm_address_t	dscr_map;
1018*d14abf15SRobert Mustacchi 	lm_address_t	sge_map;
1019*d14abf15SRobert Mustacchi 	lm_address_t	rcq_map;
1020*d14abf15SRobert Mustacchi 	lm_address_t	rcq_np_map;
1021*d14abf15SRobert Mustacchi 
1022*d14abf15SRobert Mustacchi 	u16		drop_flags;
1023*d14abf15SRobert Mustacchi 	u16		buf_sz;
1024*d14abf15SRobert Mustacchi 	u8		fw_sb_id;
1025*d14abf15SRobert Mustacchi 	u8		cl_qzone_id;
1026*d14abf15SRobert Mustacchi 
1027*d14abf15SRobert Mustacchi 	/* valid iff ECORE_Q_FLG_TPA */
1028*d14abf15SRobert Mustacchi 	u16		tpa_agg_sz;
1029*d14abf15SRobert Mustacchi 	u16		sge_buf_sz;
1030*d14abf15SRobert Mustacchi 	u8		max_sges_pkt;
1031*d14abf15SRobert Mustacchi 	u8		max_tpa_queues;
1032*d14abf15SRobert Mustacchi 	u8		rss_engine_id;
1033*d14abf15SRobert Mustacchi 
1034*d14abf15SRobert Mustacchi 	/* valid iff ECORE_Q_FLG_MCAST */
1035*d14abf15SRobert Mustacchi 	u8		mcast_engine_id;
1036*d14abf15SRobert Mustacchi 
1037*d14abf15SRobert Mustacchi 	u8		cache_line_log;
1038*d14abf15SRobert Mustacchi 
1039*d14abf15SRobert Mustacchi 	u8		sb_cq_index;
1040*d14abf15SRobert Mustacchi 
1041*d14abf15SRobert Mustacchi 	/* valid iff BXN2X_Q_FLG_SILENT_VLAN_REM */
1042*d14abf15SRobert Mustacchi 	u16 silent_removal_value;
1043*d14abf15SRobert Mustacchi 	u16 silent_removal_mask;
1044*d14abf15SRobert Mustacchi };
1045*d14abf15SRobert Mustacchi 
1046*d14abf15SRobert Mustacchi struct ecore_txq_setup_params {
1047*d14abf15SRobert Mustacchi 	/* dma */
1048*d14abf15SRobert Mustacchi 	lm_address_t	dscr_map;
1049*d14abf15SRobert Mustacchi 
1050*d14abf15SRobert Mustacchi 	u8		fw_sb_id;
1051*d14abf15SRobert Mustacchi 	u8		sb_cq_index;
1052*d14abf15SRobert Mustacchi 	u8		cos;		/* valid iff ECORE_Q_FLG_COS */
1053*d14abf15SRobert Mustacchi 	u16		traffic_type;
1054*d14abf15SRobert Mustacchi 	/* equals to the leading rss client id, used for TX classification*/
1055*d14abf15SRobert Mustacchi 	u8		tss_leading_cl_id;
1056*d14abf15SRobert Mustacchi 
1057*d14abf15SRobert Mustacchi 	/* valid iff ECORE_Q_FLG_DEF_VLAN */
1058*d14abf15SRobert Mustacchi 	u16		default_vlan;
1059*d14abf15SRobert Mustacchi };
1060*d14abf15SRobert Mustacchi 
1061*d14abf15SRobert Mustacchi struct ecore_queue_setup_params {
1062*d14abf15SRobert Mustacchi 	struct ecore_general_setup_params gen_params;
1063*d14abf15SRobert Mustacchi 	struct ecore_txq_setup_params txq_params;
1064*d14abf15SRobert Mustacchi 	struct ecore_rxq_setup_params rxq_params;
1065*d14abf15SRobert Mustacchi 	struct rxq_pause_params pause_params;
1066*d14abf15SRobert Mustacchi 	unsigned long flags;
1067*d14abf15SRobert Mustacchi };
1068*d14abf15SRobert Mustacchi 
1069*d14abf15SRobert Mustacchi struct ecore_queue_setup_tx_only_params {
1070*d14abf15SRobert Mustacchi 	struct ecore_general_setup_params	gen_params;
1071*d14abf15SRobert Mustacchi 	struct ecore_txq_setup_params		txq_params;
1072*d14abf15SRobert Mustacchi 	unsigned long				flags;
1073*d14abf15SRobert Mustacchi 	/* index within the tx_only cids of this queue object */
1074*d14abf15SRobert Mustacchi 	u8					cid_index;
1075*d14abf15SRobert Mustacchi };
1076*d14abf15SRobert Mustacchi 
1077*d14abf15SRobert Mustacchi struct ecore_queue_state_params {
1078*d14abf15SRobert Mustacchi 	struct ecore_queue_sp_obj *q_obj;
1079*d14abf15SRobert Mustacchi 
1080*d14abf15SRobert Mustacchi 	/* Current command */
1081*d14abf15SRobert Mustacchi 	enum ecore_queue_cmd cmd;
1082*d14abf15SRobert Mustacchi 
1083*d14abf15SRobert Mustacchi 	/* may have RAMROD_COMP_WAIT set only */
1084*d14abf15SRobert Mustacchi 	unsigned long ramrod_flags;
1085*d14abf15SRobert Mustacchi 
1086*d14abf15SRobert Mustacchi 	/* Params according to the current command */
1087*d14abf15SRobert Mustacchi 	union {
1088*d14abf15SRobert Mustacchi 		struct ecore_queue_update_params	update;
1089*d14abf15SRobert Mustacchi 		struct ecore_queue_update_tpa_params    update_tpa;
1090*d14abf15SRobert Mustacchi 		struct ecore_queue_setup_params		setup;
1091*d14abf15SRobert Mustacchi 		struct ecore_queue_init_params		init;
1092*d14abf15SRobert Mustacchi 		struct ecore_queue_setup_tx_only_params	tx_only;
1093*d14abf15SRobert Mustacchi 		struct ecore_queue_terminate_params	terminate;
1094*d14abf15SRobert Mustacchi 		struct ecore_queue_cfc_del_params	cfc_del;
1095*d14abf15SRobert Mustacchi 	} params;
1096*d14abf15SRobert Mustacchi };
1097*d14abf15SRobert Mustacchi 
1098*d14abf15SRobert Mustacchi struct ecore_viflist_params {
1099*d14abf15SRobert Mustacchi 	u8 echo_res;
1100*d14abf15SRobert Mustacchi 	u8 func_bit_map_res;
1101*d14abf15SRobert Mustacchi };
1102*d14abf15SRobert Mustacchi 
1103*d14abf15SRobert Mustacchi struct ecore_queue_sp_obj {
1104*d14abf15SRobert Mustacchi 	u32		cids[ECORE_MULTI_TX_COS];
1105*d14abf15SRobert Mustacchi 	u8		cl_id;
1106*d14abf15SRobert Mustacchi 	u8		func_id;
1107*d14abf15SRobert Mustacchi 
1108*d14abf15SRobert Mustacchi 	/* number of traffic classes supported by queue.
1109*d14abf15SRobert Mustacchi 	 * The primary connection of the queue supports the first traffic
1110*d14abf15SRobert Mustacchi 	 * class. Any further traffic class is supported by a tx-only
1111*d14abf15SRobert Mustacchi 	 * connection.
1112*d14abf15SRobert Mustacchi 	 *
1113*d14abf15SRobert Mustacchi 	 * Therefore max_cos is also a number of valid entries in the cids
1114*d14abf15SRobert Mustacchi 	 * array.
1115*d14abf15SRobert Mustacchi 	 */
1116*d14abf15SRobert Mustacchi 	u8 max_cos;
1117*d14abf15SRobert Mustacchi 	u8 num_tx_only, next_tx_only;
1118*d14abf15SRobert Mustacchi 
1119*d14abf15SRobert Mustacchi 	enum ecore_q_state state, next_state;
1120*d14abf15SRobert Mustacchi 
1121*d14abf15SRobert Mustacchi 	/* bits from enum ecore_q_type */
1122*d14abf15SRobert Mustacchi 	unsigned long	type;
1123*d14abf15SRobert Mustacchi 
1124*d14abf15SRobert Mustacchi 	/* ECORE_Q_CMD_XX bits. This object implements "one
1125*d14abf15SRobert Mustacchi 	 * pending" paradigm but for debug and tracing purposes it's
1126*d14abf15SRobert Mustacchi 	 * more convenient to have different bits for different
1127*d14abf15SRobert Mustacchi 	 * commands.
1128*d14abf15SRobert Mustacchi 	 */
1129*d14abf15SRobert Mustacchi 	unsigned long	pending;
1130*d14abf15SRobert Mustacchi 
1131*d14abf15SRobert Mustacchi 	/* Buffer to use as a ramrod data and its mapping */
1132*d14abf15SRobert Mustacchi 	void		*rdata;
1133*d14abf15SRobert Mustacchi 	lm_address_t	rdata_mapping;
1134*d14abf15SRobert Mustacchi 
1135*d14abf15SRobert Mustacchi 	/**
1136*d14abf15SRobert Mustacchi 	 * Performs one state change according to the given parameters.
1137*d14abf15SRobert Mustacchi 	 *
1138*d14abf15SRobert Mustacchi 	 * @return 0 in case of success and negative value otherwise.
1139*d14abf15SRobert Mustacchi 	 */
1140*d14abf15SRobert Mustacchi 	int (*send_cmd)(struct _lm_device_t *pdev,
1141*d14abf15SRobert Mustacchi 			struct ecore_queue_state_params *params);
1142*d14abf15SRobert Mustacchi 
1143*d14abf15SRobert Mustacchi 	/**
1144*d14abf15SRobert Mustacchi 	 * Sets the pending bit according to the requested transition.
1145*d14abf15SRobert Mustacchi 	 */
1146*d14abf15SRobert Mustacchi 	int (*set_pending)(struct ecore_queue_sp_obj *o,
1147*d14abf15SRobert Mustacchi 			   struct ecore_queue_state_params *params);
1148*d14abf15SRobert Mustacchi 
1149*d14abf15SRobert Mustacchi 	/**
1150*d14abf15SRobert Mustacchi 	 * Checks that the requested state transition is legal.
1151*d14abf15SRobert Mustacchi 	 */
1152*d14abf15SRobert Mustacchi 	int (*check_transition)(struct _lm_device_t *pdev,
1153*d14abf15SRobert Mustacchi 				struct ecore_queue_sp_obj *o,
1154*d14abf15SRobert Mustacchi 				struct ecore_queue_state_params *params);
1155*d14abf15SRobert Mustacchi 
1156*d14abf15SRobert Mustacchi 	/**
1157*d14abf15SRobert Mustacchi 	 * Completes the pending command.
1158*d14abf15SRobert Mustacchi 	 */
1159*d14abf15SRobert Mustacchi 	int (*complete_cmd)(struct _lm_device_t *pdev,
1160*d14abf15SRobert Mustacchi 			    struct ecore_queue_sp_obj *o,
1161*d14abf15SRobert Mustacchi 			    enum ecore_queue_cmd);
1162*d14abf15SRobert Mustacchi 
1163*d14abf15SRobert Mustacchi 	int (*wait_comp)(struct _lm_device_t *pdev,
1164*d14abf15SRobert Mustacchi 			 struct ecore_queue_sp_obj *o,
1165*d14abf15SRobert Mustacchi 			 enum ecore_queue_cmd cmd);
1166*d14abf15SRobert Mustacchi };
1167*d14abf15SRobert Mustacchi 
1168*d14abf15SRobert Mustacchi /********************** Function state update *********************************/
1169*d14abf15SRobert Mustacchi 
1170*d14abf15SRobert Mustacchi /* UPDATE command options */
1171*d14abf15SRobert Mustacchi enum {
1172*d14abf15SRobert Mustacchi 	ECORE_F_UPDATE_TX_SWITCH_SUSPEND_CHNG,
1173*d14abf15SRobert Mustacchi 	ECORE_F_UPDATE_TX_SWITCH_SUSPEND,
1174*d14abf15SRobert Mustacchi 	ECORE_F_UPDATE_SD_VLAN_TAG_CHNG,
1175*d14abf15SRobert Mustacchi 	ECORE_F_UPDATE_SD_VLAN_ETH_TYPE_CHNG,
1176*d14abf15SRobert Mustacchi 	ECORE_F_UPDATE_VLAN_FORCE_PRIO_CHNG,
1177*d14abf15SRobert Mustacchi 	ECORE_F_UPDATE_VLAN_FORCE_PRIO_FLAG,
1178*d14abf15SRobert Mustacchi 	ECORE_F_UPDATE_TUNNEL_CFG_CHNG,
1179*d14abf15SRobert Mustacchi 	ECORE_F_UPDATE_TUNNEL_CLSS_EN,
1180*d14abf15SRobert Mustacchi 	ECORE_F_UPDATE_TUNNEL_INNER_GRE_RSS_EN,
1181*d14abf15SRobert Mustacchi };
1182*d14abf15SRobert Mustacchi 
1183*d14abf15SRobert Mustacchi /* Allowed Function states */
1184*d14abf15SRobert Mustacchi enum ecore_func_state {
1185*d14abf15SRobert Mustacchi 	ECORE_F_STATE_RESET,
1186*d14abf15SRobert Mustacchi 	ECORE_F_STATE_INITIALIZED,
1187*d14abf15SRobert Mustacchi 	ECORE_F_STATE_STARTED,
1188*d14abf15SRobert Mustacchi 	ECORE_F_STATE_TX_STOPPED,
1189*d14abf15SRobert Mustacchi 	ECORE_F_STATE_MAX,
1190*d14abf15SRobert Mustacchi };
1191*d14abf15SRobert Mustacchi 
1192*d14abf15SRobert Mustacchi /* Allowed Function commands */
1193*d14abf15SRobert Mustacchi enum ecore_func_cmd {
1194*d14abf15SRobert Mustacchi 	ECORE_F_CMD_HW_INIT,
1195*d14abf15SRobert Mustacchi 	ECORE_F_CMD_START,
1196*d14abf15SRobert Mustacchi 	ECORE_F_CMD_STOP,
1197*d14abf15SRobert Mustacchi 	ECORE_F_CMD_HW_RESET,
1198*d14abf15SRobert Mustacchi 	ECORE_F_CMD_AFEX_UPDATE,
1199*d14abf15SRobert Mustacchi 	ECORE_F_CMD_AFEX_VIFLISTS,
1200*d14abf15SRobert Mustacchi 	ECORE_F_CMD_TX_STOP,
1201*d14abf15SRobert Mustacchi 	ECORE_F_CMD_TX_START,
1202*d14abf15SRobert Mustacchi 	ECORE_F_CMD_SWITCH_UPDATE,
1203*d14abf15SRobert Mustacchi 	ECORE_F_CMD_SET_TIMESYNC,
1204*d14abf15SRobert Mustacchi 	ECORE_F_CMD_MAX,
1205*d14abf15SRobert Mustacchi };
1206*d14abf15SRobert Mustacchi 
1207*d14abf15SRobert Mustacchi struct ecore_func_hw_init_params {
1208*d14abf15SRobert Mustacchi 	/* A load phase returned by MCP.
1209*d14abf15SRobert Mustacchi 	 *
1210*d14abf15SRobert Mustacchi 	 * May be:
1211*d14abf15SRobert Mustacchi 	 *		FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1212*d14abf15SRobert Mustacchi 	 *		FW_MSG_CODE_DRV_LOAD_COMMON
1213*d14abf15SRobert Mustacchi 	 *		FW_MSG_CODE_DRV_LOAD_PORT
1214*d14abf15SRobert Mustacchi 	 *		FW_MSG_CODE_DRV_LOAD_FUNCTION
1215*d14abf15SRobert Mustacchi 	 */
1216*d14abf15SRobert Mustacchi 	u32 load_phase;
1217*d14abf15SRobert Mustacchi };
1218*d14abf15SRobert Mustacchi 
1219*d14abf15SRobert Mustacchi struct ecore_func_hw_reset_params {
1220*d14abf15SRobert Mustacchi 	/* A load phase returned by MCP.
1221*d14abf15SRobert Mustacchi 	 *
1222*d14abf15SRobert Mustacchi 	 * May be:
1223*d14abf15SRobert Mustacchi 	 *		FW_MSG_CODE_DRV_LOAD_COMMON_CHIP
1224*d14abf15SRobert Mustacchi 	 *		FW_MSG_CODE_DRV_LOAD_COMMON
1225*d14abf15SRobert Mustacchi 	 *		FW_MSG_CODE_DRV_LOAD_PORT
1226*d14abf15SRobert Mustacchi 	 *		FW_MSG_CODE_DRV_LOAD_FUNCTION
1227*d14abf15SRobert Mustacchi 	 */
1228*d14abf15SRobert Mustacchi 	u32 reset_phase;
1229*d14abf15SRobert Mustacchi };
1230*d14abf15SRobert Mustacchi 
1231*d14abf15SRobert Mustacchi struct ecore_func_start_params {
1232*d14abf15SRobert Mustacchi 	/* Multi Function mode:
1233*d14abf15SRobert Mustacchi 	 *	- Single Function
1234*d14abf15SRobert Mustacchi 	 *	- Switch Dependent
1235*d14abf15SRobert Mustacchi 	 *	- Switch Independent
1236*d14abf15SRobert Mustacchi 	 */
1237*d14abf15SRobert Mustacchi 	u16 mf_mode;
1238*d14abf15SRobert Mustacchi 
1239*d14abf15SRobert Mustacchi 	/* Switch Dependent mode outer VLAN tag */
1240*d14abf15SRobert Mustacchi 	u16 sd_vlan_tag;
1241*d14abf15SRobert Mustacchi 
1242*d14abf15SRobert Mustacchi 	/* Function cos mode */
1243*d14abf15SRobert Mustacchi 	u8 network_cos_mode;
1244*d14abf15SRobert Mustacchi 
1245*d14abf15SRobert Mustacchi 	/* TUNN_MODE_NONE/TUNN_MODE_VXLAN/TUNN_MODE_GRE */
1246*d14abf15SRobert Mustacchi 	u8 tunnel_mode;
1247*d14abf15SRobert Mustacchi 
1248*d14abf15SRobert Mustacchi 	/* tunneling classification enablement */
1249*d14abf15SRobert Mustacchi 	u8 tunn_clss_en;
1250*d14abf15SRobert Mustacchi 
1251*d14abf15SRobert Mustacchi 	/* NVGRE_TUNNEL/L2GRE_TUNNEL/IPGRE_TUNNEL */
1252*d14abf15SRobert Mustacchi 	u8 gre_tunnel_type;
1253*d14abf15SRobert Mustacchi 
1254*d14abf15SRobert Mustacchi 	/* Enables Inner GRE RSS on the function, depends on the client RSS
1255*d14abf15SRobert Mustacchi 	 * capailities
1256*d14abf15SRobert Mustacchi 	 */
1257*d14abf15SRobert Mustacchi 	u8 inner_gre_rss_en;
1258*d14abf15SRobert Mustacchi 
1259*d14abf15SRobert Mustacchi 	/* UDP dest port for VXLAN */
1260*d14abf15SRobert Mustacchi 	u16 vxlan_dst_port;
1261*d14abf15SRobert Mustacchi 
1262*d14abf15SRobert Mustacchi 	/** Allows accepting of packets failing MF classification, possibly
1263*d14abf15SRobert Mustacchi 	 * only matching a given ethertype
1264*d14abf15SRobert Mustacchi 	 */
1265*d14abf15SRobert Mustacchi 	u8 class_fail;
1266*d14abf15SRobert Mustacchi 	u16 class_fail_ethtype;
1267*d14abf15SRobert Mustacchi 
1268*d14abf15SRobert Mustacchi 	/* Override priority of output packets */
1269*d14abf15SRobert Mustacchi 	u8 sd_vlan_force_pri;
1270*d14abf15SRobert Mustacchi 	u8 sd_vlan_force_pri_val;
1271*d14abf15SRobert Mustacchi 
1272*d14abf15SRobert Mustacchi 	/* Replace vlan's ethertype */
1273*d14abf15SRobert Mustacchi 	u16 sd_vlan_eth_type;
1274*d14abf15SRobert Mustacchi 
1275*d14abf15SRobert Mustacchi 	/* Prevent inner vlans from being added by FW */
1276*d14abf15SRobert Mustacchi 	u8 no_added_tags;
1277*d14abf15SRobert Mustacchi };
1278*d14abf15SRobert Mustacchi 
1279*d14abf15SRobert Mustacchi struct ecore_func_switch_update_params {
1280*d14abf15SRobert Mustacchi 	unsigned long changes; /* ECORE_F_UPDATE_XX bits */
1281*d14abf15SRobert Mustacchi 	u16 vlan;
1282*d14abf15SRobert Mustacchi 	u16 vlan_eth_type;
1283*d14abf15SRobert Mustacchi 	u8 vlan_force_prio;
1284*d14abf15SRobert Mustacchi 	u8 tunnel_mode;
1285*d14abf15SRobert Mustacchi 	u8 gre_tunnel_type;
1286*d14abf15SRobert Mustacchi 	u16 vxlan_dst_port;
1287*d14abf15SRobert Mustacchi 
1288*d14abf15SRobert Mustacchi };
1289*d14abf15SRobert Mustacchi 
1290*d14abf15SRobert Mustacchi struct ecore_func_afex_update_params {
1291*d14abf15SRobert Mustacchi 	u16 vif_id;
1292*d14abf15SRobert Mustacchi 	u16 afex_default_vlan;
1293*d14abf15SRobert Mustacchi 	u8 allowed_priorities;
1294*d14abf15SRobert Mustacchi };
1295*d14abf15SRobert Mustacchi 
1296*d14abf15SRobert Mustacchi struct ecore_func_afex_viflists_params {
1297*d14abf15SRobert Mustacchi 	u16 vif_list_index;
1298*d14abf15SRobert Mustacchi 	u8 func_bit_map;
1299*d14abf15SRobert Mustacchi 	u8 afex_vif_list_command;
1300*d14abf15SRobert Mustacchi 	u8 func_to_clear;
1301*d14abf15SRobert Mustacchi };
1302*d14abf15SRobert Mustacchi 
1303*d14abf15SRobert Mustacchi struct ecore_func_tx_start_params {
1304*d14abf15SRobert Mustacchi 	struct priority_cos traffic_type_to_priority_cos[MAX_TRAFFIC_TYPES];
1305*d14abf15SRobert Mustacchi 	u8 dcb_enabled;
1306*d14abf15SRobert Mustacchi 	u8 dcb_version;
1307*d14abf15SRobert Mustacchi 	u8 dont_add_pri_0_en;
1308*d14abf15SRobert Mustacchi };
1309*d14abf15SRobert Mustacchi 
1310*d14abf15SRobert Mustacchi struct ecore_func_set_timesync_params {
1311*d14abf15SRobert Mustacchi 	/* Reset, set or keep the current drift value */
1312*d14abf15SRobert Mustacchi 	u8 drift_adjust_cmd;
1313*d14abf15SRobert Mustacchi 	/* Dec, inc or keep the current offset */
1314*d14abf15SRobert Mustacchi 	u8 offset_cmd;
1315*d14abf15SRobert Mustacchi 	/* Drift value direction */
1316*d14abf15SRobert Mustacchi 	u8 add_sub_drift_adjust_value;
1317*d14abf15SRobert Mustacchi 	/* Drift, period and offset values to be used according to the commands
1318*d14abf15SRobert Mustacchi 	 * above.
1319*d14abf15SRobert Mustacchi 	 */
1320*d14abf15SRobert Mustacchi 	u8 drift_adjust_value;
1321*d14abf15SRobert Mustacchi 	u32 drift_adjust_period;
1322*d14abf15SRobert Mustacchi 	u64 offset_delta;
1323*d14abf15SRobert Mustacchi };
1324*d14abf15SRobert Mustacchi 
1325*d14abf15SRobert Mustacchi struct ecore_func_state_params {
1326*d14abf15SRobert Mustacchi 	struct ecore_func_sp_obj *f_obj;
1327*d14abf15SRobert Mustacchi 
1328*d14abf15SRobert Mustacchi 	/* Current command */
1329*d14abf15SRobert Mustacchi 	enum ecore_func_cmd cmd;
1330*d14abf15SRobert Mustacchi 
1331*d14abf15SRobert Mustacchi 	/* may have RAMROD_COMP_WAIT set only */
1332*d14abf15SRobert Mustacchi 	unsigned long	ramrod_flags;
1333*d14abf15SRobert Mustacchi 
1334*d14abf15SRobert Mustacchi 	/* Params according to the current command */
1335*d14abf15SRobert Mustacchi 	union {
1336*d14abf15SRobert Mustacchi 		struct ecore_func_hw_init_params hw_init;
1337*d14abf15SRobert Mustacchi 		struct ecore_func_hw_reset_params hw_reset;
1338*d14abf15SRobert Mustacchi 		struct ecore_func_start_params start;
1339*d14abf15SRobert Mustacchi 		struct ecore_func_switch_update_params switch_update;
1340*d14abf15SRobert Mustacchi 		struct ecore_func_afex_update_params afex_update;
1341*d14abf15SRobert Mustacchi 		struct ecore_func_afex_viflists_params afex_viflists;
1342*d14abf15SRobert Mustacchi 		struct ecore_func_tx_start_params tx_start;
1343*d14abf15SRobert Mustacchi 		struct ecore_func_set_timesync_params set_timesync;
1344*d14abf15SRobert Mustacchi 	} params;
1345*d14abf15SRobert Mustacchi };
1346*d14abf15SRobert Mustacchi 
1347*d14abf15SRobert Mustacchi struct ecore_func_sp_drv_ops {
1348*d14abf15SRobert Mustacchi 	/* Init tool + runtime initialization:
1349*d14abf15SRobert Mustacchi 	 *      - Common Chip
1350*d14abf15SRobert Mustacchi 	 *      - Common (per Path)
1351*d14abf15SRobert Mustacchi 	 *      - Port
1352*d14abf15SRobert Mustacchi 	 *      - Function phases
1353*d14abf15SRobert Mustacchi 	 */
1354*d14abf15SRobert Mustacchi 	int (*init_hw_cmn_chip)(struct _lm_device_t *pdev);
1355*d14abf15SRobert Mustacchi 	int (*init_hw_cmn)(struct _lm_device_t *pdev);
1356*d14abf15SRobert Mustacchi 	int (*init_hw_port)(struct _lm_device_t *pdev);
1357*d14abf15SRobert Mustacchi 	int (*init_hw_func)(struct _lm_device_t *pdev);
1358*d14abf15SRobert Mustacchi 
1359*d14abf15SRobert Mustacchi 	/* Reset Function HW: Common, Port, Function phases. */
1360*d14abf15SRobert Mustacchi 	void (*reset_hw_cmn)(struct _lm_device_t *pdev);
1361*d14abf15SRobert Mustacchi 	void (*reset_hw_port)(struct _lm_device_t *pdev);
1362*d14abf15SRobert Mustacchi 	void (*reset_hw_func)(struct _lm_device_t *pdev);
1363*d14abf15SRobert Mustacchi 
1364*d14abf15SRobert Mustacchi 	/* Init/Free GUNZIP resources */
1365*d14abf15SRobert Mustacchi 	int (*gunzip_init)(struct _lm_device_t *pdev);
1366*d14abf15SRobert Mustacchi 	void (*gunzip_end)(struct _lm_device_t *pdev);
1367*d14abf15SRobert Mustacchi 
1368*d14abf15SRobert Mustacchi 	/* Prepare/Release FW resources */
1369*d14abf15SRobert Mustacchi 	int (*init_fw)(struct _lm_device_t *pdev);
1370*d14abf15SRobert Mustacchi 	void (*release_fw)(struct _lm_device_t *pdev);
1371*d14abf15SRobert Mustacchi };
1372*d14abf15SRobert Mustacchi 
1373*d14abf15SRobert Mustacchi struct ecore_func_sp_obj {
1374*d14abf15SRobert Mustacchi 	enum ecore_func_state	state, next_state;
1375*d14abf15SRobert Mustacchi 
1376*d14abf15SRobert Mustacchi 	/* ECORE_FUNC_CMD_XX bits. This object implements "one
1377*d14abf15SRobert Mustacchi 	 * pending" paradigm but for debug and tracing purposes it's
1378*d14abf15SRobert Mustacchi 	 * more convenient to have different bits for different
1379*d14abf15SRobert Mustacchi 	 * commands.
1380*d14abf15SRobert Mustacchi 	 */
1381*d14abf15SRobert Mustacchi 	unsigned long		pending;
1382*d14abf15SRobert Mustacchi 
1383*d14abf15SRobert Mustacchi 	/* Buffer to use as a ramrod data and its mapping */
1384*d14abf15SRobert Mustacchi 	void			*rdata;
1385*d14abf15SRobert Mustacchi 	lm_address_t		rdata_mapping;
1386*d14abf15SRobert Mustacchi 
1387*d14abf15SRobert Mustacchi 	/* Buffer to use as a afex ramrod data and its mapping.
1388*d14abf15SRobert Mustacchi 	 * This can't be same rdata as above because afex ramrod requests
1389*d14abf15SRobert Mustacchi 	 * can arrive to the object in parallel to other ramrod requests.
1390*d14abf15SRobert Mustacchi 	 */
1391*d14abf15SRobert Mustacchi 	void			*afex_rdata;
1392*d14abf15SRobert Mustacchi 	lm_address_t		afex_rdata_mapping;
1393*d14abf15SRobert Mustacchi 
1394*d14abf15SRobert Mustacchi 	/* this mutex validates that when pending flag is taken, the next
1395*d14abf15SRobert Mustacchi 	 * ramrod to be sent will be the one set the pending bit
1396*d14abf15SRobert Mustacchi 	 */
1397*d14abf15SRobert Mustacchi 	ECORE_MUTEX		one_pending_mutex;
1398*d14abf15SRobert Mustacchi 
1399*d14abf15SRobert Mustacchi 	/* Driver interface */
1400*d14abf15SRobert Mustacchi 	struct ecore_func_sp_drv_ops	*drv;
1401*d14abf15SRobert Mustacchi 
1402*d14abf15SRobert Mustacchi 	/**
1403*d14abf15SRobert Mustacchi 	 * Performs one state change according to the given parameters.
1404*d14abf15SRobert Mustacchi 	 *
1405*d14abf15SRobert Mustacchi 	 * @return 0 in case of success and negative value otherwise.
1406*d14abf15SRobert Mustacchi 	 */
1407*d14abf15SRobert Mustacchi 	int (*send_cmd)(struct _lm_device_t *pdev,
1408*d14abf15SRobert Mustacchi 			struct ecore_func_state_params *params);
1409*d14abf15SRobert Mustacchi 
1410*d14abf15SRobert Mustacchi 	/**
1411*d14abf15SRobert Mustacchi 	 * Checks that the requested state transition is legal.
1412*d14abf15SRobert Mustacchi 	 */
1413*d14abf15SRobert Mustacchi 	int (*check_transition)(struct _lm_device_t *pdev,
1414*d14abf15SRobert Mustacchi 				struct ecore_func_sp_obj *o,
1415*d14abf15SRobert Mustacchi 				struct ecore_func_state_params *params);
1416*d14abf15SRobert Mustacchi 
1417*d14abf15SRobert Mustacchi 	/**
1418*d14abf15SRobert Mustacchi 	 * Completes the pending command.
1419*d14abf15SRobert Mustacchi 	 */
1420*d14abf15SRobert Mustacchi 	int (*complete_cmd)(struct _lm_device_t *pdev,
1421*d14abf15SRobert Mustacchi 			    struct ecore_func_sp_obj *o,
1422*d14abf15SRobert Mustacchi 			    enum ecore_func_cmd cmd);
1423*d14abf15SRobert Mustacchi 
1424*d14abf15SRobert Mustacchi 	int (*wait_comp)(struct _lm_device_t *pdev, struct ecore_func_sp_obj *o,
1425*d14abf15SRobert Mustacchi 			 enum ecore_func_cmd cmd);
1426*d14abf15SRobert Mustacchi };
1427*d14abf15SRobert Mustacchi 
1428*d14abf15SRobert Mustacchi /********************** Interfaces ********************************************/
1429*d14abf15SRobert Mustacchi /* Queueable objects set */
1430*d14abf15SRobert Mustacchi union ecore_qable_obj {
1431*d14abf15SRobert Mustacchi 	struct ecore_vlan_mac_obj vlan_mac;
1432*d14abf15SRobert Mustacchi };
1433*d14abf15SRobert Mustacchi /************** Function state update *********/
1434*d14abf15SRobert Mustacchi void ecore_init_func_obj(struct _lm_device_t *pdev,
1435*d14abf15SRobert Mustacchi 			 struct ecore_func_sp_obj *obj,
1436*d14abf15SRobert Mustacchi 			 void *rdata, lm_address_t rdata_mapping,
1437*d14abf15SRobert Mustacchi 			 void *afex_rdata, lm_address_t afex_rdata_mapping,
1438*d14abf15SRobert Mustacchi 			 struct ecore_func_sp_drv_ops *drv_iface);
1439*d14abf15SRobert Mustacchi 
1440*d14abf15SRobert Mustacchi int ecore_func_state_change(struct _lm_device_t *pdev,
1441*d14abf15SRobert Mustacchi 			    struct ecore_func_state_params *params);
1442*d14abf15SRobert Mustacchi 
1443*d14abf15SRobert Mustacchi enum ecore_func_state ecore_func_get_state(struct _lm_device_t *pdev,
1444*d14abf15SRobert Mustacchi 					   struct ecore_func_sp_obj *o);
1445*d14abf15SRobert Mustacchi /******************* Queue State **************/
1446*d14abf15SRobert Mustacchi void ecore_init_queue_obj(struct _lm_device_t *pdev,
1447*d14abf15SRobert Mustacchi 			  struct ecore_queue_sp_obj *obj, u8 cl_id, u32 *cids,
1448*d14abf15SRobert Mustacchi 			  u8 cid_cnt, u8 func_id, void *rdata,
1449*d14abf15SRobert Mustacchi 			  lm_address_t rdata_mapping, unsigned long type);
1450*d14abf15SRobert Mustacchi 
1451*d14abf15SRobert Mustacchi int ecore_queue_state_change(struct _lm_device_t *pdev,
1452*d14abf15SRobert Mustacchi 			     struct ecore_queue_state_params *params);
1453*d14abf15SRobert Mustacchi 
1454*d14abf15SRobert Mustacchi int ecore_get_q_logical_state(struct _lm_device_t *pdev,
1455*d14abf15SRobert Mustacchi 			       struct ecore_queue_sp_obj *obj);
1456*d14abf15SRobert Mustacchi 
1457*d14abf15SRobert Mustacchi /********************* VLAN-MAC ****************/
1458*d14abf15SRobert Mustacchi void ecore_init_mac_obj(struct _lm_device_t *pdev,
1459*d14abf15SRobert Mustacchi 			struct ecore_vlan_mac_obj *mac_obj,
1460*d14abf15SRobert Mustacchi 			u8 cl_id, u32 cid, u8 func_id, void *rdata,
1461*d14abf15SRobert Mustacchi 			lm_address_t rdata_mapping, int state,
1462*d14abf15SRobert Mustacchi 			unsigned long *pstate, ecore_obj_type type,
1463*d14abf15SRobert Mustacchi 			struct ecore_credit_pool_obj *macs_pool);
1464*d14abf15SRobert Mustacchi 
1465*d14abf15SRobert Mustacchi void ecore_init_vlan_obj(struct _lm_device_t *pdev,
1466*d14abf15SRobert Mustacchi 			 struct ecore_vlan_mac_obj *vlan_obj,
1467*d14abf15SRobert Mustacchi 			 u8 cl_id, u32 cid, u8 func_id, void *rdata,
1468*d14abf15SRobert Mustacchi 			 lm_address_t rdata_mapping, int state,
1469*d14abf15SRobert Mustacchi 			 unsigned long *pstate, ecore_obj_type type,
1470*d14abf15SRobert Mustacchi 			 struct ecore_credit_pool_obj *vlans_pool);
1471*d14abf15SRobert Mustacchi 
1472*d14abf15SRobert Mustacchi void ecore_init_vlan_mac_obj(struct _lm_device_t *pdev,
1473*d14abf15SRobert Mustacchi 			     struct ecore_vlan_mac_obj *vlan_mac_obj,
1474*d14abf15SRobert Mustacchi 			     u8 cl_id, u32 cid, u8 func_id, void *rdata,
1475*d14abf15SRobert Mustacchi 			     lm_address_t rdata_mapping, int state,
1476*d14abf15SRobert Mustacchi 			     unsigned long *pstate, ecore_obj_type type,
1477*d14abf15SRobert Mustacchi 			     struct ecore_credit_pool_obj *macs_pool,
1478*d14abf15SRobert Mustacchi 			     struct ecore_credit_pool_obj *vlans_pool);
1479*d14abf15SRobert Mustacchi 
1480*d14abf15SRobert Mustacchi int ecore_vlan_mac_h_read_lock(struct _lm_device_t *pdev,
1481*d14abf15SRobert Mustacchi 					struct ecore_vlan_mac_obj *o);
1482*d14abf15SRobert Mustacchi void ecore_vlan_mac_h_read_unlock(struct _lm_device_t *pdev,
1483*d14abf15SRobert Mustacchi 				  struct ecore_vlan_mac_obj *o);
1484*d14abf15SRobert Mustacchi int ecore_vlan_mac_h_write_lock(struct _lm_device_t *pdev,
1485*d14abf15SRobert Mustacchi 				struct ecore_vlan_mac_obj *o);
1486*d14abf15SRobert Mustacchi void ecore_vlan_mac_h_write_unlock(struct _lm_device_t *pdev,
1487*d14abf15SRobert Mustacchi 					  struct ecore_vlan_mac_obj *o);
1488*d14abf15SRobert Mustacchi int ecore_config_vlan_mac(struct _lm_device_t *pdev,
1489*d14abf15SRobert Mustacchi 			   struct ecore_vlan_mac_ramrod_params *p);
1490*d14abf15SRobert Mustacchi 
1491*d14abf15SRobert Mustacchi int ecore_vlan_mac_move(struct _lm_device_t *pdev,
1492*d14abf15SRobert Mustacchi 			struct ecore_vlan_mac_ramrod_params *p,
1493*d14abf15SRobert Mustacchi 			struct ecore_vlan_mac_obj *dest_o);
1494*d14abf15SRobert Mustacchi 
1495*d14abf15SRobert Mustacchi /********************* RX MODE ****************/
1496*d14abf15SRobert Mustacchi 
1497*d14abf15SRobert Mustacchi void ecore_init_rx_mode_obj(struct _lm_device_t *pdev,
1498*d14abf15SRobert Mustacchi 			    struct ecore_rx_mode_obj *o);
1499*d14abf15SRobert Mustacchi 
1500*d14abf15SRobert Mustacchi /**
1501*d14abf15SRobert Mustacchi  * bnx2x_config_rx_mode - Send and RX_MODE ramrod according to the provided parameters.
1502*d14abf15SRobert Mustacchi  *
1503*d14abf15SRobert Mustacchi  * @p: Command parameters
1504*d14abf15SRobert Mustacchi  *
1505*d14abf15SRobert Mustacchi  * Return: 0 - if operation was successful and there is no pending completions,
1506*d14abf15SRobert Mustacchi  *         positive number - if there are pending completions,
1507*d14abf15SRobert Mustacchi  *         negative - if there were errors
1508*d14abf15SRobert Mustacchi  */
1509*d14abf15SRobert Mustacchi int ecore_config_rx_mode(struct _lm_device_t *pdev,
1510*d14abf15SRobert Mustacchi 			 struct ecore_rx_mode_ramrod_params *p);
1511*d14abf15SRobert Mustacchi 
1512*d14abf15SRobert Mustacchi /****************** MULTICASTS ****************/
1513*d14abf15SRobert Mustacchi 
1514*d14abf15SRobert Mustacchi void ecore_init_mcast_obj(struct _lm_device_t *pdev,
1515*d14abf15SRobert Mustacchi 			  struct ecore_mcast_obj *mcast_obj,
1516*d14abf15SRobert Mustacchi 			  u8 mcast_cl_id, u32 mcast_cid, u8 func_id,
1517*d14abf15SRobert Mustacchi 			  u8 engine_id, void *rdata, lm_address_t rdata_mapping,
1518*d14abf15SRobert Mustacchi 			  int state, unsigned long *pstate,
1519*d14abf15SRobert Mustacchi 			  ecore_obj_type type);
1520*d14abf15SRobert Mustacchi 
1521*d14abf15SRobert Mustacchi /**
1522*d14abf15SRobert Mustacchi  * bnx2x_config_mcast - Configure multicast MACs list.
1523*d14abf15SRobert Mustacchi  *
1524*d14abf15SRobert Mustacchi  * @cmd: command to execute: BNX2X_MCAST_CMD_X
1525*d14abf15SRobert Mustacchi  *
1526*d14abf15SRobert Mustacchi  * May configure a new list
1527*d14abf15SRobert Mustacchi  * provided in p->mcast_list (ECORE_MCAST_CMD_ADD), clean up
1528*d14abf15SRobert Mustacchi  * (ECORE_MCAST_CMD_DEL) or restore (ECORE_MCAST_CMD_RESTORE) a current
1529*d14abf15SRobert Mustacchi  * configuration, continue to execute the pending commands
1530*d14abf15SRobert Mustacchi  * (ECORE_MCAST_CMD_CONT).
1531*d14abf15SRobert Mustacchi  *
1532*d14abf15SRobert Mustacchi  * If previous command is still pending or if number of MACs to
1533*d14abf15SRobert Mustacchi  * configure is more that maximum number of MACs in one command,
1534*d14abf15SRobert Mustacchi  * the current command will be enqueued to the tail of the
1535*d14abf15SRobert Mustacchi  * pending commands list.
1536*d14abf15SRobert Mustacchi  *
1537*d14abf15SRobert Mustacchi  * Return: 0 is operation was successfull and there are no pending completions,
1538*d14abf15SRobert Mustacchi  *         negative if there were errors, positive if there are pending
1539*d14abf15SRobert Mustacchi  *         completions.
1540*d14abf15SRobert Mustacchi  */
1541*d14abf15SRobert Mustacchi int ecore_config_mcast(struct _lm_device_t *pdev,
1542*d14abf15SRobert Mustacchi 		       struct ecore_mcast_ramrod_params *p,
1543*d14abf15SRobert Mustacchi 		       enum ecore_mcast_cmd cmd);
1544*d14abf15SRobert Mustacchi 
1545*d14abf15SRobert Mustacchi /****************** CREDIT POOL ****************/
1546*d14abf15SRobert Mustacchi void ecore_init_mac_credit_pool(struct _lm_device_t *pdev,
1547*d14abf15SRobert Mustacchi 				struct ecore_credit_pool_obj *p, u8 func_id,
1548*d14abf15SRobert Mustacchi 				u8 func_num);
1549*d14abf15SRobert Mustacchi void ecore_init_vlan_credit_pool(struct _lm_device_t *pdev,
1550*d14abf15SRobert Mustacchi 				 struct ecore_credit_pool_obj *p, u8 func_id,
1551*d14abf15SRobert Mustacchi 				 u8 func_num);
1552*d14abf15SRobert Mustacchi 
1553*d14abf15SRobert Mustacchi /****************** RSS CONFIGURATION ****************/
1554*d14abf15SRobert Mustacchi void ecore_init_rss_config_obj(struct _lm_device_t *pdev,
1555*d14abf15SRobert Mustacchi 			       struct ecore_rss_config_obj *rss_obj,
1556*d14abf15SRobert Mustacchi 			       u8 cl_id, u32 cid, u8 func_id, u8 engine_id,
1557*d14abf15SRobert Mustacchi 			       void *rdata, lm_address_t rdata_mapping,
1558*d14abf15SRobert Mustacchi 			       int state, unsigned long *pstate,
1559*d14abf15SRobert Mustacchi 			       ecore_obj_type type);
1560*d14abf15SRobert Mustacchi 
1561*d14abf15SRobert Mustacchi /**
1562*d14abf15SRobert Mustacchi  * bnx2x_config_rss - Updates RSS configuration according to provided parameters
1563*d14abf15SRobert Mustacchi  *
1564*d14abf15SRobert Mustacchi  * Return: 0 in case of success
1565*d14abf15SRobert Mustacchi  */
1566*d14abf15SRobert Mustacchi int ecore_config_rss(struct _lm_device_t *pdev,
1567*d14abf15SRobert Mustacchi 		     struct ecore_config_rss_params *p);
1568*d14abf15SRobert Mustacchi 
1569*d14abf15SRobert Mustacchi /**
1570*d14abf15SRobert Mustacchi  * bnx2x_get_rss_ind_table - Return the current ind_table configuration.
1571*d14abf15SRobert Mustacchi  *
1572*d14abf15SRobert Mustacchi  * @ind_table: buffer to fill with the current indirection
1573*d14abf15SRobert Mustacchi  *                  table content. Should be at least
1574*d14abf15SRobert Mustacchi  *                  T_ETH_INDIRECTION_TABLE_SIZE bytes long.
1575*d14abf15SRobert Mustacchi  */
1576*d14abf15SRobert Mustacchi void ecore_get_rss_ind_table(struct ecore_rss_config_obj *rss_obj,
1577*d14abf15SRobert Mustacchi 			     u8 *ind_table);
1578*d14abf15SRobert Mustacchi 
1579*d14abf15SRobert Mustacchi #endif /* ECORE_SP_VERBS */
1580