1 /****************************************************************************** 2 SPDX-License-Identifier: BSD-3-Clause 3 4 Copyright (c) 2001-2017, Intel Corporation 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Redistributions in binary form must reproduce the above copyright 14 notice, this list of conditions and the following disclaimer in the 15 documentation and/or other materials provided with the distribution. 16 17 3. Neither the name of the Intel Corporation nor the names of its 18 contributors may be used to endorse or promote products derived from 19 this software without specific prior written permission. 20 21 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 25 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 POSSIBILITY OF SUCH DAMAGE. 32 33 ******************************************************************************/ 34 /*$FreeBSD$*/ 35 36 #include "ixgbe_api.h" 37 #include "ixgbe_type.h" 38 #include "ixgbe_vf.h" 39 40 #ifndef IXGBE_VFWRITE_REG 41 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG 42 #endif 43 #ifndef IXGBE_VFREAD_REG 44 #define IXGBE_VFREAD_REG IXGBE_READ_REG 45 #endif 46 47 /** 48 * ixgbe_init_ops_vf - Initialize the pointers for vf 49 * @hw: pointer to hardware structure 50 * 51 * This will assign function pointers, adapter-specific functions can 52 * override the assignment of generic function pointers by assigning 53 * their own adapter-specific function pointers. 54 * Does not touch the hardware. 55 **/ 56 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw) 57 { 58 /* MAC */ 59 hw->mac.ops.init_hw = ixgbe_init_hw_vf; 60 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf; 61 hw->mac.ops.start_hw = ixgbe_start_hw_vf; 62 /* Cannot clear stats on VF */ 63 hw->mac.ops.clear_hw_cntrs = NULL; 64 hw->mac.ops.get_media_type = NULL; 65 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf; 66 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf; 67 hw->mac.ops.get_bus_info = NULL; 68 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version; 69 70 /* Link */ 71 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf; 72 hw->mac.ops.check_link = ixgbe_check_mac_link_vf; 73 hw->mac.ops.get_link_capabilities = NULL; 74 75 /* RAR, Multicast, VLAN */ 76 hw->mac.ops.set_rar = ixgbe_set_rar_vf; 77 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf; 78 hw->mac.ops.init_rx_addrs = NULL; 79 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf; 80 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode; 81 hw->mac.ops.enable_mc = NULL; 82 hw->mac.ops.disable_mc = NULL; 83 hw->mac.ops.clear_vfta = NULL; 84 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf; 85 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf; 86 87 hw->mac.max_tx_queues = 1; 88 hw->mac.max_rx_queues = 1; 89 90 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf; 91 92 return IXGBE_SUCCESS; 93 } 94 95 /* ixgbe_virt_clr_reg - Set register to default (power on) state. 96 * @hw: pointer to hardware structure 97 */ 98 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw) 99 { 100 int i; 101 u32 vfsrrctl; 102 u32 vfdca_rxctrl; 103 u32 vfdca_txctrl; 104 105 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */ 106 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; 107 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 108 109 /* DCA_RXCTRL default value */ 110 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN | 111 IXGBE_DCA_RXCTRL_DATA_WRO_EN | 112 IXGBE_DCA_RXCTRL_HEAD_WRO_EN; 113 114 /* DCA_TXCTRL default value */ 115 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN | 116 IXGBE_DCA_TXCTRL_DESC_WRO_EN | 117 IXGBE_DCA_TXCTRL_DATA_RRO_EN; 118 119 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 120 121 for (i = 0; i < 7; i++) { 122 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0); 123 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0); 124 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0); 125 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl); 126 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0); 127 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0); 128 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0); 129 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0); 130 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0); 131 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl); 132 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl); 133 } 134 135 IXGBE_WRITE_FLUSH(hw); 136 } 137 138 /** 139 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx 140 * @hw: pointer to hardware structure 141 * 142 * Starts the hardware by filling the bus info structure and media type, clears 143 * all on chip counters, initializes receive address registers, multicast 144 * table, VLAN filter table, calls routine to set up link and flow control 145 * settings, and leaves transmit and receive units disabled and uninitialized 146 **/ 147 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw) 148 { 149 /* Clear adapter stopped flag */ 150 hw->adapter_stopped = FALSE; 151 152 return IXGBE_SUCCESS; 153 } 154 155 /** 156 * ixgbe_init_hw_vf - virtual function hardware initialization 157 * @hw: pointer to hardware structure 158 * 159 * Initialize the hardware by resetting the hardware and then starting 160 * the hardware 161 **/ 162 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw) 163 { 164 s32 status = hw->mac.ops.start_hw(hw); 165 166 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); 167 168 return status; 169 } 170 171 /** 172 * ixgbe_reset_hw_vf - Performs hardware reset 173 * @hw: pointer to hardware structure 174 * 175 * Resets the hardware by reseting the transmit and receive units, masks and 176 * clears all interrupts. 177 **/ 178 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw) 179 { 180 struct ixgbe_mbx_info *mbx = &hw->mbx; 181 u32 timeout = IXGBE_VF_INIT_TIMEOUT; 182 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; 183 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; 184 u8 *addr = (u8 *)(&msgbuf[1]); 185 186 DEBUGFUNC("ixgbevf_reset_hw_vf"); 187 188 /* Call adapter stop to disable tx/rx and clear interrupts */ 189 hw->mac.ops.stop_adapter(hw); 190 191 /* reset the api version */ 192 hw->api_version = ixgbe_mbox_api_10; 193 194 DEBUGOUT("Issuing a function level reset to MAC\n"); 195 196 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); 197 IXGBE_WRITE_FLUSH(hw); 198 199 msec_delay(50); 200 201 /* we cannot reset while the RSTI / RSTD bits are asserted */ 202 while (!mbx->ops.check_for_rst(hw, 0) && timeout) { 203 timeout--; 204 usec_delay(5); 205 } 206 207 if (!timeout) 208 return IXGBE_ERR_RESET_FAILED; 209 210 /* Reset VF registers to initial values */ 211 ixgbe_virt_clr_reg(hw); 212 213 /* mailbox timeout can now become active */ 214 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; 215 216 msgbuf[0] = IXGBE_VF_RESET; 217 mbx->ops.write_posted(hw, msgbuf, 1, 0); 218 219 msec_delay(10); 220 221 /* 222 * set our "perm_addr" based on info provided by PF 223 * also set up the mc_filter_type which is piggy backed 224 * on the mac address in word 3 225 */ 226 ret_val = mbx->ops.read_posted(hw, msgbuf, 227 IXGBE_VF_PERMADDR_MSG_LEN, 0); 228 if (ret_val) 229 return ret_val; 230 231 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) && 232 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK)) 233 return IXGBE_ERR_INVALID_MAC_ADDR; 234 235 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK)) 236 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 237 238 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; 239 240 return ret_val; 241 } 242 243 /** 244 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units 245 * @hw: pointer to hardware structure 246 * 247 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 248 * disables transmit and receive units. The adapter_stopped flag is used by 249 * the shared code and drivers to determine if the adapter is in a stopped 250 * state and should not touch the hardware. 251 **/ 252 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw) 253 { 254 u32 reg_val; 255 u16 i; 256 257 /* 258 * Set the adapter_stopped flag so other driver functions stop touching 259 * the hardware 260 */ 261 hw->adapter_stopped = TRUE; 262 263 /* Clear interrupt mask to stop from interrupts being generated */ 264 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); 265 266 /* Clear any pending interrupts, flush previous writes */ 267 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR); 268 269 /* Disable the transmit unit. Each queue must be disabled. */ 270 for (i = 0; i < hw->mac.max_tx_queues; i++) 271 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH); 272 273 /* Disable the receive unit by stopping each queue */ 274 for (i = 0; i < hw->mac.max_rx_queues; i++) { 275 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i)); 276 reg_val &= ~IXGBE_RXDCTL_ENABLE; 277 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); 278 } 279 /* Clear packet split and pool config */ 280 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 281 282 /* flush all queues disables */ 283 IXGBE_WRITE_FLUSH(hw); 284 msec_delay(2); 285 286 return IXGBE_SUCCESS; 287 } 288 289 /** 290 * ixgbe_mta_vector - Determines bit-vector in multicast table to set 291 * @hw: pointer to hardware structure 292 * @mc_addr: the multicast address 293 * 294 * Extracts the 12 bits, from a multicast address, to determine which 295 * bit-vector to set in the multicast table. The hardware uses 12 bits, from 296 * incoming rx multicast addresses, to determine the bit-vector to check in 297 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set 298 * by the MO field of the MCSTCTRL. The MO field is set during initialization 299 * to mc_filter_type. 300 **/ 301 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) 302 { 303 u32 vector = 0; 304 305 switch (hw->mac.mc_filter_type) { 306 case 0: /* use bits [47:36] of the address */ 307 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); 308 break; 309 case 1: /* use bits [46:35] of the address */ 310 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); 311 break; 312 case 2: /* use bits [45:34] of the address */ 313 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); 314 break; 315 case 3: /* use bits [43:32] of the address */ 316 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); 317 break; 318 default: /* Invalid mc_filter_type */ 319 DEBUGOUT("MC filter type param set incorrectly\n"); 320 ASSERT(0); 321 break; 322 } 323 324 /* vector can only be 12-bits or boundary will be exceeded */ 325 vector &= 0xFFF; 326 return vector; 327 } 328 329 static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg, 330 u32 *retmsg, u16 size) 331 { 332 struct ixgbe_mbx_info *mbx = &hw->mbx; 333 s32 retval = mbx->ops.write_posted(hw, msg, size, 0); 334 335 if (retval) 336 return retval; 337 338 return mbx->ops.read_posted(hw, retmsg, size, 0); 339 } 340 341 /** 342 * ixgbe_set_rar_vf - set device MAC address 343 * @hw: pointer to hardware structure 344 * @index: Receive address register to write 345 * @addr: Address to put into receive address register 346 * @vmdq: VMDq "set" or "pool" index 347 * @enable_addr: set flag that address is active 348 **/ 349 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 350 u32 enable_addr) 351 { 352 u32 msgbuf[3]; 353 u8 *msg_addr = (u8 *)(&msgbuf[1]); 354 s32 ret_val; 355 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index); 356 357 memset(msgbuf, 0, 12); 358 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; 359 memcpy(msg_addr, addr, 6); 360 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 361 362 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 363 364 /* if nacked the address was rejected, use "perm_addr" */ 365 if (!ret_val && 366 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) { 367 ixgbe_get_mac_addr_vf(hw, hw->mac.addr); 368 return IXGBE_ERR_MBX; 369 } 370 371 return ret_val; 372 } 373 374 /** 375 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses 376 * @hw: pointer to the HW structure 377 * @mc_addr_list: array of multicast addresses to program 378 * @mc_addr_count: number of multicast addresses to program 379 * @next: caller supplied function to return next address in list 380 * @clear: unused 381 * 382 * Updates the Multicast Table Array. 383 **/ 384 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, 385 u32 mc_addr_count, ixgbe_mc_addr_itr next, 386 bool clear) 387 { 388 struct ixgbe_mbx_info *mbx = &hw->mbx; 389 u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; 390 u16 *vector_list = (u16 *)&msgbuf[1]; 391 u32 vector; 392 u32 cnt, i; 393 u32 vmdq; 394 395 UNREFERENCED_1PARAMETER(clear); 396 397 DEBUGFUNC("ixgbe_update_mc_addr_list_vf"); 398 399 /* Each entry in the list uses 1 16 bit word. We have 30 400 * 16 bit words available in our HW msg buffer (minus 1 for the 401 * msg type). That's 30 hash values if we pack 'em right. If 402 * there are more than 30 MC addresses to add then punt the 403 * extras for now and then add code to handle more than 30 later. 404 * It would be unusual for a server to request that many multi-cast 405 * addresses except for in large enterprise network environments. 406 */ 407 408 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); 409 410 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count; 411 msgbuf[0] = IXGBE_VF_SET_MULTICAST; 412 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; 413 414 for (i = 0; i < cnt; i++) { 415 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq)); 416 DEBUGOUT1("Hash value = 0x%03X\n", vector); 417 vector_list[i] = (u16)vector; 418 } 419 420 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0); 421 } 422 423 /** 424 * ixgbevf_update_xcast_mode - Update Multicast mode 425 * @hw: pointer to the HW structure 426 * @xcast_mode: new multicast mode 427 * 428 * Updates the Multicast Mode of VF. 429 **/ 430 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode) 431 { 432 u32 msgbuf[2]; 433 s32 err; 434 435 switch (hw->api_version) { 436 case ixgbe_mbox_api_12: 437 /* New modes were introduced in 1.3 version */ 438 if (xcast_mode > IXGBEVF_XCAST_MODE_ALLMULTI) 439 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 440 /* Fall through */ 441 case ixgbe_mbox_api_13: 442 break; 443 default: 444 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 445 } 446 447 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE; 448 msgbuf[1] = xcast_mode; 449 450 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 451 if (err) 452 return err; 453 454 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 455 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK)) 456 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 457 return IXGBE_SUCCESS; 458 } 459 460 /** 461 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address 462 * @hw: pointer to the HW structure 463 * @vlan: 12 bit VLAN ID 464 * @vind: unused by VF drivers 465 * @vlan_on: if TRUE then set bit, else clear bit 466 * @vlvf_bypass: boolean flag indicating updating default pool is okay 467 * 468 * Turn on/off specified VLAN in the VLAN filter table. 469 **/ 470 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, 471 bool vlan_on, bool vlvf_bypass) 472 { 473 u32 msgbuf[2]; 474 s32 ret_val; 475 UNREFERENCED_2PARAMETER(vind, vlvf_bypass); 476 477 msgbuf[0] = IXGBE_VF_SET_VLAN; 478 msgbuf[1] = vlan; 479 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ 480 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT; 481 482 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 483 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK)) 484 return IXGBE_SUCCESS; 485 486 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK); 487 } 488 489 /** 490 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues 491 * @hw: pointer to hardware structure 492 * 493 * Returns the number of transmit queues for the given adapter. 494 **/ 495 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw) 496 { 497 UNREFERENCED_1PARAMETER(hw); 498 return IXGBE_VF_MAX_TX_QUEUES; 499 } 500 501 /** 502 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues 503 * @hw: pointer to hardware structure 504 * 505 * Returns the number of receive queues for the given adapter. 506 **/ 507 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw) 508 { 509 UNREFERENCED_1PARAMETER(hw); 510 return IXGBE_VF_MAX_RX_QUEUES; 511 } 512 513 /** 514 * ixgbe_get_mac_addr_vf - Read device MAC address 515 * @hw: pointer to the HW structure 516 * @mac_addr: the MAC address 517 **/ 518 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) 519 { 520 int i; 521 522 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++) 523 mac_addr[i] = hw->mac.perm_addr[i]; 524 525 return IXGBE_SUCCESS; 526 } 527 528 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) 529 { 530 u32 msgbuf[3], msgbuf_chk; 531 u8 *msg_addr = (u8 *)(&msgbuf[1]); 532 s32 ret_val; 533 534 memset(msgbuf, 0, sizeof(msgbuf)); 535 /* 536 * If index is one then this is the start of a new list and needs 537 * indication to the PF so it can do it's own list management. 538 * If it is zero then that tells the PF to just clear all of 539 * this VF's macvlans and there is no new list. 540 */ 541 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT; 542 msgbuf[0] |= IXGBE_VF_SET_MACVLAN; 543 msgbuf_chk = msgbuf[0]; 544 if (addr) 545 memcpy(msg_addr, addr, 6); 546 547 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 548 if (!ret_val) { 549 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 550 551 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_NACK)) 552 return IXGBE_ERR_OUT_OF_MEM; 553 } 554 555 return ret_val; 556 } 557 558 /** 559 * ixgbe_setup_mac_link_vf - Setup MAC link settings 560 * @hw: pointer to hardware structure 561 * @speed: new link speed 562 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 563 * 564 * Set the link speed in the AUTOC register and restarts link. 565 **/ 566 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed, 567 bool autoneg_wait_to_complete) 568 { 569 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete); 570 return IXGBE_SUCCESS; 571 } 572 573 /** 574 * ixgbe_check_mac_link_vf - Get link/speed status 575 * @hw: pointer to hardware structure 576 * @speed: pointer to link speed 577 * @link_up: TRUE is link is up, FALSE otherwise 578 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 579 * 580 * Reads the links register to determine if link is up and the current speed 581 **/ 582 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 583 bool *link_up, bool autoneg_wait_to_complete) 584 { 585 struct ixgbe_mbx_info *mbx = &hw->mbx; 586 struct ixgbe_mac_info *mac = &hw->mac; 587 s32 ret_val = IXGBE_SUCCESS; 588 u32 links_reg; 589 u32 in_msg = 0; 590 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete); 591 592 /* If we were hit with a reset drop the link */ 593 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout) 594 mac->get_link_status = TRUE; 595 596 if (!mac->get_link_status) 597 goto out; 598 599 /* if link status is down no point in checking to see if pf is up */ 600 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 601 if (!(links_reg & IXGBE_LINKS_UP)) 602 goto out; 603 604 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs 605 * before the link status is correct 606 */ 607 if (mac->type == ixgbe_mac_82599_vf) { 608 int i; 609 610 for (i = 0; i < 5; i++) { 611 usec_delay(100); 612 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 613 614 if (!(links_reg & IXGBE_LINKS_UP)) 615 goto out; 616 } 617 } 618 619 switch (links_reg & IXGBE_LINKS_SPEED_82599) { 620 case IXGBE_LINKS_SPEED_10G_82599: 621 *speed = IXGBE_LINK_SPEED_10GB_FULL; 622 if (hw->mac.type >= ixgbe_mac_X550) { 623 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 624 *speed = IXGBE_LINK_SPEED_2_5GB_FULL; 625 } 626 break; 627 case IXGBE_LINKS_SPEED_1G_82599: 628 *speed = IXGBE_LINK_SPEED_1GB_FULL; 629 break; 630 case IXGBE_LINKS_SPEED_100_82599: 631 *speed = IXGBE_LINK_SPEED_100_FULL; 632 if (hw->mac.type == ixgbe_mac_X550) { 633 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 634 *speed = IXGBE_LINK_SPEED_5GB_FULL; 635 } 636 break; 637 case IXGBE_LINKS_SPEED_10_X550EM_A: 638 *speed = IXGBE_LINK_SPEED_UNKNOWN; 639 /* Since Reserved in older MAC's */ 640 if (hw->mac.type >= ixgbe_mac_X550) 641 *speed = IXGBE_LINK_SPEED_10_FULL; 642 break; 643 default: 644 *speed = IXGBE_LINK_SPEED_UNKNOWN; 645 } 646 647 /* if the read failed it could just be a mailbox collision, best wait 648 * until we are called again and don't report an error 649 */ 650 if (mbx->ops.read(hw, &in_msg, 1, 0)) 651 goto out; 652 653 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) { 654 /* msg is not CTS and is NACK we must have lost CTS status */ 655 if (in_msg & IXGBE_VT_MSGTYPE_NACK) 656 ret_val = -1; 657 goto out; 658 } 659 660 /* the pf is talking, if we timed out in the past we reinit */ 661 if (!mbx->timeout) { 662 ret_val = -1; 663 goto out; 664 } 665 666 /* if we passed all the tests above then the link is up and we no 667 * longer need to check for link 668 */ 669 mac->get_link_status = FALSE; 670 671 out: 672 *link_up = !mac->get_link_status; 673 return ret_val; 674 } 675 676 /** 677 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length 678 * @hw: pointer to the HW structure 679 * @max_size: value to assign to max frame size 680 **/ 681 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size) 682 { 683 u32 msgbuf[2]; 684 s32 retval; 685 686 msgbuf[0] = IXGBE_VF_SET_LPE; 687 msgbuf[1] = max_size; 688 689 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 690 if (retval) 691 return retval; 692 if ((msgbuf[0] & IXGBE_VF_SET_LPE) && 693 (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK)) 694 return IXGBE_ERR_MBX; 695 696 return 0; 697 } 698 699 /** 700 * ixgbevf_negotiate_api_version - Negotiate supported API version 701 * @hw: pointer to the HW structure 702 * @api: integer containing requested API version 703 **/ 704 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api) 705 { 706 int err; 707 u32 msg[3]; 708 709 /* Negotiate the mailbox API version */ 710 msg[0] = IXGBE_VF_API_NEGOTIATE; 711 msg[1] = api; 712 msg[2] = 0; 713 714 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3); 715 if (!err) { 716 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 717 718 /* Store value and return 0 on success */ 719 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) { 720 hw->api_version = api; 721 return 0; 722 } 723 724 err = IXGBE_ERR_INVALID_ARGUMENT; 725 } 726 727 return err; 728 } 729 730 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, 731 unsigned int *default_tc) 732 { 733 int err; 734 u32 msg[5]; 735 736 /* do nothing if API doesn't support ixgbevf_get_queues */ 737 switch (hw->api_version) { 738 case ixgbe_mbox_api_11: 739 case ixgbe_mbox_api_12: 740 case ixgbe_mbox_api_13: 741 break; 742 default: 743 return 0; 744 } 745 746 /* Fetch queue configuration from the PF */ 747 msg[0] = IXGBE_VF_GET_QUEUES; 748 msg[1] = msg[2] = msg[3] = msg[4] = 0; 749 750 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5); 751 if (!err) { 752 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 753 754 /* 755 * if we we didn't get an ACK there must have been 756 * some sort of mailbox error so we should treat it 757 * as such 758 */ 759 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK)) 760 return IXGBE_ERR_MBX; 761 762 /* record and validate values from message */ 763 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES]; 764 if (hw->mac.max_tx_queues == 0 || 765 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES) 766 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES; 767 768 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES]; 769 if (hw->mac.max_rx_queues == 0 || 770 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES) 771 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES; 772 773 *num_tcs = msg[IXGBE_VF_TRANS_VLAN]; 774 /* in case of unknown state assume we cannot tag frames */ 775 if (*num_tcs > hw->mac.max_rx_queues) 776 *num_tcs = 1; 777 778 *default_tc = msg[IXGBE_VF_DEF_QUEUE]; 779 /* default to queue 0 on out-of-bounds queue number */ 780 if (*default_tc >= hw->mac.max_tx_queues) 781 *default_tc = 0; 782 } 783 784 return err; 785 } 786