xref: /illumos-gate/usr/src/uts/common/io/nxge/nxge_espc.c (revision 4e5b757f)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #pragma ident	"%Z%%M%	%I%	%E% SMI"
27 
28 #include <nxge_impl.h>
29 #include <nxge_mac.h>
30 #include <npi_espc.h>
31 #include <nxge_espc.h>
32 
33 static void
34 nxge_espc_get_next_mac_addr(uint8_t *, uint8_t, struct ether_addr *);
35 
36 static void
37 nxge_espc_get_next_mac_addr(uint8_t *st_mac, uint8_t nxt_cnt,
38 			    struct ether_addr *final_mac)
39 {
40 	uint64_t	mac[ETHERADDRL];
41 	uint64_t	mac_addr = 0;
42 	int		i, j;
43 
44 	for (i = ETHERADDRL - 1, j = 0; j < ETHERADDRL; i--, j++) {
45 		mac[j] = st_mac[i];
46 		mac_addr |= (mac[j] << (j*8));
47 	}
48 
49 	mac_addr += nxt_cnt;
50 
51 	final_mac->ether_addr_octet[0] = (mac_addr & 0xff0000000000) >> 40;
52 	final_mac->ether_addr_octet[1] = (mac_addr & 0xff00000000) >> 32;
53 	final_mac->ether_addr_octet[2] = (mac_addr & 0xff000000) >> 24;
54 	final_mac->ether_addr_octet[3] = (mac_addr & 0xff0000) >> 16;
55 	final_mac->ether_addr_octet[4] = (mac_addr & 0xff00) >> 8;
56 	final_mac->ether_addr_octet[5] = (mac_addr & 0xff);
57 }
58 
59 nxge_status_t
60 nxge_espc_mac_addrs_get(p_nxge_t nxgep)
61 {
62 	nxge_status_t	status = NXGE_OK;
63 	npi_status_t	npi_status = NPI_SUCCESS;
64 	uint8_t		port_num = nxgep->mac.portnum;
65 	npi_handle_t	handle = NXGE_DEV_NPI_HANDLE(nxgep);
66 	uint8_t		mac_addr[ETHERADDRL];
67 
68 	NXGE_DEBUG_MSG((nxgep, MAC_CTL,
69 			    "==> nxge_espc_mac_addr_get, port[%d]",
70 			    port_num));
71 
72 	npi_status = npi_espc_mac_addr_get(handle, mac_addr);
73 	if (npi_status != NPI_SUCCESS) {
74 		status = (NXGE_ERROR | npi_status);
75 		NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
76 				    "nxge_espc_mac_addr_get, port[%d] failed",
77 				    port_num));
78 		goto exit;
79 	}
80 
81 	nxge_espc_get_next_mac_addr(mac_addr, port_num, &nxgep->factaddr);
82 		NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL,
83 			"Got MAC Addr: %2x:%2x:%2x:%2x:%2x%:%2x%c \n",
84 			mac_addr[0], mac_addr[1],
85 			mac_addr[2], mac_addr[3],
86 			mac_addr[4], mac_addr[5]));
87 
88 exit:
89 	NXGE_DEBUG_MSG((nxgep, CFG_CTL, "<== nxge_espc_mac_addr_get, "
90 			"status [0x%x]", status));
91 
92 	return (status);
93 }
94 
95 nxge_status_t
96 nxge_espc_num_macs_get(p_nxge_t nxgep, uint8_t *nmacs)
97 {
98 	nxge_status_t   status = NXGE_OK;
99 	npi_status_t    npi_status = NPI_SUCCESS;
100 	npi_handle_t    handle = NXGE_DEV_NPI_HANDLE(nxgep);
101 	NXGE_DEBUG_MSG((nxgep, CFG_CTL, "==> nxge_espc_num_macs_get"));
102 
103 	npi_status = npi_espc_num_macs_get(handle, nmacs);
104 	if (npi_status != NPI_SUCCESS) {
105 		status = (NXGE_ERROR | npi_status);
106 	}
107 
108 	NXGE_DEBUG_MSG((nxgep, CFG_CTL, "<== nxge_espc_num_macs_get, "
109 		"status [0x%x]", status));
110 
111 	return (status);
112 }
113 
114 nxge_status_t
115 nxge_espc_num_ports_get(p_nxge_t nxgep)
116 {
117 	nxge_status_t	status = NXGE_OK;
118 	npi_status_t	npi_status = NPI_SUCCESS;
119 	npi_handle_t	handle = NXGE_DEV_NPI_HANDLE(nxgep);
120 	uint8_t		nports = 0;
121 	NXGE_DEBUG_MSG((nxgep, CFG_CTL, "==> nxge_espc_num_ports_get"));
122 
123 	npi_status = npi_espc_num_ports_get(handle, &nports);
124 	if (npi_status != NPI_SUCCESS) {
125 		status = (NXGE_ERROR | npi_status);
126 	}
127 	nxgep->nports = nports;
128 	NXGE_DEBUG_MSG((nxgep, CFG_CTL, " nxge_espc_num_ports_get "
129 			"ports [0x%x]", nports));
130 
131 	NXGE_DEBUG_MSG((nxgep, CFG_CTL, "<== nxge_espc_num_ports_get, "
132 			"status [0x%x]", status));
133 
134 	return (status);
135 }
136 
137 nxge_status_t
138 nxge_espc_phy_type_get(p_nxge_t nxgep)
139 {
140 	nxge_status_t	status = NXGE_OK;
141 	npi_status_t	npi_status = NPI_SUCCESS;
142 	npi_handle_t	handle = NXGE_DEV_NPI_HANDLE(nxgep);
143 	uint8_t		port_num = nxgep->mac.portnum;
144 	uint8_t		phy_type;
145 
146 	NXGE_DEBUG_MSG((nxgep, CFG_CTL, "==> nxge_espc_phy_type_get, port[%d]",
147 			port_num));
148 
149 	npi_status = npi_espc_port_phy_type_get(handle, &phy_type,
150 						port_num);
151 	if (npi_status != NPI_SUCCESS) {
152 		status = (NXGE_ERROR | npi_status);
153 		goto exit;
154 	}
155 
156 	switch (phy_type) {
157 	case ESC_PHY_10G_FIBER:
158 		nxgep->mac.portmode = PORT_10G_FIBER;
159 		nxgep->statsp->mac_stats.xcvr_inuse = XPCS_XCVR;
160 		cmn_err(CE_NOTE, "!SPROM Read phy type 10G Fiber \n");
161 		break;
162 	case ESC_PHY_10G_COPPER:
163 		nxgep->mac.portmode = PORT_10G_COPPER;
164 		nxgep->statsp->mac_stats.xcvr_inuse = XPCS_XCVR;
165 		cmn_err(CE_NOTE, "!SPROM Read phy type 10G Copper \n");
166 
167 		break;
168 	case ESC_PHY_1G_FIBER:
169 		nxgep->mac.portmode = PORT_1G_FIBER;
170 		nxgep->statsp->mac_stats.xcvr_inuse = PCS_XCVR;
171 		cmn_err(CE_NOTE, "!SPROM Read phy type 1G Fiber \n");
172 
173 		break;
174 	case ESC_PHY_1G_COPPER:
175 		nxgep->mac.portmode = PORT_1G_COPPER;
176 		nxgep->statsp->mac_stats.xcvr_inuse = INT_MII_XCVR;
177 		cmn_err(CE_NOTE, "!SPROM Read phy type 1G Copper \n");
178 
179 		break;
180 	case ESC_PHY_NONE:
181 		status = NXGE_ERROR;
182 		NXGE_DEBUG_MSG((nxgep, CFG_CTL, "nxge_espc_phy_type_get:"
183 				"No phy type set"));
184 		break;
185 	default:
186 		status = NXGE_ERROR;
187 		NXGE_ERROR_MSG((nxgep, NXGE_ERR_CTL, "nxge_espc_phy_type_get: "
188 				"Unknown phy type [%d]", phy_type));
189 		break;
190 	}
191 
192 exit:
193 
194 	NXGE_DEBUG_MSG((nxgep, CFG_CTL, "<== nxge_espc_phy_type_get, "
195 			"status [0x%x]", status));
196 
197 	return (status);
198 }
199 
200 nxge_status_t
201 nxge_espc_max_frame_sz_get(p_nxge_t nxgep)
202 {
203 	nxge_status_t	status = NXGE_OK;
204 	npi_status_t	npi_status = NPI_SUCCESS;
205 	npi_handle_t	handle = NXGE_DEV_NPI_HANDLE(nxgep);
206 
207 	NXGE_DEBUG_MSG((nxgep, CFG_CTL, "==> nxge_espc_max_frame_sz_get"));
208 
209 	npi_status = npi_espc_max_frame_get(handle, &nxgep->mac.maxframesize);
210 	if (npi_status != NPI_SUCCESS) {
211 		status = (NXGE_ERROR | npi_status);
212 	}
213 
214 	NXGE_DEBUG_MSG((nxgep, CFG_CTL, " nxge_espc_max_frame_sz_get, "
215 			    "status [0x%x]", status));
216 
217 	return (status);
218 }
219