1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. 24 */ 25 26 /* 27 * AHCI (Advanced Host Controller Interface) SATA HBA Driver 28 * 29 * Power Management Support 30 * ------------------------ 31 * 32 * At the moment, the ahci driver only implements suspend/resume to 33 * support Suspend to RAM on X86 feature. Device power management isn't 34 * implemented, link power management is disabled, and hot plug isn't 35 * allowed during the period from suspend to resume. 36 * 37 * For s/r support, the ahci driver only need to implement DDI_SUSPEND 38 * and DDI_RESUME entries, and don't need to take care of new requests 39 * sent down after suspend because the target driver (sd) has already 40 * handled these conditions, and blocked these requests. For the detailed 41 * information, please check with sdopen, sdclose and sdioctl routines. 42 * 43 */ 44 45 #include <sys/note.h> 46 #include <sys/scsi/scsi.h> 47 #include <sys/pci.h> 48 #include <sys/disp.h> 49 #include <sys/sata/sata_hba.h> 50 #include <sys/sata/adapters/ahci/ahcireg.h> 51 #include <sys/sata/adapters/ahci/ahcivar.h> 52 53 /* 54 * FMA header files 55 */ 56 #include <sys/ddifm.h> 57 #include <sys/fm/protocol.h> 58 #include <sys/fm/util.h> 59 #include <sys/fm/io/ddi.h> 60 61 /* 62 * This is the string displayed by modinfo, etc. 63 * Make sure you keep the version ID up to date! 64 */ 65 static char ahci_ident[] = "ahci driver"; 66 67 /* 68 * Function prototypes for driver entry points 69 */ 70 static int ahci_attach(dev_info_t *, ddi_attach_cmd_t); 71 static int ahci_detach(dev_info_t *, ddi_detach_cmd_t); 72 static int ahci_getinfo(dev_info_t *, ddi_info_cmd_t, void *, void **); 73 static int ahci_quiesce(dev_info_t *); 74 75 /* 76 * Function prototypes for SATA Framework interfaces 77 */ 78 static int ahci_register_sata_hba_tran(ahci_ctl_t *, uint32_t); 79 static int ahci_unregister_sata_hba_tran(ahci_ctl_t *); 80 81 static int ahci_tran_probe_port(dev_info_t *, sata_device_t *); 82 static int ahci_tran_start(dev_info_t *, sata_pkt_t *spkt); 83 static int ahci_tran_abort(dev_info_t *, sata_pkt_t *, int); 84 static int ahci_tran_reset_dport(dev_info_t *, sata_device_t *); 85 static int ahci_tran_hotplug_port_activate(dev_info_t *, sata_device_t *); 86 static int ahci_tran_hotplug_port_deactivate(dev_info_t *, sata_device_t *); 87 #if defined(__lock_lint) 88 static int ahci_selftest(dev_info_t *, sata_device_t *); 89 #endif 90 91 /* 92 * FMA Prototypes 93 */ 94 static void ahci_fm_init(ahci_ctl_t *); 95 static void ahci_fm_fini(ahci_ctl_t *); 96 static int ahci_fm_error_cb(dev_info_t *, ddi_fm_error_t *, const void*); 97 int ahci_check_acc_handle(ddi_acc_handle_t); 98 int ahci_check_dma_handle(ddi_dma_handle_t); 99 void ahci_fm_ereport(ahci_ctl_t *, char *); 100 static int ahci_check_all_handle(ahci_ctl_t *); 101 static int ahci_check_ctl_handle(ahci_ctl_t *); 102 static int ahci_check_port_handle(ahci_ctl_t *, int); 103 static int ahci_check_slot_handle(ahci_port_t *, int); 104 105 /* 106 * Local function prototypes 107 */ 108 static int ahci_alloc_ports_state(ahci_ctl_t *); 109 static void ahci_dealloc_ports_state(ahci_ctl_t *); 110 static int ahci_alloc_port_state(ahci_ctl_t *, uint8_t); 111 static void ahci_dealloc_port_state(ahci_ctl_t *, uint8_t); 112 static int ahci_alloc_rcvd_fis(ahci_ctl_t *, ahci_port_t *, uint8_t); 113 static void ahci_dealloc_rcvd_fis(ahci_port_t *); 114 static int ahci_alloc_cmd_list(ahci_ctl_t *, ahci_port_t *, uint8_t); 115 static void ahci_dealloc_cmd_list(ahci_ctl_t *, ahci_port_t *); 116 static int ahci_alloc_cmd_tables(ahci_ctl_t *, ahci_port_t *); 117 static void ahci_dealloc_cmd_tables(ahci_ctl_t *, ahci_port_t *); 118 static void ahci_alloc_pmult(ahci_ctl_t *, ahci_port_t *); 119 static void ahci_dealloc_pmult(ahci_ctl_t *, ahci_port_t *); 120 121 static int ahci_initialize_controller(ahci_ctl_t *); 122 static void ahci_uninitialize_controller(ahci_ctl_t *); 123 static int ahci_initialize_port(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 124 static int ahci_config_space_init(ahci_ctl_t *); 125 126 static void ahci_drain_ports_taskq(ahci_ctl_t *); 127 static int ahci_rdwr_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t *, 128 uint8_t); 129 static int ahci_read_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t *); 130 static int ahci_write_pmult(ahci_ctl_t *, ahci_addr_t *, uint8_t, uint32_t); 131 static int ahci_update_pmult_pscr(ahci_ctl_t *, ahci_addr_t *, 132 sata_device_t *); 133 static int ahci_update_pmult_gscr(ahci_ctl_t *, ahci_addr_t *, 134 sata_pmult_gscr_t *); 135 static int ahci_initialize_pmult(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *, 136 sata_device_t *); 137 static int ahci_initialize_pmport(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 138 static int ahci_probe_pmult(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 139 static int ahci_probe_pmport(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *, 140 sata_device_t *); 141 142 static void ahci_disable_interface_pm(ahci_ctl_t *, uint8_t); 143 static int ahci_start_port(ahci_ctl_t *, ahci_port_t *, uint8_t); 144 static void ahci_find_dev_signature(ahci_ctl_t *, ahci_port_t *, 145 ahci_addr_t *); 146 static void ahci_update_sata_registers(ahci_ctl_t *, uint8_t, sata_device_t *); 147 static int ahci_deliver_satapkt(ahci_ctl_t *, ahci_port_t *, 148 ahci_addr_t *, sata_pkt_t *); 149 static int ahci_do_sync_start(ahci_ctl_t *, ahci_port_t *, 150 ahci_addr_t *, sata_pkt_t *); 151 static int ahci_claim_free_slot(ahci_ctl_t *, ahci_port_t *, 152 ahci_addr_t *, int); 153 static void ahci_copy_err_cnxt(sata_cmd_t *, ahci_fis_d2h_register_t *); 154 static void ahci_copy_ncq_err_page(sata_cmd_t *, 155 struct sata_ncq_error_recovery_page *); 156 static void ahci_copy_out_regs(sata_cmd_t *, ahci_fis_d2h_register_t *); 157 static void ahci_add_doneq(ahci_port_t *, sata_pkt_t *, int); 158 static void ahci_flush_doneq(ahci_port_t *); 159 160 static int ahci_software_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 161 static int ahci_hba_reset(ahci_ctl_t *); 162 static int ahci_port_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 163 static int ahci_pmport_reset(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 164 static void ahci_reject_all_abort_pkts(ahci_ctl_t *, ahci_port_t *, uint8_t); 165 static int ahci_reset_device_reject_pkts(ahci_ctl_t *, ahci_port_t *, 166 ahci_addr_t *); 167 static int ahci_reset_pmdevice_reject_pkts(ahci_ctl_t *, ahci_port_t *, 168 ahci_addr_t *); 169 static int ahci_reset_port_reject_pkts(ahci_ctl_t *, ahci_port_t *, 170 ahci_addr_t *); 171 static int ahci_reset_hba_reject_pkts(ahci_ctl_t *); 172 static int ahci_put_port_into_notrunning_state(ahci_ctl_t *, ahci_port_t *, 173 uint8_t); 174 static int ahci_restart_port_wait_till_ready(ahci_ctl_t *, ahci_port_t *, 175 uint8_t, int, int *); 176 static void ahci_mop_commands(ahci_ctl_t *, ahci_port_t *, uint32_t, 177 uint32_t, uint32_t, uint32_t, uint32_t); 178 static uint32_t ahci_get_rdlogext_data(ahci_ctl_t *, ahci_port_t *, uint8_t); 179 static void ahci_get_rqsense_data(ahci_ctl_t *, ahci_port_t *, 180 uint8_t, sata_pkt_t *); 181 static void ahci_fatal_error_recovery_handler(ahci_ctl_t *, ahci_port_t *, 182 ahci_addr_t *, uint32_t); 183 static void ahci_pmult_error_recovery_handler(ahci_ctl_t *, ahci_port_t *, 184 uint8_t, uint32_t); 185 static void ahci_timeout_pkts(ahci_ctl_t *, ahci_port_t *, 186 uint8_t, uint32_t); 187 static void ahci_events_handler(void *); 188 static void ahci_watchdog_handler(ahci_ctl_t *); 189 190 static uint_t ahci_intr(caddr_t, caddr_t); 191 static void ahci_port_intr(ahci_ctl_t *, ahci_port_t *, uint8_t); 192 static int ahci_add_intrs(ahci_ctl_t *, int); 193 static void ahci_rem_intrs(ahci_ctl_t *); 194 static void ahci_enable_all_intrs(ahci_ctl_t *); 195 static void ahci_disable_all_intrs(ahci_ctl_t *); 196 static void ahci_enable_port_intrs(ahci_ctl_t *, uint8_t); 197 static void ahci_disable_port_intrs(ahci_ctl_t *, uint8_t); 198 199 static int ahci_intr_cmd_cmplt(ahci_ctl_t *, ahci_port_t *, uint8_t); 200 static int ahci_intr_set_device_bits(ahci_ctl_t *, ahci_port_t *, uint8_t); 201 static int ahci_intr_ncq_events(ahci_ctl_t *, ahci_port_t *, ahci_addr_t *); 202 static int ahci_intr_pmult_sntf_events(ahci_ctl_t *, ahci_port_t *, uint8_t); 203 static int ahci_intr_port_connect_change(ahci_ctl_t *, ahci_port_t *, uint8_t); 204 static int ahci_intr_device_mechanical_presence_status(ahci_ctl_t *, 205 ahci_port_t *, uint8_t); 206 static int ahci_intr_phyrdy_change(ahci_ctl_t *, ahci_port_t *, uint8_t); 207 static int ahci_intr_non_fatal_error(ahci_ctl_t *, ahci_port_t *, 208 uint8_t, uint32_t); 209 static int ahci_intr_fatal_error(ahci_ctl_t *, ahci_port_t *, 210 uint8_t, uint32_t); 211 static int ahci_intr_cold_port_detect(ahci_ctl_t *, ahci_port_t *, uint8_t); 212 213 static void ahci_get_ahci_addr(ahci_ctl_t *, sata_device_t *, ahci_addr_t *); 214 static int ahci_get_num_implemented_ports(uint32_t); 215 static void ahci_log_fatal_error_message(ahci_ctl_t *, uint8_t port, 216 uint32_t); 217 static void ahci_log_serror_message(ahci_ctl_t *, uint8_t, uint32_t, int); 218 #if AHCI_DEBUG 219 static void ahci_log(ahci_ctl_t *, uint_t, char *, ...); 220 #endif 221 222 223 /* 224 * DMA attributes for the data buffer 225 * 226 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 227 * does not support 64-bit addressing 228 */ 229 static ddi_dma_attr_t buffer_dma_attr = { 230 DMA_ATTR_V0, /* dma_attr_version */ 231 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 232 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 233 0x3fffffull, /* dma_attr_count_max i.e. for one cookie */ 234 0x2ull, /* dma_attr_align: word aligned */ 235 1, /* dma_attr_burstsizes */ 236 1, /* dma_attr_minxfer */ 237 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 238 0xffffffffull, /* dma_attr_seg */ 239 AHCI_PRDT_NUMBER, /* dma_attr_sgllen */ 240 512, /* dma_attr_granular */ 241 0, /* dma_attr_flags */ 242 }; 243 244 /* 245 * DMA attributes for the rcvd FIS 246 * 247 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 248 * does not support 64-bit addressing 249 */ 250 static ddi_dma_attr_t rcvd_fis_dma_attr = { 251 DMA_ATTR_V0, /* dma_attr_version */ 252 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 253 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 254 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 255 0x100ull, /* dma_attr_align: 256-byte aligned */ 256 1, /* dma_attr_burstsizes */ 257 1, /* dma_attr_minxfer */ 258 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 259 0xffffffffull, /* dma_attr_seg */ 260 1, /* dma_attr_sgllen */ 261 1, /* dma_attr_granular */ 262 0, /* dma_attr_flags */ 263 }; 264 265 /* 266 * DMA attributes for the command list 267 * 268 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 269 * does not support 64-bit addressing 270 */ 271 static ddi_dma_attr_t cmd_list_dma_attr = { 272 DMA_ATTR_V0, /* dma_attr_version */ 273 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 274 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 275 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 276 0x400ull, /* dma_attr_align: 1K-byte aligned */ 277 1, /* dma_attr_burstsizes */ 278 1, /* dma_attr_minxfer */ 279 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 280 0xffffffffull, /* dma_attr_seg */ 281 1, /* dma_attr_sgllen */ 282 1, /* dma_attr_granular */ 283 0, /* dma_attr_flags */ 284 }; 285 286 /* 287 * DMA attributes for cmd tables 288 * 289 * dma_attr_addr_hi will be changed to 0xffffffffull if the HBA 290 * does not support 64-bit addressing 291 */ 292 static ddi_dma_attr_t cmd_table_dma_attr = { 293 DMA_ATTR_V0, /* dma_attr_version */ 294 0x0ull, /* dma_attr_addr_lo: lowest bus address */ 295 0xffffffffffffffffull, /* dma_attr_addr_hi: highest bus address */ 296 0xffffffffull, /* dma_attr_count_max i.e. for one cookie */ 297 0x80ull, /* dma_attr_align: 128-byte aligned */ 298 1, /* dma_attr_burstsizes */ 299 1, /* dma_attr_minxfer */ 300 0xffffffffull, /* dma_attr_maxxfer i.e. includes all cookies */ 301 0xffffffffull, /* dma_attr_seg */ 302 1, /* dma_attr_sgllen */ 303 1, /* dma_attr_granular */ 304 0, /* dma_attr_flags */ 305 }; 306 307 308 /* Device access attributes */ 309 static ddi_device_acc_attr_t accattr = { 310 DDI_DEVICE_ATTR_V1, 311 DDI_STRUCTURE_LE_ACC, 312 DDI_STRICTORDER_ACC, 313 DDI_DEFAULT_ACC 314 }; 315 316 317 static struct dev_ops ahcictl_dev_ops = { 318 DEVO_REV, /* devo_rev */ 319 0, /* refcnt */ 320 ahci_getinfo, /* info */ 321 nulldev, /* identify */ 322 nulldev, /* probe */ 323 ahci_attach, /* attach */ 324 ahci_detach, /* detach */ 325 nodev, /* no reset */ 326 (struct cb_ops *)0, /* driver operations */ 327 NULL, /* bus operations */ 328 NULL, /* power */ 329 ahci_quiesce, /* quiesce */ 330 }; 331 332 static sata_tran_hotplug_ops_t ahci_tran_hotplug_ops = { 333 SATA_TRAN_HOTPLUG_OPS_REV_1, 334 ahci_tran_hotplug_port_activate, 335 ahci_tran_hotplug_port_deactivate 336 }; 337 338 extern struct mod_ops mod_driverops; 339 340 static struct modldrv modldrv = { 341 &mod_driverops, /* driverops */ 342 ahci_ident, /* short description */ 343 &ahcictl_dev_ops, /* driver ops */ 344 }; 345 346 static struct modlinkage modlinkage = { 347 MODREV_1, 348 &modldrv, 349 NULL 350 }; 351 352 /* The following variables are watchdog handler related */ 353 static clock_t ahci_watchdog_timeout = 5; /* 5 seconds */ 354 static clock_t ahci_watchdog_tick; 355 356 /* 357 * This static variable indicates the size of command table, 358 * and it's changeable with prdt number, which ahci_dma_prdt_number 359 * indicates. 360 */ 361 static size_t ahci_cmd_table_size; 362 363 /* 364 * The below global variables are tunable via /etc/system 365 * 366 * ahci_dma_prdt_number 367 * ahci_msi_enabled 368 * ahci_buf_64bit_dma 369 * ahci_commu_64bit_dma 370 */ 371 372 /* The number of Physical Region Descriptor Table(PRDT) in Command Table */ 373 int ahci_dma_prdt_number = AHCI_PRDT_NUMBER; 374 375 /* AHCI MSI is tunable */ 376 boolean_t ahci_msi_enabled = B_TRUE; 377 378 /* 379 * 64-bit dma addressing for data buffer is tunable 380 * 381 * The variable controls only the below value: 382 * DBAU (upper 32-bits physical address of data block) 383 */ 384 boolean_t ahci_buf_64bit_dma = B_TRUE; 385 386 /* 387 * 64-bit dma addressing for communication system descriptors is tunable 388 * 389 * The variable controls the below three values: 390 * 391 * PxCLBU (upper 32-bits for the command list base physical address) 392 * PxFBU (upper 32-bits for the received FIS base physical address) 393 * CTBAU (upper 32-bits of command table base) 394 */ 395 boolean_t ahci_commu_64bit_dma = B_TRUE; 396 397 /* 398 * By default, 64-bit dma for data buffer will be disabled for AMD/ATI SB600 399 * chipset. If the users want to have a try with 64-bit dma, please change 400 * the below variable value to enable it. 401 */ 402 boolean_t sb600_buf_64bit_dma_disable = B_TRUE; 403 404 /* 405 * By default, 64-bit dma for command buffer will be disabled for AMD/ATI 406 * SB600/700/710/750/800. If the users want to have a try with 64-bit dma, 407 * please change the below value to enable it. 408 */ 409 boolean_t sbxxx_commu_64bit_dma_disable = B_TRUE; 410 411 412 /* 413 * End of global tunable variable definition 414 */ 415 416 #if AHCI_DEBUG 417 uint32_t ahci_debug_flags = 0; 418 #else 419 uint32_t ahci_debug_flags = (AHCIDBG_ERRS|AHCIDBG_TIMEOUT); 420 #endif 421 422 423 #if AHCI_DEBUG 424 /* The following is needed for ahci_log() */ 425 static kmutex_t ahci_log_mutex; 426 static char ahci_log_buf[512]; 427 #endif 428 429 /* Opaque state pointer initialized by ddi_soft_state_init() */ 430 static void *ahci_statep = NULL; 431 432 /* 433 * ahci module initialization. 434 */ 435 int 436 _init(void) 437 { 438 int ret; 439 440 ret = ddi_soft_state_init(&ahci_statep, sizeof (ahci_ctl_t), 0); 441 if (ret != 0) { 442 goto err_out; 443 } 444 445 #if AHCI_DEBUG 446 mutex_init(&ahci_log_mutex, NULL, MUTEX_DRIVER, NULL); 447 #endif 448 449 if ((ret = sata_hba_init(&modlinkage)) != 0) { 450 #if AHCI_DEBUG 451 mutex_destroy(&ahci_log_mutex); 452 #endif 453 ddi_soft_state_fini(&ahci_statep); 454 goto err_out; 455 } 456 457 ret = mod_install(&modlinkage); 458 if (ret != 0) { 459 sata_hba_fini(&modlinkage); 460 #if AHCI_DEBUG 461 mutex_destroy(&ahci_log_mutex); 462 #endif 463 ddi_soft_state_fini(&ahci_statep); 464 goto err_out; 465 } 466 467 /* watchdog tick */ 468 ahci_watchdog_tick = drv_usectohz( 469 (clock_t)ahci_watchdog_timeout * 1000000); 470 return (ret); 471 472 err_out: 473 cmn_err(CE_WARN, "!ahci: Module init failed"); 474 return (ret); 475 } 476 477 /* 478 * ahci module uninitialize. 479 */ 480 int 481 _fini(void) 482 { 483 int ret; 484 485 ret = mod_remove(&modlinkage); 486 if (ret != 0) { 487 return (ret); 488 } 489 490 /* Remove the resources allocated in _init(). */ 491 sata_hba_fini(&modlinkage); 492 #if AHCI_DEBUG 493 mutex_destroy(&ahci_log_mutex); 494 #endif 495 ddi_soft_state_fini(&ahci_statep); 496 497 return (ret); 498 } 499 500 /* 501 * _info entry point 502 */ 503 int 504 _info(struct modinfo *modinfop) 505 { 506 return (mod_info(&modlinkage, modinfop)); 507 } 508 509 /* 510 * The attach entry point for dev_ops. 511 */ 512 static int 513 ahci_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 514 { 515 ahci_ctl_t *ahci_ctlp = NULL; 516 int instance = ddi_get_instance(dip); 517 int status; 518 int attach_state; 519 uint32_t cap_status, ahci_version; 520 int intr_types; 521 int i; 522 pci_regspec_t *regs; 523 int regs_length; 524 int rnumber; 525 #if AHCI_DEBUG 526 int speed; 527 #endif 528 529 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, "ahci_attach enter", 530 NULL); 531 532 switch (cmd) { 533 case DDI_ATTACH: 534 break; 535 536 case DDI_RESUME: 537 538 /* 539 * During DDI_RESUME, the hardware state of the device 540 * (power may have been removed from the device) must be 541 * restored, allow pending requests to continue, and 542 * service new requests. 543 */ 544 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 545 mutex_enter(&ahci_ctlp->ahcictl_mutex); 546 547 /* Restart watch thread */ 548 if (ahci_ctlp->ahcictl_timeout_id == 0) 549 ahci_ctlp->ahcictl_timeout_id = timeout( 550 (void (*)(void *))ahci_watchdog_handler, 551 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 552 553 mutex_exit(&ahci_ctlp->ahcictl_mutex); 554 555 /* 556 * Re-initialize the controller and enable the interrupts and 557 * restart all the ports. 558 * 559 * Note that so far we don't support hot-plug during 560 * suspend/resume. 561 */ 562 if (ahci_initialize_controller(ahci_ctlp) != AHCI_SUCCESS) { 563 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PM, ahci_ctlp, 564 "Failed to initialize the controller " 565 "during DDI_RESUME", NULL); 566 return (DDI_FAILURE); 567 } 568 569 mutex_enter(&ahci_ctlp->ahcictl_mutex); 570 ahci_ctlp->ahcictl_flags &= ~ AHCI_SUSPEND; 571 mutex_exit(&ahci_ctlp->ahcictl_mutex); 572 573 return (DDI_SUCCESS); 574 575 default: 576 return (DDI_FAILURE); 577 } 578 579 attach_state = AHCI_ATTACH_STATE_NONE; 580 581 /* Allocate soft state */ 582 status = ddi_soft_state_zalloc(ahci_statep, instance); 583 if (status != DDI_SUCCESS) { 584 cmn_err(CE_WARN, "!ahci%d: Cannot allocate soft state", 585 instance); 586 goto err_out; 587 } 588 589 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 590 ahci_ctlp->ahcictl_flags |= AHCI_ATTACH; 591 ahci_ctlp->ahcictl_dip = dip; 592 593 /* Initialize the cport/port mapping */ 594 for (i = 0; i < AHCI_MAX_PORTS; i++) { 595 ahci_ctlp->ahcictl_port_to_cport[i] = 0xff; 596 ahci_ctlp->ahcictl_cport_to_port[i] = 0xff; 597 } 598 599 attach_state |= AHCI_ATTACH_STATE_STATEP_ALLOC; 600 601 /* Initialize FMA properties */ 602 ahci_fm_init(ahci_ctlp); 603 604 attach_state |= AHCI_ATTACH_STATE_FMA; 605 606 /* 607 * Now map the AHCI base address; which includes global 608 * registers and port control registers 609 * 610 * According to the spec, the AHCI Base Address is BAR5, 611 * but BAR0-BAR4 are optional, so we need to check which 612 * rnumber is used for BAR5. 613 */ 614 615 /* 616 * search through DDI "reg" property for the AHCI register set 617 */ 618 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, dip, 619 DDI_PROP_DONTPASS, "reg", (int **)®s, 620 (uint_t *)®s_length) != DDI_PROP_SUCCESS) { 621 cmn_err(CE_WARN, "!ahci%d: Cannot lookup reg property", 622 instance); 623 goto err_out; 624 } 625 626 /* AHCI Base Address is located at 0x24 offset */ 627 for (rnumber = 0; rnumber < regs_length; ++rnumber) { 628 if ((regs[rnumber].pci_phys_hi & PCI_REG_REG_M) 629 == AHCI_PCI_RNUM) 630 break; 631 } 632 633 ddi_prop_free(regs); 634 635 if (rnumber == regs_length) { 636 cmn_err(CE_WARN, "!ahci%d: Cannot find AHCI register set", 637 instance); 638 goto err_out; 639 } 640 641 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "rnumber = %d", rnumber); 642 643 status = ddi_regs_map_setup(dip, 644 rnumber, 645 (caddr_t *)&ahci_ctlp->ahcictl_ahci_addr, 646 0, 647 0, 648 &accattr, 649 &ahci_ctlp->ahcictl_ahci_acc_handle); 650 if (status != DDI_SUCCESS) { 651 cmn_err(CE_WARN, "!ahci%d: Cannot map register space", 652 instance); 653 goto err_out; 654 } 655 656 attach_state |= AHCI_ATTACH_STATE_REG_MAP; 657 658 /* Get the AHCI version information */ 659 ahci_version = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 660 (uint32_t *)AHCI_GLOBAL_VS(ahci_ctlp)); 661 662 cmn_err(CE_NOTE, "!ahci%d: hba AHCI version = %x.%x", instance, 663 (ahci_version & 0xffff0000) >> 16, 664 ((ahci_version & 0x0000ff00) >> 4 | 665 (ahci_version & 0x000000ff))); 666 667 /* We don't support controllers whose versions are lower than 1.0 */ 668 if (!(ahci_version & 0xffff0000)) { 669 cmn_err(CE_WARN, "ahci%d: Don't support AHCI HBA with lower " 670 "than version 1.0", instance); 671 goto err_out; 672 } 673 674 /* Get the HBA capabilities information */ 675 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 676 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 677 678 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba capabilities = 0x%x", 679 cap_status); 680 681 #if AHCI_DEBUG 682 /* Get the interface speed supported by the HBA */ 683 speed = (cap_status & AHCI_HBA_CAP_ISS) >> AHCI_HBA_CAP_ISS_SHIFT; 684 if (speed == 0x01) { 685 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 686 "hba interface speed support: Gen 1 (1.5Gbps)", NULL); 687 } else if (speed == 0x10) { 688 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 689 "hba interface speed support: Gen 2 (3 Gbps)", NULL); 690 } else if (speed == 0x11) { 691 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 692 "hba interface speed support: Gen 3 (6 Gbps)", NULL); 693 } 694 #endif 695 696 /* Get the number of command slots supported by the HBA */ 697 ahci_ctlp->ahcictl_num_cmd_slots = 698 ((cap_status & AHCI_HBA_CAP_NCS) >> 699 AHCI_HBA_CAP_NCS_SHIFT) + 1; 700 701 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba number of cmd slots: %d", 702 ahci_ctlp->ahcictl_num_cmd_slots); 703 704 /* Get the bit map which indicates ports implemented by the HBA */ 705 ahci_ctlp->ahcictl_ports_implemented = 706 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 707 (uint32_t *)AHCI_GLOBAL_PI(ahci_ctlp)); 708 709 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba implementation of ports: 0x%x", 710 ahci_ctlp->ahcictl_ports_implemented); 711 712 /* 713 * According to the AHCI spec, CAP.NP should indicate the maximum 714 * number of ports supported by the HBA silicon, but we found 715 * this value of ICH8 chipset only indicates the number of ports 716 * implemented (exposed) by it. Therefore, the driver should calculate 717 * the potential maximum value by checking PI register, and use 718 * the maximum of this value and CAP.NP. 719 */ 720 ahci_ctlp->ahcictl_num_ports = max( 721 (cap_status & AHCI_HBA_CAP_NP) + 1, 722 ddi_fls(ahci_ctlp->ahcictl_ports_implemented)); 723 724 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "hba number of ports: %d", 725 ahci_ctlp->ahcictl_num_ports); 726 727 /* Get the number of implemented ports by the HBA */ 728 ahci_ctlp->ahcictl_num_implemented_ports = 729 ahci_get_num_implemented_ports( 730 ahci_ctlp->ahcictl_ports_implemented); 731 732 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 733 "hba number of implemented ports: %d", 734 ahci_ctlp->ahcictl_num_implemented_ports); 735 736 /* Check whether HBA supports 64bit DMA addressing */ 737 if (!(cap_status & AHCI_HBA_CAP_S64A)) { 738 ahci_ctlp->ahcictl_cap |= AHCI_CAP_BUF_32BIT_DMA; 739 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 740 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 741 "hba does not support 64-bit addressing", NULL); 742 } 743 744 /* Checking for the support of Port Multiplier */ 745 if (cap_status & AHCI_HBA_CAP_SPM) { 746 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PMULT_CBSS; 747 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 748 "hba supports port multiplier (CBSS)", NULL); 749 750 /* Support FIS-based switching ? */ 751 if (cap_status & AHCI_HBA_CAP_FBSS) { 752 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PMULT_FBSS; 753 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 754 "hba supports FIS-based switching (FBSS)", NULL); 755 } 756 } 757 758 /* Checking for Support Command List Override */ 759 if (cap_status & AHCI_HBA_CAP_SCLO) { 760 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SCLO; 761 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 762 "hba supports command list override.", NULL); 763 } 764 765 /* Checking for Asynchronous Notification */ 766 if (cap_status & AHCI_HBA_CAP_SSNTF) { 767 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SNTF; 768 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 769 "hba supports asynchronous notification.", NULL); 770 } 771 772 if (pci_config_setup(dip, &ahci_ctlp->ahcictl_pci_conf_handle) 773 != DDI_SUCCESS) { 774 cmn_err(CE_WARN, "!ahci%d: Cannot set up pci configure space", 775 instance); 776 goto err_out; 777 } 778 779 attach_state |= AHCI_ATTACH_STATE_PCICFG_SETUP; 780 781 /* 782 * Check the pci configuration space, and set caps. We also 783 * handle the hardware defect in this function. 784 * 785 * For example, force ATI SB600 to use 32-bit dma addressing 786 * since it doesn't support 64-bit dma though its CAP register 787 * declares it support. 788 */ 789 if (ahci_config_space_init(ahci_ctlp) == AHCI_FAILURE) { 790 cmn_err(CE_WARN, "!ahci%d: ahci_config_space_init failed", 791 instance); 792 goto err_out; 793 } 794 795 /* 796 * Disable the whole controller interrupts before adding 797 * interrupt handlers(s). 798 */ 799 ahci_disable_all_intrs(ahci_ctlp); 800 801 /* Get supported interrupt types */ 802 if (ddi_intr_get_supported_types(dip, &intr_types) != DDI_SUCCESS) { 803 cmn_err(CE_WARN, "!ahci%d: ddi_intr_get_supported_types failed", 804 instance); 805 goto err_out; 806 } 807 808 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 809 "ddi_intr_get_supported_types() returned: 0x%x", 810 intr_types); 811 812 if (ahci_msi_enabled && (intr_types & DDI_INTR_TYPE_MSI)) { 813 /* 814 * Try MSI first, but fall back to FIXED if failed 815 */ 816 if (ahci_add_intrs(ahci_ctlp, DDI_INTR_TYPE_MSI) == 817 DDI_SUCCESS) { 818 ahci_ctlp->ahcictl_intr_type = DDI_INTR_TYPE_MSI; 819 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 820 "Using MSI interrupt type", NULL); 821 goto intr_done; 822 } 823 824 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 825 "MSI registration failed, " 826 "trying FIXED interrupts", NULL); 827 } 828 829 if (intr_types & DDI_INTR_TYPE_FIXED) { 830 if (ahci_add_intrs(ahci_ctlp, DDI_INTR_TYPE_FIXED) == 831 DDI_SUCCESS) { 832 ahci_ctlp->ahcictl_intr_type = DDI_INTR_TYPE_FIXED; 833 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 834 "Using FIXED interrupt type", NULL); 835 goto intr_done; 836 } 837 838 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 839 "FIXED interrupt registration failed", NULL); 840 } 841 842 cmn_err(CE_WARN, "!ahci%d: Interrupt registration failed", instance); 843 844 goto err_out; 845 846 intr_done: 847 848 attach_state |= AHCI_ATTACH_STATE_INTR_ADDED; 849 850 /* Initialize the controller mutex */ 851 mutex_init(&ahci_ctlp->ahcictl_mutex, NULL, MUTEX_DRIVER, 852 (void *)(uintptr_t)ahci_ctlp->ahcictl_intr_pri); 853 854 attach_state |= AHCI_ATTACH_STATE_MUTEX_INIT; 855 856 if (ahci_dma_prdt_number < AHCI_MIN_PRDT_NUMBER) { 857 ahci_dma_prdt_number = AHCI_MIN_PRDT_NUMBER; 858 } else if (ahci_dma_prdt_number > AHCI_MAX_PRDT_NUMBER) { 859 ahci_dma_prdt_number = AHCI_MAX_PRDT_NUMBER; 860 } 861 862 ahci_cmd_table_size = (sizeof (ahci_cmd_table_t) + 863 (ahci_dma_prdt_number - AHCI_PRDT_NUMBER) * 864 sizeof (ahci_prdt_item_t)); 865 866 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 867 "ahci_attach: ahci_dma_prdt_number set by user is 0x%x," 868 " ahci_cmd_table_size is 0x%x", 869 ahci_dma_prdt_number, ahci_cmd_table_size); 870 871 if (ahci_dma_prdt_number != AHCI_PRDT_NUMBER) 872 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_sgllen = 873 ahci_dma_prdt_number; 874 875 ahci_ctlp->ahcictl_buffer_dma_attr = buffer_dma_attr; 876 ahci_ctlp->ahcictl_rcvd_fis_dma_attr = rcvd_fis_dma_attr; 877 ahci_ctlp->ahcictl_cmd_list_dma_attr = cmd_list_dma_attr; 878 ahci_ctlp->ahcictl_cmd_table_dma_attr = cmd_table_dma_attr; 879 880 /* 881 * enable 64bit dma for data buffer for SB600 if 882 * sb600_buf_64bit_dma_disable is B_FALSE 883 */ 884 if ((ahci_buf_64bit_dma == B_FALSE) || 885 ((ahci_ctlp->ahcictl_cap & AHCI_CAP_BUF_32BIT_DMA) && 886 !(sb600_buf_64bit_dma_disable == B_FALSE && 887 ahci_ctlp->ahcictl_venid == 0x1002 && 888 ahci_ctlp->ahcictl_devid == 0x4380))) { 889 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_addr_hi = 890 0xffffffffull; 891 } 892 893 /* 894 * enable 64bit dma for command buffer for SB600/700/710/800 895 * if sbxxx_commu_64bit_dma_disable is B_FALSE 896 */ 897 if ((ahci_commu_64bit_dma == B_FALSE) || 898 ((ahci_ctlp->ahcictl_cap & AHCI_CAP_COMMU_32BIT_DMA) && 899 !(sbxxx_commu_64bit_dma_disable == B_FALSE && 900 ahci_ctlp->ahcictl_venid == 0x1002 && 901 (ahci_ctlp->ahcictl_devid == 0x4380 || 902 ahci_ctlp->ahcictl_devid == 0x4391)))) { 903 ahci_ctlp->ahcictl_rcvd_fis_dma_attr.dma_attr_addr_hi = 904 0xffffffffull; 905 ahci_ctlp->ahcictl_cmd_list_dma_attr.dma_attr_addr_hi = 906 0xffffffffull; 907 ahci_ctlp->ahcictl_cmd_table_dma_attr.dma_attr_addr_hi = 908 0xffffffffull; 909 } 910 911 /* Allocate the ports structure */ 912 status = ahci_alloc_ports_state(ahci_ctlp); 913 if (status != AHCI_SUCCESS) { 914 cmn_err(CE_WARN, "!ahci%d: Cannot allocate ports structure", 915 instance); 916 goto err_out; 917 } 918 919 attach_state |= AHCI_ATTACH_STATE_PORT_ALLOC; 920 921 /* 922 * Initialize the controller and ports. 923 */ 924 status = ahci_initialize_controller(ahci_ctlp); 925 if (status != AHCI_SUCCESS) { 926 cmn_err(CE_WARN, "!ahci%d: HBA initialization failed", 927 instance); 928 goto err_out; 929 } 930 931 attach_state |= AHCI_ATTACH_STATE_HW_INIT; 932 933 /* Start one thread to check packet timeouts */ 934 ahci_ctlp->ahcictl_timeout_id = timeout( 935 (void (*)(void *))ahci_watchdog_handler, 936 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 937 938 attach_state |= AHCI_ATTACH_STATE_TIMEOUT_ENABLED; 939 940 if (ahci_register_sata_hba_tran(ahci_ctlp, cap_status)) { 941 cmn_err(CE_WARN, "!ahci%d: sata hba tran registration failed", 942 instance); 943 goto err_out; 944 } 945 946 /* Check all handles at the end of the attach operation. */ 947 if (ahci_check_all_handle(ahci_ctlp) != DDI_SUCCESS) { 948 cmn_err(CE_WARN, "!ahci%d: invalid dma/acc handles", 949 instance); 950 goto err_out; 951 } 952 953 ahci_ctlp->ahcictl_flags &= ~AHCI_ATTACH; 954 955 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "ahci_attach success!", NULL); 956 957 return (DDI_SUCCESS); 958 959 err_out: 960 /* FMA message */ 961 ahci_fm_ereport(ahci_ctlp, DDI_FM_DEVICE_NO_RESPONSE); 962 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, DDI_SERVICE_LOST); 963 964 if (attach_state & AHCI_ATTACH_STATE_TIMEOUT_ENABLED) { 965 mutex_enter(&ahci_ctlp->ahcictl_mutex); 966 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 967 ahci_ctlp->ahcictl_timeout_id = 0; 968 mutex_exit(&ahci_ctlp->ahcictl_mutex); 969 } 970 971 if (attach_state & AHCI_ATTACH_STATE_HW_INIT) { 972 ahci_uninitialize_controller(ahci_ctlp); 973 } 974 975 if (attach_state & AHCI_ATTACH_STATE_PORT_ALLOC) { 976 ahci_dealloc_ports_state(ahci_ctlp); 977 } 978 979 if (attach_state & AHCI_ATTACH_STATE_MUTEX_INIT) { 980 mutex_destroy(&ahci_ctlp->ahcictl_mutex); 981 } 982 983 if (attach_state & AHCI_ATTACH_STATE_INTR_ADDED) { 984 ahci_rem_intrs(ahci_ctlp); 985 } 986 987 if (attach_state & AHCI_ATTACH_STATE_PCICFG_SETUP) { 988 pci_config_teardown(&ahci_ctlp->ahcictl_pci_conf_handle); 989 } 990 991 if (attach_state & AHCI_ATTACH_STATE_REG_MAP) { 992 ddi_regs_map_free(&ahci_ctlp->ahcictl_ahci_acc_handle); 993 } 994 995 if (attach_state & AHCI_ATTACH_STATE_FMA) { 996 ahci_fm_fini(ahci_ctlp); 997 } 998 999 if (attach_state & AHCI_ATTACH_STATE_STATEP_ALLOC) { 1000 ddi_soft_state_free(ahci_statep, instance); 1001 } 1002 1003 return (DDI_FAILURE); 1004 } 1005 1006 /* 1007 * The detach entry point for dev_ops. 1008 */ 1009 static int 1010 ahci_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 1011 { 1012 ahci_ctl_t *ahci_ctlp; 1013 int instance; 1014 int ret; 1015 1016 instance = ddi_get_instance(dip); 1017 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 1018 1019 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_detach enter", NULL); 1020 1021 switch (cmd) { 1022 case DDI_DETACH: 1023 1024 /* disable the interrupts for an uninterrupted detach */ 1025 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1026 ahci_disable_all_intrs(ahci_ctlp); 1027 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1028 1029 /* unregister from the sata framework. */ 1030 ret = ahci_unregister_sata_hba_tran(ahci_ctlp); 1031 if (ret != AHCI_SUCCESS) { 1032 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1033 ahci_enable_all_intrs(ahci_ctlp); 1034 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1035 return (DDI_FAILURE); 1036 } 1037 1038 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1039 1040 /* stop the watchdog handler */ 1041 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 1042 ahci_ctlp->ahcictl_timeout_id = 0; 1043 1044 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1045 1046 /* uninitialize the controller */ 1047 ahci_uninitialize_controller(ahci_ctlp); 1048 1049 /* remove the interrupts */ 1050 ahci_rem_intrs(ahci_ctlp); 1051 1052 /* deallocate the ports structures */ 1053 ahci_dealloc_ports_state(ahci_ctlp); 1054 1055 /* destroy mutex */ 1056 mutex_destroy(&ahci_ctlp->ahcictl_mutex); 1057 1058 /* teardown the pci config */ 1059 pci_config_teardown(&ahci_ctlp->ahcictl_pci_conf_handle); 1060 1061 /* remove the reg maps. */ 1062 ddi_regs_map_free(&ahci_ctlp->ahcictl_ahci_acc_handle); 1063 1064 /* release fma resource */ 1065 ahci_fm_fini(ahci_ctlp); 1066 1067 /* free the soft state. */ 1068 ddi_soft_state_free(ahci_statep, instance); 1069 1070 return (DDI_SUCCESS); 1071 1072 case DDI_SUSPEND: 1073 1074 /* 1075 * The steps associated with suspension must include putting 1076 * the underlying device into a quiescent state so that it 1077 * will not generate interrupts or modify or access memory. 1078 */ 1079 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1080 if (ahci_ctlp->ahcictl_flags & AHCI_SUSPEND) { 1081 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1082 return (DDI_SUCCESS); 1083 } 1084 1085 ahci_ctlp->ahcictl_flags |= AHCI_SUSPEND; 1086 1087 /* stop the watchdog handler */ 1088 if (ahci_ctlp->ahcictl_timeout_id) { 1089 (void) untimeout(ahci_ctlp->ahcictl_timeout_id); 1090 ahci_ctlp->ahcictl_timeout_id = 0; 1091 } 1092 1093 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1094 1095 /* 1096 * drain the taskq 1097 */ 1098 ahci_drain_ports_taskq(ahci_ctlp); 1099 1100 /* 1101 * Disable the interrupts and stop all the ports. 1102 */ 1103 ahci_uninitialize_controller(ahci_ctlp); 1104 1105 return (DDI_SUCCESS); 1106 1107 default: 1108 return (DDI_FAILURE); 1109 } 1110 } 1111 1112 /* 1113 * The info entry point for dev_ops. 1114 * 1115 */ 1116 static int 1117 ahci_getinfo(dev_info_t *dip, ddi_info_cmd_t infocmd, 1118 void *arg, void **result) 1119 { 1120 #ifndef __lock_lint 1121 _NOTE(ARGUNUSED(dip)) 1122 #endif /* __lock_lint */ 1123 1124 ahci_ctl_t *ahci_ctlp; 1125 int instance; 1126 dev_t dev; 1127 1128 dev = (dev_t)arg; 1129 instance = getminor(dev); 1130 1131 switch (infocmd) { 1132 case DDI_INFO_DEVT2DEVINFO: 1133 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 1134 if (ahci_ctlp != NULL) { 1135 *result = ahci_ctlp->ahcictl_dip; 1136 return (DDI_SUCCESS); 1137 } else { 1138 *result = NULL; 1139 return (DDI_FAILURE); 1140 } 1141 case DDI_INFO_DEVT2INSTANCE: 1142 *(int *)result = instance; 1143 break; 1144 default: 1145 break; 1146 } 1147 1148 return (DDI_SUCCESS); 1149 } 1150 1151 /* 1152 * Registers the ahci with sata framework. 1153 */ 1154 static int 1155 ahci_register_sata_hba_tran(ahci_ctl_t *ahci_ctlp, uint32_t cap_status) 1156 { 1157 struct sata_hba_tran *sata_hba_tran; 1158 1159 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 1160 "ahci_register_sata_hba_tran enter", NULL); 1161 1162 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1163 1164 /* Allocate memory for the sata_hba_tran */ 1165 sata_hba_tran = kmem_zalloc(sizeof (sata_hba_tran_t), KM_SLEEP); 1166 1167 sata_hba_tran->sata_tran_hba_rev = SATA_TRAN_HBA_REV; 1168 sata_hba_tran->sata_tran_hba_dip = ahci_ctlp->ahcictl_dip; 1169 sata_hba_tran->sata_tran_hba_dma_attr = 1170 &ahci_ctlp->ahcictl_buffer_dma_attr; 1171 1172 /* Report the number of implemented ports */ 1173 sata_hba_tran->sata_tran_hba_num_cports = 1174 ahci_ctlp->ahcictl_num_implemented_ports; 1175 1176 /* Support ATAPI device */ 1177 sata_hba_tran->sata_tran_hba_features_support = SATA_CTLF_ATAPI; 1178 1179 /* Get the data transfer capability for PIO command by the HBA */ 1180 if (cap_status & AHCI_HBA_CAP_PMD) { 1181 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PIO_MDRQ; 1182 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "HBA supports multiple " 1183 "DRQ block data transfer for PIO command protocol", NULL); 1184 } 1185 1186 /* 1187 * According to the AHCI spec, the ATA/ATAPI-7 queued feature set 1188 * is not supported by AHCI (including the READ QUEUED (EXT), WRITE 1189 * QUEUED (EXT), and SERVICE commands). Queued operations are 1190 * supported in AHCI using the READ FPDMA QUEUED and WRITE FPDMA 1191 * QUEUED commands when the HBA and device support native command 1192 * queuing(NCQ). 1193 * 1194 * SATA_CTLF_NCQ will be set to sata_tran_hba_features_support if the 1195 * CAP register of the HBA indicates NCQ is supported. 1196 * 1197 * SATA_CTLF_NCQ cannot be set if AHCI_CAP_NO_MCMDLIST_NONQUEUE is 1198 * set because the previous register content of PxCI can be re-written 1199 * in the register write. 1200 */ 1201 if ((cap_status & AHCI_HBA_CAP_SNCQ) && 1202 !(ahci_ctlp->ahcictl_cap & AHCI_CAP_NO_MCMDLIST_NONQUEUE)) { 1203 sata_hba_tran->sata_tran_hba_features_support |= SATA_CTLF_NCQ; 1204 ahci_ctlp->ahcictl_cap |= AHCI_CAP_NCQ; 1205 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "HBA supports Native " 1206 "Command Queuing", NULL); 1207 } 1208 1209 /* Support port multiplier? */ 1210 if (cap_status & AHCI_HBA_CAP_SPM) { 1211 sata_hba_tran->sata_tran_hba_features_support |= 1212 SATA_CTLF_PORT_MULTIPLIER; 1213 1214 /* Support FIS-based switching for port multiplier? */ 1215 if (cap_status & AHCI_HBA_CAP_FBSS) { 1216 sata_hba_tran->sata_tran_hba_features_support |= 1217 SATA_CTLF_PMULT_FBS; 1218 } 1219 } 1220 1221 /* Report the number of command slots */ 1222 sata_hba_tran->sata_tran_hba_qdepth = ahci_ctlp->ahcictl_num_cmd_slots; 1223 1224 sata_hba_tran->sata_tran_probe_port = ahci_tran_probe_port; 1225 sata_hba_tran->sata_tran_start = ahci_tran_start; 1226 sata_hba_tran->sata_tran_abort = ahci_tran_abort; 1227 sata_hba_tran->sata_tran_reset_dport = ahci_tran_reset_dport; 1228 sata_hba_tran->sata_tran_hotplug_ops = &ahci_tran_hotplug_ops; 1229 #ifdef __lock_lint 1230 sata_hba_tran->sata_tran_selftest = ahci_selftest; 1231 #endif 1232 /* 1233 * When SATA framework adds support for pwrmgt the 1234 * pwrmgt_ops needs to be updated 1235 */ 1236 sata_hba_tran->sata_tran_pwrmgt_ops = NULL; 1237 sata_hba_tran->sata_tran_ioctl = NULL; 1238 1239 ahci_ctlp->ahcictl_sata_hba_tran = sata_hba_tran; 1240 1241 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1242 1243 /* Attach it to SATA framework */ 1244 if (sata_hba_attach(ahci_ctlp->ahcictl_dip, sata_hba_tran, DDI_ATTACH) 1245 != DDI_SUCCESS) { 1246 kmem_free((void *)sata_hba_tran, sizeof (sata_hba_tran_t)); 1247 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1248 ahci_ctlp->ahcictl_sata_hba_tran = NULL; 1249 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1250 return (AHCI_FAILURE); 1251 } 1252 1253 return (AHCI_SUCCESS); 1254 } 1255 1256 /* 1257 * Unregisters the ahci with sata framework. 1258 */ 1259 static int 1260 ahci_unregister_sata_hba_tran(ahci_ctl_t *ahci_ctlp) 1261 { 1262 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1263 "ahci_unregister_sata_hba_tran enter", NULL); 1264 1265 /* Detach from the SATA framework. */ 1266 if (sata_hba_detach(ahci_ctlp->ahcictl_dip, DDI_DETACH) != 1267 DDI_SUCCESS) { 1268 return (AHCI_FAILURE); 1269 } 1270 1271 /* Deallocate sata_hba_tran. */ 1272 kmem_free((void *)ahci_ctlp->ahcictl_sata_hba_tran, 1273 sizeof (sata_hba_tran_t)); 1274 1275 mutex_enter(&ahci_ctlp->ahcictl_mutex); 1276 ahci_ctlp->ahcictl_sata_hba_tran = NULL; 1277 mutex_exit(&ahci_ctlp->ahcictl_mutex); 1278 1279 return (AHCI_SUCCESS); 1280 } 1281 1282 #define SET_PORTSTR(str, addrp) \ 1283 if (AHCI_ADDR_IS_PORT(addrp)) \ 1284 (void) sprintf((str), "%d", (addrp)->aa_port); \ 1285 else if (AHCI_ADDR_IS_PMULT(addrp)) \ 1286 (void) sprintf((str), "%d (pmult)", (addrp)->aa_port); \ 1287 else \ 1288 (void) sprintf((str), "%d:%d", (addrp)->aa_port, \ 1289 (addrp)->aa_pmport); 1290 1291 /* 1292 * ahci_tran_probe_port is called by SATA framework. It returns port state, 1293 * port status registers and an attached device type via sata_device 1294 * structure. 1295 * 1296 * We return the cached information from a previous hardware probe. The 1297 * actual hardware probing itself was done either from within 1298 * ahci_initialize_controller() during the driver attach or from a phy 1299 * ready change interrupt handler. 1300 */ 1301 static int 1302 ahci_tran_probe_port(dev_info_t *dip, sata_device_t *sd) 1303 { 1304 ahci_ctl_t *ahci_ctlp; 1305 ahci_port_t *ahci_portp; 1306 ahci_addr_t addr, pmult_addr; 1307 uint8_t cport = sd->satadev_addr.cport; 1308 char portstr[10]; 1309 uint8_t device_type; 1310 uint32_t port_state; 1311 uint8_t port; 1312 int rval = SATA_SUCCESS, rval_init; 1313 1314 ahci_ctlp = ddi_get_soft_state(ahci_statep, ddi_get_instance(dip)); 1315 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 1316 1317 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 1318 1319 mutex_enter(&ahci_portp->ahciport_mutex); 1320 1321 ahci_get_ahci_addr(ahci_ctlp, sd, &addr); 1322 ASSERT(AHCI_ADDR_IS_VALID(&addr)); 1323 SET_PORTSTR(portstr, &addr); 1324 1325 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1326 "ahci_tran_probe_port enter: port %s", portstr); 1327 1328 if ((AHCI_ADDR_IS_PMULT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)) && 1329 (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT || 1330 ahci_portp->ahciport_pmult_info == NULL)) { 1331 /* port mutliplier is removed. */ 1332 AHCIDBG(AHCIDBG_PMULT, ahci_ctlp, 1333 "ahci_tran_probe_port: " 1334 "pmult is removed from port %s", portstr); 1335 mutex_exit(&ahci_portp->ahciport_mutex); 1336 return (SATA_FAILURE); 1337 } 1338 1339 /* 1340 * The sata_device may refer to 1341 * 1. A controller port. 1342 * A controller port should be ready here. 1343 * 2. A port multiplier. 1344 * SATA_ADDR_PMULT_SPEC - if it is not initialized yet, initialize 1345 * it and register the port multiplier to the framework. 1346 * SATA_ADDR_PMULT - check the status of all its device ports. 1347 * 3. A port multiplier port. 1348 * If it has not been initialized, initialized it. 1349 * 1350 * A port multiplier or a port multiplier port may require some 1351 * initialization because we cannot do these time-consuming jobs in an 1352 * interrupt context. 1353 */ 1354 if (sd->satadev_addr.qual & SATA_ADDR_PMULT_SPEC) { 1355 AHCI_ADDR_SET_PMULT(&pmult_addr, port); 1356 /* Initialize registers on a port multiplier */ 1357 rval_init = ahci_initialize_pmult(ahci_ctlp, 1358 ahci_portp, &pmult_addr, sd); 1359 if (rval_init != AHCI_SUCCESS) { 1360 AHCIDBG(AHCIDBG_PMULT, ahci_ctlp, 1361 "ahci_tran_probe_port: " 1362 "pmult initialization failed.", NULL); 1363 mutex_exit(&ahci_portp->ahciport_mutex); 1364 return (SATA_FAILURE); 1365 } 1366 } else if (sd->satadev_addr.qual & SATA_ADDR_PMULT) { 1367 /* Check pmports hotplug events */ 1368 (void) ahci_probe_pmult(ahci_ctlp, ahci_portp, &addr); 1369 } else if (sd->satadev_addr.qual & (SATA_ADDR_PMPORT | 1370 SATA_ADDR_DPMPORT)) { 1371 if (ahci_probe_pmport(ahci_ctlp, ahci_portp, 1372 &addr, sd) != AHCI_SUCCESS) { 1373 rval = SATA_FAILURE; 1374 goto out; 1375 } 1376 } 1377 1378 /* Update port state and device type */ 1379 port_state = AHCIPORT_GET_STATE(ahci_portp, &addr); 1380 1381 switch (port_state) { 1382 1383 case SATA_PSTATE_FAILED: 1384 sd->satadev_state = SATA_PSTATE_FAILED; 1385 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1386 "ahci_tran_probe_port: port %s PORT FAILED", portstr); 1387 goto out; 1388 1389 case SATA_PSTATE_SHUTDOWN: 1390 sd->satadev_state = SATA_PSTATE_SHUTDOWN; 1391 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1392 "ahci_tran_probe_port: port %s PORT SHUTDOWN", portstr); 1393 goto out; 1394 1395 case SATA_PSTATE_PWROFF: 1396 sd->satadev_state = SATA_PSTATE_PWROFF; 1397 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1398 "ahci_tran_probe_port: port %s PORT PWROFF", portstr); 1399 goto out; 1400 1401 case SATA_PSTATE_PWRON: 1402 sd->satadev_state = SATA_PSTATE_PWRON; 1403 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1404 "ahci_tran_probe_port: port %s PORT PWRON", portstr); 1405 break; 1406 1407 default: 1408 sd->satadev_state = port_state; 1409 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1410 "ahci_tran_probe_port: port %s PORT NORMAL %x", 1411 portstr, port_state); 1412 break; 1413 } 1414 1415 device_type = AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr); 1416 1417 switch (device_type) { 1418 1419 case SATA_DTYPE_ATADISK: 1420 sd->satadev_type = SATA_DTYPE_ATADISK; 1421 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1422 "ahci_tran_probe_port: port %s DISK found", portstr); 1423 break; 1424 1425 case SATA_DTYPE_ATAPI: 1426 /* 1427 * HBA driver only knows it's an ATAPI device, and don't know 1428 * it's CD/DVD, tape or ATAPI disk because the ATAPI device 1429 * type need to be determined by checking IDENTIFY PACKET 1430 * DEVICE data 1431 */ 1432 sd->satadev_type = SATA_DTYPE_ATAPI; 1433 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1434 "ahci_tran_probe_port: port %s ATAPI found", portstr); 1435 break; 1436 1437 case SATA_DTYPE_PMULT: 1438 ASSERT(AHCI_ADDR_IS_PORT(&addr)||AHCI_ADDR_IS_PMULT(&addr)); 1439 sd->satadev_type = SATA_DTYPE_PMULT; 1440 1441 /* Update the number of pmports. */ 1442 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 1443 sd->satadev_add_info = ahci_portp-> 1444 ahciport_pmult_info->ahcipmi_num_dev_ports; 1445 1446 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1447 "ahci_tran_probe_port: port %s Port Multiplier found", 1448 portstr); 1449 break; 1450 1451 case SATA_DTYPE_UNKNOWN: 1452 sd->satadev_type = SATA_DTYPE_UNKNOWN; 1453 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1454 "ahci_tran_probe_port: port %s Unknown device found", 1455 portstr); 1456 break; 1457 1458 default: 1459 /* we don't support any other device types */ 1460 sd->satadev_type = SATA_DTYPE_NONE; 1461 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1462 "ahci_tran_probe_port: port %s No device found", portstr); 1463 break; 1464 } 1465 1466 out: 1467 /* Register update only fails while probing a pmult/pmport */ 1468 if (AHCI_ADDR_IS_PORT(&addr) || AHCI_ADDR_IS_PMULT(&addr)) { 1469 ahci_update_sata_registers(ahci_ctlp, port, sd); 1470 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 1471 if (port_state & SATA_STATE_READY) 1472 if (ahci_update_pmult_pscr(ahci_ctlp, 1473 &addr, sd) != AHCI_SUCCESS) 1474 rval = SATA_FAILURE; 1475 } 1476 1477 /* Check handles for the sata registers access */ 1478 if ((ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) || 1479 (ahci_check_port_handle(ahci_ctlp, port) != DDI_SUCCESS)) { 1480 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 1481 DDI_SERVICE_UNAFFECTED); 1482 rval = SATA_FAILURE; 1483 } 1484 1485 mutex_exit(&ahci_portp->ahciport_mutex); 1486 return (rval); 1487 } 1488 1489 /* 1490 * There are four operation modes in sata framework: 1491 * SATA_OPMODE_INTERRUPTS 1492 * SATA_OPMODE_POLLING 1493 * SATA_OPMODE_ASYNCH 1494 * SATA_OPMODE_SYNCH 1495 * 1496 * Their combined meanings as following: 1497 * 1498 * SATA_OPMODE_SYNCH 1499 * The command has to be completed before sata_tran_start functions returns. 1500 * Either interrupts or polling could be used - it's up to the driver. 1501 * Mode used currently for internal, sata-module initiated operations. 1502 * 1503 * SATA_OPMODE_SYNCH | SATA_OPMODE_INTERRUPTS 1504 * It is the same as the one above. 1505 * 1506 * SATA_OPMODE_SYNCH | SATA_OPMODE_POLLING 1507 * The command has to be completed before sata_tran_start function returns. 1508 * No interrupt used, polling only. This should be the mode used for scsi 1509 * packets with FLAG_NOINTR. 1510 * 1511 * SATA_OPMODE_ASYNCH | SATA_OPMODE_INTERRUPTS 1512 * The command may be queued (callback function specified). Interrupts could 1513 * be used. It's normal operation mode. 1514 */ 1515 /* 1516 * Called by sata framework to transport a sata packet down stream. 1517 */ 1518 static int 1519 ahci_tran_start(dev_info_t *dip, sata_pkt_t *spkt) 1520 { 1521 ahci_ctl_t *ahci_ctlp; 1522 ahci_port_t *ahci_portp; 1523 ahci_addr_t addr; 1524 uint8_t cport = spkt->satapkt_device.satadev_addr.cport; 1525 uint8_t port; 1526 char portstr[10]; 1527 1528 ahci_ctlp = ddi_get_soft_state(ahci_statep, ddi_get_instance(dip)); 1529 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 1530 1531 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 1532 "ahci_tran_start enter: cport %d satapkt 0x%p", 1533 cport, (void *)spkt); 1534 1535 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 1536 1537 mutex_enter(&ahci_portp->ahciport_mutex); 1538 ahci_get_ahci_addr(ahci_ctlp, &spkt->satapkt_device, &addr); 1539 SET_PORTSTR(portstr, &addr); 1540 1541 /* Sanity check */ 1542 if (AHCI_ADDR_IS_PMPORT(&addr)) { 1543 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT || 1544 ahci_portp->ahciport_pmult_info == NULL) { 1545 1546 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1547 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 1548 spkt->satapkt_device.satadev_state = SATA_STATE_UNKNOWN; 1549 ahci_update_sata_registers(ahci_ctlp, port, 1550 &spkt->satapkt_device); 1551 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1552 "ahci_tran_start returning PORT_ERROR while " 1553 "pmult removed: port: %s", portstr); 1554 mutex_exit(&ahci_portp->ahciport_mutex); 1555 return (SATA_TRAN_PORT_ERROR); 1556 } 1557 1558 if (!(AHCIPORT_GET_STATE(ahci_portp, &addr) & 1559 SATA_STATE_READY)) { 1560 if (!ddi_in_panic() || 1561 ahci_initialize_pmport(ahci_ctlp, 1562 ahci_portp, &addr) != AHCI_SUCCESS) { 1563 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1564 spkt->satapkt_device.satadev_type = 1565 AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr); 1566 spkt->satapkt_device.satadev_state = 1567 AHCIPORT_GET_STATE(ahci_portp, &addr); 1568 ahci_update_sata_registers(ahci_ctlp, port, 1569 &spkt->satapkt_device); 1570 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1571 "ahci_tran_start returning PORT_ERROR " 1572 "while sub-link is not initialized " 1573 "at port: %s", portstr); 1574 mutex_exit(&ahci_portp->ahciport_mutex); 1575 return (SATA_TRAN_PORT_ERROR); 1576 } 1577 } 1578 } 1579 1580 if (AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_FAILED || 1581 AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_SHUTDOWN|| 1582 AHCIPORT_GET_STATE(ahci_portp, &addr) & SATA_PSTATE_PWROFF) { 1583 /* 1584 * In case the target driver would send the packet before 1585 * sata framework can have the opportunity to process those 1586 * event reports. 1587 */ 1588 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1589 spkt->satapkt_device.satadev_state = 1590 ahci_portp->ahciport_port_state; 1591 ahci_update_sata_registers(ahci_ctlp, port, 1592 &spkt->satapkt_device); 1593 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1594 "ahci_tran_start returning PORT_ERROR while " 1595 "port in FAILED/SHUTDOWN/PWROFF state: " 1596 "port: %s", portstr); 1597 mutex_exit(&ahci_portp->ahciport_mutex); 1598 return (SATA_TRAN_PORT_ERROR); 1599 } 1600 1601 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) == SATA_DTYPE_NONE) { 1602 /* 1603 * ahci_intr_phyrdy_change() may have rendered it to 1604 * SATA_DTYPE_NONE. 1605 */ 1606 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 1607 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 1608 spkt->satapkt_device.satadev_state = 1609 ahci_portp->ahciport_port_state; 1610 ahci_update_sata_registers(ahci_ctlp, port, 1611 &spkt->satapkt_device); 1612 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1613 "ahci_tran_start returning PORT_ERROR while " 1614 "no device attached: port: %s", portstr); 1615 mutex_exit(&ahci_portp->ahciport_mutex); 1616 return (SATA_TRAN_PORT_ERROR); 1617 } 1618 1619 /* R/W PMULT command will occupy the whole HBA port */ 1620 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 1621 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1622 "ahci_tran_start returning BUSY while " 1623 "executing READ/WRITE PORT-MULT command: " 1624 "port: %s", portstr); 1625 spkt->satapkt_reason = SATA_PKT_BUSY; 1626 mutex_exit(&ahci_portp->ahciport_mutex); 1627 return (SATA_TRAN_BUSY); 1628 } 1629 1630 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) { 1631 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1632 "ahci_tran_start returning BUSY while " 1633 "hot-plug in progress: port: %s", portstr); 1634 spkt->satapkt_reason = SATA_PKT_BUSY; 1635 mutex_exit(&ahci_portp->ahciport_mutex); 1636 return (SATA_TRAN_BUSY); 1637 } 1638 1639 /* 1640 * SATA HBA driver should remember that a device was reset and it 1641 * is supposed to reject any packets which do not specify either 1642 * SATA_IGNORE_DEV_RESET_STATE or SATA_CLEAR_DEV_RESET_STATE. 1643 * 1644 * This is to prevent a race condition when a device was arbitrarily 1645 * reset by the HBA driver (and lost it's setting) and a target 1646 * driver sending some commands to a device before the sata framework 1647 * has a chance to restore the device setting (such as cache enable/ 1648 * disable or other resettable stuff). 1649 */ 1650 /* 1651 * It is unnecessary to use specific flags to indicate 1652 * reset_in_progress for a pmport. While mopping, all command will be 1653 * mopped so that the entire HBA port is being dealt as a single 1654 * object. 1655 */ 1656 if (spkt->satapkt_cmd.satacmd_flags.sata_clear_dev_reset) { 1657 ahci_portp->ahciport_reset_in_progress = 0; 1658 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1659 "ahci_tran_start [CLEAR] the " 1660 "reset_in_progress for port: %d", port); 1661 } 1662 1663 if (ahci_portp->ahciport_reset_in_progress && 1664 ! spkt->satapkt_cmd.satacmd_flags.sata_ignore_dev_reset && 1665 ! ddi_in_panic()) { 1666 spkt->satapkt_reason = SATA_PKT_BUSY; 1667 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1668 "ahci_tran_start returning BUSY while " 1669 "reset in progress: port: %d", port); 1670 mutex_exit(&ahci_portp->ahciport_mutex); 1671 return (SATA_TRAN_BUSY); 1672 } 1673 1674 #ifdef AHCI_DEBUG 1675 if (spkt->satapkt_cmd.satacmd_flags.sata_ignore_dev_reset) { 1676 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1677 "ahci_tran_start: packet 0x%p [PASSTHRU] at port %d", 1678 spkt, port); 1679 } 1680 #endif 1681 1682 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 1683 spkt->satapkt_reason = SATA_PKT_BUSY; 1684 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1685 "ahci_tran_start returning BUSY while " 1686 "mopping in progress: port: %d", port); 1687 mutex_exit(&ahci_portp->ahciport_mutex); 1688 return (SATA_TRAN_BUSY); 1689 } 1690 1691 if (ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) { 1692 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 1693 DDI_SERVICE_UNAFFECTED); 1694 mutex_exit(&ahci_portp->ahciport_mutex); 1695 return (SATA_TRAN_BUSY); 1696 } 1697 1698 if (spkt->satapkt_op_mode & 1699 (SATA_OPMODE_SYNCH | SATA_OPMODE_POLLING)) { 1700 /* 1701 * If a SYNC command to be executed in interrupt context, 1702 * bounce it back to sata module. 1703 */ 1704 if (!(spkt->satapkt_op_mode & SATA_OPMODE_POLLING) && 1705 servicing_interrupt()) { 1706 spkt->satapkt_reason = SATA_PKT_BUSY; 1707 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1708 "ahci_tran_start returning BUSY while " 1709 "sending SYNC mode under interrupt context: " 1710 "port : %d", port); 1711 mutex_exit(&ahci_portp->ahciport_mutex); 1712 return (SATA_TRAN_BUSY); 1713 } 1714 1715 /* We need to do the sync start now */ 1716 if (ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, 1717 spkt) == AHCI_FAILURE) { 1718 goto fail_out; 1719 } 1720 } else { 1721 /* Async start, using interrupt */ 1722 if (ahci_deliver_satapkt(ahci_ctlp, ahci_portp, &addr, spkt) 1723 == AHCI_FAILURE) { 1724 spkt->satapkt_reason = SATA_PKT_QUEUE_FULL; 1725 goto fail_out; 1726 } 1727 } 1728 1729 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_tran_start " 1730 "sata tran accepted: port %s", portstr); 1731 1732 mutex_exit(&ahci_portp->ahciport_mutex); 1733 return (SATA_TRAN_ACCEPTED); 1734 1735 fail_out: 1736 /* 1737 * Failed to deliver packet to the controller. 1738 * Check if it's caused by invalid handles. 1739 */ 1740 if (ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS || 1741 ahci_check_port_handle(ahci_ctlp, port) != DDI_SUCCESS) { 1742 spkt->satapkt_device.satadev_type = 1743 AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr); 1744 spkt->satapkt_device.satadev_state = 1745 AHCIPORT_GET_STATE(ahci_portp, &addr); 1746 spkt->satapkt_reason = SATA_PKT_DEV_ERROR; 1747 mutex_exit(&ahci_portp->ahciport_mutex); 1748 return (SATA_TRAN_PORT_ERROR); 1749 } 1750 1751 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_tran_start " 1752 "return QUEUE_FULL: port %d", port); 1753 mutex_exit(&ahci_portp->ahciport_mutex); 1754 return (SATA_TRAN_QUEUE_FULL); 1755 } 1756 1757 /* 1758 * SATA_OPMODE_SYNCH flag is set 1759 * 1760 * If SATA_OPMODE_POLLING flag is set, then we must poll the command 1761 * without interrupt, otherwise we can still use the interrupt. 1762 * 1763 * WARNING!!! ahciport_mutex should be acquired before the function 1764 * is called. 1765 */ 1766 static int 1767 ahci_do_sync_start(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 1768 ahci_addr_t *addrp, sata_pkt_t *spkt) 1769 { 1770 int pkt_timeout_ticks; 1771 uint32_t timeout_tags; 1772 int rval; 1773 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 1774 uint8_t port = addrp->aa_port; 1775 1776 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_do_sync_start enter: " 1777 "port %d:%d spkt 0x%p", port, addrp->aa_pmport, spkt); 1778 1779 if (spkt->satapkt_op_mode & SATA_OPMODE_POLLING) { 1780 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_POLLING; 1781 if ((rval = ahci_deliver_satapkt(ahci_ctlp, ahci_portp, 1782 addrp, spkt)) == AHCI_FAILURE) { 1783 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_POLLING; 1784 return (rval); 1785 } 1786 1787 pkt_timeout_ticks = 1788 drv_usectohz((clock_t)spkt->satapkt_time * 1000000); 1789 1790 while (spkt->satapkt_reason == SATA_PKT_BUSY) { 1791 mutex_exit(&ahci_portp->ahciport_mutex); 1792 1793 /* Simulate the interrupt */ 1794 ahci_port_intr(ahci_ctlp, ahci_portp, port); 1795 1796 drv_usecwait(AHCI_10MS_USECS); 1797 1798 mutex_enter(&ahci_portp->ahciport_mutex); 1799 pkt_timeout_ticks -= AHCI_10MS_TICKS; 1800 if (pkt_timeout_ticks < 0) { 1801 cmn_err(CE_WARN, "!ahci%d: ahci_do_sync_start " 1802 "port %d satapkt 0x%p timed out\n", 1803 instance, port, (void *)spkt); 1804 timeout_tags = (0x1 << rval); 1805 mutex_exit(&ahci_portp->ahciport_mutex); 1806 ahci_timeout_pkts(ahci_ctlp, ahci_portp, 1807 port, timeout_tags); 1808 mutex_enter(&ahci_portp->ahciport_mutex); 1809 } 1810 } 1811 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_POLLING; 1812 return (AHCI_SUCCESS); 1813 1814 } else { 1815 if ((rval = ahci_deliver_satapkt(ahci_ctlp, ahci_portp, 1816 addrp, spkt)) == AHCI_FAILURE) 1817 return (rval); 1818 1819 #if AHCI_DEBUG 1820 /* 1821 * Note that the driver always uses the slot 0 to deliver 1822 * REQUEST SENSE or READ LOG EXT command 1823 */ 1824 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 1825 ASSERT(rval == 0); 1826 #endif 1827 1828 while (spkt->satapkt_reason == SATA_PKT_BUSY) 1829 cv_wait(&ahci_portp->ahciport_cv, 1830 &ahci_portp->ahciport_mutex); 1831 1832 return (AHCI_SUCCESS); 1833 } 1834 } 1835 1836 /* 1837 * Searches for and claims a free command slot. 1838 * 1839 * Returns value: 1840 * 1841 * AHCI_FAILURE returned only if 1842 * 1. No empty slot left 1843 * 2. Non-queued command requested while queued command(s) is outstanding 1844 * 3. Queued command requested while non-queued command(s) is outstanding 1845 * 4. HBA doesn't support multiple-use of command list while already a 1846 * non-queued command is oustanding 1847 * 5. Queued command requested while some queued command(s) has been 1848 * outstanding on a different port multiplier port. (AHCI spec 1.2, 1849 * 9.1.2) 1850 * 1851 * claimed slot number returned if succeeded 1852 * 1853 * NOTE: it will always return slot 0 for following commands to simplify the 1854 * algorithm. 1855 * 1. REQUEST SENSE or READ LOG EXT command during error recovery process 1856 * 2. READ/WRITE PORTMULT command 1857 * 1858 * WARNING!!! ahciport_mutex should be acquired before the function 1859 * is called. 1860 */ 1861 static int 1862 ahci_claim_free_slot(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 1863 ahci_addr_t *addrp, int command_type) 1864 { 1865 uint32_t port_cmd_issue; 1866 uint32_t free_slots; 1867 int slot; 1868 1869 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_claim_free_slot enter " 1870 "ahciport_pending_tags = 0x%x " 1871 "ahciport_pending_ncq_tags = 0x%x", 1872 ahci_portp->ahciport_pending_tags, 1873 ahci_portp->ahciport_pending_ncq_tags); 1874 1875 /* 1876 * According to the AHCI spec, system software is responsible to 1877 * ensure that queued and non-queued commands are not mixed in 1878 * the command list. 1879 */ 1880 if (command_type == AHCI_NON_NCQ_CMD) { 1881 /* Non-NCQ command request */ 1882 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1883 AHCIDBG(AHCIDBG_INFO|AHCIDBG_NCQ, ahci_ctlp, 1884 "ahci_claim_free_slot: there is still pending " 1885 "queued command(s) in the command list, " 1886 "so no available slot for the non-queued " 1887 "command", NULL); 1888 return (AHCI_FAILURE); 1889 } 1890 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 1891 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 1892 "ahci_claim_free_slot: there is still pending " 1893 "read/write port-mult command(s) in command list, " 1894 "so no available slot for the non-queued command", 1895 NULL); 1896 return (AHCI_FAILURE); 1897 } 1898 if ((ahci_ctlp->ahcictl_cap & AHCI_CAP_NO_MCMDLIST_NONQUEUE) && 1899 NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1900 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1901 "ahci_claim_free_slot: HBA cannot support multiple-" 1902 "use of the command list for non-queued commands", 1903 NULL); 1904 return (AHCI_FAILURE); 1905 } 1906 free_slots = (~ahci_portp->ahciport_pending_tags) & 1907 AHCI_SLOT_MASK(ahci_ctlp); 1908 } else if (command_type == AHCI_NCQ_CMD) { 1909 /* NCQ command request */ 1910 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 1911 AHCIDBG(AHCIDBG_INFO|AHCIDBG_NCQ, ahci_ctlp, 1912 "ahci_claim_free_slot: there is still pending " 1913 "non-queued command(s) in the command list, " 1914 "so no available slot for the queued command", 1915 NULL); 1916 return (AHCI_FAILURE); 1917 } 1918 1919 /* 1920 * NCQ commands cannot be sent to different port multiplier 1921 * ports in Command-Based Switching mode 1922 */ 1923 /* 1924 * NOTE: In Command-Based Switching mode, AHCI controller 1925 * usually reports a 'Handshake Error' when multiple NCQ 1926 * commands are outstanding simultaneously. 1927 */ 1928 if (AHCIPORT_DEV_TYPE(ahci_portp, addrp) == SATA_DTYPE_PMULT) { 1929 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 1930 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_FBSS) && 1931 NCQ_CMD_IN_PROGRESS(ahci_portp) && 1932 AHCIPORT_NCQ_PMPORT(ahci_portp) != 1933 addrp->aa_pmport) { 1934 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1935 "ahci_claim_free_slot: there is still " 1936 "pending queued command(s) in the " 1937 "command list for another Port Multiplier " 1938 "port, so no available slot.", NULL); 1939 return (AHCI_FAILURE); 1940 } 1941 } 1942 1943 free_slots = (~ahci_portp->ahciport_pending_ncq_tags) & 1944 AHCI_NCQ_SLOT_MASK(ahci_portp); 1945 } else if (command_type == AHCI_ERR_RETRI_CMD) { 1946 /* Error retrieval command request */ 1947 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 1948 "ahci_claim_free_slot: slot 0 is allocated for REQUEST " 1949 "SENSE or READ LOG EXT command", NULL); 1950 slot = 0; 1951 goto out; 1952 } else if (command_type == AHCI_RDWR_PMULT_CMD) { 1953 /* 1954 * An extra check on PxCI. Sometimes PxCI bits may not be 1955 * cleared during hot-plug or error recovery process. 1956 */ 1957 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 1958 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, addrp->aa_port)); 1959 1960 if (port_cmd_issue != 0) { 1961 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 1962 "ahci_claim_free_slot: there is still pending " 1963 "command(s) in command list (0x%x/0x%x, PxCI %x)," 1964 "so no available slot for R/W PMULT command.", 1965 NON_NCQ_CMD_IN_PROGRESS(ahci_portp), 1966 NCQ_CMD_IN_PROGRESS(ahci_portp), 1967 port_cmd_issue); 1968 return (AHCI_FAILURE); 1969 } 1970 1971 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 1972 "ahci_claim_free_slot: slot 0 is allocated for " 1973 "READ/WRITE PORTMULT command", NULL); 1974 slot = 0; 1975 goto out; 1976 } 1977 1978 slot = ddi_ffs(free_slots) - 1; 1979 if (slot == -1) { 1980 AHCIDBG(AHCIDBG_VERBOSE, ahci_ctlp, 1981 "ahci_claim_free_slot: no empty slots", NULL); 1982 return (AHCI_FAILURE); 1983 } 1984 1985 /* 1986 * According to the AHCI spec, to allow a simple mechanism for the 1987 * HBA to map command list slots to queue entries, software must 1988 * match the tag number it uses to the slot it is placing the command 1989 * in. For example, if a queued command is placed in slot 5, the tag 1990 * for that command must be 5. 1991 */ 1992 if (command_type == AHCI_NCQ_CMD) { 1993 ahci_portp->ahciport_pending_ncq_tags |= (0x1 << slot); 1994 if (AHCI_ADDR_IS_PMPORT(addrp)) { 1995 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 1996 AHCIPORT_NCQ_PMPORT(ahci_portp) = addrp->aa_pmport; 1997 } 1998 } 1999 2000 ahci_portp->ahciport_pending_tags |= (0x1 << slot); 2001 2002 out: 2003 AHCIDBG(AHCIDBG_VERBOSE, ahci_ctlp, 2004 "ahci_claim_free_slot: found slot: 0x%x", slot); 2005 2006 return (slot); 2007 } 2008 2009 /* 2010 * Builds the Command Table for the sata packet and delivers it to controller. 2011 * 2012 * Returns: 2013 * slot number if we can obtain a slot successfully 2014 * otherwise, return AHCI_FAILURE 2015 * 2016 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2017 */ 2018 static int 2019 ahci_deliver_satapkt(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 2020 ahci_addr_t *addrp, sata_pkt_t *spkt) 2021 { 2022 int cmd_slot; 2023 sata_cmd_t *scmd; 2024 ahci_fis_h2d_register_t *h2d_register_fisp; 2025 ahci_cmd_table_t *cmd_table; 2026 ahci_cmd_header_t *cmd_header; 2027 int ncookies; 2028 int i; 2029 int command_type = AHCI_NON_NCQ_CMD; 2030 int ncq_qdepth; 2031 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 2032 uint8_t port, pmport; 2033 #if AHCI_DEBUG 2034 uint32_t *ptr; 2035 uint8_t *ptr2; 2036 #endif 2037 2038 port = addrp->aa_port; 2039 pmport = addrp->aa_pmport; 2040 2041 spkt->satapkt_reason = SATA_PKT_BUSY; 2042 2043 scmd = &spkt->satapkt_cmd; 2044 2045 /* Check if the command is a NCQ command */ 2046 if (scmd->satacmd_cmd_reg == SATAC_READ_FPDMA_QUEUED || 2047 scmd->satacmd_cmd_reg == SATAC_WRITE_FPDMA_QUEUED) { 2048 command_type = AHCI_NCQ_CMD; 2049 2050 /* 2051 * When NCQ is support, system software must determine the 2052 * maximum tag allowed by the device and the HBA, and it 2053 * must use a value not beyond of the lower bound of the two. 2054 * 2055 * Sata module is going to calculate the qdepth and send 2056 * down to HBA driver via sata_cmd. 2057 */ 2058 ncq_qdepth = scmd->satacmd_flags.sata_max_queue_depth + 1; 2059 2060 /* 2061 * At the moment, the driver doesn't support the dynamic 2062 * setting of the maximum ncq depth, and the value can be 2063 * set either during the attach or after hot-plug insertion. 2064 */ 2065 if (ahci_portp->ahciport_max_ncq_tags == 0) { 2066 ahci_portp->ahciport_max_ncq_tags = ncq_qdepth; 2067 AHCIDBG(AHCIDBG_NCQ, ahci_ctlp, 2068 "ahci_deliver_satapkt: port %d the max tags for " 2069 "NCQ command is %d", port, ncq_qdepth); 2070 } else { 2071 if (ncq_qdepth != ahci_portp->ahciport_max_ncq_tags) { 2072 cmn_err(CE_WARN, "!ahci%d: ahci_deliver_satapkt" 2073 " port %d the max tag for NCQ command is " 2074 "requested to change from %d to %d, at the" 2075 " moment the driver doesn't support the " 2076 "dynamic change so it's going to " 2077 "still use the previous tag value", 2078 instance, port, 2079 ahci_portp->ahciport_max_ncq_tags, 2080 ncq_qdepth); 2081 } 2082 } 2083 } 2084 2085 /* Check if the command is an error retrieval command */ 2086 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 2087 command_type = AHCI_ERR_RETRI_CMD; 2088 2089 /* Check if the command is an read/write pmult command */ 2090 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 2091 command_type = AHCI_RDWR_PMULT_CMD; 2092 2093 /* Check if there is an empty command slot */ 2094 cmd_slot = ahci_claim_free_slot(ahci_ctlp, ahci_portp, 2095 addrp, command_type); 2096 if (cmd_slot == AHCI_FAILURE) { 2097 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "no free command slot", NULL); 2098 return (AHCI_FAILURE); 2099 } 2100 2101 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INFO, ahci_ctlp, 2102 "ahci_deliver_satapkt enter: cmd_reg: 0x%x, cmd_slot: 0x%x, " 2103 "port: %d, satapkt: 0x%p", scmd->satacmd_cmd_reg, 2104 cmd_slot, port, (void *)spkt); 2105 2106 cmd_table = ahci_portp->ahciport_cmd_tables[cmd_slot]; 2107 bzero((void *)cmd_table, ahci_cmd_table_size); 2108 2109 /* For data transfer operations, it is the H2D Register FIS */ 2110 h2d_register_fisp = 2111 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 2112 2113 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 2114 2115 /* 2116 * PMP field only make sense when target is a port multiplier or a 2117 * device behind a port multiplier. Otherwise should set it to 0. 2118 */ 2119 if (AHCI_ADDR_IS_PMULT(addrp) || AHCI_ADDR_IS_PMPORT(addrp)) 2120 SET_FIS_PMP(h2d_register_fisp, pmport); 2121 2122 SET_FIS_CDMDEVCTL(h2d_register_fisp, 1); 2123 SET_FIS_COMMAND(h2d_register_fisp, scmd->satacmd_cmd_reg); 2124 SET_FIS_FEATURES(h2d_register_fisp, scmd->satacmd_features_reg); 2125 SET_FIS_SECTOR_COUNT(h2d_register_fisp, scmd->satacmd_sec_count_lsb); 2126 2127 switch (scmd->satacmd_addr_type) { 2128 2129 case 0: 2130 /* 2131 * satacmd_addr_type will be 0 for the commands below: 2132 * ATAPI command 2133 * SATAC_IDLE_IM 2134 * SATAC_STANDBY_IM 2135 * SATAC_DOWNLOAD_MICROCODE 2136 * SATAC_FLUSH_CACHE 2137 * SATAC_SET_FEATURES 2138 * SATAC_SMART 2139 * SATAC_ID_PACKET_DEVICE 2140 * SATAC_ID_DEVICE 2141 * SATAC_READ_PORTMULT 2142 * SATAC_WRITE_PORTMULT 2143 */ 2144 /* FALLTHRU */ 2145 2146 case ATA_ADDR_LBA: 2147 /* FALLTHRU */ 2148 2149 case ATA_ADDR_LBA28: 2150 /* LBA[7:0] */ 2151 SET_FIS_SECTOR(h2d_register_fisp, scmd->satacmd_lba_low_lsb); 2152 2153 /* LBA[15:8] */ 2154 SET_FIS_CYL_LOW(h2d_register_fisp, scmd->satacmd_lba_mid_lsb); 2155 2156 /* LBA[23:16] */ 2157 SET_FIS_CYL_HI(h2d_register_fisp, scmd->satacmd_lba_high_lsb); 2158 2159 /* LBA [27:24] (also called dev_head) */ 2160 SET_FIS_DEV_HEAD(h2d_register_fisp, scmd->satacmd_device_reg); 2161 2162 break; 2163 2164 case ATA_ADDR_LBA48: 2165 /* LBA[7:0] */ 2166 SET_FIS_SECTOR(h2d_register_fisp, scmd->satacmd_lba_low_lsb); 2167 2168 /* LBA[15:8] */ 2169 SET_FIS_CYL_LOW(h2d_register_fisp, scmd->satacmd_lba_mid_lsb); 2170 2171 /* LBA[23:16] */ 2172 SET_FIS_CYL_HI(h2d_register_fisp, scmd->satacmd_lba_high_lsb); 2173 2174 /* LBA [31:24] */ 2175 SET_FIS_SECTOR_EXP(h2d_register_fisp, 2176 scmd->satacmd_lba_low_msb); 2177 2178 /* LBA [39:32] */ 2179 SET_FIS_CYL_LOW_EXP(h2d_register_fisp, 2180 scmd->satacmd_lba_mid_msb); 2181 2182 /* LBA [47:40] */ 2183 SET_FIS_CYL_HI_EXP(h2d_register_fisp, 2184 scmd->satacmd_lba_high_msb); 2185 2186 /* Set dev_head */ 2187 SET_FIS_DEV_HEAD(h2d_register_fisp, 2188 scmd->satacmd_device_reg); 2189 2190 /* Set the extended sector count and features */ 2191 SET_FIS_SECTOR_COUNT_EXP(h2d_register_fisp, 2192 scmd->satacmd_sec_count_msb); 2193 SET_FIS_FEATURES_EXP(h2d_register_fisp, 2194 scmd->satacmd_features_reg_ext); 2195 break; 2196 } 2197 2198 /* 2199 * For NCQ command (READ/WRITE FPDMA QUEUED), sector count 7:0 is 2200 * filled into features field, and sector count 8:15 is filled into 2201 * features (exp) field. The hba driver doesn't need to anything 2202 * special with regard to this, since sata framework has already 2203 * done so. 2204 * 2205 * However the driver needs to make sure TAG is filled into sector 2206 * field. 2207 */ 2208 if (command_type == AHCI_NCQ_CMD) { 2209 SET_FIS_SECTOR_COUNT(h2d_register_fisp, 2210 (cmd_slot << SATA_TAG_QUEUING_SHIFT)); 2211 } 2212 2213 ncookies = scmd->satacmd_num_dma_cookies; 2214 AHCIDBG(AHCIDBG_PRDT, ahci_ctlp, 2215 "ncookies = 0x%x, ahci_dma_prdt_number = 0x%x", 2216 ncookies, ahci_dma_prdt_number); 2217 2218 ASSERT(ncookies <= ahci_dma_prdt_number); 2219 ahci_portp->ahciport_prd_bytecounts[cmd_slot] = 0; 2220 2221 /* *** now fill the scatter gather list ******* */ 2222 for (i = 0; i < ncookies; i++) { 2223 cmd_table->ahcict_prdt[i].ahcipi_data_base_addr = 2224 scmd->satacmd_dma_cookie_list[i]._dmu._dmac_la[0]; 2225 cmd_table->ahcict_prdt[i].ahcipi_data_base_addr_upper = 2226 scmd->satacmd_dma_cookie_list[i]._dmu._dmac_la[1]; 2227 cmd_table->ahcict_prdt[i].ahcipi_descr_info = 2228 scmd->satacmd_dma_cookie_list[i].dmac_size - 1; 2229 ahci_portp->ahciport_prd_bytecounts[cmd_slot] += 2230 scmd->satacmd_dma_cookie_list[i].dmac_size; 2231 } 2232 2233 AHCIDBG(AHCIDBG_PRDT, ahci_ctlp, 2234 "ahciport_prd_bytecounts 0x%x for cmd_slot 0x%x", 2235 ahci_portp->ahciport_prd_bytecounts[cmd_slot], cmd_slot); 2236 2237 /* The ACMD field is filled in for ATAPI command */ 2238 if (scmd->satacmd_cmd_reg == SATAC_PACKET) { 2239 bcopy(scmd->satacmd_acdb, cmd_table->ahcict_atapi_cmd, 2240 SATA_ATAPI_MAX_CDB_LEN); 2241 } 2242 2243 /* Set Command Header in Command List */ 2244 cmd_header = &ahci_portp->ahciport_cmd_list[cmd_slot]; 2245 BZERO_DESCR_INFO(cmd_header); 2246 BZERO_PRD_BYTE_COUNT(cmd_header); 2247 2248 /* Set the number of entries in the PRD table */ 2249 SET_PRD_TABLE_LENGTH(cmd_header, ncookies); 2250 2251 /* Set the length of the command in the CFIS area */ 2252 SET_COMMAND_FIS_LENGTH(cmd_header, AHCI_H2D_REGISTER_FIS_LENGTH); 2253 2254 /* 2255 * PMP field only make sense when target is a port multiplier or a 2256 * device behind a port multiplier. Otherwise should set it to 0. 2257 */ 2258 if (AHCI_ADDR_IS_PMULT(addrp) || AHCI_ADDR_IS_PMPORT(addrp)) 2259 SET_PORT_MULTI_PORT(cmd_header, pmport); 2260 2261 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "command data direction is " 2262 "sata_data_direction = 0x%x", 2263 scmd->satacmd_flags.sata_data_direction); 2264 2265 /* Set A bit if it is an ATAPI command */ 2266 if (scmd->satacmd_cmd_reg == SATAC_PACKET) 2267 SET_ATAPI(cmd_header, AHCI_CMDHEAD_ATAPI); 2268 2269 /* Set W bit if data is going to the device */ 2270 if (scmd->satacmd_flags.sata_data_direction == SATA_DIR_WRITE) 2271 SET_WRITE(cmd_header, AHCI_CMDHEAD_DATA_WRITE); 2272 2273 /* 2274 * Set the prefetchable bit - this bit is only valid if the PRDTL 2275 * field is non-zero or the ATAPI 'A' bit is set in the command 2276 * header. This bit cannot be set when using native command 2277 * queuing commands or when using FIS-based switching with a Port 2278 * multiplier. 2279 */ 2280 if (command_type != AHCI_NCQ_CMD) 2281 SET_PREFETCHABLE(cmd_header, AHCI_CMDHEAD_PREFETCHABLE); 2282 2283 /* 2284 * Now remember the sata packet in ahciport_slot_pkts[]. 2285 * Error retrieval command and r/w port multiplier command will 2286 * be stored specifically for each port. 2287 */ 2288 if (!ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 2289 !RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 2290 ahci_portp->ahciport_slot_pkts[cmd_slot] = spkt; 2291 2292 /* 2293 * Keep the timeout value 2294 */ 2295 ahci_portp->ahciport_slot_timeout[cmd_slot] = spkt->satapkt_time; 2296 2297 /* 2298 * If the intial timout is less than 1 tick, then make it longer by 2299 * 1 tick to avoid immediate timeout 2300 */ 2301 if (ahci_portp->ahciport_slot_timeout[cmd_slot] <= 2302 ahci_watchdog_timeout) 2303 ahci_portp->ahciport_slot_timeout[cmd_slot] += 2304 ahci_watchdog_timeout; 2305 2306 #if AHCI_DEBUG 2307 if (ahci_debug_flags & AHCIDBG_ATACMD && 2308 scmd->satacmd_cmd_reg != SATAC_PACKET || 2309 ahci_debug_flags & AHCIDBG_ATAPICMD && 2310 scmd->satacmd_cmd_reg == SATAC_PACKET) { 2311 2312 /* Dump the command header and table */ 2313 ahci_log(ahci_ctlp, CE_WARN, "\n"); 2314 ahci_log(ahci_ctlp, CE_WARN, "Command header&table for spkt " 2315 "0x%p cmd_reg 0x%x port %d", spkt, 2316 scmd->satacmd_cmd_reg, port); 2317 ptr = (uint32_t *)cmd_header; 2318 ahci_log(ahci_ctlp, CE_WARN, 2319 " Command Header:%8x %8x %8x %8x", 2320 ptr[0], ptr[1], ptr[2], ptr[3]); 2321 2322 /* Dump the H2D register FIS */ 2323 ptr = (uint32_t *)h2d_register_fisp; 2324 ahci_log(ahci_ctlp, CE_WARN, 2325 " Command FIS: %8x %8x %8x %8x", 2326 ptr[0], ptr[1], ptr[2], ptr[3]); 2327 2328 /* Dump the ACMD register FIS */ 2329 ptr2 = (uint8_t *)&(cmd_table->ahcict_atapi_cmd); 2330 for (i = 0; i < SATA_ATAPI_MAX_CDB_LEN/8; i++) 2331 if (ahci_debug_flags & AHCIDBG_ATAPICMD) 2332 ahci_log(ahci_ctlp, CE_WARN, 2333 " ATAPI command: %2x %2x %2x %2x " 2334 "%2x %2x %2x %2x", 2335 ptr2[8 * i], ptr2[8 * i + 1], 2336 ptr2[8 * i + 2], ptr2[8 * i + 3], 2337 ptr2[8 * i + 4], ptr2[8 * i + 5], 2338 ptr2[8 * i + 6], ptr2[8 * i + 7]); 2339 2340 /* Dump the PRDT */ 2341 for (i = 0; i < ncookies; i++) { 2342 ptr = (uint32_t *)&(cmd_table->ahcict_prdt[i]); 2343 ahci_log(ahci_ctlp, CE_WARN, 2344 " Cookie %d: %8x %8x %8x %8x", 2345 i, ptr[0], ptr[1], ptr[2], ptr[3]); 2346 } 2347 } 2348 #endif 2349 2350 (void) ddi_dma_sync( 2351 ahci_portp->ahciport_cmd_tables_dma_handle[cmd_slot], 2352 0, 2353 ahci_cmd_table_size, 2354 DDI_DMA_SYNC_FORDEV); 2355 2356 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 2357 cmd_slot * sizeof (ahci_cmd_header_t), 2358 sizeof (ahci_cmd_header_t), 2359 DDI_DMA_SYNC_FORDEV); 2360 2361 if ((ahci_check_dma_handle(ahci_portp-> 2362 ahciport_cmd_tables_dma_handle[cmd_slot]) != DDI_FM_OK) || 2363 ahci_check_dma_handle(ahci_portp-> 2364 ahciport_cmd_list_dma_handle) != DDI_FM_OK) { 2365 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 2366 DDI_SERVICE_UNAFFECTED); 2367 return (AHCI_FAILURE); 2368 } 2369 2370 /* Set the corresponding bit in the PxSACT.DS for queued command */ 2371 if (command_type == AHCI_NCQ_CMD) { 2372 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 2373 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port), 2374 (0x1 << cmd_slot)); 2375 } 2376 2377 /* Indicate to the HBA that a command is active. */ 2378 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 2379 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 2380 (0x1 << cmd_slot)); 2381 2382 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_deliver_satapkt " 2383 "exit: port %d", port); 2384 2385 /* Make sure the command is started by the PxSACT/PxCI */ 2386 if (ahci_check_acc_handle(ahci_ctlp-> 2387 ahcictl_ahci_acc_handle) != DDI_FM_OK) { 2388 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 2389 DDI_SERVICE_UNAFFECTED); 2390 return (AHCI_FAILURE); 2391 } 2392 2393 return (cmd_slot); 2394 } 2395 2396 /* 2397 * Called by the sata framework to abort the previously sent packet(s). 2398 * 2399 * Reset device to abort commands. 2400 */ 2401 static int 2402 ahci_tran_abort(dev_info_t *dip, sata_pkt_t *spkt, int flag) 2403 { 2404 ahci_ctl_t *ahci_ctlp; 2405 ahci_port_t *ahci_portp; 2406 uint32_t slot_status = 0; 2407 uint32_t aborted_tags = 0; 2408 uint32_t finished_tags = 0; 2409 uint8_t cport = spkt->satapkt_device.satadev_addr.cport; 2410 uint8_t port; 2411 int tmp_slot; 2412 int instance = ddi_get_instance(dip); 2413 2414 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 2415 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 2416 2417 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2418 "ahci_tran_abort enter: port %d", port); 2419 2420 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2421 mutex_enter(&ahci_portp->ahciport_mutex); 2422 2423 /* 2424 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2425 * commands are being mopped, therefore there is nothing else to do 2426 */ 2427 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2428 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2429 "ahci_tran_abort: port %d is in " 2430 "mopping process, so just return directly ", port); 2431 mutex_exit(&ahci_portp->ahciport_mutex); 2432 return (SATA_SUCCESS); 2433 } 2434 2435 /* 2436 * If AHCI_PORT_FLAG_RDWR_PMULT flag is set, it means a R/W PMULT 2437 * command is being executed so no other commands is outstanding, 2438 * nothing to do. 2439 */ 2440 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_RDWR_PMULT) { 2441 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2442 "ahci_tran_abort: port %d is reading/writing " 2443 "port multiplier, so just return directly ", port); 2444 mutex_exit(&ahci_portp->ahciport_mutex); 2445 return (SATA_SUCCESS); 2446 } 2447 2448 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED | 2449 ahci_portp->ahciport_port_state & SATA_PSTATE_SHUTDOWN | 2450 ahci_portp->ahciport_port_state & SATA_PSTATE_PWROFF) { 2451 /* 2452 * In case the targer driver would send the request before 2453 * sata framework can have the opportunity to process those 2454 * event reports. 2455 */ 2456 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 2457 spkt->satapkt_device.satadev_state = 2458 ahci_portp->ahciport_port_state; 2459 ahci_update_sata_registers(ahci_ctlp, port, 2460 &spkt->satapkt_device); 2461 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2462 "ahci_tran_abort returning SATA_FAILURE while " 2463 "port in FAILED/SHUTDOWN/PWROFF state: " 2464 "port: %d", port); 2465 mutex_exit(&ahci_portp->ahciport_mutex); 2466 return (SATA_FAILURE); 2467 } 2468 2469 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 2470 /* 2471 * ahci_intr_phyrdy_change() may have rendered it to 2472 * AHCI_PORT_TYPE_NODEV. 2473 */ 2474 spkt->satapkt_reason = SATA_PKT_PORT_ERROR; 2475 spkt->satapkt_device.satadev_type = SATA_DTYPE_NONE; 2476 spkt->satapkt_device.satadev_state = 2477 ahci_portp->ahciport_port_state; 2478 ahci_update_sata_registers(ahci_ctlp, port, 2479 &spkt->satapkt_device); 2480 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2481 "ahci_tran_abort returning SATA_FAILURE while " 2482 "no device attached: port: %d", port); 2483 mutex_exit(&ahci_portp->ahciport_mutex); 2484 return (SATA_FAILURE); 2485 } 2486 2487 if (flag == SATA_ABORT_ALL_PACKETS) { 2488 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2489 aborted_tags = ahci_portp->ahciport_pending_tags; 2490 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2491 aborted_tags = ahci_portp->ahciport_pending_ncq_tags; 2492 2493 cmn_err(CE_NOTE, "!ahci%d: ahci port %d abort all packets", 2494 instance, port); 2495 } else { 2496 aborted_tags = 0xffffffff; 2497 /* 2498 * Aborting one specific packet, first search the 2499 * ahciport_slot_pkts[] list for matching spkt. 2500 */ 2501 for (tmp_slot = 0; 2502 tmp_slot < ahci_ctlp->ahcictl_num_cmd_slots; tmp_slot++) { 2503 if (ahci_portp->ahciport_slot_pkts[tmp_slot] == spkt) { 2504 aborted_tags = (0x1 << tmp_slot); 2505 break; 2506 } 2507 } 2508 2509 if (aborted_tags == 0xffffffff) { 2510 /* request packet is not on the pending list */ 2511 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 2512 "Cannot find the aborting pkt 0x%p on the " 2513 "pending list", (void *)spkt); 2514 ahci_update_sata_registers(ahci_ctlp, port, 2515 &spkt->satapkt_device); 2516 mutex_exit(&ahci_portp->ahciport_mutex); 2517 return (SATA_FAILURE); 2518 } 2519 cmn_err(CE_NOTE, "!ahci%d: ahci port %d abort satapkt 0x%p", 2520 instance, port, (void *)spkt); 2521 } 2522 2523 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2524 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2525 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2526 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2527 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2528 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2529 2530 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2531 ahci_portp->ahciport_mop_in_progress++; 2532 2533 /* 2534 * To abort the packet(s), first we are trying to clear PxCMD.ST 2535 * to stop the port, and if the port can be stopped 2536 * successfully with PxTFD.STS.BSY and PxTFD.STS.DRQ cleared to '0', 2537 * then we just send back the aborted packet(s) with ABORTED flag 2538 * and then restart the port by setting PxCMD.ST and PxCMD.FRE. 2539 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then we 2540 * perform a COMRESET. 2541 */ 2542 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, 2543 ahci_portp, port, NULL, NULL); 2544 2545 /* 2546 * Compute which have finished and which need to be retried. 2547 * 2548 * The finished tags are ahciport_pending_tags/ahciport_pending_ncq_tags 2549 * minus the slot_status. The aborted_tags has to be deducted by 2550 * finished_tags since we can't possibly abort a tag which had finished 2551 * already. 2552 */ 2553 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2554 finished_tags = ahci_portp->ahciport_pending_tags & 2555 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2556 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2557 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2558 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2559 2560 aborted_tags &= ~finished_tags; 2561 2562 ahci_mop_commands(ahci_ctlp, 2563 ahci_portp, 2564 slot_status, 2565 0, /* failed tags */ 2566 0, /* timeout tags */ 2567 aborted_tags, 2568 0); /* reset tags */ 2569 2570 ahci_update_sata_registers(ahci_ctlp, port, &spkt->satapkt_device); 2571 mutex_exit(&ahci_portp->ahciport_mutex); 2572 2573 return (SATA_SUCCESS); 2574 } 2575 2576 /* 2577 * Used to do device reset and reject all the pending packets on a device 2578 * during the reset operation. 2579 * 2580 * NOTE: ONLY called by ahci_tran_reset_dport 2581 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2582 */ 2583 static int 2584 ahci_reset_device_reject_pkts(ahci_ctl_t *ahci_ctlp, 2585 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2586 { 2587 uint32_t slot_status = 0; 2588 uint32_t reset_tags = 0; 2589 uint32_t finished_tags = 0; 2590 uint8_t port = addrp->aa_port; 2591 sata_device_t sdevice; 2592 int ret; 2593 2594 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2595 "ahci_reset_device_reject_pkts on port: %d", port); 2596 2597 /* 2598 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2599 * commands are being mopped, therefore there is nothing else to do 2600 */ 2601 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2602 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2603 "ahci_reset_device_reject_pkts: port %d is in " 2604 "mopping process, so return directly ", port); 2605 return (SATA_SUCCESS); 2606 } 2607 2608 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2609 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2610 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2611 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2612 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2613 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2614 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2615 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2616 } 2617 2618 if (ahci_software_reset(ahci_ctlp, ahci_portp, addrp) 2619 != AHCI_SUCCESS) { 2620 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2621 "Try to do a port reset after software " 2622 "reset failed", port); 2623 ret = ahci_port_reset(ahci_ctlp, ahci_portp, addrp); 2624 if (ret != AHCI_SUCCESS) { 2625 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2626 "ahci_reset_device_reject_pkts: port %d " 2627 "failed", port); 2628 return (SATA_FAILURE); 2629 } 2630 } 2631 /* Set the reset in progress flag */ 2632 ahci_portp->ahciport_reset_in_progress = 1; 2633 2634 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2635 ahci_portp->ahciport_mop_in_progress++; 2636 2637 /* Indicate to the framework that a reset has happened */ 2638 bzero((void *)&sdevice, sizeof (sata_device_t)); 2639 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 2640 sdevice.satadev_addr.pmport = 0; 2641 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 2642 sdevice.satadev_state = SATA_DSTATE_RESET | 2643 SATA_DSTATE_PWR_ACTIVE; 2644 mutex_exit(&ahci_portp->ahciport_mutex); 2645 sata_hba_event_notify( 2646 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 2647 &sdevice, 2648 SATA_EVNT_DEVICE_RESET); 2649 mutex_enter(&ahci_portp->ahciport_mutex); 2650 2651 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 2652 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 2653 2654 /* Next try to mop the pending commands */ 2655 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2656 finished_tags = ahci_portp->ahciport_pending_tags & 2657 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2658 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2659 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2660 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2661 2662 reset_tags &= ~finished_tags; 2663 2664 ahci_mop_commands(ahci_ctlp, 2665 ahci_portp, 2666 slot_status, 2667 0, /* failed tags */ 2668 0, /* timeout tags */ 2669 0, /* aborted tags */ 2670 reset_tags); /* reset tags */ 2671 2672 return (SATA_SUCCESS); 2673 } 2674 2675 /* 2676 * Used to do device reset and reject all the pending packets on a device 2677 * during the reset operation. 2678 * 2679 * NOTE: ONLY called by ahci_tran_reset_dport 2680 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2681 */ 2682 static int 2683 ahci_reset_pmdevice_reject_pkts(ahci_ctl_t *ahci_ctlp, 2684 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2685 { 2686 uint32_t finished_tags = 0, reset_tags = 0, slot_status = 0; 2687 uint8_t port = addrp->aa_port; 2688 uint8_t pmport = addrp->aa_pmport; 2689 sata_device_t sdevice; 2690 2691 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_PMULT, ahci_ctlp, 2692 "ahci_reset_pmdevice_reject_pkts at port %d:%d", port, pmport); 2693 2694 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2695 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2696 "ahci_reset_pmdevice_reject_pkts: port %d is in " 2697 "mopping process, so return directly ", port); 2698 return (SATA_SUCCESS); 2699 } 2700 2701 /* Checking for outstanding commands */ 2702 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2703 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2704 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2705 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2706 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2707 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2708 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2709 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2710 } 2711 2712 /* Issue SOFTWARE reset command. */ 2713 if (ahci_software_reset(ahci_ctlp, ahci_portp, addrp) 2714 != AHCI_SUCCESS) { 2715 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2716 "Try to do a port reset after software " 2717 "reset failed", port); 2718 return (SATA_FAILURE); 2719 } 2720 2721 /* Set the reset in progress flag */ 2722 ahci_portp->ahciport_reset_in_progress = 1; 2723 2724 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2725 ahci_portp->ahciport_mop_in_progress++; 2726 2727 /* Indicate to the framework that a reset has happened */ 2728 bzero((void *)&sdevice, sizeof (sata_device_t)); 2729 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 2730 sdevice.satadev_addr.pmport = pmport; 2731 if (AHCI_ADDR_IS_PMULT(addrp)) 2732 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 2733 else 2734 sdevice.satadev_addr.qual = SATA_ADDR_DPMPORT; 2735 sdevice.satadev_state = SATA_DSTATE_RESET | 2736 SATA_DSTATE_PWR_ACTIVE; 2737 mutex_exit(&ahci_portp->ahciport_mutex); 2738 sata_hba_event_notify( 2739 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 2740 &sdevice, 2741 SATA_EVNT_DEVICE_RESET); 2742 mutex_enter(&ahci_portp->ahciport_mutex); 2743 2744 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 2745 "port %d:%d sending event up: SATA_EVNT_DEVICE_RESET", 2746 port, pmport); 2747 2748 /* Next try to mop the pending commands */ 2749 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2750 finished_tags = ahci_portp->ahciport_pending_tags & 2751 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2752 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2753 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2754 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2755 reset_tags &= ~finished_tags; 2756 2757 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 2758 "reset_tags = %x, finished_tags = %x, slot_status = %x", 2759 reset_tags, finished_tags, slot_status); 2760 2761 /* 2762 * NOTE: Because PxCI be only erased by unset PxCMD.ST bit, so even we 2763 * try to reset a single device behind a port multiplier will 2764 * terminate all the commands on that HBA port. We need mop these 2765 * commands as well. 2766 */ 2767 ahci_mop_commands(ahci_ctlp, 2768 ahci_portp, 2769 slot_status, 2770 0, /* failed tags */ 2771 0, /* timeout tags */ 2772 0, /* aborted tags */ 2773 reset_tags); /* reset tags */ 2774 2775 return (SATA_SUCCESS); 2776 } 2777 2778 /* 2779 * Used to do port reset and reject all the pending packets on a port during 2780 * the reset operation. 2781 * 2782 * WARNING!!! ahciport_mutex should be acquired before the function is called. 2783 */ 2784 static int 2785 ahci_reset_port_reject_pkts(ahci_ctl_t *ahci_ctlp, 2786 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 2787 { 2788 uint32_t slot_status = 0; 2789 uint32_t reset_tags = 0; 2790 uint32_t finished_tags = 0; 2791 uint8_t port = addrp->aa_port; 2792 2793 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2794 "ahci_reset_port_reject_pkts at port: %d", port); 2795 2796 /* 2797 * If AHCI_PORT_FLAG_MOPPING flag is set, it means all the pending 2798 * commands are being mopped, therefore there is nothing else to do 2799 */ 2800 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2801 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2802 "ahci_reset_port_reject_pkts: port %d is in " 2803 "mopping process, so return directly ", port); 2804 return (SATA_SUCCESS); 2805 } 2806 2807 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2808 ahci_portp->ahciport_mop_in_progress++; 2809 2810 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2811 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2812 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2813 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2814 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2815 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 2816 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2817 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2818 } 2819 2820 if (ahci_restart_port_wait_till_ready(ahci_ctlp, 2821 ahci_portp, port, AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, 2822 NULL) != AHCI_SUCCESS) { 2823 2824 /* Clear mop flag */ 2825 ahci_portp->ahciport_mop_in_progress--; 2826 if (ahci_portp->ahciport_mop_in_progress == 0) 2827 ahci_portp->ahciport_flags &= 2828 ~AHCI_PORT_FLAG_MOPPING; 2829 return (SATA_FAILURE); 2830 } 2831 2832 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2833 finished_tags = ahci_portp->ahciport_pending_tags & 2834 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 2835 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2836 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 2837 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 2838 2839 reset_tags &= ~finished_tags; 2840 2841 ahci_mop_commands(ahci_ctlp, 2842 ahci_portp, 2843 slot_status, 2844 0, /* failed tags */ 2845 0, /* timeout tags */ 2846 0, /* aborted tags */ 2847 reset_tags); /* reset tags */ 2848 2849 return (SATA_SUCCESS); 2850 } 2851 2852 /* 2853 * Used to do hba reset and reject all the pending packets on all ports 2854 * during the reset operation. 2855 */ 2856 static int 2857 ahci_reset_hba_reject_pkts(ahci_ctl_t *ahci_ctlp) 2858 { 2859 ahci_port_t *ahci_portp; 2860 uint32_t slot_status[AHCI_MAX_PORTS]; 2861 uint32_t reset_tags[AHCI_MAX_PORTS]; 2862 uint32_t finished_tags[AHCI_MAX_PORTS]; 2863 int port; 2864 int ret = SATA_SUCCESS; 2865 2866 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2867 "ahci_reset_hba_reject_pkts enter", NULL); 2868 2869 bzero(slot_status, sizeof (slot_status)); 2870 bzero(reset_tags, sizeof (reset_tags)); 2871 bzero(finished_tags, sizeof (finished_tags)); 2872 2873 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 2874 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 2875 continue; 2876 } 2877 2878 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2879 2880 mutex_enter(&ahci_portp->ahciport_mutex); 2881 ahci_portp->ahciport_reset_in_progress = 1; 2882 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2883 slot_status[port] = ddi_get32( 2884 ahci_ctlp->ahcictl_ahci_acc_handle, 2885 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 2886 reset_tags[port] = slot_status[port] & 2887 AHCI_SLOT_MASK(ahci_ctlp); 2888 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 2889 "port %d: reset_tags = 0x%x pending_tags = 0x%x", 2890 port, reset_tags[port], 2891 ahci_portp->ahciport_pending_tags); 2892 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 2893 slot_status[port] = ddi_get32( 2894 ahci_ctlp->ahcictl_ahci_acc_handle, 2895 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 2896 reset_tags[port] = slot_status[port] & 2897 AHCI_NCQ_SLOT_MASK(ahci_portp); 2898 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 2899 "port %d: reset_tags = 0x%x pending_tags = 0x%x", 2900 port, reset_tags[port], 2901 ahci_portp->ahciport_pending_tags); 2902 } 2903 mutex_exit(&ahci_portp->ahciport_mutex); 2904 } 2905 2906 if (ahci_hba_reset(ahci_ctlp) != AHCI_SUCCESS) { 2907 ret = SATA_FAILURE; 2908 } 2909 2910 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 2911 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 2912 continue; 2913 } 2914 2915 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2916 2917 mutex_enter(&ahci_portp->ahciport_mutex); 2918 /* 2919 * To prevent recursive enter to ahci_mop_commands, we need 2920 * check AHCI_PORT_FLAG_MOPPING flag. 2921 */ 2922 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 2923 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 2924 "ahci_reset_hba_reject_pkts: port %d is in " 2925 "mopping process, so return directly ", port); 2926 mutex_exit(&ahci_portp->ahciport_mutex); 2927 continue; 2928 } 2929 2930 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 2931 ahci_portp->ahciport_mop_in_progress++; 2932 2933 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 2934 finished_tags[port] = 2935 ahci_portp->ahciport_pending_tags & 2936 ~slot_status[port] & AHCI_SLOT_MASK(ahci_ctlp); 2937 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 2938 finished_tags[port] = 2939 ahci_portp->ahciport_pending_ncq_tags & 2940 ~slot_status[port] & AHCI_NCQ_SLOT_MASK(ahci_portp); 2941 2942 reset_tags[port] &= ~finished_tags[port]; 2943 2944 ahci_mop_commands(ahci_ctlp, 2945 ahci_portp, 2946 slot_status[port], 2947 0, /* failed tags */ 2948 0, /* timeout tags */ 2949 0, /* aborted tags */ 2950 reset_tags[port]); /* reset tags */ 2951 mutex_exit(&ahci_portp->ahciport_mutex); 2952 } 2953 out: 2954 return (ret); 2955 } 2956 2957 /* 2958 * Called by sata framework to reset a port(s) or device. 2959 */ 2960 static int 2961 ahci_tran_reset_dport(dev_info_t *dip, sata_device_t *sd) 2962 { 2963 ahci_ctl_t *ahci_ctlp; 2964 ahci_port_t *ahci_portp; 2965 ahci_addr_t addr; 2966 uint8_t cport = sd->satadev_addr.cport; 2967 uint8_t pmport = sd->satadev_addr.pmport; 2968 uint8_t port; 2969 int ret = SATA_SUCCESS; 2970 int instance = ddi_get_instance(dip); 2971 2972 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 2973 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 2974 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2975 2976 ahci_get_ahci_addr(ahci_ctlp, sd, &addr); 2977 2978 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 2979 "ahci_tran_reset_dport enter: cport %d", cport); 2980 2981 switch (sd->satadev_addr.qual) { 2982 case SATA_ADDR_PMPORT: 2983 /* 2984 * If we want to issue a COMRESET on a pmport, we need to 2985 * reject the outstanding commands on that pmport. According 2986 * to AHCI spec, PxCI register could only be cleared by 2987 * clearing PxCMD.ST, which will halt the controller port - as 2988 * well as other pmports. 2989 * 2990 * Therefore we directly reset the controller port for 2991 * simplicity. ahci_tran_probe_port() will handle reset stuff 2992 * like initializing the given pmport. 2993 */ 2994 /* FALLTHRU */ 2995 case SATA_ADDR_CPORT: 2996 /* Port reset */ 2997 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 2998 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 2999 "port %d reset port", instance, port); 3000 3001 mutex_enter(&ahci_portp->ahciport_mutex); 3002 ret = ahci_reset_port_reject_pkts(ahci_ctlp, ahci_portp, &addr); 3003 mutex_exit(&ahci_portp->ahciport_mutex); 3004 3005 break; 3006 3007 case SATA_ADDR_DPMPORT: 3008 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 3009 "port %d:%d reset device", instance, port, pmport); 3010 /* FALLTHRU */ 3011 case SATA_ADDR_DCPORT: 3012 /* Device reset */ 3013 if (sd->satadev_addr.qual == SATA_ADDR_DCPORT) 3014 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 3015 "port %d reset device", instance, port); 3016 3017 mutex_enter(&ahci_portp->ahciport_mutex); 3018 /* 3019 * software reset request must be sent to SATA_PMULT_HOSTPORT 3020 * if target is a port multiplier: 3021 */ 3022 if (sd->satadev_addr.qual == SATA_ADDR_DCPORT && 3023 ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) 3024 AHCI_ADDR_SET_PMULT(&addr, port); 3025 3026 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED | 3027 ahci_portp->ahciport_port_state & SATA_PSTATE_SHUTDOWN | 3028 ahci_portp->ahciport_port_state & SATA_PSTATE_PWROFF) { 3029 /* 3030 * In case the targer driver would send the request 3031 * before sata framework can have the opportunity to 3032 * process those event reports. 3033 */ 3034 sd->satadev_state = ahci_portp->ahciport_port_state; 3035 ahci_update_sata_registers(ahci_ctlp, port, sd); 3036 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3037 "ahci_tran_reset_dport returning SATA_FAILURE " 3038 "while port in FAILED/SHUTDOWN/PWROFF state: " 3039 "port: %d", port); 3040 mutex_exit(&ahci_portp->ahciport_mutex); 3041 ret = SATA_FAILURE; 3042 break; 3043 } 3044 3045 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) == 3046 SATA_DTYPE_NONE) { 3047 /* 3048 * ahci_intr_phyrdy_change() may have rendered it to 3049 * AHCI_PORT_TYPE_NODEV. 3050 */ 3051 sd->satadev_type = SATA_DTYPE_NONE; 3052 sd->satadev_state = AHCIPORT_GET_STATE(ahci_portp, 3053 &addr); 3054 ahci_update_sata_registers(ahci_ctlp, port, sd); 3055 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3056 "ahci_tran_reset_dport returning SATA_FAILURE " 3057 "while no device attached: port: %d", port); 3058 mutex_exit(&ahci_portp->ahciport_mutex); 3059 ret = SATA_FAILURE; 3060 break; 3061 } 3062 3063 if (AHCI_ADDR_IS_PORT(&addr)) { 3064 ret = ahci_reset_device_reject_pkts(ahci_ctlp, 3065 ahci_portp, &addr); 3066 } else { 3067 ret = ahci_reset_pmdevice_reject_pkts(ahci_ctlp, 3068 ahci_portp, &addr); 3069 } 3070 3071 mutex_exit(&ahci_portp->ahciport_mutex); 3072 break; 3073 3074 case SATA_ADDR_CNTRL: 3075 /* Reset the whole controller */ 3076 cmn_err(CE_NOTE, "!ahci%d: ahci_tran_reset_dport " 3077 "reset the whole hba", instance); 3078 ret = ahci_reset_hba_reject_pkts(ahci_ctlp); 3079 break; 3080 3081 default: 3082 ret = SATA_FAILURE; 3083 } 3084 3085 return (ret); 3086 } 3087 3088 /* 3089 * Called by sata framework to activate a port as part of hotplug. 3090 * (cfgadm -c connect satax/y) 3091 * Support port multiplier. 3092 */ 3093 static int 3094 ahci_tran_hotplug_port_activate(dev_info_t *dip, sata_device_t *satadev) 3095 { 3096 ahci_ctl_t *ahci_ctlp; 3097 ahci_port_t *ahci_portp; 3098 ahci_addr_t addr; 3099 uint8_t cport = satadev->satadev_addr.cport; 3100 uint8_t pmport = satadev->satadev_addr.pmport; 3101 uint8_t port; 3102 int instance = ddi_get_instance(dip); 3103 3104 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 3105 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 3106 3107 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 3108 "ahci_tran_hotplug_port_activate enter: cport %d", cport); 3109 3110 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3111 3112 mutex_enter(&ahci_portp->ahciport_mutex); 3113 ahci_get_ahci_addr(ahci_ctlp, satadev, &addr); 3114 ASSERT(AHCI_ADDR_IS_PORT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)); 3115 3116 if (AHCI_ADDR_IS_PORT(&addr)) { 3117 cmn_err(CE_NOTE, "!ahci%d: ahci port %d is activated", 3118 instance, port); 3119 3120 /* Enable the interrupts on the port */ 3121 ahci_enable_port_intrs(ahci_ctlp, port); 3122 3123 /* 3124 * Reset the port so that the PHY communication would be 3125 * re-established. But this reset is an internal operation 3126 * and the sata module doesn't need to know about it. 3127 * Moreover, the port with a device attached will be started 3128 * too. 3129 */ 3130 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, 3131 ahci_portp, port, 3132 AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, 3133 NULL); 3134 3135 /* 3136 * Need to check the link status and device status of the port 3137 * and consider raising power if the port was in D3 state 3138 */ 3139 ahci_portp->ahciport_port_state |= SATA_PSTATE_PWRON; 3140 ahci_portp->ahciport_port_state &= ~SATA_PSTATE_PWROFF; 3141 ahci_portp->ahciport_port_state &= ~SATA_PSTATE_SHUTDOWN; 3142 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 3143 cmn_err(CE_NOTE, "!ahci%d: ahci port %d:%d is activated", 3144 instance, port, pmport); 3145 /* AHCI_ADDR_PMPORT */ 3146 AHCIPORT_PMSTATE(ahci_portp, &addr) |= SATA_PSTATE_PWRON; 3147 AHCIPORT_PMSTATE(ahci_portp, &addr) &= 3148 ~(SATA_PSTATE_PWROFF|SATA_PSTATE_SHUTDOWN); 3149 } 3150 3151 satadev->satadev_state = ahci_portp->ahciport_port_state; 3152 3153 ahci_update_sata_registers(ahci_ctlp, port, satadev); 3154 3155 mutex_exit(&ahci_portp->ahciport_mutex); 3156 return (SATA_SUCCESS); 3157 } 3158 3159 /* 3160 * Called by sata framework to deactivate a port as part of hotplug. 3161 * (cfgadm -c disconnect satax/y) 3162 * Support port multiplier. 3163 */ 3164 static int 3165 ahci_tran_hotplug_port_deactivate(dev_info_t *dip, sata_device_t *satadev) 3166 { 3167 ahci_ctl_t *ahci_ctlp; 3168 ahci_port_t *ahci_portp; 3169 ahci_addr_t addr; 3170 uint8_t cport = satadev->satadev_addr.cport; 3171 uint8_t pmport = satadev->satadev_addr.pmport; 3172 uint8_t port; 3173 uint32_t port_scontrol; 3174 int instance = ddi_get_instance(dip); 3175 3176 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 3177 port = ahci_ctlp->ahcictl_cport_to_port[cport]; 3178 3179 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 3180 "ahci_tran_hotplug_port_deactivate enter: cport %d", cport); 3181 3182 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3183 mutex_enter(&ahci_portp->ahciport_mutex); 3184 ahci_get_ahci_addr(ahci_ctlp, satadev, &addr); 3185 ASSERT(AHCI_ADDR_IS_PORT(&addr) || AHCI_ADDR_IS_PMPORT(&addr)); 3186 3187 if (AHCI_ADDR_IS_PORT(&addr)) { 3188 cmn_err(CE_NOTE, "!ahci%d: ahci port %d is deactivated", 3189 instance, port); 3190 3191 /* Disable the interrupts on the port */ 3192 ahci_disable_port_intrs(ahci_ctlp, port); 3193 3194 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) { 3195 3196 /* First to abort all the pending commands */ 3197 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 3198 3199 /* Then stop the port */ 3200 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3201 ahci_portp, port); 3202 } 3203 3204 /* Next put the PHY offline */ 3205 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3206 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 3207 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_DISABLE); 3208 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, (uint32_t *) 3209 AHCI_PORT_PxSCTL(ahci_ctlp, port), port_scontrol); 3210 } else if (AHCI_ADDR_IS_PMPORT(&addr)) { 3211 cmn_err(CE_NOTE, "!ahci%d: ahci port %d:%d is deactivated", 3212 instance, port, pmport); 3213 3214 ahci_disable_port_intrs(ahci_ctlp, port); 3215 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &addr) 3216 != SATA_DTYPE_NONE) 3217 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 3218 3219 /* Re-enable the interrupts for the other pmports */ 3220 ahci_enable_port_intrs(ahci_ctlp, port); 3221 } 3222 3223 /* Update port state */ 3224 AHCIPORT_SET_STATE(ahci_portp, &addr, SATA_PSTATE_SHUTDOWN); 3225 satadev->satadev_state = SATA_PSTATE_SHUTDOWN; 3226 3227 ahci_update_sata_registers(ahci_ctlp, port, satadev); 3228 3229 mutex_exit(&ahci_portp->ahciport_mutex); 3230 return (SATA_SUCCESS); 3231 } 3232 3233 /* 3234 * To be used to mark all the outstanding pkts with SATA_PKT_ABORTED 3235 * when a device is unplugged or a port is deactivated. 3236 * 3237 * WARNING!!! ahciport_mutex should be acquired before the function is called. 3238 */ 3239 static void 3240 ahci_reject_all_abort_pkts(ahci_ctl_t *ahci_ctlp, 3241 ahci_port_t *ahci_portp, uint8_t port) 3242 { 3243 uint32_t slot_status = 0; 3244 uint32_t abort_tags = 0; 3245 3246 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 3247 "ahci_reject_all_abort_pkts at port: %d", port); 3248 3249 /* Read/write port multiplier command takes highest priority */ 3250 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 3251 slot_status = 0x1; 3252 abort_tags = 0x1; 3253 goto out; 3254 } 3255 3256 /* 3257 * When AHCI_PORT_FLAG_MOPPING is set, we need to check whether a 3258 * REQUEST SENSE command or READ LOG EXT command is delivered to HBA 3259 * to get the error data, if yes when the device is removed, the 3260 * command needs to be aborted too. 3261 */ 3262 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) { 3263 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 3264 slot_status = 0x1; 3265 abort_tags = 0x1; 3266 goto out; 3267 } else { 3268 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3269 "ahci_reject_all_abort_pkts return directly " 3270 "port %d no needs to reject any outstanding " 3271 "commands", port); 3272 return; 3273 } 3274 } 3275 3276 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 3277 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3278 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 3279 abort_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 3280 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 3281 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3282 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 3283 abort_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 3284 } 3285 3286 out: 3287 /* No need to do mop when there is no outstanding commands */ 3288 if (slot_status != 0) { 3289 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 3290 ahci_portp->ahciport_mop_in_progress++; 3291 3292 ahci_mop_commands(ahci_ctlp, 3293 ahci_portp, 3294 slot_status, 3295 0, /* failed tags */ 3296 0, /* timeout tags */ 3297 abort_tags, /* aborting tags */ 3298 0); /* reset tags */ 3299 } 3300 } 3301 3302 #if defined(__lock_lint) 3303 static int 3304 ahci_selftest(dev_info_t *dip, sata_device_t *device) 3305 { 3306 return (SATA_SUCCESS); 3307 } 3308 #endif 3309 3310 /* 3311 * Initialize fma capabilities and register with IO fault services. 3312 */ 3313 static void 3314 ahci_fm_init(ahci_ctl_t *ahci_ctlp) 3315 { 3316 /* 3317 * Need to change iblock to priority for new MSI intr 3318 */ 3319 ddi_iblock_cookie_t fm_ibc; 3320 3321 ahci_ctlp->ahcictl_fm_cap = ddi_getprop(DDI_DEV_T_ANY, 3322 ahci_ctlp->ahcictl_dip, 3323 DDI_PROP_CANSLEEP | DDI_PROP_DONTPASS, "fm-capable", 3324 DDI_FM_EREPORT_CAPABLE | DDI_FM_ACCCHK_CAPABLE | 3325 DDI_FM_DMACHK_CAPABLE | DDI_FM_ERRCB_CAPABLE); 3326 3327 /* Only register with IO Fault Services if we have some capability */ 3328 if (ahci_ctlp->ahcictl_fm_cap) { 3329 /* Adjust access and dma attributes for FMA */ 3330 accattr.devacc_attr_access = DDI_FLAGERR_ACC; 3331 buffer_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; 3332 rcvd_fis_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; 3333 cmd_list_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; 3334 cmd_table_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; 3335 3336 /* 3337 * Register capabilities with IO Fault Services. 3338 * ahcictl_fm_cap will be updated to indicate 3339 * capabilities actually supported (not requested.) 3340 */ 3341 ddi_fm_init(ahci_ctlp->ahcictl_dip, 3342 &ahci_ctlp->ahcictl_fm_cap, &fm_ibc); 3343 3344 if (ahci_ctlp->ahcictl_fm_cap == DDI_FM_NOT_CAPABLE) { 3345 cmn_err(CE_WARN, "!ahci%d: fma init failed.", 3346 ddi_get_instance(ahci_ctlp->ahcictl_dip)); 3347 return; 3348 } 3349 /* 3350 * Initialize pci ereport capabilities if ereport 3351 * capable (should always be.) 3352 */ 3353 if (DDI_FM_EREPORT_CAP(ahci_ctlp->ahcictl_fm_cap) || 3354 DDI_FM_ERRCB_CAP(ahci_ctlp->ahcictl_fm_cap)) { 3355 pci_ereport_setup(ahci_ctlp->ahcictl_dip); 3356 } 3357 3358 /* 3359 * Register error callback if error callback capable. 3360 */ 3361 if (DDI_FM_ERRCB_CAP(ahci_ctlp->ahcictl_fm_cap)) { 3362 ddi_fm_handler_register(ahci_ctlp->ahcictl_dip, 3363 ahci_fm_error_cb, (void *) ahci_ctlp); 3364 } 3365 3366 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3367 "ahci_fm_fini: fma enabled.", NULL); 3368 } 3369 } 3370 3371 /* 3372 * Releases fma capabilities and un-registers with IO fault services. 3373 */ 3374 static void 3375 ahci_fm_fini(ahci_ctl_t *ahci_ctlp) 3376 { 3377 /* Only unregister FMA capabilities if registered */ 3378 if (ahci_ctlp->ahcictl_fm_cap) { 3379 /* 3380 * Un-register error callback if error callback capable. 3381 */ 3382 if (DDI_FM_ERRCB_CAP(ahci_ctlp->ahcictl_fm_cap)) { 3383 ddi_fm_handler_unregister(ahci_ctlp->ahcictl_dip); 3384 } 3385 3386 /* 3387 * Release any resources allocated by pci_ereport_setup() 3388 */ 3389 if (DDI_FM_EREPORT_CAP(ahci_ctlp->ahcictl_fm_cap) || 3390 DDI_FM_ERRCB_CAP(ahci_ctlp->ahcictl_fm_cap)) { 3391 pci_ereport_teardown(ahci_ctlp->ahcictl_dip); 3392 } 3393 3394 /* Unregister from IO Fault Services */ 3395 ddi_fm_fini(ahci_ctlp->ahcictl_dip); 3396 3397 /* Adjust access and dma attributes for FMA */ 3398 accattr.devacc_attr_access = DDI_DEFAULT_ACC; 3399 buffer_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR; 3400 rcvd_fis_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR; 3401 cmd_list_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR; 3402 cmd_table_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR; 3403 3404 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3405 "ahci_fm_fini: fma disabled.", NULL); 3406 } 3407 } 3408 3409 /*ARGSUSED*/ 3410 static int 3411 ahci_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data) 3412 { 3413 /* 3414 * as the driver can always deal with an error in any dma or 3415 * access handle, we can just return the fme_status value. 3416 */ 3417 pci_ereport_post(dip, err, NULL); 3418 return (err->fme_status); 3419 } 3420 3421 int 3422 ahci_check_acc_handle(ddi_acc_handle_t handle) 3423 { 3424 ddi_fm_error_t de; 3425 3426 ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION); 3427 return (de.fme_status); 3428 } 3429 3430 int 3431 ahci_check_dma_handle(ddi_dma_handle_t handle) 3432 { 3433 ddi_fm_error_t de; 3434 3435 ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION); 3436 return (de.fme_status); 3437 } 3438 3439 /* 3440 * Generate an ereport 3441 */ 3442 void 3443 ahci_fm_ereport(ahci_ctl_t *ahci_ctlp, char *detail) 3444 { 3445 uint64_t ena; 3446 char buf[FM_MAX_CLASS]; 3447 3448 (void) snprintf(buf, FM_MAX_CLASS, "%s.%s", DDI_FM_DEVICE, detail); 3449 ena = fm_ena_generate(0, FM_ENA_FMT1); 3450 if (DDI_FM_EREPORT_CAP(ahci_ctlp->ahcictl_fm_cap)) { 3451 ddi_fm_ereport_post(ahci_ctlp->ahcictl_dip, buf, ena, 3452 DDI_NOSLEEP, FM_VERSION, DATA_TYPE_UINT8, 3453 FM_EREPORT_VERSION, NULL); 3454 } 3455 } 3456 3457 /* 3458 * Check if all handles are correctly allocated. This function is only called 3459 * by ahci_attach(), so we do not need hold any mutex here. 3460 */ 3461 static int 3462 ahci_check_all_handle(ahci_ctl_t *ahci_ctlp) 3463 { 3464 int port; 3465 if (ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) { 3466 return (DDI_FAILURE); 3467 } 3468 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3469 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) 3470 continue; 3471 if (ahci_check_port_handle(ahci_ctlp, port) != DDI_SUCCESS) { 3472 return (DDI_FAILURE); 3473 } 3474 } 3475 return (DDI_SUCCESS); 3476 } 3477 3478 /* 3479 * Check the access handles for the controller. Note that 3480 * ahcictl_pci_conf_handle is only used in attach process. 3481 */ 3482 static int 3483 ahci_check_ctl_handle(ahci_ctl_t *ahci_ctlp) 3484 { 3485 if ((ahci_check_acc_handle(ahci_ctlp-> 3486 ahcictl_pci_conf_handle) != DDI_FM_OK) || 3487 (ahci_check_acc_handle(ahci_ctlp-> 3488 ahcictl_ahci_acc_handle) != DDI_FM_OK)) { 3489 return (DDI_FAILURE); 3490 } 3491 return (DDI_SUCCESS); 3492 } 3493 3494 /* 3495 * Check the DMA handles and the access handles of a controller port. 3496 * 3497 * WARNING!!! ahciport_mutex should be acquired before the function is called. 3498 */ 3499 static int 3500 ahci_check_port_handle(ahci_ctl_t *ahci_ctlp, int port) 3501 { 3502 ahci_port_t *ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3503 int slot; 3504 if ((ahci_check_dma_handle(ahci_portp-> 3505 ahciport_rcvd_fis_dma_handle) != DDI_FM_OK) || 3506 (ahci_check_dma_handle(ahci_portp-> 3507 ahciport_cmd_list_dma_handle) != DDI_FM_OK) || 3508 (ahci_check_acc_handle(ahci_portp-> 3509 ahciport_rcvd_fis_acc_handle) != DDI_FM_OK) || 3510 (ahci_check_acc_handle(ahci_portp-> 3511 ahciport_cmd_list_acc_handle) != DDI_FM_OK)) { 3512 return (DDI_FAILURE); 3513 } 3514 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots; 3515 slot ++) { 3516 if (ahci_check_slot_handle(ahci_portp, slot) 3517 != DDI_SUCCESS) { 3518 return (DDI_FAILURE); 3519 } 3520 } 3521 return (DDI_SUCCESS); 3522 } 3523 3524 /* 3525 * Check the DMA handles and the access handles of a cmd table slot. 3526 * 3527 * WARNING!!! ahciport_mutex should be acquired before the function is called. 3528 */ 3529 static int 3530 ahci_check_slot_handle(ahci_port_t *ahci_portp, int slot) 3531 { 3532 if ((ahci_check_acc_handle(ahci_portp-> 3533 ahciport_cmd_tables_acc_handle[slot]) != DDI_FM_OK) || 3534 (ahci_check_dma_handle(ahci_portp-> 3535 ahciport_cmd_tables_dma_handle[slot]) != DDI_FM_OK)) { 3536 return (DDI_FAILURE); 3537 } 3538 return (DDI_SUCCESS); 3539 } 3540 /* 3541 * Allocate the ports structure, only called by ahci_attach 3542 */ 3543 static int 3544 ahci_alloc_ports_state(ahci_ctl_t *ahci_ctlp) 3545 { 3546 int port, cport = 0; 3547 3548 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3549 "ahci_alloc_ports_state enter", NULL); 3550 3551 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3552 3553 /* Allocate structures only for the implemented ports */ 3554 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3555 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3556 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3557 "hba port %d not implemented", port); 3558 continue; 3559 } 3560 3561 ahci_ctlp->ahcictl_cport_to_port[cport] = (uint8_t)port; 3562 ahci_ctlp->ahcictl_port_to_cport[port] = 3563 (uint8_t)cport++; 3564 3565 if (ahci_alloc_port_state(ahci_ctlp, port) != AHCI_SUCCESS) { 3566 goto err_out; 3567 } 3568 } 3569 3570 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3571 return (AHCI_SUCCESS); 3572 3573 err_out: 3574 for (port--; port >= 0; port--) { 3575 if (AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3576 ahci_dealloc_port_state(ahci_ctlp, port); 3577 } 3578 } 3579 3580 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3581 return (AHCI_FAILURE); 3582 } 3583 3584 /* 3585 * Reverse of ahci_alloc_ports_state(), only called by ahci_detach 3586 */ 3587 static void 3588 ahci_dealloc_ports_state(ahci_ctl_t *ahci_ctlp) 3589 { 3590 int port; 3591 3592 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3593 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3594 /* if this port is implemented by the HBA */ 3595 if (AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) 3596 ahci_dealloc_port_state(ahci_ctlp, port); 3597 } 3598 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3599 } 3600 3601 /* 3602 * Drain the taskq. 3603 */ 3604 static void 3605 ahci_drain_ports_taskq(ahci_ctl_t *ahci_ctlp) 3606 { 3607 ahci_port_t *ahci_portp; 3608 int port; 3609 3610 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3611 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3612 continue; 3613 } 3614 3615 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3616 3617 mutex_enter(&ahci_portp->ahciport_mutex); 3618 ddi_taskq_wait(ahci_portp->ahciport_event_taskq); 3619 mutex_exit(&ahci_portp->ahciport_mutex); 3620 } 3621 } 3622 3623 /* 3624 * Initialize the controller and all ports. And then try to start the ports 3625 * if there are devices attached. 3626 * 3627 * This routine can be called from three seperate cases: DDI_ATTACH, 3628 * PM_LEVEL_D0 and DDI_RESUME. The DDI_ATTACH case is different from 3629 * other two cases; device signature probing are attempted only during 3630 * DDI_ATTACH case. 3631 * 3632 * WARNING!!! Disable the whole controller's interrupts before calling and 3633 * the interrupts will be enabled upon successfully return. 3634 */ 3635 static int 3636 ahci_initialize_controller(ahci_ctl_t *ahci_ctlp) 3637 { 3638 ahci_port_t *ahci_portp; 3639 ahci_addr_t addr; 3640 uint32_t ghc_control; 3641 int port; 3642 3643 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3644 "ahci_initialize_controller enter", NULL); 3645 3646 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3647 3648 /* 3649 * Indicate that system software is AHCI aware by setting 3650 * GHC.AE to 1 3651 */ 3652 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3653 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 3654 3655 ghc_control |= AHCI_HBA_GHC_AE; 3656 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3657 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), 3658 ghc_control); 3659 3660 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3661 3662 /* Initialize the implemented ports and structures */ 3663 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3664 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3665 continue; 3666 } 3667 3668 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3669 mutex_enter(&ahci_portp->ahciport_mutex); 3670 3671 /* 3672 * Ensure that the controller is not in the running state 3673 * by checking every implemented port's PxCMD register 3674 */ 3675 AHCI_ADDR_SET_PORT(&addr, (uint8_t)port); 3676 3677 if (ahci_initialize_port(ahci_ctlp, ahci_portp, &addr) 3678 != AHCI_SUCCESS) { 3679 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 3680 "ahci_initialize_controller: failed to " 3681 "initialize port %d", port); 3682 /* 3683 * Set the port state to SATA_PSTATE_FAILED if 3684 * failed to initialize it. 3685 */ 3686 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 3687 } 3688 3689 mutex_exit(&ahci_portp->ahciport_mutex); 3690 } 3691 3692 /* Enable the whole controller interrupts */ 3693 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3694 ahci_enable_all_intrs(ahci_ctlp); 3695 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3696 3697 return (AHCI_SUCCESS); 3698 } 3699 3700 /* 3701 * Reverse of ahci_initialize_controller() 3702 * 3703 * We only need to stop the ports and disable the interrupt. 3704 */ 3705 static void 3706 ahci_uninitialize_controller(ahci_ctl_t *ahci_ctlp) 3707 { 3708 ahci_port_t *ahci_portp; 3709 int port; 3710 3711 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3712 "ahci_uninitialize_controller enter", NULL); 3713 3714 /* disable all the interrupts. */ 3715 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3716 ahci_disable_all_intrs(ahci_ctlp); 3717 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3718 3719 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 3720 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 3721 continue; 3722 } 3723 3724 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 3725 3726 /* Stop the port by clearing PxCMD.ST */ 3727 mutex_enter(&ahci_portp->ahciport_mutex); 3728 3729 /* 3730 * Here we must disable the port interrupt because 3731 * ahci_disable_all_intrs only clear GHC.IE, and IS 3732 * register will be still set if PxIE is enabled. 3733 * When ahci shares one IRQ with other drivers, the 3734 * intr handler may claim the intr mistakenly. 3735 */ 3736 ahci_disable_port_intrs(ahci_ctlp, port); 3737 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3738 ahci_portp, port); 3739 mutex_exit(&ahci_portp->ahciport_mutex); 3740 } 3741 } 3742 3743 /* 3744 * ahci_alloc_pmult() 3745 * 1. Setting HBA port registers which are necessary for a port multiplier. 3746 * (Set PxCMD.PMA while PxCMD.ST is '0') 3747 * 2. Allocate ahci_pmult_info structure. 3748 * 3749 * NOTE: Must stop port before the function is called. 3750 * WARNING!!! ahciport_mutex should be acquired before the function is 3751 * called. 3752 */ 3753 static void 3754 ahci_alloc_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 3755 { 3756 uint32_t port_cmd_status; 3757 uint8_t port = ahci_portp->ahciport_port_num; 3758 3759 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3760 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3761 3762 /* The port must have been stopped before. */ 3763 ASSERT(!(port_cmd_status & AHCI_CMD_STATUS_ST)); 3764 3765 if (!(port_cmd_status & AHCI_CMD_STATUS_PMA)) { 3766 /* set PMA bit */ 3767 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3768 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 3769 port_cmd_status|AHCI_CMD_STATUS_PMA); 3770 3771 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 3772 "ahci_alloc_pmult: " 3773 "PxCMD.PMA bit set at port %d.", port); 3774 } 3775 3776 /* Allocate port multiplier information structure */ 3777 if (ahci_portp->ahciport_pmult_info == NULL) { 3778 ahci_portp->ahciport_pmult_info = (ahci_pmult_info_t *) 3779 kmem_zalloc(sizeof (ahci_pmult_info_t), KM_SLEEP); 3780 } 3781 3782 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 3783 } 3784 3785 /* 3786 * ahci_dealloc_pmult() 3787 * 1. Clearing related registers when a port multiplier is detached. 3788 * (Clear PxCMD.PMA while PxCMD.ST is '0') 3789 * 2. Deallocate ahci_pmult_info structure. 3790 * 3791 * NOTE: Must stop port before the function is called. 3792 * WARNING!!! ahciport_mutex should be acquired before the function is 3793 * called. 3794 */ 3795 static void 3796 ahci_dealloc_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 3797 { 3798 uint32_t port_cmd_status; 3799 uint8_t port = ahci_portp->ahciport_port_num; 3800 3801 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3802 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3803 3804 if (port_cmd_status & AHCI_CMD_STATUS_PMA) { 3805 /* Clear PMA bit */ 3806 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 3807 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 3808 (port_cmd_status & (~AHCI_CMD_STATUS_PMA))); 3809 3810 AHCIDBG(AHCIDBG_INIT|AHCIDBG_PMULT, ahci_ctlp, 3811 "ahci_dealloc_pmult: " 3812 "PxCMD.PMA bit cleared at port %d.", port); 3813 } 3814 3815 /* Release port multiplier information structure */ 3816 if (ahci_portp->ahciport_pmult_info != NULL) { 3817 kmem_free(ahci_portp->ahciport_pmult_info, 3818 sizeof (ahci_pmult_info_t)); 3819 ahci_portp->ahciport_pmult_info = NULL; 3820 } 3821 } 3822 3823 /* 3824 * The routine is to initialize a port. First put the port in NOTRunning 3825 * state, then enable port interrupt and clear Serror register. And under 3826 * AHCI_ATTACH case, find device signature and then try to start the port. 3827 * 3828 * Called by 3829 * 1. ahci_initialize_controller 3830 * 2. ahci_intr_phyrdy_change (hotplug) 3831 * 3832 * WARNING!!! ahciport_mutex should be acquired before the function is called. 3833 */ 3834 static int 3835 ahci_initialize_port(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 3836 ahci_addr_t *addrp) 3837 { 3838 uint32_t port_sstatus, port_task_file, port_cmd_status; 3839 uint8_t port = addrp->aa_port; 3840 boolean_t resuming = B_TRUE; /* processing DDI_RESUME */ 3841 int ret; 3842 3843 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 3844 3845 /* AHCI_ADDR_PORT: We've no idea of the attached device here. */ 3846 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 3847 3848 /* 3849 * At the time being, only probe ports/devices and get the types of 3850 * attached devices during DDI_ATTACH. In fact, the device can be 3851 * changed during power state changes, but at the time being, we 3852 * don't support the situation. 3853 */ 3854 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) { 3855 resuming = B_FALSE; 3856 } else { 3857 /* check for DDI_RESUME case */ 3858 mutex_exit(&ahci_portp->ahciport_mutex); 3859 mutex_enter(&ahci_ctlp->ahcictl_mutex); 3860 if (ahci_ctlp->ahcictl_flags & AHCI_ATTACH) 3861 resuming = B_FALSE; 3862 mutex_exit(&ahci_ctlp->ahcictl_mutex); 3863 mutex_enter(&ahci_portp->ahciport_mutex); 3864 } 3865 3866 if (resuming) { 3867 /* 3868 * During the resume, we need to set the PxCLB, PxCLBU, PxFB 3869 * and PxFBU registers in case these registers were cleared 3870 * during the suspend. 3871 */ 3872 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 3873 "ahci_initialize_port: port %d " 3874 "set PxCLB, PxCLBU, PxFB and PxFBU " 3875 "during resume", port); 3876 3877 /* Config Port Received FIS Base Address */ 3878 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 3879 (uint64_t *)AHCI_PORT_PxFB(ahci_ctlp, port), 3880 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_laddress); 3881 3882 /* Config Port Command List Base Address */ 3883 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 3884 (uint64_t *)AHCI_PORT_PxCLB(ahci_ctlp, port), 3885 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_laddress); 3886 } 3887 3888 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3889 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 3890 3891 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 3892 "ahci_initialize_port: port %d ", port); 3893 3894 /* 3895 * Check whether the port is in NotRunning state, if not, 3896 * put the port in NotRunning state 3897 */ 3898 if (port_cmd_status & 3899 (AHCI_CMD_STATUS_ST | 3900 AHCI_CMD_STATUS_CR | 3901 AHCI_CMD_STATUS_FRE | 3902 AHCI_CMD_STATUS_FR)) { 3903 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 3904 ahci_portp, port); 3905 } 3906 3907 /* Disable interrupt */ 3908 ahci_disable_port_intrs(ahci_ctlp, port); 3909 3910 /* Device is unknown at first */ 3911 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 3912 3913 /* Disable the interface power management */ 3914 ahci_disable_interface_pm(ahci_ctlp, port); 3915 3916 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3917 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 3918 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 3919 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 3920 3921 /* Check physcial link status */ 3922 if (SSTATUS_GET_IPM(port_sstatus) == SSTATUS_IPM_NODEV_NOPHYCOM || 3923 SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_NOPHYCOM || 3924 3925 /* Check interface status */ 3926 port_task_file & AHCI_TFD_STS_BSY || 3927 port_task_file & AHCI_TFD_STS_DRQ || 3928 3929 /* Check whether port reset must be executed */ 3930 ahci_ctlp->ahcictl_cap & AHCI_CAP_INIT_PORT_RESET || 3931 3932 /* Always reset port on RESUME */ 3933 resuming != B_FALSE) { 3934 3935 /* Something went wrong, we need do some reset things */ 3936 ret = ahci_port_reset(ahci_ctlp, ahci_portp, addrp); 3937 3938 /* Does port reset succeed on HBA port? */ 3939 if (ret != AHCI_SUCCESS) { 3940 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 3941 "ahci_initialize_port:" 3942 "port reset faild at port %d", port); 3943 return (AHCI_FAILURE); 3944 } 3945 3946 /* Is port failed? */ 3947 if (AHCIPORT_GET_STATE(ahci_portp, addrp) & 3948 SATA_PSTATE_FAILED) { 3949 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 3950 "ahci_initialize_port: port %d state 0x%x", 3951 port, ahci_portp->ahciport_port_state); 3952 return (AHCI_FAILURE); 3953 } 3954 } 3955 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_READY); 3956 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "port %d is ready now.", port); 3957 3958 /* 3959 * Try to get the device signature if the port is not empty. 3960 */ 3961 if (!resuming && ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) 3962 ahci_find_dev_signature(ahci_ctlp, ahci_portp, addrp); 3963 3964 /* Return directly if no device connected */ 3965 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 3966 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3967 "No device connected to port %d", port); 3968 goto out; 3969 } 3970 3971 /* If this is a port multiplier, we need do some initialization */ 3972 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 3973 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 3974 "Port multiplier found at port %d", port); 3975 ahci_alloc_pmult(ahci_ctlp, ahci_portp); 3976 } 3977 3978 /* Try to start the port */ 3979 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 3980 != AHCI_SUCCESS) { 3981 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 3982 "failed to start port %d", port); 3983 return (AHCI_FAILURE); 3984 } 3985 out: 3986 /* Enable port interrupts */ 3987 ahci_enable_port_intrs(ahci_ctlp, port); 3988 3989 return (AHCI_SUCCESS); 3990 } 3991 3992 /* 3993 * Handle hardware defect, and check the capabilities. For example, 3994 * power management capabilty and MSI capability. 3995 */ 3996 static int 3997 ahci_config_space_init(ahci_ctl_t *ahci_ctlp) 3998 { 3999 ushort_t caps_ptr, cap_count, cap; 4000 #if AHCI_DEBUG 4001 ushort_t pmcap, pmcsr; 4002 ushort_t msimc; 4003 #endif 4004 uint8_t revision; 4005 4006 ahci_ctlp->ahcictl_venid = 4007 pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 4008 PCI_CONF_VENID); 4009 4010 ahci_ctlp->ahcictl_devid = 4011 pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 4012 PCI_CONF_DEVID); 4013 4014 /* 4015 * Modify dma_attr_align of ahcictl_buffer_dma_attr. For VT8251, those 4016 * controllers with 0x00 revision id work on 4-byte aligned buffer, 4017 * which is a bug and was fixed after 0x00 revision id controllers. 4018 * 4019 * Moreover, VT8251 cannot use multiple command slots in the command 4020 * list for non-queued commands because the previous register content 4021 * of PxCI can be re-written in the register write, so a flag will be 4022 * set to record this defect - AHCI_CAP_NO_MCMDLIST_NONQUEUE. 4023 * 4024 * For VT8251, software reset also has the same defect as the below 4025 * AMD/ATI chipset. That is, software reset will get failed if 0xf 4026 * is filled in pmport field. Therefore, another software reset need 4027 * to be done with 0 filled in pmport field. 4028 */ 4029 if (ahci_ctlp->ahcictl_venid == VIA_VENID) { 4030 revision = pci_config_get8(ahci_ctlp->ahcictl_pci_conf_handle, 4031 PCI_CONF_REVID); 4032 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4033 "revision id = 0x%x", revision); 4034 if (revision == 0x00) { 4035 ahci_ctlp->ahcictl_buffer_dma_attr.dma_attr_align = 0x4; 4036 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4037 "change ddi_attr_align to 0x4", NULL); 4038 } 4039 4040 ahci_ctlp->ahcictl_cap |= AHCI_CAP_NO_MCMDLIST_NONQUEUE; 4041 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4042 "VT8251 cannot use multiple command lists for " 4043 "non-queued commands", NULL); 4044 4045 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT; 4046 } 4047 4048 /* 4049 * AMD/ATI SB600 (0x1002,0x4380) AHCI chipset doesn't support 64-bit 4050 * DMA addressing for communication memory descriptors though S64A bit 4051 * of CAP register declares it supports. Even though 64-bit DMA for 4052 * data buffer works on ASUS M2A-VM with newer BIOS, three other 4053 * motherboards are known not, so both AHCI_CAP_BUF_32BIT_DMA and 4054 * AHCI_CAP_COMMU_32BIT_DMA are set for this controller. 4055 * 4056 * Due to certain hardware issue, the chipset must do port reset during 4057 * initialization, otherwise, when retrieving device signature, 4058 * software reset will get time out. So AHCI_CAP_INIT_PORT_RESET flag 4059 * need to set. 4060 * 4061 * For this chipset software reset will get failure if the pmport of 4062 * Register FIS was set with SATA_PMULT_HOSTPORT (0xf) and no port 4063 * multiplier is connected to the port. In order to fix the issue, 4064 * AHCI_CAP_SRST_NO_HOSTPORT flag need to be set, and once software 4065 * reset got failure, the driver will try to do another software reset 4066 * with pmport 0. 4067 */ 4068 if (ahci_ctlp->ahcictl_venid == 0x1002 && 4069 ahci_ctlp->ahcictl_devid == 0x4380) { 4070 ahci_ctlp->ahcictl_cap |= AHCI_CAP_BUF_32BIT_DMA; 4071 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 4072 ahci_ctlp->ahcictl_cap |= AHCI_CAP_INIT_PORT_RESET; 4073 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT; 4074 4075 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4076 "ATI SB600 cannot do 64-bit DMA for both data buffer and " 4077 "communication memory descriptors though CAP indicates " 4078 "support, so force it to use 32-bit DMA", NULL); 4079 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4080 "ATI SB600 need to do a port reset during initialization", 4081 NULL); 4082 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4083 "ATI SB600 will get software reset failure if pmport " 4084 "is set 0xf and no port multiplier is attached", NULL); 4085 } 4086 4087 /* 4088 * AMD/ATI SB700/710/750/800 and SP5100 AHCI chipset share the same 4089 * vendor ID and device ID (0x1002,0x4391). 4090 * 4091 * SB700/750 AHCI chipset on some boards doesn't support 64-bit 4092 * DMA addressing for communication memory descriptors though S64A bit 4093 * of CAP register declares the support. However, it does support 4094 * 64-bit DMA for data buffer. So only AHCI_CAP_COMMU_32BIT_DMA is 4095 * set for this controller. 4096 * 4097 * SB710 has the same initialization issue as SB600, so it also need 4098 * a port reset. That is AHCI_CAP_INIT_PORT_RESET need to set for it. 4099 * 4100 * SB700 also has the same issue about software reset, and thus 4101 * AHCI_CAP_SRST_NO_HOSTPORT flag also is needed. 4102 */ 4103 if (ahci_ctlp->ahcictl_venid == 0x1002 && 4104 ahci_ctlp->ahcictl_devid == 0x4391) { 4105 ahci_ctlp->ahcictl_cap |= AHCI_CAP_COMMU_32BIT_DMA; 4106 ahci_ctlp->ahcictl_cap |= AHCI_CAP_INIT_PORT_RESET; 4107 ahci_ctlp->ahcictl_cap |= AHCI_CAP_SRST_NO_HOSTPORT; 4108 4109 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4110 "ATI SB700/750 cannot do 64-bit DMA for communication " 4111 "memory descriptors though CAP indicates support, " 4112 "so force it to use 32-bit DMA", NULL); 4113 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4114 "ATI SB710 need to do a port reset during initialization", 4115 NULL); 4116 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4117 "ATI SB700 will get software reset failure if pmport " 4118 "is set 0xf and no port multiplier is attached", NULL); 4119 } 4120 4121 /* 4122 * Check if capabilities list is supported and if so, 4123 * get initial capabilities pointer and clear bits 0,1. 4124 */ 4125 if (pci_config_get16(ahci_ctlp->ahcictl_pci_conf_handle, 4126 PCI_CONF_STAT) & PCI_STAT_CAP) { 4127 caps_ptr = P2ALIGN(pci_config_get8( 4128 ahci_ctlp->ahcictl_pci_conf_handle, 4129 PCI_CONF_CAP_PTR), 4); 4130 } else { 4131 caps_ptr = PCI_CAP_NEXT_PTR_NULL; 4132 } 4133 4134 /* 4135 * Walk capabilities if supported. 4136 */ 4137 for (cap_count = 0; caps_ptr != PCI_CAP_NEXT_PTR_NULL; ) { 4138 4139 /* 4140 * Check that we haven't exceeded the maximum number of 4141 * capabilities and that the pointer is in a valid range. 4142 */ 4143 if (++cap_count > PCI_CAP_MAX_PTR) { 4144 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4145 "too many device capabilities", NULL); 4146 return (AHCI_FAILURE); 4147 } 4148 if (caps_ptr < PCI_CAP_PTR_OFF) { 4149 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4150 "capabilities pointer 0x%x out of range", 4151 caps_ptr); 4152 return (AHCI_FAILURE); 4153 } 4154 4155 /* 4156 * Get next capability and check that it is valid. 4157 * For now, we only support power management. 4158 */ 4159 cap = pci_config_get8(ahci_ctlp->ahcictl_pci_conf_handle, 4160 caps_ptr); 4161 switch (cap) { 4162 case PCI_CAP_ID_PM: 4163 4164 /* power management supported */ 4165 ahci_ctlp->ahcictl_cap |= AHCI_CAP_PM; 4166 4167 /* Save PMCSR offset */ 4168 ahci_ctlp->ahcictl_pmcsr_offset = caps_ptr + PCI_PMCSR; 4169 4170 #if AHCI_DEBUG 4171 pmcap = pci_config_get16( 4172 ahci_ctlp->ahcictl_pci_conf_handle, 4173 caps_ptr + PCI_PMCAP); 4174 pmcsr = pci_config_get16( 4175 ahci_ctlp->ahcictl_pci_conf_handle, 4176 ahci_ctlp->ahcictl_pmcsr_offset); 4177 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4178 "Power Management capability found PCI_PMCAP " 4179 "= 0x%x PCI_PMCSR = 0x%x", pmcap, pmcsr); 4180 if ((pmcap & 0x3) == 0x3) 4181 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4182 "PCI Power Management Interface " 4183 "spec 1.2 compliant", NULL); 4184 #endif 4185 break; 4186 4187 case PCI_CAP_ID_MSI: 4188 #if AHCI_DEBUG 4189 msimc = pci_config_get16( 4190 ahci_ctlp->ahcictl_pci_conf_handle, 4191 caps_ptr + PCI_MSI_CTRL); 4192 AHCIDBG(AHCIDBG_MSI, ahci_ctlp, 4193 "Message Signaled Interrupt capability found " 4194 "MSICAP_MC.MMC = 0x%x", (msimc & 0xe) >> 1); 4195 #endif 4196 AHCIDBG(AHCIDBG_MSI, ahci_ctlp, 4197 "MSI capability found", NULL); 4198 break; 4199 4200 case PCI_CAP_ID_PCIX: 4201 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4202 "PCI-X capability found", NULL); 4203 break; 4204 4205 case PCI_CAP_ID_PCI_E: 4206 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4207 "PCI Express capability found", NULL); 4208 break; 4209 4210 case PCI_CAP_ID_MSI_X: 4211 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4212 "MSI-X capability found", NULL); 4213 break; 4214 4215 case PCI_CAP_ID_SATA: 4216 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4217 "SATA capability found", NULL); 4218 break; 4219 4220 case PCI_CAP_ID_VS: 4221 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4222 "Vendor Specific capability found", NULL); 4223 break; 4224 4225 default: 4226 AHCIDBG(AHCIDBG_PM, ahci_ctlp, 4227 "unrecognized capability 0x%x", cap); 4228 break; 4229 } 4230 4231 /* 4232 * Get next capabilities pointer and clear bits 0,1. 4233 */ 4234 caps_ptr = P2ALIGN(pci_config_get8( 4235 ahci_ctlp->ahcictl_pci_conf_handle, 4236 (caps_ptr + PCI_CAP_NEXT_PTR)), 4); 4237 } 4238 4239 return (AHCI_SUCCESS); 4240 } 4241 4242 /* 4243 * Read/Write a register at port multiplier by SATA READ PORTMULT / SATA WRITE 4244 * PORTMULT command. SYNC & POLLING mode is used. 4245 * 4246 * WARNING!!! ahciport_mutex should be acquired before the function 4247 * is called. 4248 */ 4249 static int 4250 ahci_rdwr_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4251 uint8_t regn, uint32_t *pregv, uint8_t type) 4252 { 4253 ahci_port_t *ahci_portp; 4254 ahci_addr_t pmult_addr; 4255 sata_pkt_t *spkt; 4256 sata_cmd_t *scmd; 4257 sata_device_t sata_device; 4258 uint8_t port = addrp->aa_port; 4259 uint8_t pmport = addrp->aa_pmport; 4260 uint8_t cport; 4261 uint32_t intr_mask; 4262 int rval; 4263 char portstr[10]; 4264 4265 SET_PORTSTR(portstr, addrp); 4266 cport = ahci_ctlp->ahcictl_port_to_cport[port]; 4267 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 4268 4269 ASSERT(AHCI_ADDR_IS_PMPORT(addrp) || AHCI_ADDR_IS_PMULT(addrp)); 4270 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 4271 4272 /* Check the existence of the port multiplier */ 4273 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) 4274 return (AHCI_FAILURE); 4275 4276 /* Request a READ/WRITE PORTMULT sata packet. */ 4277 bzero(&sata_device, sizeof (sata_device_t)); 4278 sata_device.satadev_addr.cport = cport; 4279 sata_device.satadev_addr.pmport = pmport; 4280 sata_device.satadev_addr.qual = SATA_ADDR_PMULT; 4281 sata_device.satadev_rev = SATA_DEVICE_REV; 4282 4283 /* 4284 * Make sure no command is outstanding here. All R/W PMULT requests 4285 * come from 4286 * 4287 * 1. ahci_attach() 4288 * The port should be empty. 4289 * 4290 * 2. ahci_tran_probe_port() 4291 * Any request from SATA framework (via ahci_tran_start) should be 4292 * rejected if R/W PMULT command is outstanding. 4293 * 4294 * If we are doing mopping, do not check those flags because no 4295 * command will be actually outstanding. 4296 * 4297 * If the port has been occupied by any other commands, the probe 4298 * function will return a SATA_RETRY. SATA framework will retry 4299 * later. 4300 */ 4301 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 4302 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4303 "R/W PMULT failed: R/W PMULT in progress at port %d.", 4304 port, ahci_portp->ahciport_flags); 4305 return (AHCI_FAILURE); 4306 } 4307 4308 if (!(ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) && ( 4309 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 4310 NCQ_CMD_IN_PROGRESS(ahci_portp) || 4311 NON_NCQ_CMD_IN_PROGRESS(ahci_portp))) { 4312 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4313 "R/W PMULT failed: port %d is occupied (flags 0x%x).", 4314 port, ahci_portp->ahciport_flags); 4315 return (AHCI_FAILURE); 4316 } 4317 4318 /* 4319 * The port multiplier is gone. This may happen when 4320 * 1. Cutting off the power of an enclosure. The device lose the power 4321 * before port multiplier. 4322 * 2. Disconnecting the port multiplier during hot-plugging a sub-drive. 4323 * 4324 * The issued command should be aborted and the following command 4325 * should not be continued. 4326 */ 4327 if (!(ahci_portp->ahciport_port_state & SATA_STATE_READY)) { 4328 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4329 "READ/WRITE PMULT failed: " 4330 "port-mult is removed from port %d", port); 4331 return (AHCI_FAILURE); 4332 } 4333 4334 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RDWR_PMULT; 4335 4336 spkt = sata_get_rdwr_pmult_pkt(ahci_ctlp->ahcictl_dip, 4337 &sata_device, regn, *pregv, type); 4338 4339 /* 4340 * READ/WRITE PORTMULT command is intended to sent to the control port 4341 * of the port multiplier. 4342 */ 4343 AHCI_ADDR_SET_PMULT(&pmult_addr, addrp->aa_port); 4344 4345 ahci_portp->ahciport_rdwr_pmult_pkt = spkt; 4346 4347 /* No interrupt here. Store the interrupt enable mask. */ 4348 intr_mask = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4349 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port)); 4350 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4351 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 0); 4352 4353 rval = ahci_do_sync_start(ahci_ctlp, ahci_portp, &pmult_addr, spkt); 4354 4355 if (rval == AHCI_SUCCESS && 4356 spkt->satapkt_reason == SATA_PKT_COMPLETED) { 4357 if (type == SATA_RDWR_PMULT_PKT_TYPE_READ) { 4358 scmd = &spkt->satapkt_cmd; 4359 *pregv = scmd->satacmd_lba_high_lsb << 24 | 4360 scmd->satacmd_lba_mid_lsb << 16 | 4361 scmd->satacmd_lba_low_lsb << 8 | 4362 scmd->satacmd_sec_count_lsb; 4363 } 4364 } else { 4365 /* Failed or not completed. */ 4366 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4367 "ahci_rdwr_pmult: cannot [%s] %s[%d] at port %s", 4368 type == SATA_RDWR_PMULT_PKT_TYPE_READ?"Read":"Write", 4369 AHCI_ADDR_IS_PMULT(addrp)?"gscr":"pscr", regn, portstr); 4370 rval = AHCI_FAILURE; 4371 } 4372 out: 4373 /* Restore the interrupt mask */ 4374 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4375 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), intr_mask); 4376 4377 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_RDWR_PMULT; 4378 ahci_portp->ahciport_rdwr_pmult_pkt = NULL; 4379 sata_free_rdwr_pmult_pkt(spkt); 4380 return (rval); 4381 } 4382 4383 static int 4384 ahci_read_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4385 uint8_t regn, uint32_t *pregv) 4386 { 4387 return ahci_rdwr_pmult(ahci_ctlp, addrp, regn, pregv, 4388 SATA_RDWR_PMULT_PKT_TYPE_READ); 4389 } 4390 4391 static int 4392 ahci_write_pmult(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4393 uint8_t regn, uint32_t regv) 4394 { 4395 return ahci_rdwr_pmult(ahci_ctlp, addrp, regn, ®v, 4396 SATA_RDWR_PMULT_PKT_TYPE_WRITE); 4397 } 4398 4399 #define READ_PMULT(addrp, r, pv, out) \ 4400 if (ahci_read_pmult(ahci_ctlp, addrp, r, pv) != AHCI_SUCCESS) \ 4401 goto out; 4402 4403 #define WRITE_PMULT(addrp, r, v, out) \ 4404 if (ahci_write_pmult(ahci_ctlp, addrp, r, v) != AHCI_SUCCESS) \ 4405 goto out; 4406 4407 /* 4408 * Update sata registers on port multiplier, including GSCR/PSCR registers. 4409 * ahci_update_pmult_gscr() 4410 * ahci_update_pmult_pscr() 4411 * 4412 * WARNING!!! ahciport_mutex should be acquired before those functions 4413 * get called. 4414 */ 4415 static int 4416 ahci_update_pmult_gscr(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4417 sata_pmult_gscr_t *sg) 4418 { 4419 READ_PMULT(addrp, SATA_PMULT_GSCR0, &sg->gscr0, err); 4420 READ_PMULT(addrp, SATA_PMULT_GSCR1, &sg->gscr1, err); 4421 READ_PMULT(addrp, SATA_PMULT_GSCR2, &sg->gscr2, err); 4422 READ_PMULT(addrp, SATA_PMULT_GSCR64, &sg->gscr64, err); 4423 4424 return (AHCI_SUCCESS); 4425 4426 err: /* R/W PMULT error */ 4427 return (AHCI_FAILURE); 4428 } 4429 4430 static int 4431 ahci_update_pmult_pscr(ahci_ctl_t *ahci_ctlp, ahci_addr_t *addrp, 4432 sata_device_t *sd) 4433 { 4434 ASSERT(AHCI_ADDR_IS_PMPORT(addrp)); 4435 4436 READ_PMULT(addrp, SATA_PMULT_REG_SSTS, &sd->satadev_scr.sstatus, err); 4437 READ_PMULT(addrp, SATA_PMULT_REG_SERR, &sd->satadev_scr.serror, err); 4438 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &sd->satadev_scr.scontrol, err); 4439 READ_PMULT(addrp, SATA_PMULT_REG_SACT, &sd->satadev_scr.sactive, err); 4440 4441 return (AHCI_SUCCESS); 4442 4443 err: /* R/W PMULT error */ 4444 return (AHCI_FAILURE); 4445 } 4446 4447 /* 4448 * ahci_initialize_pmult() 4449 * 4450 * Initialize a port multiplier, including 4451 * 1. Enable FEATURES register at port multiplier. (SATA Chp.16) 4452 * 2. Redefine MASK register. (SATA Chap 16.?) 4453 * 4454 * WARNING!!! ahciport_mutex should be acquired before the function 4455 * is called. 4456 */ 4457 static int 4458 ahci_initialize_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4459 ahci_addr_t *addrp, sata_device_t *sd) 4460 { 4461 sata_pmult_gscr_t sg; 4462 uint32_t gscr64; 4463 uint8_t port = addrp->aa_port; 4464 4465 ASSERT(mutex_owned(&ahci_portp->ahciport_mutex)); 4466 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4467 "[Initialize] Port-multiplier at port %d.", port); 4468 4469 /* 4470 * Enable features of port multiplier. Currently only 4471 * Asynchronous Notification is enabled. 4472 */ 4473 /* Check gscr64 for supported features. */ 4474 READ_PMULT(addrp, SATA_PMULT_GSCR64, &gscr64, err); 4475 4476 if (gscr64 & SATA_PMULT_CAP_SNOTIF) { 4477 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4478 "port %d: Port Multiplier supports " 4479 "Asynchronous Notification.", port); 4480 4481 /* Write to gscr96 to enabled features */ 4482 WRITE_PMULT(addrp, SATA_PMULT_GSCR96, 4483 SATA_PMULT_CAP_SNOTIF, err); 4484 4485 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4486 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 4487 AHCI_SNOTIF_CLEAR_ALL); 4488 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4489 "port %d: PMult PxSNTF cleared.", port); 4490 4491 } 4492 4493 /* 4494 * Now we need to update gscr33 register to enable hot-plug interrupt 4495 * for sub devices behind port multiplier. 4496 */ 4497 WRITE_PMULT(addrp, SATA_PMULT_GSCR33, (0x1ffff), err); 4498 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4499 "port %d: gscr33 mask set to %x.", port, (0x1ffff)); 4500 4501 /* 4502 * Fetch the number of device ports of the port multiplier 4503 */ 4504 if (ahci_update_pmult_gscr(ahci_ctlp, addrp, &sg) != AHCI_SUCCESS) 4505 return (AHCI_FAILURE); 4506 4507 /* Register the port multiplier to SATA Framework. */ 4508 mutex_exit(&ahci_portp->ahciport_mutex); 4509 sata_register_pmult(ahci_ctlp->ahcictl_dip, sd, &sg); 4510 mutex_enter(&ahci_portp->ahciport_mutex); 4511 4512 ahci_portp->ahciport_pmult_info->ahcipmi_num_dev_ports = 4513 sd->satadev_add_info & SATA_PMULT_PORTNUM_MASK; 4514 4515 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 4516 "port %d: pmult sub-port number updated to %x.", port, 4517 ahci_portp->ahciport_pmult_info->ahcipmi_num_dev_ports); 4518 4519 /* Till now port-mult is successfully initialized */ 4520 ahci_portp->ahciport_port_state |= SATA_DSTATE_PMULT_INIT; 4521 return (AHCI_SUCCESS); 4522 4523 err: /* R/W PMULT error */ 4524 return (AHCI_FAILURE); 4525 } 4526 4527 /* 4528 * Initialize a port multiplier port. According to spec, firstly we need 4529 * issue a COMRESET, then a software reset to get its signature. 4530 * 4531 * NOTE: This function should only be called in ahci_probe_pmport() 4532 * WARNING!!! ahciport_mutex should be acquired before the function. 4533 */ 4534 static int 4535 ahci_initialize_pmport(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4536 ahci_addr_t *addrp) 4537 { 4538 uint32_t finished_tags = 0, reset_tags = 0, slot_status = 0; 4539 uint8_t port = addrp->aa_port; 4540 uint8_t pmport = addrp->aa_pmport; 4541 int ret = AHCI_FAILURE; 4542 4543 ASSERT(AHCI_ADDR_IS_PMPORT(addrp)); 4544 4545 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 4546 "ahci_initialize_pmport: port %d:%d", port, pmport); 4547 4548 /* Check HBA port state */ 4549 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED) { 4550 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 4551 "ahci_initialize_pmport:" 4552 "port %d:%d Port Multiplier is failed.", 4553 port, pmport); 4554 return (AHCI_FAILURE); 4555 } 4556 4557 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_HOTPLUG) { 4558 return (AHCI_FAILURE); 4559 } 4560 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_HOTPLUG; 4561 4562 /* Checking for outstanding commands */ 4563 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 4564 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4565 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 4566 reset_tags = slot_status & AHCI_SLOT_MASK(ahci_ctlp); 4567 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 4568 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4569 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 4570 reset_tags = slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 4571 } 4572 4573 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 4574 ahci_portp->ahciport_mop_in_progress++; 4575 4576 /* Clear status */ 4577 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_UNKNOWN); 4578 4579 /* Firstly assume an unknown device */ 4580 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 4581 4582 ahci_disable_port_intrs(ahci_ctlp, port); 4583 4584 /* port reset is necessary for port multiplier port */ 4585 if (ahci_pmport_reset(ahci_ctlp, ahci_portp, addrp) != AHCI_SUCCESS) { 4586 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ERRS, ahci_ctlp, 4587 "ahci_initialize_pmport:" 4588 "port reset failed at port %d:%d", 4589 port, pmport); 4590 goto out; 4591 } 4592 4593 /* Is port failed? */ 4594 if (AHCIPORT_GET_STATE(ahci_portp, addrp) & 4595 SATA_PSTATE_FAILED) { 4596 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4597 "ahci_initialize_pmport: port %d:%d failed. " 4598 "state = 0x%x", port, pmport, 4599 ahci_portp->ahciport_port_state); 4600 goto out; 4601 } 4602 4603 /* Is there any device attached? */ 4604 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, addrp) 4605 == SATA_DTYPE_NONE) { 4606 /* Do not waste time on an empty port */ 4607 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 4608 "ahci_initialize_pmport: No device is found " 4609 "at port %d:%d", port, pmport); 4610 ret = AHCI_SUCCESS; 4611 goto out; 4612 } 4613 4614 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_STATE_READY); 4615 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 4616 "port %d:%d is ready now.", port, pmport); 4617 4618 /* 4619 * Till now we can assure a device attached to that HBA port and work 4620 * correctly. Now try to get the device signature. This is an optional 4621 * step. If failed, unknown device is assumed, then SATA module will 4622 * continue to use IDENTIFY DEVICE to get the information of the 4623 * device. 4624 */ 4625 ahci_find_dev_signature(ahci_ctlp, ahci_portp, addrp); 4626 4627 ret = AHCI_SUCCESS; 4628 4629 out: 4630 /* Next try to mop the pending commands */ 4631 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) 4632 finished_tags = ahci_portp->ahciport_pending_tags & 4633 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 4634 else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) 4635 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 4636 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 4637 reset_tags &= ~finished_tags; 4638 4639 ahci_mop_commands(ahci_ctlp, 4640 ahci_portp, 4641 slot_status, 4642 0, /* failed tags */ 4643 0, /* timeout tags */ 4644 0, /* aborted tags */ 4645 reset_tags); /* reset tags */ 4646 4647 /* Clear PxSNTF register if supported. */ 4648 if (ahci_ctlp->ahcictl_cap & AHCI_CAP_SNTF) { 4649 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4650 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 4651 AHCI_SNOTIF_CLEAR_ALL); 4652 } 4653 4654 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_HOTPLUG; 4655 ahci_enable_port_intrs(ahci_ctlp, port); 4656 return (ret); 4657 } 4658 4659 /* 4660 * ahci_probe_pmult() 4661 * 4662 * This function will be called to probe a port multiplier, which will 4663 * handle hotplug events on port multiplier ports. 4664 * 4665 * NOTE: Only called from ahci_tran_probe_port() 4666 * WARNING!!! ahciport_mutex should be acquired before the function is called. 4667 */ 4668 static int 4669 ahci_probe_pmult(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4670 ahci_addr_t *addrp) 4671 { 4672 sata_device_t sdevice; 4673 ahci_addr_t pmport_addr; 4674 uint32_t gscr32, port_hotplug_tags; 4675 uint32_t pmport_sstatus; 4676 int dev_exists_now = 0, dev_existed_previously = 0; 4677 uint8_t port = addrp->aa_port; 4678 int npmport; 4679 4680 /* The bits in GSCR32 refers to the pmport that has a hot-plug event. */ 4681 READ_PMULT(addrp, SATA_PMULT_GSCR32, &gscr32, err); 4682 port_hotplug_tags = gscr32 & AHCI_PMPORT_MASK(ahci_portp); 4683 4684 do { 4685 npmport = ddi_ffs(port_hotplug_tags) - 1; 4686 if (npmport == -1) 4687 /* no pending hot plug events. */ 4688 return (AHCI_SUCCESS); 4689 4690 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4691 "hot-plug event at port %d:%d", port, npmport); 4692 4693 AHCI_ADDR_SET_PMPORT(&pmport_addr, port, (uint8_t)npmport); 4694 4695 /* Check previous device at that port */ 4696 if (AHCIPORT_GET_DEV_TYPE(ahci_portp, &pmport_addr) 4697 != SATA_DTYPE_NONE) 4698 dev_existed_previously = 1; 4699 4700 /* PxSStatus tells the presence of device. */ 4701 READ_PMULT(&pmport_addr, SATA_PMULT_REG_SSTS, 4702 &pmport_sstatus, err); 4703 4704 if (SSTATUS_GET_DET(pmport_sstatus) == 4705 SSTATUS_DET_DEVPRE_PHYCOM) 4706 dev_exists_now = 1; 4707 4708 /* 4709 * Clear PxSERR is critical. The transition from 0 to 1 will 4710 * emit a FIS which generates an asynchronous notification 4711 * event at controller. If we fail to clear the PxSERR, the 4712 * Async Notif events will no longer be activated on this 4713 * pmport. 4714 */ 4715 WRITE_PMULT(&pmport_addr, SATA_PMULT_REG_SERR, 4716 AHCI_SERROR_CLEAR_ALL, err); 4717 4718 bzero((void *)&sdevice, sizeof (sata_device_t)); 4719 sdevice.satadev_addr.cport = ahci_ctlp-> 4720 ahcictl_port_to_cport[port]; 4721 sdevice.satadev_addr.qual = SATA_ADDR_PMPORT; 4722 sdevice.satadev_addr.pmport = (uint8_t)npmport; 4723 sdevice.satadev_state = SATA_PSTATE_PWRON; 4724 4725 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4726 "[Existence] %d -> %d", dev_existed_previously, 4727 dev_exists_now); 4728 4729 if (dev_exists_now) { 4730 if (dev_existed_previously) { 4731 /* Link (may) not change: Exist -> Exist * */ 4732 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 4733 "ahci_probe_pmult: port %d:%d " 4734 "device link lost/established", 4735 port, npmport); 4736 4737 mutex_exit(&ahci_portp->ahciport_mutex); 4738 sata_hba_event_notify( 4739 ahci_ctlp->ahcictl_sata_hba_tran-> 4740 sata_tran_hba_dip, 4741 &sdevice, 4742 SATA_EVNT_LINK_LOST| 4743 SATA_EVNT_LINK_ESTABLISHED); 4744 mutex_enter(&ahci_portp->ahciport_mutex); 4745 } else { 4746 /* Link change: None -> Exist */ 4747 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4748 "ahci_probe_pmult: port %d:%d " 4749 "device link established", port, npmport); 4750 4751 /* Clear port state */ 4752 AHCIPORT_SET_STATE(ahci_portp, &pmport_addr, 4753 SATA_STATE_UNKNOWN); 4754 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4755 "ahci_probe_pmult: port %d " 4756 "ahciport_port_state [Cleared].", port); 4757 4758 mutex_exit(&ahci_portp->ahciport_mutex); 4759 sata_hba_event_notify( 4760 ahci_ctlp->ahcictl_sata_hba_tran-> 4761 sata_tran_hba_dip, 4762 &sdevice, 4763 SATA_EVNT_LINK_ESTABLISHED); 4764 mutex_enter(&ahci_portp->ahciport_mutex); 4765 } 4766 } else { /* No device exists now */ 4767 if (dev_existed_previously) { 4768 4769 /* Link change: Exist -> None */ 4770 AHCIDBG(AHCIDBG_EVENT|AHCIDBG_PMULT, ahci_ctlp, 4771 "ahci_probe_pmult: port %d:%d " 4772 "device link lost", port, npmport); 4773 4774 /* An existing device is lost. */ 4775 AHCIPORT_SET_STATE(ahci_portp, &pmport_addr, 4776 SATA_STATE_UNKNOWN); 4777 AHCIPORT_SET_DEV_TYPE(ahci_portp, &pmport_addr, 4778 SATA_DTYPE_NONE); 4779 4780 mutex_exit(&ahci_portp->ahciport_mutex); 4781 sata_hba_event_notify( 4782 ahci_ctlp->ahcictl_sata_hba_tran-> 4783 sata_tran_hba_dip, 4784 &sdevice, 4785 SATA_EVNT_LINK_LOST); 4786 mutex_enter(&ahci_portp->ahciport_mutex); 4787 } 4788 } 4789 4790 CLEAR_BIT(port_hotplug_tags, npmport); 4791 } while (port_hotplug_tags != 0); 4792 4793 return (AHCI_SUCCESS); 4794 4795 err: /* R/W PMULT error */ 4796 return (AHCI_FAILURE); 4797 } 4798 4799 /* 4800 * Probe and initialize a port multiplier port. 4801 * A port multiplier port could only be initilaizer here. 4802 * 4803 * WARNING!!! ahcictl_mutex should be acquired before the function 4804 * is called. 4805 */ 4806 static int 4807 ahci_probe_pmport(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4808 ahci_addr_t *addrp, sata_device_t *sd) 4809 { 4810 uint32_t port_state; 4811 uint8_t port = addrp->aa_port; 4812 ahci_addr_t addr_pmult; 4813 4814 /* 4815 * Check the parent - port multiplier first. 4816 */ 4817 4818 /* 4819 * Parent port multiplier might have been removed. This event will be 4820 * ignored and failure. 4821 */ 4822 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE || 4823 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 4824 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4825 "ahci_tran_probe_port: " 4826 "parent device removed, ignore event.", NULL); 4827 4828 return (AHCI_FAILURE); 4829 } 4830 4831 /* The port is ready? */ 4832 port_state = ahci_portp->ahciport_port_state; 4833 if (!(port_state & SATA_STATE_READY)) { 4834 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4835 "ahci_tran_probe_port: " 4836 "parent port-mult is NOT ready.", NULL); 4837 4838 if (ahci_restart_port_wait_till_ready(ahci_ctlp, 4839 ahci_portp, port, AHCI_PORT_RESET, NULL) != 4840 AHCI_SUCCESS) { 4841 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 4842 "ahci_tran_probe_port: " 4843 "restart port-mult failed.", NULL); 4844 return (AHCI_FAILURE); 4845 } 4846 } 4847 4848 /* 4849 * If port-mult is restarted due to some reason, we need 4850 * re-initialized the PMult. 4851 */ 4852 if (!(port_state & SATA_DSTATE_PMULT_INIT)) { 4853 /* Initialize registers on a port multiplier */ 4854 AHCI_ADDR_SET_PMULT(&addr_pmult, addrp->aa_port); 4855 if (ahci_initialize_pmult(ahci_ctlp, ahci_portp, 4856 &addr_pmult, sd) != AHCI_SUCCESS) 4857 return (AHCI_FAILURE); 4858 } 4859 4860 /* 4861 * Then we check the port-mult port 4862 */ 4863 /* Is this pmport initialized? */ 4864 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 4865 if (!(port_state & SATA_STATE_READY)) { 4866 4867 /* ahci_initialize_pmport() will set READY state */ 4868 if (ahci_initialize_pmport(ahci_ctlp, 4869 ahci_portp, addrp) != AHCI_SUCCESS) 4870 return (AHCI_FAILURE); 4871 } 4872 4873 return (AHCI_SUCCESS); 4874 } 4875 4876 /* 4877 * AHCI device reset ...; a single device on one of the ports is reset, 4878 * but the HBA and physical communication remain intact. This is the 4879 * least intrusive. 4880 * 4881 * When issuing a software reset sequence, there should not be other 4882 * commands in the command list, so we will first clear and then re-set 4883 * PxCMD.ST to clear PxCI. And before issuing the software reset, 4884 * the port must be idle and PxTFD.STS.BSY and PxTFD.STS.DRQ must be 4885 * cleared unless command list override (PxCMD.CLO) is supported. 4886 * 4887 * WARNING!!! ahciport_mutex should be acquired and PxCMD.FRE should be 4888 * set before the function is called. 4889 */ 4890 static int 4891 ahci_software_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 4892 ahci_addr_t *addrp) 4893 { 4894 ahci_fis_h2d_register_t *h2d_register_fisp; 4895 ahci_cmd_table_t *cmd_table; 4896 ahci_cmd_header_t *cmd_header; 4897 uint32_t port_cmd_status, port_cmd_issue, port_task_file; 4898 int slot, loop_count; 4899 uint8_t port = addrp->aa_port; 4900 uint8_t pmport = addrp->aa_pmport; 4901 int rval = AHCI_FAILURE; 4902 4903 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 4904 "port %d:%d device software resetting (FIS)", port, pmport); 4905 4906 /* First clear PxCMD.ST (AHCI v1.2 10.4.1) */ 4907 if (ahci_put_port_into_notrunning_state(ahci_ctlp, ahci_portp, 4908 port) != AHCI_SUCCESS) { 4909 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4910 "ahci_software_reset: cannot stop HBA port %d.", port); 4911 goto out; 4912 } 4913 4914 /* Check PxTFD.STS.BSY and PxTFD.STS.DRQ */ 4915 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4916 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 4917 4918 if (port_task_file & AHCI_TFD_STS_BSY || 4919 port_task_file & AHCI_TFD_STS_DRQ) { 4920 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_SCLO)) { 4921 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4922 "PxTFD.STS.BSY/DRQ is set (PxTFD=0x%x), " 4923 "cannot issue a software reset.", port_task_file); 4924 goto out; 4925 } 4926 4927 /* 4928 * If HBA Support CLO, as Command List Override (CAP.SCLO is 4929 * set), PxCMD.CLO bit should be set before set PxCMD.ST, in 4930 * order to clear PxTFD.STS.BSY and PxTFD.STS.DRQ. 4931 */ 4932 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4933 "PxTFD.STS.BSY/DRQ is set, try SCLO.", NULL) 4934 4935 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4936 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4937 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 4938 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 4939 port_cmd_status|AHCI_CMD_STATUS_CLO); 4940 4941 /* Waiting till PxCMD.SCLO bit is cleared */ 4942 loop_count = 0; 4943 do { 4944 /* Wait for 10 millisec */ 4945 drv_usecwait(AHCI_10MS_USECS); 4946 4947 /* We are effectively timing out after 1 sec. */ 4948 if (loop_count++ > 100) { 4949 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4950 "SCLO time out. port %d is busy.", port); 4951 goto out; 4952 } 4953 4954 port_cmd_status = 4955 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4956 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 4957 } while (port_cmd_status & AHCI_CMD_STATUS_CLO); 4958 4959 /* Re-check */ 4960 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 4961 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 4962 if (port_task_file & AHCI_TFD_STS_BSY || 4963 port_task_file & AHCI_TFD_STS_DRQ) { 4964 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4965 "SCLO cannot clear PxTFD.STS.BSY/DRQ (PxTFD=0x%x)", 4966 port_task_file); 4967 goto out; 4968 } 4969 } 4970 4971 /* Then start port */ 4972 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 4973 != AHCI_SUCCESS) { 4974 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 4975 "ahci_software_reset: cannot start AHCI port %d.", port); 4976 goto out; 4977 } 4978 4979 /* 4980 * When ahci_port.ahciport_mop_in_progress is set, A non-zero 4981 * ahci_port.ahciport_pending_ncq_tags may fail 4982 * ahci_claim_free_slot(). Actually according to spec, by clearing 4983 * PxCMD.ST there is no command outstanding while executing software 4984 * reseting. Hence we directly use slot 0 instead of 4985 * ahci_claim_free_slot(). 4986 */ 4987 slot = 0; 4988 4989 /* Now send the first H2D Register FIS with SRST set to 1 */ 4990 cmd_table = ahci_portp->ahciport_cmd_tables[slot]; 4991 bzero((void *)cmd_table, ahci_cmd_table_size); 4992 4993 h2d_register_fisp = 4994 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 4995 4996 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 4997 SET_FIS_PMP(h2d_register_fisp, pmport); 4998 SET_FIS_DEVCTL(h2d_register_fisp, SATA_DEVCTL_SRST); 4999 5000 /* Set Command Header in Command List */ 5001 cmd_header = &ahci_portp->ahciport_cmd_list[slot]; 5002 BZERO_DESCR_INFO(cmd_header); 5003 BZERO_PRD_BYTE_COUNT(cmd_header); 5004 SET_COMMAND_FIS_LENGTH(cmd_header, 5); 5005 SET_PORT_MULTI_PORT(cmd_header, pmport); 5006 5007 SET_CLEAR_BUSY_UPON_R_OK(cmd_header, 1); 5008 SET_RESET(cmd_header, 1); 5009 SET_WRITE(cmd_header, 1); 5010 5011 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_tables_dma_handle[slot], 5012 0, 5013 ahci_cmd_table_size, 5014 DDI_DMA_SYNC_FORDEV); 5015 5016 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 5017 slot * sizeof (ahci_cmd_header_t), 5018 sizeof (ahci_cmd_header_t), 5019 DDI_DMA_SYNC_FORDEV); 5020 5021 /* Indicate to the HBA that a command is active. */ 5022 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5023 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 5024 (0x1 << slot)); 5025 5026 loop_count = 0; 5027 5028 /* Loop till the first command is finished */ 5029 do { 5030 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5031 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 5032 5033 /* We are effectively timing out after 1 sec. */ 5034 if (loop_count++ > AHCI_POLLRATE_PORT_SOFTRESET) { 5035 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5036 "the first SRST FIS is timed out, " 5037 "loop_count = %d", loop_count); 5038 goto out; 5039 } 5040 /* Wait for 10 millisec */ 5041 drv_usecwait(AHCI_10MS_USECS); 5042 } while (port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp) & (0x1 << slot)); 5043 5044 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5045 "ahci_software_reset: 1st loop count: %d, " 5046 "port_cmd_issue = 0x%x, slot = 0x%x", 5047 loop_count, port_cmd_issue, slot); 5048 5049 /* According to ATA spec, we need wait at least 5 microsecs here. */ 5050 drv_usecwait(AHCI_1MS_USECS); 5051 5052 /* Now send the second H2D Register FIS with SRST cleard to zero */ 5053 cmd_table = ahci_portp->ahciport_cmd_tables[slot]; 5054 bzero((void *)cmd_table, ahci_cmd_table_size); 5055 5056 h2d_register_fisp = 5057 &(cmd_table->ahcict_command_fis.ahcifc_fis.ahcifc_h2d_register); 5058 5059 SET_FIS_TYPE(h2d_register_fisp, AHCI_H2D_REGISTER_FIS_TYPE); 5060 SET_FIS_PMP(h2d_register_fisp, pmport); 5061 5062 /* Set Command Header in Command List */ 5063 cmd_header = &ahci_portp->ahciport_cmd_list[slot]; 5064 BZERO_DESCR_INFO(cmd_header); 5065 BZERO_PRD_BYTE_COUNT(cmd_header); 5066 SET_COMMAND_FIS_LENGTH(cmd_header, 5); 5067 SET_PORT_MULTI_PORT(cmd_header, pmport); 5068 5069 SET_WRITE(cmd_header, 1); 5070 5071 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_tables_dma_handle[slot], 5072 0, 5073 ahci_cmd_table_size, 5074 DDI_DMA_SYNC_FORDEV); 5075 5076 (void) ddi_dma_sync(ahci_portp->ahciport_cmd_list_dma_handle, 5077 slot * sizeof (ahci_cmd_header_t), 5078 sizeof (ahci_cmd_header_t), 5079 DDI_DMA_SYNC_FORDEV); 5080 5081 /* Indicate to the HBA that a command is active. */ 5082 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5083 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port), 5084 (0x1 << slot)); 5085 5086 loop_count = 0; 5087 5088 /* Loop till the second command is finished */ 5089 do { 5090 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5091 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 5092 5093 /* We are effectively timing out after 1 sec. */ 5094 if (loop_count++ > AHCI_POLLRATE_PORT_SOFTRESET) { 5095 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5096 "the second SRST FIS is timed out, " 5097 "loop_count = %d", loop_count); 5098 goto out; 5099 } 5100 5101 /* Wait for 10 millisec */ 5102 drv_usecwait(AHCI_10MS_USECS); 5103 } while (port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp) & (0x1 << slot)); 5104 5105 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5106 "ahci_software_reset: 2nd loop count: %d, " 5107 "port_cmd_issue = 0x%x, slot = 0x%x", 5108 loop_count, port_cmd_issue, slot); 5109 5110 if ((ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) || 5111 (ahci_check_port_handle(ahci_ctlp, port) != DDI_SUCCESS)) { 5112 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 5113 DDI_SERVICE_UNAFFECTED); 5114 goto out; 5115 } 5116 5117 rval = AHCI_SUCCESS; 5118 out: 5119 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5120 "ahci_software_reset: %s at port %d:%d", 5121 rval == AHCI_SUCCESS ? "succeed" : "failed", 5122 port, pmport); 5123 5124 return (rval); 5125 } 5126 5127 /* 5128 * AHCI port reset ...; the physical communication between the HBA and device 5129 * on a port are disabled. This is more intrusive. 5130 * 5131 * When an HBA or port reset occurs, Phy communication is going to 5132 * be re-established with the device through a COMRESET followed by the 5133 * normal out-of-band communication sequence defined in Serial ATA. AT 5134 * the end of reset, the device, if working properly, will send a D2H 5135 * Register FIS, which contains the device signature. When the HBA receives 5136 * this FIS, it updates PxTFD.STS and PxTFD.ERR register fields, and updates 5137 * the PxSIG register with the signature. 5138 * 5139 * Staggered spin-up is an optional feature in SATA II, and it enables an HBA 5140 * to individually spin-up attached devices. Please refer to chapter 10.9 of 5141 * AHCI 1.0 spec. 5142 */ 5143 /* 5144 * WARNING!!! ahciport_mutex should be acquired, and PxCMD.ST should be also 5145 * cleared before the function is called. 5146 */ 5147 static int 5148 ahci_port_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5149 ahci_addr_t *addrp) 5150 { 5151 ahci_addr_t pmult_addr; 5152 uint32_t cap_status, port_cmd_status; 5153 uint32_t port_scontrol, port_sstatus, port_serror; 5154 uint32_t port_intr_status, port_task_file; 5155 uint32_t port_state; 5156 uint8_t port = addrp->aa_port; 5157 5158 int loop_count; 5159 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 5160 5161 /* Target is a port multiplier port? */ 5162 if (AHCI_ADDR_IS_PMPORT(addrp)) 5163 return (ahci_pmport_reset(ahci_ctlp, ahci_portp, addrp)); 5164 5165 /* Otherwise it must be an HBA port. */ 5166 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 5167 5168 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 5169 "Port %d port resetting...", port); 5170 ahci_portp->ahciport_port_state = 0; 5171 5172 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5173 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 5174 5175 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5176 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5177 5178 if (cap_status & AHCI_HBA_CAP_SSS) { 5179 /* 5180 * HBA support staggered spin-up, if the port has 5181 * not spin up yet, then force it to do spin-up 5182 */ 5183 if (!(port_cmd_status & AHCI_CMD_STATUS_SUD)) { 5184 if (!(ahci_portp->ahciport_flags 5185 & AHCI_PORT_FLAG_SPINUP)) { 5186 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5187 "Port %d PxCMD.SUD is zero, force " 5188 "it to do spin-up", port); 5189 ahci_portp->ahciport_flags |= 5190 AHCI_PORT_FLAG_SPINUP; 5191 } 5192 } 5193 } else { 5194 /* 5195 * HBA doesn't support stagger spin-up, force it 5196 * to do normal COMRESET 5197 */ 5198 if (ahci_portp->ahciport_flags & 5199 AHCI_PORT_FLAG_SPINUP) { 5200 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5201 "HBA does not support staggered spin-up " 5202 "force it to do normal COMRESET", NULL); 5203 ahci_portp->ahciport_flags &= 5204 ~AHCI_PORT_FLAG_SPINUP; 5205 } 5206 } 5207 5208 if (!(ahci_portp->ahciport_flags & AHCI_PORT_FLAG_SPINUP)) { 5209 /* Do normal COMRESET */ 5210 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5211 "ahci_port_reset: do normal COMRESET", port); 5212 5213 /* 5214 * According to the spec, SUD bit should be set here, 5215 * but JMicron JMB363 doesn't follow it, so remove 5216 * the assertion, and just print a debug message. 5217 */ 5218 #if AHCI_DEBUG 5219 if (!(port_cmd_status & AHCI_CMD_STATUS_SUD)) 5220 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5221 "port %d SUD bit not set", port) 5222 #endif 5223 5224 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5225 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 5226 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_COMRESET); 5227 5228 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5229 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), 5230 port_scontrol); 5231 5232 /* Enable PxCMD.FRE to read device */ 5233 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5234 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5235 port_cmd_status|AHCI_CMD_STATUS_FRE); 5236 5237 /* 5238 * Give time for COMRESET to percolate, according to the AHCI 5239 * spec, software shall wait at least 1 millisecond before 5240 * clearing PxSCTL.DET 5241 */ 5242 drv_usecwait(AHCI_1MS_USECS*2); 5243 5244 /* Fetch the SCONTROL again and rewrite the DET part with 0 */ 5245 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5246 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 5247 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_NOACTION); 5248 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5249 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), 5250 port_scontrol); 5251 } else { 5252 /* Do staggered spin-up */ 5253 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5254 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 5255 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_NOACTION); 5256 5257 /* PxSCTL.DET must be 0 */ 5258 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5259 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), 5260 port_scontrol); 5261 5262 port_cmd_status &= ~AHCI_CMD_STATUS_SUD; 5263 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5264 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5265 port_cmd_status); 5266 5267 /* 0 -> 1 edge */ 5268 drv_usecwait(AHCI_1MS_USECS*2); 5269 5270 /* Set PxCMD.SUD to 1 */ 5271 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5272 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5273 port_cmd_status |= AHCI_CMD_STATUS_SUD; 5274 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5275 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5276 port_cmd_status); 5277 5278 /* Enable PxCMD.FRE to read device */ 5279 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5280 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5281 port_cmd_status|AHCI_CMD_STATUS_FRE); 5282 } 5283 5284 /* 5285 * The port enters P:StartComm state, and HBA tells link layer to 5286 * start communication, which involves sending COMRESET to device. 5287 * And the HBA resets PxTFD.STS to 7Fh. 5288 * 5289 * When a COMINIT is received from the device, then the port enters 5290 * P:ComInit state. And HBA sets PxTFD.STS to FFh or 80h. HBA sets 5291 * PxSSTS.DET to 1h to indicate a device is detected but communication 5292 * is not yet established. HBA sets PxSERR.DIAG.X to '1' to indicate 5293 * a COMINIT has been received. 5294 */ 5295 /* 5296 * The DET field is valid only if IPM field indicates 5297 * that the interface is in active state. 5298 */ 5299 loop_count = 0; 5300 do { 5301 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5302 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 5303 5304 if (SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) { 5305 /* 5306 * If the interface is not active, the DET field 5307 * is considered not accurate. So we want to 5308 * continue looping. 5309 */ 5310 SSTATUS_SET_DET(port_sstatus, SSTATUS_DET_NODEV); 5311 } 5312 5313 if (loop_count++ > AHCI_POLLRATE_PORT_SSTATUS) { 5314 /* 5315 * We are effectively timing out after 0.1 sec. 5316 */ 5317 break; 5318 } 5319 5320 /* Wait for 10 millisec */ 5321 drv_usecwait(AHCI_10MS_USECS); 5322 } while (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM); 5323 5324 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 5325 "ahci_port_reset: 1st loop count: %d, " 5326 "port_sstatus = 0x%x port %d", 5327 loop_count, port_sstatus, port); 5328 5329 if ((SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) || 5330 (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM)) { 5331 /* 5332 * Either the port is not active or there 5333 * is no device present. 5334 */ 5335 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_NONE); 5336 return (AHCI_SUCCESS); 5337 } 5338 5339 /* Now we can make sure there is a device connected to the port */ 5340 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5341 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 5342 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5343 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 5344 5345 /* 5346 * A COMINIT signal is supposed to be received 5347 * PxSERR.DIAG.X or PxIS.PCS should be set 5348 */ 5349 if (!(port_intr_status & AHCI_INTR_STATUS_PCS) && 5350 !(port_serror & SERROR_EXCHANGED_ERR)) { 5351 cmn_err(CE_WARN, "!ahci%d: ahci_port_reset port %d " 5352 "COMINIT signal from the device not received", 5353 instance, port); 5354 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_PSTATE_FAILED); 5355 return (AHCI_FAILURE); 5356 } 5357 5358 /* 5359 * According to the spec, when PxSCTL.DET is set to 0h, upon 5360 * receiving a COMINIT from the attached device, PxTFD.STS.BSY 5361 * shall be set to '1' by the HBA. 5362 * 5363 * However, we found JMicron JMB363 doesn't follow this, so 5364 * remove this check, and just print a debug message. 5365 */ 5366 #if AHCI_DEBUG 5367 port_task_file = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5368 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 5369 if (!(port_task_file & AHCI_TFD_STS_BSY)) { 5370 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_port_reset: " 5371 "port %d BSY bit is not set after COMINIT signal " 5372 "is received", port); 5373 } 5374 #endif 5375 5376 /* 5377 * PxSERR.DIAG.X has to be cleared in order to update PxTFD with 5378 * the D2H FIS received by HBA. 5379 */ 5380 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5381 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5382 SERROR_EXCHANGED_ERR); 5383 5384 /* 5385 * Devices should return a FIS contains its signature to HBA after 5386 * COMINIT signal. Check whether a D2H FIS is received by polling 5387 * PxTFD.STS.ERR bit. 5388 */ 5389 loop_count = 0; 5390 do { 5391 /* Wait for 10 millisec */ 5392 drv_usecwait(AHCI_10MS_USECS); 5393 5394 if (loop_count++ > AHCI_POLLRATE_PORT_TFD_ERROR) { 5395 /* 5396 * We are effectively timing out after 11 sec. 5397 */ 5398 cmn_err(CE_WARN, "!ahci%d: ahci_port_reset port %d " 5399 "the device hardware has been initialized and " 5400 "the power-up diagnostics failed", 5401 instance, port); 5402 5403 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_port_reset: " 5404 "port %d PxTFD.STS.ERR is not set, we need another " 5405 "software reset.", port); 5406 5407 /* Clear port serror register for the port */ 5408 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5409 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5410 AHCI_SERROR_CLEAR_ALL); 5411 5412 AHCI_ADDR_SET_PMULT(&pmult_addr, port); 5413 5414 /* Try another software reset. */ 5415 if (ahci_software_reset(ahci_ctlp, ahci_portp, 5416 &pmult_addr) != AHCI_SUCCESS) { 5417 AHCIPORT_SET_STATE(ahci_portp, addrp, 5418 SATA_PSTATE_FAILED); 5419 return (AHCI_FAILURE); 5420 } 5421 break; 5422 } 5423 5424 /* Wait for 10 millisec */ 5425 drv_usecwait(AHCI_10MS_USECS); 5426 5427 /* 5428 * The Error bit '1' means COMRESET is finished successfully 5429 * The device hardware has been initialized and the power-up 5430 * diagnostics successfully completed. The device requests 5431 * that the Transport layer transmit a Register - D2H FIS to 5432 * the host. (SATA spec 11.5, v2.6) 5433 */ 5434 port_task_file = 5435 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5436 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 5437 } while (((port_task_file & AHCI_TFD_ERR_MASK) 5438 >> AHCI_TFD_ERR_SHIFT) != AHCI_TFD_ERR_SGS); 5439 5440 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 5441 "ahci_port_reset: 2nd loop count: %d, " 5442 "port_task_file = 0x%x port %d", 5443 loop_count, port_task_file, port); 5444 5445 /* Clear port serror register for the port */ 5446 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5447 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 5448 AHCI_SERROR_CLEAR_ALL); 5449 5450 /* Set port as ready */ 5451 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 5452 AHCIPORT_SET_STATE(ahci_portp, addrp, port_state|SATA_STATE_READY); 5453 5454 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5455 "ahci_port_reset: succeed at port %d.", port); 5456 return (AHCI_SUCCESS); 5457 } 5458 5459 /* 5460 * COMRESET on a port multiplier port. 5461 * 5462 * NOTE: Only called in ahci_port_reset() 5463 */ 5464 static int 5465 ahci_pmport_reset(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5466 ahci_addr_t *addrp) 5467 { 5468 uint32_t port_scontrol, port_sstatus, port_serror; 5469 uint32_t port_cmd_status, port_intr_status; 5470 uint32_t port_state; 5471 uint8_t port = addrp->aa_port; 5472 uint8_t pmport = addrp->aa_pmport; 5473 int loop_count; 5474 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 5475 5476 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 5477 "port %d:%d: pmport resetting", port, pmport); 5478 5479 /* Initialize pmport state */ 5480 AHCIPORT_SET_STATE(ahci_portp, addrp, 0); 5481 5482 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &port_scontrol, err); 5483 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_COMRESET); 5484 WRITE_PMULT(addrp, SATA_PMULT_REG_SCTL, port_scontrol, err); 5485 5486 /* PxCMD.FRE should be set before. */ 5487 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5488 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5489 ASSERT(port_cmd_status & AHCI_CMD_STATUS_FRE); 5490 if (!(port_cmd_status & AHCI_CMD_STATUS_FRE)) 5491 return (AHCI_FAILURE); 5492 5493 /* 5494 * Give time for COMRESET to percolate, according to the AHCI 5495 * spec, software shall wait at least 1 millisecond before 5496 * clearing PxSCTL.DET 5497 */ 5498 drv_usecwait(AHCI_1MS_USECS*2); 5499 5500 /* 5501 * Fetch the SCONTROL again and rewrite the DET part with 0 5502 * This will generate an Asychronous Notification events. 5503 */ 5504 READ_PMULT(addrp, SATA_PMULT_REG_SCTL, &port_scontrol, err); 5505 SCONTROL_SET_DET(port_scontrol, SCONTROL_DET_NOACTION); 5506 WRITE_PMULT(addrp, SATA_PMULT_REG_SCTL, port_scontrol, err); 5507 5508 /* 5509 * The port enters P:StartComm state, and HBA tells link layer to 5510 * start communication, which involves sending COMRESET to device. 5511 * And the HBA resets PxTFD.STS to 7Fh. 5512 * 5513 * When a COMINIT is received from the device, then the port enters 5514 * P:ComInit state. And HBA sets PxTFD.STS to FFh or 80h. HBA sets 5515 * PxSSTS.DET to 1h to indicate a device is detected but communication 5516 * is not yet established. HBA sets PxSERR.DIAG.X to '1' to indicate 5517 * a COMINIT has been received. 5518 */ 5519 /* 5520 * The DET field is valid only if IPM field indicates 5521 * that the interface is in active state. 5522 */ 5523 loop_count = 0; 5524 do { 5525 READ_PMULT(addrp, SATA_PMULT_REG_SSTS, &port_sstatus, err); 5526 5527 if (SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) { 5528 /* 5529 * If the interface is not active, the DET field 5530 * is considered not accurate. So we want to 5531 * continue looping. 5532 */ 5533 SSTATUS_SET_DET(port_sstatus, SSTATUS_DET_NODEV); 5534 } 5535 5536 if (loop_count++ > AHCI_POLLRATE_PORT_SSTATUS) { 5537 /* 5538 * We are effectively timing out after 0.1 sec. 5539 */ 5540 break; 5541 } 5542 5543 /* Wait for 10 millisec */ 5544 drv_usecwait(AHCI_10MS_USECS); 5545 5546 } while (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM); 5547 5548 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5549 "ahci_pmport_reset: 1st loop count: %d, " 5550 "port_sstatus = 0x%x port %d:%d", 5551 loop_count, port_sstatus, port, pmport); 5552 5553 if ((SSTATUS_GET_IPM(port_sstatus) != SSTATUS_IPM_ACTIVE) || 5554 (SSTATUS_GET_DET(port_sstatus) != SSTATUS_DET_DEVPRE_PHYCOM)) { 5555 /* 5556 * Either the port is not active or there 5557 * is no device present. 5558 */ 5559 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO, ahci_ctlp, 5560 "ahci_pmport_reset: " 5561 "no device attached to port %d:%d", 5562 port, pmport); 5563 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_NONE); 5564 return (AHCI_SUCCESS); 5565 } 5566 5567 /* Now we can make sure there is a device connected to the port */ 5568 /* COMINIT signal is supposed to be received (PxSERR.DIAG.X = '1') */ 5569 READ_PMULT(addrp, SATA_PMULT_REG_SERR, &port_serror, err); 5570 5571 if (!(port_serror & (1 << 26))) { 5572 cmn_err(CE_WARN, "!ahci%d: ahci_pmport_reset: " 5573 "COMINIT signal from the device not received port %d:%d", 5574 instance, port, pmport); 5575 5576 AHCIPORT_SET_STATE(ahci_portp, addrp, SATA_PSTATE_FAILED); 5577 return (AHCI_FAILURE); 5578 } 5579 5580 /* 5581 * After clear PxSERR register, we will receive a D2H FIS. 5582 * Normally this FIS will cause a IPMS error according to AHCI spec 5583 * v1.2 because there is no command outstanding for it. So we need 5584 * to ignore this error. 5585 */ 5586 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_IGNORE_IPMS; 5587 WRITE_PMULT(addrp, SATA_PMULT_REG_SERR, AHCI_SERROR_CLEAR_ALL, err); 5588 5589 /* Now we need to check the D2H FIS by checking IPMS error. */ 5590 loop_count = 0; 5591 do { 5592 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5593 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 5594 5595 if (loop_count++ > AHCI_POLLRATE_PORT_TFD_ERROR) { 5596 /* 5597 * No D2H FIS received. This is possible according 5598 * to SATA 2.6 spec. 5599 */ 5600 cmn_err(CE_WARN, "ahci_port_reset: port %d:%d " 5601 "PxIS.IPMS is not set, we need another " 5602 "software reset.", port, pmport); 5603 5604 break; 5605 } 5606 5607 /* Wait for 10 millisec */ 5608 mutex_exit(&ahci_portp->ahciport_mutex); 5609 delay(AHCI_10MS_TICKS); 5610 mutex_enter(&ahci_portp->ahciport_mutex); 5611 5612 } while (!(port_intr_status & AHCI_INTR_STATUS_IPMS)); 5613 5614 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5615 "ahci_pmport_reset: 2st loop count: %d, " 5616 "port_sstatus = 0x%x port %d:%d", 5617 loop_count, port_sstatus, port, pmport); 5618 5619 /* Clear IPMS */ 5620 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5621 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 5622 AHCI_INTR_STATUS_IPMS); 5623 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_IGNORE_IPMS; 5624 5625 /* This pmport is now ready for ahci_tran_start() */ 5626 port_state = AHCIPORT_GET_STATE(ahci_portp, addrp); 5627 AHCIPORT_SET_STATE(ahci_portp, addrp, port_state|SATA_STATE_READY); 5628 5629 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5630 "ahci_pmport_reset: succeed at port %d:%d", port, pmport); 5631 return (AHCI_SUCCESS); 5632 5633 err: /* R/W PMULT error */ 5634 /* IPMS flags might be set before. */ 5635 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_IGNORE_IPMS; 5636 AHCIDBG(AHCIDBG_INFO|AHCIDBG_ERRS, ahci_ctlp, 5637 "ahci_pmport_reset: failed at port %d:%d", port, pmport); 5638 5639 return (AHCI_FAILURE); 5640 } 5641 5642 /* 5643 * AHCI HBA reset ...; the entire HBA is reset, and all ports are disabled. 5644 * This is the most intrusive. 5645 * 5646 * When an HBA reset occurs, Phy communication will be re-established with 5647 * the device through a COMRESET followed by the normal out-of-band 5648 * communication sequence defined in Serial ATA. AT the end of reset, the 5649 * device, if working properly, will send a D2H Register FIS, which contains 5650 * the device signature. When the HBA receives this FIS, it updates PxTFD.STS 5651 * and PxTFD.ERR register fields, and updates the PxSIG register with the 5652 * signature. 5653 * 5654 * Remember to set GHC.AE to 1 before calling ahci_hba_reset. 5655 */ 5656 static int 5657 ahci_hba_reset(ahci_ctl_t *ahci_ctlp) 5658 { 5659 ahci_port_t *ahci_portp; 5660 ahci_addr_t addr; 5661 uint32_t ghc_control; 5662 uint8_t port; 5663 int loop_count; 5664 int rval = AHCI_SUCCESS; 5665 5666 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, "HBA resetting", 5667 NULL); 5668 5669 mutex_enter(&ahci_ctlp->ahcictl_mutex); 5670 5671 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5672 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5673 5674 /* Setting GHC.HR to 1, remember GHC.AE is already set to 1 before */ 5675 ghc_control |= AHCI_HBA_GHC_HR; 5676 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5677 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 5678 5679 /* 5680 * Wait until HBA Reset complete or timeout 5681 */ 5682 loop_count = 0; 5683 do { 5684 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5685 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5686 5687 if (loop_count++ > AHCI_POLLRATE_HBA_RESET) { 5688 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5689 "ahci hba reset is timing out, " 5690 "ghc_control = 0x%x", ghc_control); 5691 /* We are effectively timing out after 1 sec. */ 5692 break; 5693 } 5694 5695 /* Wait for 10 millisec */ 5696 drv_usecwait(AHCI_10MS_USECS); 5697 } while (ghc_control & AHCI_HBA_GHC_HR); 5698 5699 AHCIDBG(AHCIDBG_POLL_LOOP, ahci_ctlp, 5700 "ahci_hba_reset: 1st loop count: %d, " 5701 "ghc_control = 0x%x", loop_count, ghc_control); 5702 5703 if (ghc_control & AHCI_HBA_GHC_HR) { 5704 /* The hba is not reset for some reasons */ 5705 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 5706 "hba reset failed: HBA in a hung or locked state", NULL); 5707 mutex_exit(&ahci_ctlp->ahcictl_mutex); 5708 return (AHCI_FAILURE); 5709 } 5710 5711 /* 5712 * HBA reset will clear (AHCI Spec v1.2 10.4.3) GHC.IE / GHC.AE 5713 */ 5714 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5715 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 5716 ghc_control |= (AHCI_HBA_GHC_AE | AHCI_HBA_GHC_IE); 5717 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5718 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 5719 5720 mutex_exit(&ahci_ctlp->ahcictl_mutex); 5721 5722 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 5723 /* Only check implemented ports */ 5724 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 5725 continue; 5726 } 5727 5728 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 5729 mutex_enter(&ahci_portp->ahciport_mutex); 5730 5731 AHCI_ADDR_SET_PORT(&addr, port); 5732 5733 if (ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 5734 port, AHCI_PORT_RESET|AHCI_RESET_NO_EVENTS_UP, NULL) != 5735 AHCI_SUCCESS) { 5736 rval = AHCI_FAILURE; 5737 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5738 "ahci_hba_reset: port %d failed", port); 5739 /* 5740 * Set the port state to SATA_PSTATE_FAILED if 5741 * failed to initialize it. 5742 */ 5743 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 5744 } 5745 5746 mutex_exit(&ahci_portp->ahciport_mutex); 5747 } 5748 5749 return (rval); 5750 } 5751 5752 /* 5753 * This routine is only called from AHCI_ATTACH or phyrdy change 5754 * case. It first calls software reset, then stop the port and try to 5755 * read PxSIG register to find the type of device attached to the port. 5756 * 5757 * The caller should make sure a valid device exists on specified port and 5758 * physical communication has been established so that the signature could 5759 * be retrieved by software reset. 5760 * 5761 * WARNING!!! ahciport_mutex should be acquired before the function 5762 * is called. And the port interrupt is disabled. 5763 */ 5764 static void 5765 ahci_find_dev_signature(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 5766 ahci_addr_t *addrp) 5767 { 5768 ahci_addr_t dev_addr; 5769 uint32_t signature; 5770 uint8_t port = addrp->aa_port; 5771 uint8_t pmport = addrp->aa_pmport; 5772 int rval; 5773 5774 ASSERT(AHCI_ADDR_IS_VALID(addrp)); 5775 5776 /* 5777 * If the HBA doesn't support port multiplier, then the driver 5778 * doesn't need to bother to check port multiplier device. 5779 * 5780 * The second port of ICH7 on ASUS P5W DH deluxe motherboard is 5781 * connected to Silicon Image 4723, to which the two sata drives 5782 * attached can be set with RAID1, RAID0 or Spanning mode. 5783 * 5784 * We found software reset will get failure if port multiplier address 5785 * 0xf is used by software reset, so just ignore the check since 5786 * ICH7 doesn't support port multiplier device at all. 5787 */ 5788 if (AHCI_ADDR_IS_PORT(addrp) && 5789 (ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_CBSS)) { 5790 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 5791 "ahci_find_dev_signature enter: port %d", port); 5792 5793 /* 5794 * NOTE: when the ahci address is a HBA port, we do not know 5795 * it is a device or a port multiplier that attached. we need 5796 * try a software reset at port multiplier address (0xf 5797 * pmport) 5798 */ 5799 AHCI_ADDR_SET_PMULT(&dev_addr, addrp->aa_port); 5800 } else { 5801 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 5802 "ahci_find_dev_signature enter: port %d:%d", 5803 port, pmport); 5804 dev_addr = *addrp; 5805 } 5806 5807 /* Assume it is unknown. */ 5808 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 5809 5810 /* Issue a software reset to get the signature */ 5811 rval = ahci_software_reset(ahci_ctlp, ahci_portp, &dev_addr); 5812 if (rval != AHCI_SUCCESS) { 5813 5814 /* 5815 * Try to do software reset again with pmport set with 0 if 5816 * the controller is set with AHCI_CAP_SRST_NO_HOSTPORT and 5817 * the original pmport is set with SATA_PMULT_HOSTPORT (0xf) 5818 */ 5819 if ((ahci_ctlp->ahcictl_cap & AHCI_CAP_SRST_NO_HOSTPORT) && 5820 (dev_addr.aa_pmport == SATA_PMULT_HOSTPORT)) { 5821 dev_addr.aa_pmport = 0; 5822 rval = ahci_software_reset(ahci_ctlp, ahci_portp, 5823 &dev_addr); 5824 } 5825 5826 if (rval != AHCI_SUCCESS) { 5827 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 5828 "ahci_find_dev_signature: software reset failed " 5829 "at port %d:%d, cannot get signature.", 5830 port, pmport); 5831 5832 AHCIPORT_SET_STATE(ahci_portp, addrp, 5833 SATA_PSTATE_FAILED); 5834 return; 5835 } 5836 } 5837 5838 /* 5839 * ahci_software_reset has started the port, so we need manually stop 5840 * the port again. 5841 */ 5842 if (AHCI_ADDR_IS_PORT(addrp)) { 5843 if (ahci_put_port_into_notrunning_state(ahci_ctlp, 5844 ahci_portp, port) != AHCI_SUCCESS) { 5845 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5846 "ahci_find_dev_signature: cannot stop port %d.", 5847 port); 5848 ahci_portp->ahciport_port_state = SATA_PSTATE_FAILED; 5849 return; 5850 } 5851 } 5852 5853 /* Now we can make sure that a valid signature is received. */ 5854 signature = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5855 (uint32_t *)AHCI_PORT_PxSIG(ahci_ctlp, port)); 5856 5857 #ifdef AHCI_DEBUG 5858 if (AHCI_ADDR_IS_PMPORT(addrp)) { 5859 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 5860 "ahci_find_dev_signature: signature = 0x%x at port %d:%d", 5861 signature, port, pmport); 5862 } else { 5863 AHCIDBG(AHCIDBG_INIT|AHCIDBG_INFO, ahci_ctlp, 5864 "ahci_find_dev_signature: signature = 0x%x at port %d", 5865 signature, port); 5866 } 5867 #endif 5868 5869 /* NOTE: Only support ATAPI device at controller port. */ 5870 if (signature == AHCI_SIGNATURE_ATAPI && !AHCI_ADDR_IS_PORT(addrp)) 5871 signature = SATA_DTYPE_UNKNOWN; 5872 5873 switch (signature) { 5874 5875 case AHCI_SIGNATURE_DISK: 5876 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_ATADISK); 5877 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5878 "Disk is found at port: %d", port); 5879 break; 5880 5881 case AHCI_SIGNATURE_ATAPI: 5882 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_ATAPI); 5883 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5884 "ATAPI device is found at port: %d", port); 5885 break; 5886 5887 case AHCI_SIGNATURE_PORT_MULTIPLIER: 5888 /* Port Multiplier cannot recursively attached. */ 5889 ASSERT(AHCI_ADDR_IS_PORT(addrp)); 5890 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_PMULT); 5891 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5892 "Port Multiplier is found at port: %d", port); 5893 break; 5894 5895 default: 5896 AHCIPORT_SET_DEV_TYPE(ahci_portp, addrp, SATA_DTYPE_UNKNOWN); 5897 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 5898 "Unknown device is found at port: %d", port); 5899 } 5900 } 5901 5902 /* 5903 * According to the spec, to reliably detect hot plug removals, software 5904 * must disable interface power management. Software should perform the 5905 * following initialization on a port after a device is attached: 5906 * Set PxSCTL.IPM to 3h to disable interface state transitions 5907 * Set PxCMD.ALPE to '0' to disable aggressive power management 5908 * Disable device initiated interface power management by SET FEATURE 5909 * 5910 * We can ignore the last item because by default the feature is disabled 5911 */ 5912 static void 5913 ahci_disable_interface_pm(ahci_ctl_t *ahci_ctlp, uint8_t port) 5914 { 5915 uint32_t port_scontrol, port_cmd_status; 5916 5917 port_scontrol = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5918 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port)); 5919 SCONTROL_SET_IPM(port_scontrol, SCONTROL_IPM_DISABLE_BOTH); 5920 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5921 (uint32_t *)AHCI_PORT_PxSCTL(ahci_ctlp, port), port_scontrol); 5922 5923 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5924 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5925 port_cmd_status &= ~AHCI_CMD_STATUS_ALPE; 5926 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5927 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), port_cmd_status); 5928 } 5929 5930 /* 5931 * Start the port - set PxCMD.ST to 1, if PxCMD.FRE is not set 5932 * to 1, then set it firstly. 5933 * 5934 * Each port contains two major DMA engines. One DMA engine walks through 5935 * the command list, and is controlled by PxCMD.ST. The second DMA engine 5936 * copies received FISes into system memory, and is controlled by PxCMD.FRE. 5937 * 5938 * Software shall not set PxCMD.ST to '1' until it verifies that PxCMD.CR 5939 * is '0' and has set PxCMD.FRE is '1'. And software shall not clear 5940 * PxCMD.FRE while PxCMD.ST or PxCMD.CR is set '1'. 5941 * 5942 * Software shall not set PxCMD.ST to '1' unless a functional device is 5943 * present on the port(as determined by PxTFD.STS.BSY = '0', 5944 * PxTFD.STS.DRQ = '0', and PxSSTS.DET = 3h). 5945 * 5946 * WARNING!!! ahciport_mutex should be acquired before the function 5947 * is called. 5948 */ 5949 static int 5950 ahci_start_port(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, uint8_t port) 5951 { 5952 uint32_t port_cmd_status; 5953 5954 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_start_port: %d enter", port); 5955 5956 if (ahci_portp->ahciport_port_state & SATA_PSTATE_FAILED) { 5957 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port failed " 5958 "the state for port %d is 0x%x", 5959 port, ahci_portp->ahciport_port_state); 5960 return (AHCI_FAILURE); 5961 } 5962 5963 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 5964 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port failed " 5965 "no device is attached at port %d", port); 5966 return (AHCI_FAILURE); 5967 } 5968 5969 /* First to set PxCMD.FRE before setting PxCMD.ST. */ 5970 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5971 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5972 5973 if (!(port_cmd_status & AHCI_CMD_STATUS_FRE)) { 5974 port_cmd_status |= AHCI_CMD_STATUS_FRE; 5975 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5976 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5977 port_cmd_status); 5978 } 5979 5980 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 5981 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 5982 5983 port_cmd_status |= AHCI_CMD_STATUS_ST; 5984 5985 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 5986 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), 5987 port_cmd_status); 5988 5989 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_STARTED; 5990 5991 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_start_port: " 5992 "PxCMD.ST set to '1' at port %d", port); 5993 5994 return (AHCI_SUCCESS); 5995 } 5996 5997 /* 5998 * Allocate the ahci_port_t including Received FIS and Command List. 5999 * The argument - port is the physical port number, and not logical 6000 * port number seen by the SATA framework. 6001 * 6002 * WARNING!!! ahcictl_mutex should be acquired before the function 6003 * is called. 6004 */ 6005 static int 6006 ahci_alloc_port_state(ahci_ctl_t *ahci_ctlp, uint8_t port) 6007 { 6008 dev_info_t *dip = ahci_ctlp->ahcictl_dip; 6009 ahci_port_t *ahci_portp; 6010 char taskq_name[64] = "event_handle_taskq"; 6011 6012 ahci_portp = 6013 (ahci_port_t *)kmem_zalloc(sizeof (ahci_port_t), KM_SLEEP); 6014 6015 ahci_ctlp->ahcictl_ports[port] = ahci_portp; 6016 ahci_portp->ahciport_port_num = port; 6017 6018 /* Initialize the port condition variable */ 6019 cv_init(&ahci_portp->ahciport_cv, NULL, CV_DRIVER, NULL); 6020 6021 /* Initialize the port mutex */ 6022 mutex_init(&ahci_portp->ahciport_mutex, NULL, MUTEX_DRIVER, 6023 (void *)(uintptr_t)ahci_ctlp->ahcictl_intr_pri); 6024 6025 mutex_enter(&ahci_portp->ahciport_mutex); 6026 6027 /* 6028 * Allocate memory for received FIS structure and 6029 * command list for this port 6030 */ 6031 if (ahci_alloc_rcvd_fis(ahci_ctlp, ahci_portp, port) != AHCI_SUCCESS) { 6032 goto err_case1; 6033 } 6034 6035 if (ahci_alloc_cmd_list(ahci_ctlp, ahci_portp, port) != AHCI_SUCCESS) { 6036 goto err_case2; 6037 } 6038 6039 (void) snprintf(taskq_name + strlen(taskq_name), 6040 sizeof (taskq_name) - strlen(taskq_name), 6041 "_port%d", port); 6042 6043 /* Create the taskq for the port */ 6044 if ((ahci_portp->ahciport_event_taskq = ddi_taskq_create(dip, 6045 taskq_name, 2, TASKQ_DEFAULTPRI, 0)) == NULL) { 6046 cmn_err(CE_WARN, "!ahci%d: ddi_taskq_create failed for event " 6047 "handle", ddi_get_instance(ahci_ctlp->ahcictl_dip)); 6048 goto err_case3; 6049 } 6050 6051 /* Allocate the argument for the taskq */ 6052 ahci_portp->ahciport_event_args = 6053 kmem_zalloc(sizeof (ahci_event_arg_t), KM_SLEEP); 6054 6055 ahci_portp->ahciport_event_args->ahciea_addrp = 6056 kmem_zalloc(sizeof (ahci_addr_t), KM_SLEEP); 6057 6058 if (ahci_portp->ahciport_event_args == NULL) 6059 goto err_case4; 6060 6061 /* Initialize the done queue */ 6062 ahci_portp->ahciport_doneq = NULL; 6063 ahci_portp->ahciport_doneqtail = &ahci_portp->ahciport_doneq; 6064 ahci_portp->ahciport_doneq_len = 0; 6065 6066 mutex_exit(&ahci_portp->ahciport_mutex); 6067 6068 return (AHCI_SUCCESS); 6069 6070 err_case4: 6071 ddi_taskq_destroy(ahci_portp->ahciport_event_taskq); 6072 6073 err_case3: 6074 ahci_dealloc_cmd_list(ahci_ctlp, ahci_portp); 6075 6076 err_case2: 6077 ahci_dealloc_rcvd_fis(ahci_portp); 6078 6079 err_case1: 6080 mutex_exit(&ahci_portp->ahciport_mutex); 6081 mutex_destroy(&ahci_portp->ahciport_mutex); 6082 cv_destroy(&ahci_portp->ahciport_cv); 6083 6084 kmem_free(ahci_portp, sizeof (ahci_port_t)); 6085 6086 return (AHCI_FAILURE); 6087 } 6088 6089 /* 6090 * Reverse of ahci_dealloc_port_state(). 6091 * 6092 * WARNING!!! ahcictl_mutex should be acquired before the function 6093 * is called. 6094 */ 6095 static void 6096 ahci_dealloc_port_state(ahci_ctl_t *ahci_ctlp, uint8_t port) 6097 { 6098 ahci_port_t *ahci_portp = ahci_ctlp->ahcictl_ports[port]; 6099 6100 ASSERT(ahci_portp != NULL); 6101 6102 mutex_enter(&ahci_portp->ahciport_mutex); 6103 kmem_free(ahci_portp->ahciport_event_args->ahciea_addrp, 6104 sizeof (ahci_addr_t)); 6105 ahci_portp->ahciport_event_args->ahciea_addrp = NULL; 6106 kmem_free(ahci_portp->ahciport_event_args, sizeof (ahci_event_arg_t)); 6107 ahci_portp->ahciport_event_args = NULL; 6108 ddi_taskq_destroy(ahci_portp->ahciport_event_taskq); 6109 ahci_dealloc_cmd_list(ahci_ctlp, ahci_portp); 6110 ahci_dealloc_rcvd_fis(ahci_portp); 6111 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 6112 mutex_exit(&ahci_portp->ahciport_mutex); 6113 6114 mutex_destroy(&ahci_portp->ahciport_mutex); 6115 cv_destroy(&ahci_portp->ahciport_cv); 6116 6117 kmem_free(ahci_portp, sizeof (ahci_port_t)); 6118 6119 ahci_ctlp->ahcictl_ports[port] = NULL; 6120 } 6121 6122 /* 6123 * Allocates memory for the Received FIS Structure 6124 * 6125 * WARNING!!! ahciport_mutex should be acquired before the function 6126 * is called. 6127 */ 6128 static int 6129 ahci_alloc_rcvd_fis(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 6130 uint8_t port) 6131 { 6132 size_t rcvd_fis_size; 6133 size_t ret_len; 6134 uint_t cookie_count; 6135 6136 rcvd_fis_size = sizeof (ahci_rcvd_fis_t); 6137 6138 /* allocate rcvd FIS dma handle. */ 6139 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 6140 &ahci_ctlp->ahcictl_rcvd_fis_dma_attr, 6141 DDI_DMA_SLEEP, 6142 NULL, 6143 &ahci_portp->ahciport_rcvd_fis_dma_handle) != 6144 DDI_SUCCESS) { 6145 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6146 "rcvd FIS dma handle alloc failed", NULL); 6147 6148 return (AHCI_FAILURE); 6149 } 6150 6151 if (ddi_dma_mem_alloc(ahci_portp->ahciport_rcvd_fis_dma_handle, 6152 rcvd_fis_size, 6153 &accattr, 6154 DDI_DMA_CONSISTENT, 6155 DDI_DMA_SLEEP, 6156 NULL, 6157 (caddr_t *)&ahci_portp->ahciport_rcvd_fis, 6158 &ret_len, 6159 &ahci_portp->ahciport_rcvd_fis_acc_handle) != NULL) { 6160 6161 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6162 "rcvd FIS dma mem alloc fail", NULL); 6163 /* error.. free the dma handle. */ 6164 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 6165 return (AHCI_FAILURE); 6166 } 6167 6168 if (ddi_dma_addr_bind_handle(ahci_portp->ahciport_rcvd_fis_dma_handle, 6169 NULL, 6170 (caddr_t)ahci_portp->ahciport_rcvd_fis, 6171 rcvd_fis_size, 6172 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 6173 DDI_DMA_SLEEP, 6174 NULL, 6175 &ahci_portp->ahciport_rcvd_fis_dma_cookie, 6176 &cookie_count) != DDI_DMA_MAPPED) { 6177 6178 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6179 "rcvd FIS dma handle bind fail", NULL); 6180 /* error.. free the dma handle & free the memory. */ 6181 ddi_dma_mem_free(&ahci_portp->ahciport_rcvd_fis_acc_handle); 6182 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 6183 return (AHCI_FAILURE); 6184 } 6185 6186 bzero((void *)ahci_portp->ahciport_rcvd_fis, rcvd_fis_size); 6187 6188 /* Config Port Received FIS Base Address */ 6189 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 6190 (uint64_t *)AHCI_PORT_PxFB(ahci_ctlp, port), 6191 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_laddress); 6192 6193 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "64-bit, dma address: 0x%llx", 6194 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_laddress); 6195 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "32-bit, dma address: 0x%x", 6196 ahci_portp->ahciport_rcvd_fis_dma_cookie.dmac_address); 6197 6198 return (AHCI_SUCCESS); 6199 } 6200 6201 /* 6202 * Deallocates the Received FIS Structure 6203 * 6204 * WARNING!!! ahciport_mutex should be acquired before the function 6205 * is called. 6206 */ 6207 static void 6208 ahci_dealloc_rcvd_fis(ahci_port_t *ahci_portp) 6209 { 6210 /* Unbind the cmd list dma handle first. */ 6211 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_rcvd_fis_dma_handle); 6212 6213 /* Then free the underlying memory. */ 6214 ddi_dma_mem_free(&ahci_portp->ahciport_rcvd_fis_acc_handle); 6215 6216 /* Now free the handle itself. */ 6217 ddi_dma_free_handle(&ahci_portp->ahciport_rcvd_fis_dma_handle); 6218 } 6219 6220 /* 6221 * Allocates memory for the Command List, which contains up to 32 entries. 6222 * Each entry contains a command header, which is a 32-byte structure that 6223 * includes the pointer to the command table. 6224 * 6225 * WARNING!!! ahciport_mutex should be acquired before the function 6226 * is called. 6227 */ 6228 static int 6229 ahci_alloc_cmd_list(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 6230 uint8_t port) 6231 { 6232 size_t cmd_list_size; 6233 size_t ret_len; 6234 uint_t cookie_count; 6235 6236 cmd_list_size = 6237 ahci_ctlp->ahcictl_num_cmd_slots * sizeof (ahci_cmd_header_t); 6238 6239 /* allocate cmd list dma handle. */ 6240 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 6241 &ahci_ctlp->ahcictl_cmd_list_dma_attr, 6242 DDI_DMA_SLEEP, 6243 NULL, 6244 &ahci_portp->ahciport_cmd_list_dma_handle) != DDI_SUCCESS) { 6245 6246 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6247 "cmd list dma handle alloc failed", NULL); 6248 return (AHCI_FAILURE); 6249 } 6250 6251 if (ddi_dma_mem_alloc(ahci_portp->ahciport_cmd_list_dma_handle, 6252 cmd_list_size, 6253 &accattr, 6254 DDI_DMA_CONSISTENT, 6255 DDI_DMA_SLEEP, 6256 NULL, 6257 (caddr_t *)&ahci_portp->ahciport_cmd_list, 6258 &ret_len, 6259 &ahci_portp->ahciport_cmd_list_acc_handle) != NULL) { 6260 6261 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6262 "cmd list dma mem alloc fail", NULL); 6263 /* error.. free the dma handle. */ 6264 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 6265 return (AHCI_FAILURE); 6266 } 6267 6268 if (ddi_dma_addr_bind_handle(ahci_portp->ahciport_cmd_list_dma_handle, 6269 NULL, 6270 (caddr_t)ahci_portp->ahciport_cmd_list, 6271 cmd_list_size, 6272 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 6273 DDI_DMA_SLEEP, 6274 NULL, 6275 &ahci_portp->ahciport_cmd_list_dma_cookie, 6276 &cookie_count) != DDI_DMA_MAPPED) { 6277 6278 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6279 "cmd list dma handle bind fail", NULL); 6280 /* error.. free the dma handle & free the memory. */ 6281 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 6282 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 6283 return (AHCI_FAILURE); 6284 } 6285 6286 bzero((void *)ahci_portp->ahciport_cmd_list, cmd_list_size); 6287 6288 /* Config Port Command List Base Address */ 6289 ddi_put64(ahci_ctlp->ahcictl_ahci_acc_handle, 6290 (uint64_t *)AHCI_PORT_PxCLB(ahci_ctlp, port), 6291 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_laddress); 6292 6293 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "64-bit, dma address: 0x%llx", 6294 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_laddress); 6295 6296 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, "32-bit, dma address: 0x%x", 6297 ahci_portp->ahciport_cmd_list_dma_cookie.dmac_address); 6298 6299 if (ahci_alloc_cmd_tables(ahci_ctlp, ahci_portp) != AHCI_SUCCESS) { 6300 goto err_out; 6301 } 6302 6303 return (AHCI_SUCCESS); 6304 6305 err_out: 6306 /* Unbind the cmd list dma handle first. */ 6307 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_cmd_list_dma_handle); 6308 6309 /* Then free the underlying memory. */ 6310 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 6311 6312 /* Now free the handle itself. */ 6313 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 6314 6315 return (AHCI_FAILURE); 6316 } 6317 6318 /* 6319 * Deallocates the Command List 6320 * 6321 * WARNING!!! ahciport_mutex should be acquired before the function 6322 * is called. 6323 */ 6324 static void 6325 ahci_dealloc_cmd_list(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 6326 { 6327 /* First dealloc command table */ 6328 ahci_dealloc_cmd_tables(ahci_ctlp, ahci_portp); 6329 6330 /* Unbind the cmd list dma handle first. */ 6331 (void) ddi_dma_unbind_handle(ahci_portp->ahciport_cmd_list_dma_handle); 6332 6333 /* Then free the underlying memory. */ 6334 ddi_dma_mem_free(&ahci_portp->ahciport_cmd_list_acc_handle); 6335 6336 /* Now free the handle itself. */ 6337 ddi_dma_free_handle(&ahci_portp->ahciport_cmd_list_dma_handle); 6338 } 6339 6340 /* 6341 * Allocates memory for all Command Tables, which contains Command FIS, 6342 * ATAPI Command and Physical Region Descriptor Table. 6343 * 6344 * WARNING!!! ahciport_mutex should be acquired before the function 6345 * is called. 6346 */ 6347 static int 6348 ahci_alloc_cmd_tables(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 6349 { 6350 size_t ret_len; 6351 ddi_dma_cookie_t cmd_table_dma_cookie; 6352 uint_t cookie_count; 6353 int slot; 6354 6355 AHCIDBG(AHCIDBG_INIT|AHCIDBG_ENTRY, ahci_ctlp, 6356 "ahci_alloc_cmd_tables: port %d enter", 6357 ahci_portp->ahciport_port_num); 6358 6359 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots; slot++) { 6360 /* Allocate cmd table dma handle. */ 6361 if (ddi_dma_alloc_handle(ahci_ctlp->ahcictl_dip, 6362 &ahci_ctlp->ahcictl_cmd_table_dma_attr, 6363 DDI_DMA_SLEEP, 6364 NULL, 6365 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]) != 6366 DDI_SUCCESS) { 6367 6368 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6369 "cmd table dma handle alloc failed", NULL); 6370 6371 goto err_out; 6372 } 6373 6374 if (ddi_dma_mem_alloc( 6375 ahci_portp->ahciport_cmd_tables_dma_handle[slot], 6376 ahci_cmd_table_size, 6377 &accattr, 6378 DDI_DMA_CONSISTENT, 6379 DDI_DMA_SLEEP, 6380 NULL, 6381 (caddr_t *)&ahci_portp->ahciport_cmd_tables[slot], 6382 &ret_len, 6383 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]) != 6384 NULL) { 6385 6386 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6387 "cmd table dma mem alloc fail", NULL); 6388 6389 /* error.. free the dma handle. */ 6390 ddi_dma_free_handle( 6391 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6392 goto err_out; 6393 } 6394 6395 if (ddi_dma_addr_bind_handle( 6396 ahci_portp->ahciport_cmd_tables_dma_handle[slot], 6397 NULL, 6398 (caddr_t)ahci_portp->ahciport_cmd_tables[slot], 6399 ahci_cmd_table_size, 6400 DDI_DMA_RDWR | DDI_DMA_CONSISTENT, 6401 DDI_DMA_SLEEP, 6402 NULL, 6403 &cmd_table_dma_cookie, 6404 &cookie_count) != DDI_DMA_MAPPED) { 6405 6406 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 6407 "cmd table dma handle bind fail", NULL); 6408 /* error.. free the dma handle & free the memory. */ 6409 ddi_dma_mem_free( 6410 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6411 ddi_dma_free_handle( 6412 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6413 goto err_out; 6414 } 6415 6416 bzero((void *)ahci_portp->ahciport_cmd_tables[slot], 6417 ahci_cmd_table_size); 6418 6419 /* Config Port Command Table Base Address */ 6420 SET_COMMAND_TABLE_BASE_ADDR( 6421 (&ahci_portp->ahciport_cmd_list[slot]), 6422 cmd_table_dma_cookie.dmac_laddress & 0xffffffffull); 6423 6424 #ifndef __lock_lint 6425 SET_COMMAND_TABLE_BASE_ADDR_UPPER( 6426 (&ahci_portp->ahciport_cmd_list[slot]), 6427 cmd_table_dma_cookie.dmac_laddress >> 32); 6428 #endif 6429 } 6430 6431 return (AHCI_SUCCESS); 6432 err_out: 6433 6434 for (slot--; slot >= 0; slot--) { 6435 /* Unbind the cmd table dma handle first */ 6436 (void) ddi_dma_unbind_handle( 6437 ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6438 6439 /* Then free the underlying memory */ 6440 ddi_dma_mem_free( 6441 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6442 6443 /* Now free the handle itself */ 6444 ddi_dma_free_handle( 6445 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6446 } 6447 6448 return (AHCI_FAILURE); 6449 } 6450 6451 /* 6452 * Deallocates memory for all Command Tables. 6453 * 6454 * WARNING!!! ahciport_mutex should be acquired before the function 6455 * is called. 6456 */ 6457 static void 6458 ahci_dealloc_cmd_tables(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp) 6459 { 6460 int slot; 6461 6462 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 6463 "ahci_dealloc_cmd_tables: %d enter", 6464 ahci_portp->ahciport_port_num); 6465 6466 for (slot = 0; slot < ahci_ctlp->ahcictl_num_cmd_slots; slot++) { 6467 /* Unbind the cmd table dma handle first. */ 6468 (void) ddi_dma_unbind_handle( 6469 ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6470 6471 /* Then free the underlying memory. */ 6472 ddi_dma_mem_free( 6473 &ahci_portp->ahciport_cmd_tables_acc_handle[slot]); 6474 6475 /* Now free the handle itself. */ 6476 ddi_dma_free_handle( 6477 &ahci_portp->ahciport_cmd_tables_dma_handle[slot]); 6478 } 6479 } 6480 6481 /* 6482 * Update SATA registers at controller ports 6483 * 6484 * WARNING!!! ahciport_mutex should be acquired before those functions 6485 * get called. 6486 */ 6487 static void 6488 ahci_update_sata_registers(ahci_ctl_t *ahci_ctlp, uint8_t port, 6489 sata_device_t *sd) 6490 { 6491 sd->satadev_scr.sstatus = 6492 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6493 (uint32_t *)(AHCI_PORT_PxSSTS(ahci_ctlp, port))); 6494 sd->satadev_scr.serror = 6495 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6496 (uint32_t *)(AHCI_PORT_PxSERR(ahci_ctlp, port))); 6497 sd->satadev_scr.scontrol = 6498 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6499 (uint32_t *)(AHCI_PORT_PxSCTL(ahci_ctlp, port))); 6500 sd->satadev_scr.sactive = 6501 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6502 (uint32_t *)(AHCI_PORT_PxSACT(ahci_ctlp, port))); 6503 } 6504 6505 /* 6506 * For poll mode, ahci_port_intr will be called to emulate the interrupt 6507 */ 6508 static void 6509 ahci_port_intr(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, uint8_t port) 6510 { 6511 uint32_t port_intr_status; 6512 uint32_t port_intr_enable; 6513 6514 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 6515 "ahci_port_intr enter: port %d", port); 6516 6517 mutex_enter(&ahci_portp->ahciport_mutex); 6518 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_POLLING) { 6519 /* For SATA_OPMODE_POLLING commands */ 6520 port_intr_enable = 6521 (AHCI_INTR_STATUS_DHRS | 6522 AHCI_INTR_STATUS_PSS | 6523 AHCI_INTR_STATUS_SDBS | 6524 AHCI_INTR_STATUS_UFS | 6525 AHCI_INTR_STATUS_PCS | 6526 AHCI_INTR_STATUS_PRCS | 6527 AHCI_INTR_STATUS_OFS | 6528 AHCI_INTR_STATUS_INFS | 6529 AHCI_INTR_STATUS_IFS | 6530 AHCI_INTR_STATUS_HBDS | 6531 AHCI_INTR_STATUS_HBFS | 6532 AHCI_INTR_STATUS_TFES); 6533 } else { 6534 /* 6535 * port_intr_enable indicates that the corresponding interrrupt 6536 * reporting is enabled. 6537 */ 6538 port_intr_enable = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6539 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port)); 6540 } 6541 6542 /* IPMS error in port reset should be ignored according AHCI spec. */ 6543 if (!(ahci_portp->ahciport_flags & AHCI_PORT_FLAG_IGNORE_IPMS)) 6544 port_intr_enable |= AHCI_INTR_STATUS_IPMS; 6545 mutex_exit(&ahci_portp->ahciport_mutex); 6546 6547 /* 6548 * port_intr_stats indicates that the corresponding interrupt 6549 * condition is active. 6550 */ 6551 port_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6552 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port)); 6553 6554 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6555 "ahci_port_intr: port %d, port_intr_status = 0x%x, " 6556 "port_intr_enable = 0x%x", 6557 port, port_intr_status, port_intr_enable); 6558 6559 port_intr_status &= port_intr_enable; 6560 6561 /* 6562 * Pending interrupt events are indicated by the PxIS register. 6563 * Make sure we don't miss any event. 6564 */ 6565 if (ahci_check_ctl_handle(ahci_ctlp) != DDI_SUCCESS) { 6566 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 6567 DDI_SERVICE_UNAFFECTED); 6568 ddi_fm_acc_err_clear(ahci_ctlp->ahcictl_ahci_acc_handle, 6569 DDI_FME_VERSION); 6570 return; 6571 } 6572 6573 /* First clear the port interrupts status */ 6574 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6575 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 6576 port_intr_status); 6577 6578 /* Check the completed non-queued commands */ 6579 if (port_intr_status & (AHCI_INTR_STATUS_DHRS | 6580 AHCI_INTR_STATUS_PSS)) { 6581 (void) ahci_intr_cmd_cmplt(ahci_ctlp, 6582 ahci_portp, port); 6583 } 6584 6585 /* Check the completed queued commands */ 6586 if (port_intr_status & AHCI_INTR_STATUS_SDBS) { 6587 (void) ahci_intr_set_device_bits(ahci_ctlp, 6588 ahci_portp, port); 6589 } 6590 6591 /* Check the port connect change status interrupt bit */ 6592 if (port_intr_status & AHCI_INTR_STATUS_PCS) { 6593 (void) ahci_intr_port_connect_change(ahci_ctlp, 6594 ahci_portp, port); 6595 } 6596 6597 /* Check the device mechanical presence status interrupt bit */ 6598 if (port_intr_status & AHCI_INTR_STATUS_DMPS) { 6599 (void) ahci_intr_device_mechanical_presence_status( 6600 ahci_ctlp, ahci_portp, port); 6601 } 6602 6603 /* Check the PhyRdy change status interrupt bit */ 6604 if (port_intr_status & AHCI_INTR_STATUS_PRCS) { 6605 (void) ahci_intr_phyrdy_change(ahci_ctlp, ahci_portp, 6606 port); 6607 } 6608 6609 /* 6610 * Check the non-fatal error interrupt bits, there are four 6611 * kinds of non-fatal errors at the time being: 6612 * 6613 * PxIS.UFS - Unknown FIS Error 6614 * PxIS.OFS - Overflow Error 6615 * PxIS.INFS - Interface Non-Fatal Error 6616 * PxIS.IPMS - Incorrect Port Multiplier Status Error 6617 * 6618 * For these non-fatal errors, the HBA can continue to operate, 6619 * so the driver just log the error messages. 6620 */ 6621 if (port_intr_status & (AHCI_INTR_STATUS_UFS | 6622 AHCI_INTR_STATUS_OFS | 6623 AHCI_INTR_STATUS_IPMS | 6624 AHCI_INTR_STATUS_INFS)) { 6625 (void) ahci_intr_non_fatal_error(ahci_ctlp, ahci_portp, 6626 port, port_intr_status); 6627 } 6628 6629 /* 6630 * Check the fatal error interrupt bits, there are four kinds 6631 * of fatal errors for AHCI controllers: 6632 * 6633 * PxIS.HBFS - Host Bus Fatal Error 6634 * PxIS.HBDS - Host Bus Data Error 6635 * PxIS.IFS - Interface Fatal Error 6636 * PxIS.TFES - Task File Error 6637 * 6638 * The fatal error means the HBA can not recover from it by 6639 * itself, and it will try to abort the transfer, and the software 6640 * must intervene to restart the port. 6641 */ 6642 if (port_intr_status & (AHCI_INTR_STATUS_IFS | 6643 AHCI_INTR_STATUS_HBDS | 6644 AHCI_INTR_STATUS_HBFS | 6645 AHCI_INTR_STATUS_TFES)) 6646 (void) ahci_intr_fatal_error(ahci_ctlp, ahci_portp, 6647 port, port_intr_status); 6648 6649 /* Check the cold port detect interrupt bit */ 6650 if (port_intr_status & AHCI_INTR_STATUS_CPDS) { 6651 (void) ahci_intr_cold_port_detect(ahci_ctlp, ahci_portp, port); 6652 } 6653 6654 /* Second clear the corresponding bit in IS.IPS */ 6655 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 6656 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp), (0x1 << port)); 6657 6658 /* Try to recover at the end of the interrupt handler. */ 6659 if (ahci_check_acc_handle(ahci_ctlp->ahcictl_ahci_acc_handle) != 6660 DDI_FM_OK) { 6661 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 6662 DDI_SERVICE_UNAFFECTED); 6663 ddi_fm_acc_err_clear(ahci_ctlp->ahcictl_ahci_acc_handle, 6664 DDI_FME_VERSION); 6665 } 6666 } 6667 6668 /* 6669 * Interrupt service handler 6670 */ 6671 static uint_t 6672 ahci_intr(caddr_t arg1, caddr_t arg2) 6673 { 6674 #ifndef __lock_lint 6675 _NOTE(ARGUNUSED(arg2)) 6676 #endif 6677 /* LINTED */ 6678 ahci_ctl_t *ahci_ctlp = (ahci_ctl_t *)arg1; 6679 ahci_port_t *ahci_portp; 6680 int32_t global_intr_status; 6681 uint8_t port; 6682 6683 /* 6684 * global_intr_status indicates that the corresponding port has 6685 * an interrupt pending. 6686 */ 6687 global_intr_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6688 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp)); 6689 6690 if (!(global_intr_status & ahci_ctlp->ahcictl_ports_implemented)) { 6691 /* The interrupt is not ours */ 6692 return (DDI_INTR_UNCLAIMED); 6693 } 6694 6695 /* 6696 * Check the handle after reading global_intr_status - we don't want 6697 * to miss any port with pending interrupts. 6698 */ 6699 if (ahci_check_acc_handle(ahci_ctlp->ahcictl_ahci_acc_handle) != 6700 DDI_FM_OK) { 6701 ddi_fm_service_impact(ahci_ctlp->ahcictl_dip, 6702 DDI_SERVICE_UNAFFECTED); 6703 ddi_fm_acc_err_clear(ahci_ctlp->ahcictl_ahci_acc_handle, 6704 DDI_FME_VERSION); 6705 return (DDI_INTR_UNCLAIMED); 6706 } 6707 6708 /* Loop for all the ports */ 6709 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 6710 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 6711 continue; 6712 } 6713 if (!((0x1 << port) & global_intr_status)) { 6714 continue; 6715 } 6716 6717 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 6718 6719 /* Call ahci_port_intr */ 6720 ahci_port_intr(ahci_ctlp, ahci_portp, port); 6721 } 6722 6723 return (DDI_INTR_CLAIMED); 6724 } 6725 6726 /* 6727 * For non-queued commands, when the corresponding bit in the PxCI register 6728 * is cleared, it means the command is completed successfully. And according 6729 * to the HBA state machine, there are three conditions which possibly will 6730 * try to clear the PxCI register bit. 6731 * 1. Receive one D2H Register FIS which is with 'I' bit set 6732 * 2. Update PIO Setup FIS 6733 * 3. Transmit a command and receive R_OK if CTBA.C is set (software reset) 6734 * 6735 * Process completed non-queued commands when the interrupt status bit - 6736 * AHCI_INTR_STATUS_DHRS or AHCI_INTR_STATUS_PSS is set. 6737 * 6738 * AHCI_INTR_STATUS_DHRS means a D2H Register FIS has been received 6739 * with the 'I' bit set. And the following commands will send thus 6740 * FIS with 'I' bit set upon the successful completion: 6741 * 1. Non-data commands 6742 * 2. DMA data-in command 6743 * 3. DMA data-out command 6744 * 4. PIO data-out command 6745 * 5. PACKET non-data commands 6746 * 6. PACKET PIO data-in command 6747 * 7. PACKET PIO data-out command 6748 * 8. PACKET DMA data-in command 6749 * 9. PACKET DMA data-out command 6750 * 6751 * AHCI_INTR_STATUS_PSS means a PIO Setup FIS has been received 6752 * with the 'I' bit set. And the following commands will send this 6753 * FIS upon the successful completion: 6754 * 1. PIO data-in command 6755 */ 6756 static int 6757 ahci_intr_cmd_cmplt(ahci_ctl_t *ahci_ctlp, 6758 ahci_port_t *ahci_portp, uint8_t port) 6759 { 6760 uint32_t port_cmd_issue = 0; 6761 uint32_t finished_tags; 6762 int finished_slot; 6763 sata_pkt_t *satapkt; 6764 ahci_fis_d2h_register_t *rcvd_fisp; 6765 #if AHCI_DEBUG 6766 ahci_cmd_header_t *cmd_header; 6767 uint32_t cmd_dmacount; 6768 #endif 6769 6770 mutex_enter(&ahci_portp->ahciport_mutex); 6771 6772 if (!ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 6773 !RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) && 6774 !NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 6775 /* 6776 * Spurious interrupt. Nothing to be done. 6777 */ 6778 mutex_exit(&ahci_portp->ahciport_mutex); 6779 return (AHCI_SUCCESS); 6780 } 6781 6782 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 6783 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 6784 6785 /* If the PxCI corrupts, don't complete the commmands. */ 6786 if (ahci_check_acc_handle(ahci_ctlp->ahcictl_ahci_acc_handle) 6787 != DDI_FM_OK) { 6788 mutex_exit(&ahci_portp->ahciport_mutex); 6789 return (AHCI_FAILURE); 6790 } 6791 6792 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 6793 /* Slot 0 is always used during error recovery */ 6794 finished_tags = 0x1 & ~port_cmd_issue; 6795 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 6796 "ahci_intr_cmd_cmplt: port %d the sata pkt for error " 6797 "retrieval is finished, and finished_tags = 0x%x", 6798 port, finished_tags); 6799 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 6800 finished_tags = 0x1 & ~port_cmd_issue; 6801 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, 6802 "ahci_intr_cmd_cmplt: port %d the sata pkt for r/w " 6803 "port multiplier is finished, and finished_tags = 0x%x", 6804 port, finished_tags); 6805 6806 } else { 6807 6808 finished_tags = ahci_portp->ahciport_pending_tags & 6809 ~port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp); 6810 } 6811 6812 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6813 "ahci_intr_cmd_cmplt: pending_tags = 0x%x, " 6814 "port_cmd_issue = 0x%x finished_tags = 0x%x", 6815 ahci_portp->ahciport_pending_tags, port_cmd_issue, 6816 finished_tags); 6817 6818 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) && 6819 (finished_tags == 0x1)) { 6820 satapkt = ahci_portp->ahciport_err_retri_pkt; 6821 ASSERT(satapkt != NULL); 6822 6823 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6824 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6825 "with SATA_PKT_COMPLETED", (void *)satapkt); 6826 6827 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6828 goto out; 6829 } 6830 6831 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) && 6832 (finished_tags == 0x1)) { 6833 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 6834 ASSERT(satapkt != NULL); 6835 6836 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6837 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6838 "with SATA_PKT_COMPLETED", (void *)satapkt); 6839 6840 /* READ PORTMULT need copy out FIS content. */ 6841 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 6842 rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 6843 ahcirf_d2h_register_fis); 6844 satapkt->satapkt_cmd.satacmd_status_reg = 6845 GET_RFIS_STATUS(rcvd_fisp); 6846 ahci_copy_out_regs(&satapkt->satapkt_cmd, rcvd_fisp); 6847 } 6848 6849 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6850 goto out; 6851 } 6852 6853 while (finished_tags) { 6854 finished_slot = ddi_ffs(finished_tags) - 1; 6855 if (finished_slot == -1) { 6856 goto out; 6857 } 6858 6859 satapkt = ahci_portp->ahciport_slot_pkts[finished_slot]; 6860 ASSERT(satapkt != NULL); 6861 #if AHCI_DEBUG 6862 /* 6863 * For non-native queued commands, the PRD byte count field 6864 * shall contain an accurate count of the number of bytes 6865 * transferred for the command before the PxCI bit is cleared 6866 * to '0' for the command. 6867 * 6868 * The purpose of this field is to let software know how many 6869 * bytes transferred for a given operation in order to 6870 * determine if underflow occurred. When issuing native command 6871 * queuing commands, this field should not be used and is not 6872 * required to be valid since in this case underflow is always 6873 * illegal. 6874 * 6875 * For data reads, the HBA will update its PRD byte count with 6876 * the total number of bytes received from the last FIS, and 6877 * may be able to continue normally. For data writes, the 6878 * device will detect an error, and HBA most likely will get 6879 * a fatal error. 6880 * 6881 * Therefore, here just put code to debug part. And please 6882 * refer to the comment above ahci_intr_fatal_error for the 6883 * definition of underflow error. 6884 */ 6885 cmd_dmacount = 6886 ahci_portp->ahciport_prd_bytecounts[finished_slot]; 6887 if (cmd_dmacount) { 6888 cmd_header = 6889 &ahci_portp->ahciport_cmd_list[finished_slot]; 6890 AHCIDBG(AHCIDBG_INTR|AHCIDBG_PRDT, ahci_ctlp, 6891 "ahci_intr_cmd_cmplt: port %d, " 6892 "PRD Byte Count = 0x%x, " 6893 "ahciport_prd_bytecounts = 0x%x", port, 6894 cmd_header->ahcich_prd_byte_count, 6895 cmd_dmacount); 6896 6897 if (cmd_header->ahcich_prd_byte_count != cmd_dmacount) { 6898 AHCIDBG(AHCIDBG_UNDERFLOW, ahci_ctlp, 6899 "ahci_intr_cmd_cmplt: port %d, " 6900 "an underflow occurred", port); 6901 } 6902 } 6903 #endif 6904 6905 /* 6906 * For SATAC_SMART command with SATA_SMART_RETURN_STATUS 6907 * feature, sata_special_regs flag will be set, and the 6908 * driver should copy the status and the other corresponding 6909 * register values in the D2H Register FIS received (It's 6910 * working on Non-data protocol) from the device back to 6911 * the sata_cmd. 6912 * 6913 * For every AHCI port, there is only one Received FIS 6914 * structure, which contains the FISes received from the 6915 * device, So we're trying to copy the content of D2H 6916 * Register FIS in the Received FIS structure back to 6917 * the sata_cmd. 6918 */ 6919 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 6920 rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 6921 ahcirf_d2h_register_fis); 6922 satapkt->satapkt_cmd.satacmd_status_reg = 6923 GET_RFIS_STATUS(rcvd_fisp); 6924 ahci_copy_out_regs(&satapkt->satapkt_cmd, rcvd_fisp); 6925 } 6926 6927 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 6928 "ahci_intr_cmd_cmplt: sending up pkt 0x%p " 6929 "with SATA_PKT_COMPLETED", (void *)satapkt); 6930 6931 CLEAR_BIT(ahci_portp->ahciport_pending_tags, finished_slot); 6932 CLEAR_BIT(finished_tags, finished_slot); 6933 ahci_portp->ahciport_slot_pkts[finished_slot] = NULL; 6934 6935 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_COMPLETED); 6936 } 6937 out: 6938 AHCIDBG(AHCIDBG_PKTCOMP, ahci_ctlp, 6939 "ahci_intr_cmd_cmplt: pending_tags = 0x%x", 6940 ahci_portp->ahciport_pending_tags); 6941 6942 ahci_flush_doneq(ahci_portp); 6943 6944 mutex_exit(&ahci_portp->ahciport_mutex); 6945 6946 return (AHCI_SUCCESS); 6947 } 6948 6949 /* 6950 * AHCI_INTR_STATUS_SDBS means a Set Device Bits FIS has been received 6951 * with the 'I' bit set and has been copied into system memory. It will 6952 * be sent under the following situations: 6953 * 6954 * 1. NCQ command is completed 6955 * 6956 * The completion of NCQ commands (READ/WRITE FPDMA QUEUED) is performed 6957 * via the Set Device Bits FIS. When such event is generated, the software 6958 * needs to read PxSACT register and compares the current value to the 6959 * list of commands previously issue by software. ahciport_pending_ncq_tags 6960 * keeps the tags of previously issued commands. 6961 * 6962 * 2. Asynchronous Notification 6963 * 6964 * Asynchronous Notification is a feature in SATA spec 2.6. 6965 * 6966 * 1) ATAPI device will send a signal to the host when media is inserted or 6967 * removed and avoids polling the device for media changes. The signal 6968 * sent to the host is a Set Device Bits FIS with the 'I' and 'N' bits 6969 * set to '1'. At the moment, it's not supported yet. 6970 * 6971 * 2) Port multiplier will send a signal to the host when a hot plug event 6972 * has occured on a port multiplier port. It is used when command based 6973 * switching is employed. This is handled by ahci_intr_pmult_sntf_events() 6974 */ 6975 static int 6976 ahci_intr_set_device_bits(ahci_ctl_t *ahci_ctlp, 6977 ahci_port_t *ahci_portp, uint8_t port) 6978 { 6979 ahci_addr_t addr; 6980 6981 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 6982 "ahci_intr_set_device_bits enter: port %d", port); 6983 6984 /* Initialize HBA port address */ 6985 AHCI_ADDR_SET_PORT(&addr, port); 6986 6987 /* NCQ plug handler */ 6988 (void) ahci_intr_ncq_events(ahci_ctlp, ahci_portp, &addr); 6989 6990 /* Check port multiplier's asynchronous notification events */ 6991 if (ahci_ctlp->ahcictl_cap & AHCI_CAP_SNTF) { 6992 (void) ahci_intr_pmult_sntf_events(ahci_ctlp, 6993 ahci_portp, port); 6994 } 6995 6996 /* ATAPI events is not supported yet */ 6997 6998 return (AHCI_SUCCESS); 6999 } 7000 /* 7001 * NCQ interrupt handler. Called upon a NCQ command is completed. 7002 * Only be called from ahci_intr_set_device_bits(). 7003 * 7004 * WARNING!!! ahciport_mutex should be acquired before the function is 7005 * called. 7006 */ 7007 static int 7008 ahci_intr_ncq_events(ahci_ctl_t *ahci_ctlp, 7009 ahci_port_t *ahci_portp, ahci_addr_t *addrp) 7010 { 7011 uint32_t port_sactive; 7012 uint32_t port_cmd_issue; 7013 uint32_t issued_tags; 7014 int issued_slot; 7015 uint32_t finished_tags; 7016 int finished_slot; 7017 uint8_t port = addrp->aa_port; 7018 sata_pkt_t *satapkt; 7019 7020 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 7021 "ahci_intr_set_device_bits enter: port %d", port); 7022 7023 mutex_enter(&ahci_portp->ahciport_mutex); 7024 if (!NCQ_CMD_IN_PROGRESS(ahci_portp)) { 7025 mutex_exit(&ahci_portp->ahciport_mutex); 7026 return (AHCI_SUCCESS); 7027 } 7028 7029 /* 7030 * First the handler got which commands are finished by checking 7031 * PxSACT register 7032 */ 7033 port_sactive = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7034 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 7035 7036 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 7037 ~port_sactive & AHCI_NCQ_SLOT_MASK(ahci_portp); 7038 7039 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 7040 "ahci_intr_set_device_bits: port %d pending_ncq_tags = 0x%x " 7041 "port_sactive = 0x%x", port, 7042 ahci_portp->ahciport_pending_ncq_tags, port_sactive); 7043 7044 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 7045 "ahci_intr_set_device_bits: finished_tags = 0x%x", finished_tags); 7046 7047 /* 7048 * For NCQ commands, the software can determine which command has 7049 * already been transmitted to the device by checking PxCI register. 7050 */ 7051 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7052 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 7053 7054 issued_tags = ahci_portp->ahciport_pending_tags & 7055 ~port_cmd_issue & AHCI_SLOT_MASK(ahci_ctlp); 7056 7057 /* If the PxSACT/PxCI corrupts, don't complete the NCQ commmands. */ 7058 if (ahci_check_acc_handle(ahci_ctlp->ahcictl_ahci_acc_handle) 7059 != DDI_FM_OK) { 7060 mutex_exit(&ahci_portp->ahciport_mutex); 7061 return (AHCI_FAILURE); 7062 } 7063 7064 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 7065 "ahci_intr_set_device_bits: port %d pending_tags = 0x%x " 7066 "port_cmd_issue = 0x%x", port, 7067 ahci_portp->ahciport_pending_tags, port_cmd_issue); 7068 7069 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 7070 "ahci_intr_set_device_bits: issued_tags = 0x%x", issued_tags); 7071 7072 /* 7073 * Clear ahciport_pending_tags bit when the corresponding command 7074 * is already sent down to the device. 7075 */ 7076 while (issued_tags) { 7077 issued_slot = ddi_ffs(issued_tags) - 1; 7078 if (issued_slot == -1) { 7079 goto next; 7080 } 7081 CLEAR_BIT(ahci_portp->ahciport_pending_tags, issued_slot); 7082 CLEAR_BIT(issued_tags, issued_slot); 7083 } 7084 7085 next: 7086 while (finished_tags) { 7087 finished_slot = ddi_ffs(finished_tags) - 1; 7088 if (finished_slot == -1) { 7089 goto out; 7090 } 7091 7092 /* The command is certainly transmitted to the device */ 7093 ASSERT(!(ahci_portp->ahciport_pending_tags & 7094 (0x1 << finished_slot))); 7095 7096 satapkt = ahci_portp->ahciport_slot_pkts[finished_slot]; 7097 ASSERT(satapkt != NULL); 7098 7099 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ, ahci_ctlp, 7100 "ahci_intr_set_device_bits: sending up pkt 0x%p " 7101 "with SATA_PKT_COMPLETED", (void *)satapkt); 7102 7103 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, finished_slot); 7104 CLEAR_BIT(finished_tags, finished_slot); 7105 ahci_portp->ahciport_slot_pkts[finished_slot] = NULL; 7106 7107 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_COMPLETED); 7108 } 7109 out: 7110 AHCIDBG(AHCIDBG_PKTCOMP|AHCIDBG_NCQ, ahci_ctlp, 7111 "ahci_intr_set_device_bits: port %d " 7112 "pending_ncq_tags = 0x%x pending_tags = 0x%x", 7113 port, ahci_portp->ahciport_pending_ncq_tags, 7114 ahci_portp->ahciport_pending_tags); 7115 7116 ahci_flush_doneq(ahci_portp); 7117 7118 mutex_exit(&ahci_portp->ahciport_mutex); 7119 7120 return (AHCI_SUCCESS); 7121 } 7122 7123 /* 7124 * Port multiplier asynchronous notification event handler. Called upon a 7125 * device is hot plugged/pulled. 7126 * 7127 * The async-notification event will only be recorded by ahcipmi_snotif_tags 7128 * here and will be handled by ahci_probe_pmult(). 7129 * 7130 * NOTE: called only from ahci_port_intr(). 7131 */ 7132 static int 7133 ahci_intr_pmult_sntf_events(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 7134 uint8_t port) 7135 { 7136 sata_device_t sdevice; 7137 7138 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 7139 "ahci_intr_pmult_sntf_events enter: port %d ", port); 7140 7141 /* no hot-plug while attaching process */ 7142 mutex_enter(&ahci_ctlp->ahcictl_mutex); 7143 if (ahci_ctlp->ahcictl_flags & AHCI_ATTACH) { 7144 mutex_exit(&ahci_ctlp->ahcictl_mutex); 7145 return (AHCI_SUCCESS); 7146 } 7147 mutex_exit(&ahci_ctlp->ahcictl_mutex); 7148 7149 mutex_enter(&ahci_portp->ahciport_mutex); 7150 if (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 7151 mutex_exit(&ahci_portp->ahciport_mutex); 7152 return (AHCI_SUCCESS); 7153 } 7154 7155 ASSERT(ahci_portp->ahciport_pmult_info != NULL); 7156 7157 ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags = 7158 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7159 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port)); 7160 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7161 (uint32_t *)AHCI_PORT_PxSNTF(ahci_ctlp, port), 7162 AHCI_SNOTIF_CLEAR_ALL); 7163 7164 if (ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags == 0) { 7165 mutex_exit(&ahci_portp->ahciport_mutex); 7166 return (AHCI_SUCCESS); 7167 } 7168 7169 /* Port Multiplier sub-device hot-plug handler */ 7170 if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 7171 mutex_exit(&ahci_portp->ahciport_mutex); 7172 return (AHCI_SUCCESS); 7173 } 7174 7175 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_PMULT_SNTF) { 7176 /* Not allowed to re-enter. */ 7177 mutex_exit(&ahci_portp->ahciport_mutex); 7178 return (AHCI_SUCCESS); 7179 } 7180 7181 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_PMULT_SNTF; 7182 7183 /* 7184 * NOTE: 7185 * Even if Asynchronous Notification is supported (and enabled) by 7186 * both controller and the port multiplier, the content of PxSNTF 7187 * register is always set to 0x8000 by async notification event. We 7188 * need to check GSCR[32] on the port multiplier to find out the 7189 * owner of this event. 7190 * This is not accord with SATA spec 2.6 and needs further 7191 * clarification. 7192 */ 7193 /* hot-plug will not reported while reseting. */ 7194 if (ahci_portp->ahciport_reset_in_progress == 1) { 7195 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 7196 "port %d snotif event ignored", port); 7197 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_PMULT_SNTF; 7198 mutex_exit(&ahci_portp->ahciport_mutex); 7199 return (AHCI_SUCCESS); 7200 } 7201 7202 AHCIDBG(AHCIDBG_INFO|AHCIDBG_PMULT, ahci_ctlp, 7203 "PxSNTF is set to 0x%x by port multiplier", 7204 ahci_portp->ahciport_pmult_info->ahcipmi_snotif_tags); 7205 7206 /* 7207 * Now we need do some necessary operation and inform SATA framework 7208 * that link/device events has happened. 7209 */ 7210 bzero((void *)&sdevice, sizeof (sata_device_t)); 7211 sdevice.satadev_addr.cport = ahci_ctlp-> 7212 ahcictl_port_to_cport[port]; 7213 sdevice.satadev_addr.pmport = SATA_PMULT_HOSTPORT; 7214 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 7215 sdevice.satadev_state = SATA_PSTATE_PWRON; 7216 7217 /* Just reject packets, do not stop that port. */ 7218 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 7219 7220 mutex_exit(&ahci_portp->ahciport_mutex); 7221 sata_hba_event_notify( 7222 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7223 &sdevice, 7224 SATA_EVNT_PMULT_LINK_CHANGED); 7225 mutex_enter(&ahci_portp->ahciport_mutex); 7226 7227 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_PMULT_SNTF; 7228 mutex_exit(&ahci_portp->ahciport_mutex); 7229 7230 return (AHCI_SUCCESS); 7231 } 7232 7233 /* 7234 * 1=Change in Current Connect Status. 0=No change in Current Connect Status. 7235 * This bit reflects the state of PxSERR.DIAG.X. This bit is only cleared 7236 * when PxSERR.DIAG.X is cleared. When PxSERR.DIAG.X is set to one, it 7237 * indicates a COMINIT signal was received. 7238 * 7239 * Hot plug insertion is detected by reception of a COMINIT signal from the 7240 * device. On reception of unsolicited COMINIT, the HBA shall generate a 7241 * COMRESET. If the COMINIT is in responce to a COMRESET, then the HBA shall 7242 * begin the normal communication negotiation sequence as outlined in the 7243 * Serial ATA 1.0a specification. When a COMRESET is sent to the device the 7244 * PxSSTS.DET field shall be cleared to 0h. When a COMINIT is received, the 7245 * PxSSTS.DET field shall be set to 1h. When the communication negotiation 7246 * sequence is complete and PhyRdy is true the PxSSTS.DET field shall be set 7247 * to 3h. Therefore, at the moment the ahci driver is going to check PhyRdy 7248 * to handle hot plug insertion. In this interrupt handler, just do nothing 7249 * but print some log message and clear the bit. 7250 */ 7251 static int 7252 ahci_intr_port_connect_change(ahci_ctl_t *ahci_ctlp, 7253 ahci_port_t *ahci_portp, uint8_t port) 7254 { 7255 #if AHCI_DEBUG 7256 uint32_t port_serror; 7257 #endif 7258 7259 mutex_enter(&ahci_portp->ahciport_mutex); 7260 7261 #if AHCI_DEBUG 7262 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7263 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 7264 7265 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 7266 "ahci_intr_port_connect_change: port %d, " 7267 "port_serror = 0x%x", port, port_serror); 7268 #endif 7269 7270 /* Clear PxSERR.DIAG.X to clear the interrupt bit */ 7271 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7272 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 7273 SERROR_EXCHANGED_ERR); 7274 7275 mutex_exit(&ahci_portp->ahciport_mutex); 7276 7277 return (AHCI_SUCCESS); 7278 } 7279 7280 /* 7281 * Hot Plug Operation for platforms that support Mechanical Presence 7282 * Switches. 7283 * 7284 * When set, it indicates that a mechanical presence switch attached to this 7285 * port has been opened or closed, which may lead to a change in the connection 7286 * state of the device. This bit is only valid if both CAP.SMPS and PxCMD.MPSP 7287 * are set to '1'. 7288 * 7289 * At the moment, this interrupt is not needed and disabled and we just log 7290 * the debug message. 7291 */ 7292 static int 7293 ahci_intr_device_mechanical_presence_status(ahci_ctl_t *ahci_ctlp, 7294 ahci_port_t *ahci_portp, uint8_t port) 7295 { 7296 uint32_t cap_status, port_cmd_status; 7297 7298 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 7299 "ahci_intr_device_mechanical_presence_status enter, " 7300 "port %d", port); 7301 7302 cap_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7303 (uint32_t *)AHCI_GLOBAL_CAP(ahci_ctlp)); 7304 7305 mutex_enter(&ahci_portp->ahciport_mutex); 7306 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7307 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7308 7309 if (!(cap_status & AHCI_HBA_CAP_SMPS) || 7310 !(port_cmd_status & AHCI_CMD_STATUS_MPSP)) { 7311 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7312 "CAP.SMPS or PxCMD.MPSP is not set, so just ignore " 7313 "the interrupt: cap_status = 0x%x, " 7314 "port_cmd_status = 0x%x", cap_status, port_cmd_status); 7315 mutex_exit(&ahci_portp->ahciport_mutex); 7316 7317 return (AHCI_SUCCESS); 7318 } 7319 7320 #if AHCI_DEBUG 7321 if (port_cmd_status & AHCI_CMD_STATUS_MPSS) { 7322 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7323 "The mechanical presence switch is open: " 7324 "port %d, port_cmd_status = 0x%x", 7325 port, port_cmd_status); 7326 } else { 7327 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7328 "The mechanical presence switch is close: " 7329 "port %d, port_cmd_status = 0x%x", 7330 port, port_cmd_status); 7331 } 7332 #endif 7333 7334 mutex_exit(&ahci_portp->ahciport_mutex); 7335 7336 return (AHCI_SUCCESS); 7337 } 7338 7339 /* 7340 * Native Hot Plug Support. 7341 * 7342 * When set, it indicates that the internal PHYRDY signal changed state. 7343 * This bit reflects the state of PxSERR.DIAG.N. 7344 * 7345 * There are three kinds of conditions to generate this interrupt event: 7346 * 1. a device is inserted 7347 * 2. a device is disconnected 7348 * 3. when the link enters/exits a Partial or Slumber interface power 7349 * management state 7350 * 7351 * If inteface power management is enabled for a port, the PxSERR.DIAG.N 7352 * bit may be set due to the link entering the Partial or Slumber power 7353 * management state, rather than due to a hot plug insertion or removal 7354 * event. So far, the interface power management is disabled, so the 7355 * driver can reliably get removal detection notification via the 7356 * PxSERR.DIAG.N bit. 7357 */ 7358 static int 7359 ahci_intr_phyrdy_change(ahci_ctl_t *ahci_ctlp, 7360 ahci_port_t *ahci_portp, uint8_t port) 7361 { 7362 uint32_t port_sstatus = 0; /* No dev present & PHY not established. */ 7363 sata_device_t sdevice; 7364 int dev_exists_now = 0; 7365 int dev_existed_previously = 0; 7366 ahci_addr_t port_addr; 7367 7368 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY, ahci_ctlp, 7369 "ahci_intr_phyrdy_change enter, port %d", port); 7370 7371 /* Clear PxSERR.DIAG.N to clear the interrupt bit */ 7372 mutex_enter(&ahci_portp->ahciport_mutex); 7373 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7374 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 7375 SERROR_PHY_RDY_CHG); 7376 mutex_exit(&ahci_portp->ahciport_mutex); 7377 7378 mutex_enter(&ahci_ctlp->ahcictl_mutex); 7379 if ((ahci_ctlp->ahcictl_sata_hba_tran == NULL) || 7380 (ahci_portp == NULL)) { 7381 /* The whole controller setup is not yet done. */ 7382 mutex_exit(&ahci_ctlp->ahcictl_mutex); 7383 return (AHCI_SUCCESS); 7384 } 7385 mutex_exit(&ahci_ctlp->ahcictl_mutex); 7386 7387 mutex_enter(&ahci_portp->ahciport_mutex); 7388 7389 /* SStatus tells the presence of device. */ 7390 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7391 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 7392 7393 if (SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_PHYCOM) { 7394 dev_exists_now = 1; 7395 } 7396 7397 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) { 7398 dev_existed_previously = 1; 7399 } 7400 7401 if (ahci_portp->ahciport_flags & AHCI_PORT_FLAG_NODEV) { 7402 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_NODEV; 7403 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 7404 "ahci_intr_phyrdy_change: port %d " 7405 "AHCI_PORT_FLAG_NODEV is cleared", port); 7406 if (dev_exists_now == 0) 7407 dev_existed_previously = 1; 7408 } 7409 7410 bzero((void *)&sdevice, sizeof (sata_device_t)); 7411 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 7412 sdevice.satadev_addr.qual = SATA_ADDR_CPORT; 7413 sdevice.satadev_addr.pmport = 0; 7414 sdevice.satadev_state = SATA_PSTATE_PWRON; 7415 ahci_portp->ahciport_port_state = SATA_PSTATE_PWRON; 7416 7417 AHCI_ADDR_SET_PORT(&port_addr, port); 7418 7419 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_HOTPLUG; 7420 if (dev_exists_now) { 7421 if (dev_existed_previously) { /* 1 -> 1 */ 7422 /* Things are fine now. The loss was temporary. */ 7423 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7424 "ahci_intr_phyrdy_change port %d " 7425 "device link lost/established", port); 7426 7427 mutex_exit(&ahci_portp->ahciport_mutex); 7428 sata_hba_event_notify( 7429 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7430 &sdevice, 7431 SATA_EVNT_LINK_LOST|SATA_EVNT_LINK_ESTABLISHED); 7432 mutex_enter(&ahci_portp->ahciport_mutex); 7433 7434 } else { /* 0 -> 1 */ 7435 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7436 "ahci_intr_phyrdy_change: port %d " 7437 "device link established", port); 7438 7439 /* 7440 * A new device has been detected. The new device 7441 * might be a port multiplier instead of a drive, so 7442 * we cannot update the signature directly. 7443 */ 7444 (void) ahci_initialize_port(ahci_ctlp, 7445 ahci_portp, &port_addr); 7446 7447 /* Try to start the port */ 7448 if (ahci_start_port(ahci_ctlp, ahci_portp, port) 7449 != AHCI_SUCCESS) { 7450 sdevice.satadev_state |= SATA_PSTATE_FAILED; 7451 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 7452 "ahci_intr_phyrdy_change: port %d failed " 7453 "at start port", port); 7454 } 7455 7456 /* Clear the max queue depth for inserted device */ 7457 ahci_portp->ahciport_max_ncq_tags = 0; 7458 7459 mutex_exit(&ahci_portp->ahciport_mutex); 7460 sata_hba_event_notify( 7461 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7462 &sdevice, 7463 SATA_EVNT_LINK_ESTABLISHED); 7464 mutex_enter(&ahci_portp->ahciport_mutex); 7465 7466 } 7467 } else { /* No device exists now */ 7468 7469 if (dev_existed_previously) { /* 1 -> 0 */ 7470 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 7471 "ahci_intr_phyrdy_change: port %d " 7472 "device link lost", port); 7473 7474 ahci_reject_all_abort_pkts(ahci_ctlp, ahci_portp, port); 7475 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 7476 ahci_portp, port); 7477 7478 if (ahci_portp->ahciport_device_type == 7479 SATA_DTYPE_PMULT) { 7480 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 7481 } 7482 7483 /* An existing device is lost. */ 7484 ahci_portp->ahciport_device_type = SATA_DTYPE_NONE; 7485 ahci_portp->ahciport_port_state = SATA_STATE_UNKNOWN; 7486 7487 mutex_exit(&ahci_portp->ahciport_mutex); 7488 sata_hba_event_notify( 7489 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7490 &sdevice, 7491 SATA_EVNT_LINK_LOST); 7492 mutex_enter(&ahci_portp->ahciport_mutex); 7493 } 7494 } 7495 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_HOTPLUG; 7496 7497 mutex_exit(&ahci_portp->ahciport_mutex); 7498 7499 return (AHCI_SUCCESS); 7500 } 7501 7502 /* 7503 * PxIS.UFS - Unknown FIS Error 7504 * 7505 * This interrupt event means an unknown FIS was received and has been 7506 * copied into system memory. An unknown FIS is not considered an illegal 7507 * FIS, unless the length received is more than 64 bytes. If an unknown 7508 * FIS arrives with length <= 64 bytes, it is posted and the HBA continues 7509 * normal operation. If the unknown FIS is more than 64 bytes, then it 7510 * won't be posted to memory and PxSERR.ERR.P will be set, which is then 7511 * a fatal error. 7512 * 7513 * PxIS.IPMS - Incorrect Port Multiplier Status 7514 * 7515 * IPMS Indicates that the HBA received a FIS from a device that did not 7516 * have a command outstanding. The IPMS bit may be set during enumeration 7517 * of devices on a Port Multiplier due to the normal Port Multiplier 7518 * enumeration process. It is recommended that IPMS only be used after 7519 * enumeration is complete on the Port Multiplier (copied from spec). 7520 * 7521 * PxIS.OFS - Overflow Error 7522 * 7523 * Command list overflow is defined as software building a command table 7524 * that has fewer total bytes than the transaction given to the device. 7525 * On device writes, the HBA will run out of data, and on reads, there 7526 * will be no room to put the data. 7527 * 7528 * For an overflow on data read, either PIO or DMA, the HBA will set 7529 * PxIS.OFS, and the HBA will do a best effort to continue, and it's a 7530 * non-fatal error when the HBA can continues. Sometimes, it will cause 7531 * a fatal error and need the software to do something. 7532 * 7533 * For an overflow on data write, setting PxIS.OFS is optional for both 7534 * DMA and PIO, and it's a fatal error, and a COMRESET is required by 7535 * software to clean up from this serious error. 7536 * 7537 * PxIS.INFS - Interface Non-Fatal Error 7538 * 7539 * This interrupt event indicates that the HBA encountered an error on 7540 * the Serial ATA interface but was able to continue operation. The kind 7541 * of error usually occurred during a non-Data FIS, and under this condition 7542 * the FIS will be re-transmitted by HBA automatically. 7543 * 7544 * When the FMA is implemented, there should be a stat structure to 7545 * record how many every kind of error happens. 7546 */ 7547 static int 7548 ahci_intr_non_fatal_error(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 7549 uint8_t port, uint32_t intr_status) 7550 { 7551 uint32_t port_serror; 7552 #if AHCI_DEBUG 7553 uint32_t port_cmd_status; 7554 uint32_t port_cmd_issue; 7555 uint32_t port_sactive; 7556 int current_slot; 7557 uint32_t current_tags; 7558 sata_pkt_t *satapkt; 7559 ahci_cmd_header_t *cmd_header; 7560 uint32_t cmd_dmacount; 7561 #endif 7562 7563 mutex_enter(&ahci_portp->ahciport_mutex); 7564 7565 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7566 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 7567 7568 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ENTRY|AHCIDBG_ERRS, ahci_ctlp, 7569 "ahci_intr_non_fatal_error: port %d, " 7570 "PxSERR = 0x%x, PxIS = 0x%x ", port, port_serror, intr_status); 7571 7572 ahci_log_serror_message(ahci_ctlp, port, port_serror, 1); 7573 7574 if (intr_status & AHCI_INTR_STATUS_UFS) { 7575 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 7576 "ahci port %d has unknown FIS error", port); 7577 7578 /* Clear the interrupt bit by clearing PxSERR.DIAG.F */ 7579 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7580 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 7581 SERROR_FIS_TYPE); 7582 } 7583 7584 #if AHCI_DEBUG 7585 if (intr_status & AHCI_INTR_STATUS_IPMS) { 7586 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci port %d " 7587 "has Incorrect Port Multiplier Status error", port); 7588 } 7589 7590 if (intr_status & AHCI_INTR_STATUS_OFS) { 7591 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7592 "ahci port %d has overflow error", port); 7593 } 7594 7595 if (intr_status & AHCI_INTR_STATUS_INFS) { 7596 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7597 "ahci port %d has interface non fatal error", port); 7598 } 7599 7600 /* 7601 * Record the error occurred command's slot. 7602 */ 7603 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 7604 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 7605 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7606 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7607 7608 current_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 7609 AHCI_CMD_STATUS_CCS_SHIFT; 7610 7611 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 7612 satapkt = ahci_portp->ahciport_err_retri_pkt; 7613 ASSERT(satapkt != NULL); 7614 ASSERT(current_slot == 0); 7615 } else { 7616 satapkt = ahci_portp->ahciport_slot_pkts[current_slot]; 7617 } 7618 7619 if (satapkt != NULL) { 7620 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7621 "ahci_intr_non_fatal_error: pending_tags = 0x%x " 7622 "cmd 0x%x", ahci_portp->ahciport_pending_tags, 7623 satapkt->satapkt_cmd.satacmd_cmd_reg); 7624 7625 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7626 "ahci_intr_non_fatal_error: port %d, " 7627 "satapkt 0x%p is being processed when error occurs", 7628 port, (void *)satapkt); 7629 7630 /* 7631 * PRD Byte Count field of command header is not 7632 * required to reflect the total number of bytes 7633 * transferred when an overflow occurs, so here 7634 * just log the value. 7635 */ 7636 cmd_dmacount = 7637 ahci_portp->ahciport_prd_bytecounts[current_slot]; 7638 if (cmd_dmacount) { 7639 cmd_header = &ahci_portp-> 7640 ahciport_cmd_list[current_slot]; 7641 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7642 "ahci_intr_non_fatal_error: port %d, " 7643 "PRD Byte Count = 0x%x, " 7644 "ahciport_prd_bytecounts = 0x%x", port, 7645 cmd_header->ahcich_prd_byte_count, 7646 cmd_dmacount); 7647 } 7648 } 7649 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 7650 /* 7651 * For queued command, list those command which have already 7652 * been transmitted to the device and still not completed. 7653 */ 7654 port_sactive = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7655 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 7656 7657 port_cmd_issue = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7658 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 7659 7660 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ|AHCIDBG_ERRS, ahci_ctlp, 7661 "ahci_intr_non_fatal_error: pending_ncq_tags = 0x%x " 7662 "port_sactive = 0x%x port_cmd_issue = 0x%x", 7663 ahci_portp->ahciport_pending_ncq_tags, 7664 port_sactive, port_cmd_issue); 7665 7666 current_tags = ahci_portp->ahciport_pending_ncq_tags & 7667 port_sactive & ~port_cmd_issue & 7668 AHCI_NCQ_SLOT_MASK(ahci_portp); 7669 7670 while (current_tags) { 7671 current_slot = ddi_ffs(current_tags) - 1; 7672 if (current_slot == -1) { 7673 goto out; 7674 } 7675 7676 satapkt = ahci_portp->ahciport_slot_pkts[current_slot]; 7677 AHCIDBG(AHCIDBG_INTR|AHCIDBG_NCQ|AHCIDBG_ERRS, 7678 ahci_ctlp, "ahci_intr_non_fatal_error: " 7679 "port %d, satapkt 0x%p is outstanding when " 7680 "error occurs", port, (void *)satapkt); 7681 7682 CLEAR_BIT(current_tags, current_slot); 7683 } 7684 } 7685 out: 7686 #endif 7687 mutex_exit(&ahci_portp->ahciport_mutex); 7688 7689 return (AHCI_SUCCESS); 7690 } 7691 7692 /* 7693 * According to the AHCI spec, the error types include system memory 7694 * errors, interface errors, port multiplier errors, device errors, 7695 * command list overflow, command list underflow, native command 7696 * queuing tag errors and pio data transfer errors. 7697 * 7698 * System memory errors such as target abort, master abort, and parity 7699 * may cause the host to stop, and they are serious errors and needed 7700 * to be recovered with software intervention. When system software 7701 * has given a pointer to the HBA that doesn't exist in physical memory, 7702 * a master/target abort error occurs, and PxIS.HBFS will be set. A 7703 * data error such as CRC or parity occurs, the HBA aborts the transfer 7704 * (if necessary) and PxIS.HBDS will be set. 7705 * 7706 * Interface errors are errors that occur due to electrical issues on 7707 * the interface, or protocol miscommunication between the device and 7708 * HBA, and the respective PxSERR register bit will be set. And PxIS.IFS 7709 * (fatal) or PxIS.INFS (non-fatal) will be set. The conditions that 7710 * causes PxIS.IFS/PxIS.INFS to be set are 7711 * 1. in PxSERR.ERR, P bit is set to '1' 7712 * 2. in PxSERR.DIAG, C or H bit is set to '1' 7713 * 3. PhyRdy drop unexpectly, N bit is set to '1' 7714 * If the error occurred during a non-data FIS, the FIS must be 7715 * retransmitted, and the error is non-fatal and PxIS.INFS is set. If 7716 * the error occurred during a data FIS, the transfer will stop, so 7717 * the error is fatal and PxIS.IFS is set. 7718 * 7719 * When a FIS arrives that updates the taskfile, the HBA checks to see 7720 * if PxTFD.STS.ERR is set. If yes, PxIS.TFES will be set and the HBA 7721 * stops processing any more commands. 7722 * 7723 * Command list overflow is defined as software building a command table 7724 * that has fewer total bytes than the transaction given to the device. 7725 * On device writes, the HBA will run out of data, and on reads, there 7726 * will be no room to put the data. For an overflow on data read, either 7727 * PIO or DMA, the HBA will set PxIS.OFS, and it's a non-fatal error. 7728 * For an overflow on data write, setting PxIS.OFS is optional for both 7729 * DMA and PIO, and a COMRESET is required by software to clean up from 7730 * this serious error. 7731 * 7732 * Command list underflow is defined as software building a command 7733 * table that has more total bytes than the transaction given to the 7734 * device. For data writes, both PIO and DMA, the device will detect 7735 * an error and end the transfer. And these errors are most likely going 7736 * to be fatal errors that will cause the port to be restarted. For 7737 * data reads, the HBA updates its PRD byte count, and may be 7738 * able to continue normally, but is not required to. And The HBA is 7739 * not required to detect underflow conditions for native command 7740 * queuing command. 7741 * 7742 * The HBA does not actively check incoming DMA Setup FISes to ensure 7743 * that the PxSACT register bit for that slot is set. Existing error 7744 * mechanisms, such as host bus failure, or bad protocol, are used to 7745 * recover from this case. 7746 * 7747 * In accordance with Serial ATA 1.0a, DATA FISes prior to the final 7748 * DATA FIS must be an integral number of Dwords. If the HBA receives 7749 * a request which is not an integral number of Dwords, the HBA 7750 * set PxSERR.ERR.P to '1', set PxIS.IFS to '1' and stop running until 7751 * software restarts the port. And the HBA ensures that the size 7752 * of the DATA FIS received during a PIO command matches the size in 7753 * the Transfer Cound field of the preceding PIO Setup FIS, if not, the 7754 * HBA sets PxSERR.ERR.P to '1', set PxIS.IFS to '1', and then 7755 * stop running until software restarts the port. 7756 */ 7757 /* 7758 * the fatal errors include PxIS.IFS, PxIS.HBDS, PxIS.HBFS and PxIS.TFES. 7759 * 7760 * PxIS.IFS indicates that the hba encountered an error on the serial ata 7761 * interface which caused the transfer to stop. 7762 * 7763 * PxIS.HBDS indicates that the hba encountered a data error 7764 * (uncorrectable ecc/parity) when reading from or writing to system memory. 7765 * 7766 * PxIS.HBFS indicates that the hba encountered a host bus error that it 7767 * cannot recover from, such as a bad software pointer. 7768 * 7769 * PxIS.TFES is set whenever the status register is updated by the device 7770 * and the error bit (bit 0) is set. 7771 */ 7772 static int 7773 ahci_intr_fatal_error(ahci_ctl_t *ahci_ctlp, 7774 ahci_port_t *ahci_portp, uint8_t port, uint32_t intr_status) 7775 { 7776 uint32_t port_cmd_status; 7777 uint32_t port_serror; 7778 uint32_t task_file_status; 7779 int failed_slot; 7780 sata_pkt_t *spkt = NULL; 7781 uint8_t err_byte; 7782 ahci_event_arg_t *args; 7783 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 7784 7785 mutex_enter(&ahci_portp->ahciport_mutex); 7786 7787 /* 7788 * ahci_intr_phyrdy_change() may have rendered it to 7789 * SATA_DTYPE_NONE. 7790 */ 7791 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 7792 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 7793 "ahci_intr_fatal_error: port %d no device attached, " 7794 "and just return without doing anything", port); 7795 goto out0; 7796 } 7797 7798 if (intr_status & AHCI_INTR_STATUS_TFES) { 7799 task_file_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7800 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 7801 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7802 "ahci_intr_fatal_error: port %d " 7803 "task_file_status = 0x%x", port, task_file_status); 7804 } 7805 7806 /* 7807 * Here we just log the fatal error info in interrupt context. 7808 * Misc recovery processing will be handled in task queue. 7809 */ 7810 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 7811 /* 7812 * Read PxCMD.CCS to determine the slot that the HBA 7813 * was processing when the error occurred. 7814 */ 7815 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7816 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7817 failed_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 7818 AHCI_CMD_STATUS_CCS_SHIFT; 7819 7820 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 7821 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 7822 "ahci_intr_fatal_error: spkt 0x%p is being processed when " 7823 "fatal error occurred for port %d", spkt, port); 7824 7825 /* A Task File Data error. */ 7826 if (intr_status & AHCI_INTR_STATUS_TFES) { 7827 err_byte = (task_file_status & AHCI_TFD_ERR_MASK) 7828 >> AHCI_TFD_ERR_SHIFT; 7829 7830 /* 7831 * Won't emit the error message if it is an IDENTIFY 7832 * DEVICE command sent to an ATAPI device. 7833 */ 7834 if ((spkt != NULL) && 7835 (spkt->satapkt_cmd.satacmd_cmd_reg == 7836 SATAC_ID_DEVICE) && 7837 (err_byte == SATA_ERROR_ABORT)) 7838 goto out1; 7839 7840 /* 7841 * Won't emit the error message if it is an ATAPI PACKET 7842 * command 7843 */ 7844 if ((spkt != NULL) && 7845 (spkt->satapkt_cmd.satacmd_cmd_reg == SATAC_PACKET)) 7846 goto out1; 7847 } 7848 } 7849 7850 /* print the fatal error type */ 7851 ahci_log_fatal_error_message(ahci_ctlp, port, intr_status); 7852 port_serror = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7853 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port)); 7854 7855 /* print PxSERR related error message */ 7856 ahci_log_serror_message(ahci_ctlp, port, port_serror, 0); 7857 7858 /* print task file register value */ 7859 if (intr_status & AHCI_INTR_STATUS_TFES) { 7860 cmn_err(CE_WARN, "!ahci%d: ahci port %d task_file_status " 7861 "= 0x%x", instance, port, task_file_status); 7862 } 7863 7864 out1: 7865 /* Prepare the argument for the taskq */ 7866 args = ahci_portp->ahciport_event_args; 7867 args->ahciea_ctlp = (void *)ahci_ctlp; 7868 args->ahciea_portp = (void *)ahci_portp; 7869 args->ahciea_event = intr_status; 7870 AHCI_ADDR_SET_PORT((ahci_addr_t *)args->ahciea_addrp, port); 7871 7872 /* Start the taskq to handle error recovery */ 7873 if ((ddi_taskq_dispatch(ahci_portp->ahciport_event_taskq, 7874 ahci_events_handler, 7875 (void *)args, DDI_NOSLEEP)) != DDI_SUCCESS) { 7876 cmn_err(CE_WARN, "!ahci%d: ahci start taskq for event handler " 7877 "failed", instance); 7878 } 7879 out0: 7880 mutex_exit(&ahci_portp->ahciport_mutex); 7881 7882 return (AHCI_SUCCESS); 7883 } 7884 7885 /* 7886 * Hot Plug Operation for platforms that support Cold Presence Detect. 7887 * 7888 * When set, a device status has changed as detected by the cold presence 7889 * detect logic. This bit can either be set due to a non-connected port 7890 * receiving a device, or a connected port having its device removed. 7891 * This bit is only valid if the port supports cold presence detect as 7892 * indicated by PxCMD.CPD set to '1'. 7893 * 7894 * At the moment, this interrupt is not needed and disabled and we just 7895 * log the debug message. 7896 */ 7897 static int 7898 ahci_intr_cold_port_detect(ahci_ctl_t *ahci_ctlp, 7899 ahci_port_t *ahci_portp, uint8_t port) 7900 { 7901 uint32_t port_cmd_status; 7902 sata_device_t sdevice; 7903 7904 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7905 "ahci_intr_cold_port_detect enter, port %d", port); 7906 7907 mutex_enter(&ahci_portp->ahciport_mutex); 7908 7909 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 7910 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 7911 if (!(port_cmd_status & AHCI_CMD_STATUS_CPD)) { 7912 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7913 "port %d does not support cold presence detect, so " 7914 "we just ignore this interrupt", port); 7915 mutex_exit(&ahci_portp->ahciport_mutex); 7916 return (AHCI_SUCCESS); 7917 } 7918 7919 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7920 "port %d device status has changed", port); 7921 7922 bzero((void *)&sdevice, sizeof (sata_device_t)); 7923 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 7924 sdevice.satadev_addr.qual = SATA_ADDR_CPORT; 7925 sdevice.satadev_addr.pmport = 0; 7926 sdevice.satadev_state = SATA_PSTATE_PWRON; 7927 7928 if (port_cmd_status & AHCI_CMD_STATUS_CPS) { 7929 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7930 "port %d: a device is hot plugged", port); 7931 mutex_exit(&ahci_portp->ahciport_mutex); 7932 sata_hba_event_notify( 7933 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7934 &sdevice, 7935 SATA_EVNT_DEVICE_ATTACHED); 7936 mutex_enter(&ahci_portp->ahciport_mutex); 7937 7938 } else { 7939 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 7940 "port %d: a device is hot unplugged", port); 7941 mutex_exit(&ahci_portp->ahciport_mutex); 7942 sata_hba_event_notify( 7943 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 7944 &sdevice, 7945 SATA_EVNT_DEVICE_DETACHED); 7946 mutex_enter(&ahci_portp->ahciport_mutex); 7947 } 7948 7949 mutex_exit(&ahci_portp->ahciport_mutex); 7950 7951 return (AHCI_SUCCESS); 7952 } 7953 7954 /* 7955 * Enable the interrupts for a particular port. 7956 * 7957 * WARNING!!! ahciport_mutex should be acquired before the function 7958 * is called. 7959 */ 7960 static void 7961 ahci_enable_port_intrs(ahci_ctl_t *ahci_ctlp, uint8_t port) 7962 { 7963 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 7964 "ahci_enable_port_intrs enter, port %d", port); 7965 7966 /* 7967 * Clear port interrupt status before enabling interrupt 7968 */ 7969 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7970 (uint32_t *)AHCI_PORT_PxIS(ahci_ctlp, port), 7971 AHCI_PORT_INTR_MASK); 7972 7973 /* 7974 * Clear the pending bit from IS.IPS 7975 */ 7976 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7977 (uint32_t *)AHCI_GLOBAL_IS(ahci_ctlp), (1 << port)); 7978 7979 /* 7980 * Enable the following interrupts: 7981 * Device to Host Register FIS Interrupt (DHRS) 7982 * PIO Setup FIS Interrupt (PSS) 7983 * Set Device Bits Interrupt (SDBS) 7984 * Unknown FIS Interrupt (UFS) 7985 * Port Connect Change Status (PCS) 7986 * PhyRdy Change Status (PRCS) 7987 * Overflow Status (OFS) 7988 * Interface Non-fatal Error Status (INFS) 7989 * Interface Fatal Error Status (IFS) 7990 * Host Bus Data Error Status (HBDS) 7991 * Host Bus Fatal Error Status (HBFS) 7992 * Task File Error Status (TFES) 7993 */ 7994 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 7995 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 7996 (AHCI_INTR_STATUS_DHRS | 7997 AHCI_INTR_STATUS_PSS | 7998 AHCI_INTR_STATUS_SDBS | 7999 AHCI_INTR_STATUS_UFS | 8000 AHCI_INTR_STATUS_DPS | 8001 AHCI_INTR_STATUS_PCS | 8002 AHCI_INTR_STATUS_PRCS | 8003 AHCI_INTR_STATUS_OFS | 8004 AHCI_INTR_STATUS_INFS | 8005 AHCI_INTR_STATUS_IFS | 8006 AHCI_INTR_STATUS_HBDS | 8007 AHCI_INTR_STATUS_HBFS | 8008 AHCI_INTR_STATUS_TFES)); 8009 } 8010 8011 /* 8012 * Enable interrupts for all the ports. 8013 * 8014 * WARNING!!! ahcictl_mutex should be acquired before the function 8015 * is called. 8016 */ 8017 static void 8018 ahci_enable_all_intrs(ahci_ctl_t *ahci_ctlp) 8019 { 8020 uint32_t ghc_control; 8021 8022 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_enable_all_intrs enter", NULL); 8023 8024 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8025 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 8026 8027 ghc_control |= AHCI_HBA_GHC_IE; 8028 8029 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8030 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 8031 } 8032 8033 /* 8034 * Disable interrupts for a particular port. 8035 * 8036 * WARNING!!! ahciport_mutex should be acquired before the function 8037 * is called. 8038 */ 8039 static void 8040 ahci_disable_port_intrs(ahci_ctl_t *ahci_ctlp, uint8_t port) 8041 { 8042 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8043 "ahci_disable_port_intrs enter, port %d", port); 8044 8045 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8046 (uint32_t *)AHCI_PORT_PxIE(ahci_ctlp, port), 0); 8047 } 8048 8049 /* 8050 * Disable interrupts for the whole HBA. 8051 * 8052 * The global bit is cleared, then all interrupt sources from all 8053 * ports are disabled. 8054 * 8055 * WARNING!!! ahcictl_mutex should be acquired before the function 8056 * is called. 8057 */ 8058 static void 8059 ahci_disable_all_intrs(ahci_ctl_t *ahci_ctlp) 8060 { 8061 uint32_t ghc_control; 8062 8063 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_disable_all_intrs enter", 8064 NULL); 8065 8066 ghc_control = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8067 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp)); 8068 8069 ghc_control &= ~ AHCI_HBA_GHC_IE; 8070 8071 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8072 (uint32_t *)AHCI_GLOBAL_GHC(ahci_ctlp), ghc_control); 8073 } 8074 8075 /* 8076 * Handle FIXED or MSI interrupts. 8077 */ 8078 /* 8079 * According to AHCI spec, the HBA may support several interrupt modes: 8080 * * pin based interrupts (FIXED) 8081 * * single MSI message interrupts 8082 * * multiple MSI based message interrupts 8083 * 8084 * For pin based interrupts, the software interrupt handler need to check IS 8085 * register to find out which port has pending interrupts. And then check 8086 * PxIS register to find out which interrupt events happened on that port. 8087 * 8088 * For single MSI message interrupts, MSICAP.MC.MSIE is set with '1', and 8089 * MSICAP.MC.MME is set with '0'. This mode is similar to pin based interrupts 8090 * in that software interrupt handler need to check IS register to determine 8091 * which port triggered the interrupts since it uses a single message for all 8092 * port interrupts. 8093 * 8094 * HBA may optionally support multiple MSI message for better performance. In 8095 * this mode, each port may have its own interrupt message, and thus generation 8096 * of interrupts is no longer controlled through the IS register. MSICAP.MC.MMC 8097 * represents a power-of-2 wrapper on the number of implemented ports, and 8098 * the mapping of ports to interrupts is done in a 1-1 relationship, up to the 8099 * maximum number of assigned interrupts. When the number of MSI messages 8100 * allocated is less than the number requested, then hardware may have two 8101 * implementation behaviors: 8102 * * assign each ports its own interrupt and then force all additional 8103 * ports to share the last interrupt message, and this condition is 8104 * indicated by clearing GHC.MRSM to '0' 8105 * * revert to single MSI mode, indicated by setting GHC.MRSM to '1' 8106 * When multiple-message MSI is enabled, hardware will still set IS register 8107 * as single message case. And this IS register may be used by software when 8108 * fewer than the requested number of messages is granted in order to determine 8109 * which port had the interrupt. 8110 * 8111 * Note: The current ahci driver only supports the first two interrupt modes: 8112 * pin based interrupts and single MSI message interrupts, and the reason 8113 * is indicated in below code. 8114 */ 8115 static int 8116 ahci_add_intrs(ahci_ctl_t *ahci_ctlp, int intr_type) 8117 { 8118 dev_info_t *dip = ahci_ctlp->ahcictl_dip; 8119 int count, avail, actual; 8120 int i, rc; 8121 8122 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INIT|AHCIDBG_INTR, ahci_ctlp, 8123 "ahci_add_intrs enter interrupt type 0x%x", intr_type); 8124 8125 /* get number of interrupts. */ 8126 rc = ddi_intr_get_nintrs(dip, intr_type, &count); 8127 if ((rc != DDI_SUCCESS) || (count == 0)) { 8128 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8129 "ddi_intr_get_nintrs() failed, " 8130 "rc %d count %d\n", rc, count); 8131 return (DDI_FAILURE); 8132 } 8133 8134 /* get number of available interrupts. */ 8135 rc = ddi_intr_get_navail(dip, intr_type, &avail); 8136 if ((rc != DDI_SUCCESS) || (avail == 0)) { 8137 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8138 "ddi_intr_get_navail() failed, " 8139 "rc %d avail %d\n", rc, avail); 8140 return (DDI_FAILURE); 8141 } 8142 8143 #if AHCI_DEBUG 8144 if (avail < count) { 8145 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8146 "ddi_intr_get_nintrs returned %d, navail() returned %d", 8147 count, avail); 8148 } 8149 #endif 8150 8151 /* 8152 * Note: So far Solaris restricts the maximum number of messages for 8153 * x86 to 2, that is avail is 2, so here we set the count with 1 to 8154 * force the driver to use single MSI message interrupt. In future if 8155 * Solaris remove the restriction, then we need to delete the below 8156 * code and try to use multiple interrupt routine to gain better 8157 * performance. 8158 */ 8159 if ((intr_type == DDI_INTR_TYPE_MSI) && (count > 1)) { 8160 AHCIDBG(AHCIDBG_INTR, ahci_ctlp, 8161 "force to use one interrupt routine though the " 8162 "HBA supports %d interrupt", count); 8163 count = 1; 8164 } 8165 8166 /* Allocate an array of interrupt handles. */ 8167 ahci_ctlp->ahcictl_intr_size = count * sizeof (ddi_intr_handle_t); 8168 ahci_ctlp->ahcictl_intr_htable = 8169 kmem_alloc(ahci_ctlp->ahcictl_intr_size, KM_SLEEP); 8170 8171 /* call ddi_intr_alloc(). */ 8172 rc = ddi_intr_alloc(dip, ahci_ctlp->ahcictl_intr_htable, 8173 intr_type, 0, count, &actual, DDI_INTR_ALLOC_NORMAL); 8174 8175 if ((rc != DDI_SUCCESS) || (actual == 0)) { 8176 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8177 "ddi_intr_alloc() failed, rc %d count %d actual %d " 8178 "avail %d\n", rc, count, actual, avail); 8179 kmem_free(ahci_ctlp->ahcictl_intr_htable, 8180 ahci_ctlp->ahcictl_intr_size); 8181 return (DDI_FAILURE); 8182 } 8183 8184 /* use interrupt count returned */ 8185 #if AHCI_DEBUG 8186 if (actual < count) { 8187 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8188 "Requested: %d, Received: %d", count, actual); 8189 } 8190 #endif 8191 8192 ahci_ctlp->ahcictl_intr_cnt = actual; 8193 8194 /* 8195 * Get priority for first, assume remaining are all the same. 8196 */ 8197 if (ddi_intr_get_pri(ahci_ctlp->ahcictl_intr_htable[0], 8198 &ahci_ctlp->ahcictl_intr_pri) != DDI_SUCCESS) { 8199 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8200 "ddi_intr_get_pri() failed", NULL); 8201 8202 /* Free already allocated intr. */ 8203 for (i = 0; i < actual; i++) { 8204 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[i]); 8205 } 8206 8207 kmem_free(ahci_ctlp->ahcictl_intr_htable, 8208 ahci_ctlp->ahcictl_intr_size); 8209 return (DDI_FAILURE); 8210 } 8211 8212 /* Test for high level interrupt. */ 8213 if (ahci_ctlp->ahcictl_intr_pri >= ddi_intr_get_hilevel_pri()) { 8214 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8215 "ahci_add_intrs: Hi level intr not supported", NULL); 8216 8217 /* Free already allocated intr. */ 8218 for (i = 0; i < actual; i++) { 8219 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[i]); 8220 } 8221 8222 kmem_free(ahci_ctlp->ahcictl_intr_htable, 8223 sizeof (ddi_intr_handle_t)); 8224 8225 return (DDI_FAILURE); 8226 } 8227 8228 /* Call ddi_intr_add_handler(). */ 8229 for (i = 0; i < actual; i++) { 8230 if (ddi_intr_add_handler(ahci_ctlp->ahcictl_intr_htable[i], 8231 ahci_intr, (caddr_t)ahci_ctlp, NULL) != DDI_SUCCESS) { 8232 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8233 "ddi_intr_add_handler() failed", NULL); 8234 8235 /* Free already allocated intr. */ 8236 for (i = 0; i < actual; i++) { 8237 (void) ddi_intr_free( 8238 ahci_ctlp->ahcictl_intr_htable[i]); 8239 } 8240 8241 kmem_free(ahci_ctlp->ahcictl_intr_htable, 8242 ahci_ctlp->ahcictl_intr_size); 8243 return (DDI_FAILURE); 8244 } 8245 } 8246 8247 if (ddi_intr_get_cap(ahci_ctlp->ahcictl_intr_htable[0], 8248 &ahci_ctlp->ahcictl_intr_cap) != DDI_SUCCESS) { 8249 AHCIDBG(AHCIDBG_INTR|AHCIDBG_INIT, ahci_ctlp, 8250 "ddi_intr_get_cap() failed", NULL); 8251 8252 /* Free already allocated intr. */ 8253 for (i = 0; i < actual; i++) { 8254 (void) ddi_intr_free( 8255 ahci_ctlp->ahcictl_intr_htable[i]); 8256 } 8257 8258 kmem_free(ahci_ctlp->ahcictl_intr_htable, 8259 ahci_ctlp->ahcictl_intr_size); 8260 return (DDI_FAILURE); 8261 } 8262 8263 if (ahci_ctlp->ahcictl_intr_cap & DDI_INTR_FLAG_BLOCK) { 8264 /* Call ddi_intr_block_enable() for MSI. */ 8265 (void) ddi_intr_block_enable(ahci_ctlp->ahcictl_intr_htable, 8266 ahci_ctlp->ahcictl_intr_cnt); 8267 } else { 8268 /* Call ddi_intr_enable() for FIXED or MSI non block enable. */ 8269 for (i = 0; i < ahci_ctlp->ahcictl_intr_cnt; i++) { 8270 (void) ddi_intr_enable( 8271 ahci_ctlp->ahcictl_intr_htable[i]); 8272 } 8273 } 8274 8275 return (DDI_SUCCESS); 8276 } 8277 8278 /* 8279 * Removes the registered interrupts irrespective of whether they 8280 * were legacy or MSI. 8281 * 8282 * WARNING!!! The controller interrupts must be disabled before calling 8283 * this routine. 8284 */ 8285 static void 8286 ahci_rem_intrs(ahci_ctl_t *ahci_ctlp) 8287 { 8288 int x; 8289 8290 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, "ahci_rem_intrs entered", NULL); 8291 8292 /* Disable all interrupts. */ 8293 if ((ahci_ctlp->ahcictl_intr_type == DDI_INTR_TYPE_MSI) && 8294 (ahci_ctlp->ahcictl_intr_cap & DDI_INTR_FLAG_BLOCK)) { 8295 /* Call ddi_intr_block_disable(). */ 8296 (void) ddi_intr_block_disable(ahci_ctlp->ahcictl_intr_htable, 8297 ahci_ctlp->ahcictl_intr_cnt); 8298 } else { 8299 for (x = 0; x < ahci_ctlp->ahcictl_intr_cnt; x++) { 8300 (void) ddi_intr_disable( 8301 ahci_ctlp->ahcictl_intr_htable[x]); 8302 } 8303 } 8304 8305 /* Call ddi_intr_remove_handler(). */ 8306 for (x = 0; x < ahci_ctlp->ahcictl_intr_cnt; x++) { 8307 (void) ddi_intr_remove_handler( 8308 ahci_ctlp->ahcictl_intr_htable[x]); 8309 (void) ddi_intr_free(ahci_ctlp->ahcictl_intr_htable[x]); 8310 } 8311 8312 kmem_free(ahci_ctlp->ahcictl_intr_htable, ahci_ctlp->ahcictl_intr_size); 8313 } 8314 8315 /* 8316 * This routine tries to put port into P:NotRunning state by clearing 8317 * PxCMD.ST. HBA will clear PxCI to 0h, PxSACT to 0h, PxCMD.CCS to 0h 8318 * and PxCMD.CR to '0'. 8319 * 8320 * WARNING!!! ahciport_mutex should be acquired before the function 8321 * is called. 8322 */ 8323 static int 8324 ahci_put_port_into_notrunning_state(ahci_ctl_t *ahci_ctlp, 8325 ahci_port_t *ahci_portp, uint8_t port) 8326 { 8327 uint32_t port_cmd_status; 8328 int loop_count; 8329 8330 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8331 "ahci_put_port_into_notrunning_state enter: port %d", port); 8332 8333 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8334 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 8335 8336 port_cmd_status &= ~AHCI_CMD_STATUS_ST; 8337 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8338 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port), port_cmd_status); 8339 8340 /* Wait until PxCMD.CR is cleared */ 8341 loop_count = 0; 8342 do { 8343 port_cmd_status = 8344 ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8345 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 8346 8347 if (loop_count++ > AHCI_POLLRATE_PORT_IDLE) { 8348 AHCIDBG(AHCIDBG_INIT, ahci_ctlp, 8349 "clearing port %d CMD.CR timeout, " 8350 "port_cmd_status = 0x%x", port, 8351 port_cmd_status); 8352 /* 8353 * We are effectively timing out after 0.5 sec. 8354 * This value is specified in AHCI spec. 8355 */ 8356 break; 8357 } 8358 8359 /* Wait for 10 millisec */ 8360 drv_usecwait(AHCI_10MS_USECS); 8361 } while (port_cmd_status & AHCI_CMD_STATUS_CR); 8362 8363 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_STARTED; 8364 8365 if (port_cmd_status & AHCI_CMD_STATUS_CR) { 8366 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 8367 "ahci_put_port_into_notrunning_state: failed to clear " 8368 "PxCMD.CR to '0' after loop count: %d, and " 8369 "port_cmd_status = 0x%x", loop_count, port_cmd_status); 8370 return (AHCI_FAILURE); 8371 } else { 8372 AHCIDBG(AHCIDBG_INIT|AHCIDBG_POLL_LOOP, ahci_ctlp, 8373 "ahci_put_port_into_notrunning_state: succeeded to clear " 8374 "PxCMD.CR to '0' after loop count: %d, and " 8375 "port_cmd_status = 0x%x", loop_count, port_cmd_status); 8376 return (AHCI_SUCCESS); 8377 } 8378 } 8379 8380 /* 8381 * First clear PxCMD.ST, and then check PxTFD. If both PxTFD.STS.BSY 8382 * and PxTFD.STS.DRQ cleared to '0', it means the device is in a 8383 * stable state, then set PxCMD.ST to '1' to start the port directly. 8384 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then issue a 8385 * COMRESET to the device to put it in an idle state. 8386 * 8387 * The fifth argument returns whether the port reset is involved during 8388 * the process. 8389 * 8390 * The routine will be called under following scenarios: 8391 * + To reset the HBA 8392 * + To abort the packet(s) 8393 * + To reset the port 8394 * + To activate the port 8395 * + Fatal error recovery 8396 * + To abort the timeout packet(s) 8397 * 8398 * WARNING!!! ahciport_mutex should be acquired before the function 8399 * is called. And ahciport_mutex will be released before the reset 8400 * event is reported to sata module by calling sata_hba_event_notify, 8401 * and then be acquired again later. 8402 * 8403 * NOTES!!! During this procedure, PxSERR register will be cleared, and 8404 * according to the spec, the clearance of three bits will also clear 8405 * three interrupt status bits. 8406 * 1. PxSERR.DIAG.F will clear PxIS.UFS 8407 * 2. PxSERR.DIAG.X will clear PxIS.PCS 8408 * 3. PxSERR.DIAG.N will clear PxIS.PRCS 8409 * 8410 * Among these three interrupt events, the driver needs to take care of 8411 * PxIS.PRCS, which is the hot plug event. When the driver found out 8412 * a device was unplugged, it will call the interrupt handler. 8413 */ 8414 static int 8415 ahci_restart_port_wait_till_ready(ahci_ctl_t *ahci_ctlp, 8416 ahci_port_t *ahci_portp, uint8_t port, int flag, int *reset_flag) 8417 { 8418 uint32_t port_sstatus; 8419 uint32_t task_file_status; 8420 sata_device_t sdevice; 8421 int rval; 8422 ahci_addr_t addr_port; 8423 ahci_pmult_info_t *pminfo = NULL; 8424 int dev_exists_begin = 0; 8425 int dev_exists_end = 0; 8426 uint32_t previous_dev_type = ahci_portp->ahciport_device_type; 8427 int npmport = 0; 8428 uint8_t cport = ahci_ctlp->ahcictl_port_to_cport[port]; 8429 8430 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 8431 "ahci_restart_port_wait_till_ready: port %d enter", port); 8432 8433 AHCI_ADDR_SET_PORT(&addr_port, port); 8434 8435 if (ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) 8436 dev_exists_begin = 1; 8437 8438 /* First clear PxCMD.ST */ 8439 rval = ahci_put_port_into_notrunning_state(ahci_ctlp, ahci_portp, 8440 port); 8441 if (rval != AHCI_SUCCESS) 8442 /* 8443 * If PxCMD.CR does not clear within a reasonable time, it 8444 * may assume the interface is in a hung condition and may 8445 * continue with issuing the port reset. 8446 */ 8447 goto reset; 8448 8449 /* Then clear PxSERR */ 8450 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 8451 (uint32_t *)AHCI_PORT_PxSERR(ahci_ctlp, port), 8452 AHCI_SERROR_CLEAR_ALL); 8453 8454 /* Then get PxTFD */ 8455 task_file_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8456 (uint32_t *)AHCI_PORT_PxTFD(ahci_ctlp, port)); 8457 8458 /* 8459 * Check whether the device is in a stable status, if yes, 8460 * then start the port directly. However for ahci_tran_reset_dport, 8461 * we may have to perform a port reset. 8462 */ 8463 if (!(task_file_status & (AHCI_TFD_STS_BSY | AHCI_TFD_STS_DRQ)) && 8464 !(flag & AHCI_PORT_RESET)) 8465 goto out; 8466 8467 reset: 8468 /* 8469 * If PxTFD.STS.BSY or PxTFD.STS.DRQ is set to '1', then issue 8470 * a COMRESET to the device 8471 */ 8472 ahci_disable_port_intrs(ahci_ctlp, port); 8473 rval = ahci_port_reset(ahci_ctlp, ahci_portp, &addr_port); 8474 ahci_enable_port_intrs(ahci_ctlp, port); 8475 8476 #ifdef AHCI_DEBUG 8477 if (rval != AHCI_SUCCESS) 8478 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8479 "ahci_restart_port_wait_till_ready: port %d failed", 8480 port); 8481 #endif 8482 8483 if (reset_flag != NULL) 8484 *reset_flag = 1; 8485 8486 /* Indicate to the framework that a reset has happened. */ 8487 if ((ahci_portp->ahciport_device_type != SATA_DTYPE_NONE) && 8488 (ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) && 8489 !(flag & AHCI_RESET_NO_EVENTS_UP)) { 8490 /* Set the reset in progress flag */ 8491 ahci_portp->ahciport_reset_in_progress = 1; 8492 8493 bzero((void *)&sdevice, sizeof (sata_device_t)); 8494 sdevice.satadev_addr.cport = 8495 ahci_ctlp->ahcictl_port_to_cport[port]; 8496 sdevice.satadev_addr.pmport = 0; 8497 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8498 8499 sdevice.satadev_state = SATA_DSTATE_RESET | 8500 SATA_DSTATE_PWR_ACTIVE; 8501 if (ahci_ctlp->ahcictl_sata_hba_tran) { 8502 mutex_exit(&ahci_portp->ahciport_mutex); 8503 sata_hba_event_notify( 8504 ahci_ctlp->ahcictl_sata_hba_tran->sata_tran_hba_dip, 8505 &sdevice, 8506 SATA_EVNT_DEVICE_RESET); 8507 mutex_enter(&ahci_portp->ahciport_mutex); 8508 } 8509 8510 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 8511 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 8512 } else { 8513 ahci_portp->ahciport_reset_in_progress = 0; 8514 } 8515 8516 out: 8517 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8518 8519 /* SStatus tells the presence of device. */ 8520 port_sstatus = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 8521 (uint32_t *)AHCI_PORT_PxSSTS(ahci_ctlp, port)); 8522 8523 if (SSTATUS_GET_DET(port_sstatus) == SSTATUS_DET_DEVPRE_PHYCOM) { 8524 dev_exists_end = 1; 8525 } 8526 8527 if (dev_exists_begin == 0 && dev_exists_end == 0) /* 0 -> 0 */ 8528 return (rval); 8529 8530 /* Check whether a hot plug event happened */ 8531 if (dev_exists_begin == 1 && dev_exists_end == 0) { /* 1 -> 0 */ 8532 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8533 "ahci_restart_port_wait_till_ready: port %d " 8534 "device is removed", port); 8535 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_NODEV; 8536 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8537 "ahci_restart_port_wait_till_ready: port %d " 8538 "AHCI_PORT_FLAG_NODEV flag is set", port); 8539 mutex_exit(&ahci_portp->ahciport_mutex); 8540 (void) ahci_intr_phyrdy_change(ahci_ctlp, ahci_portp, port); 8541 mutex_enter(&ahci_portp->ahciport_mutex); 8542 8543 return (rval); 8544 } 8545 8546 8547 /* 0/1 -> 1 : device may change */ 8548 /* 8549 * May be called by ahci_fatal_error_recovery_handler, so 8550 * don't issue software if the previous device is ATAPI. 8551 */ 8552 if (ahci_portp->ahciport_device_type == SATA_DTYPE_ATAPI) 8553 return (rval); 8554 8555 /* 8556 * The COMRESET will make port multiplier enter legacy mode. 8557 * Issue a software reset to make it work again. 8558 */ 8559 ahci_find_dev_signature(ahci_ctlp, ahci_portp, &addr_port); 8560 8561 /* 8562 * Following codes are specific for the port multiplier 8563 */ 8564 if (previous_dev_type != SATA_DTYPE_PMULT && 8565 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 8566 /* in case previous_dev_type is corrupt */ 8567 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 8568 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8569 return (rval); 8570 } 8571 8572 /* Device change: PMult -> Non-PMult */ 8573 if (previous_dev_type == SATA_DTYPE_PMULT && 8574 ahci_portp->ahciport_device_type != SATA_DTYPE_PMULT) { 8575 /* 8576 * This might happen because 8577 * 1. Software reset failed. Port multiplier is not correctly 8578 * enumerated. 8579 * 2. Another non-port-multiplier device is attached. Perhaps 8580 * the port multiplier was replaced by another device by 8581 * whatever reason, but AHCI driver missed hot-plug event. 8582 * 8583 * Now that the port has been initialized, we just need to 8584 * update the port structure according new device, then report 8585 * and wait SATA framework to probe new device. 8586 */ 8587 8588 /* Force to release pmult resource */ 8589 ahci_dealloc_pmult(ahci_ctlp, ahci_portp); 8590 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8591 8592 bzero((void *)&sdevice, sizeof (sata_device_t)); 8593 sdevice.satadev_addr.cport = 8594 ahci_ctlp->ahcictl_port_to_cport[port]; 8595 sdevice.satadev_addr.pmport = 0; 8596 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 8597 8598 sdevice.satadev_state = SATA_DSTATE_RESET | 8599 SATA_DSTATE_PWR_ACTIVE; 8600 8601 mutex_exit(&ahci_portp->ahciport_mutex); 8602 sata_hba_event_notify( 8603 ahci_ctlp->ahcictl_dip, 8604 &sdevice, 8605 SATA_EVNT_DEVICE_RESET); 8606 mutex_enter(&ahci_portp->ahciport_mutex); 8607 8608 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8609 "Port multiplier is [Gone] at port %d ", port); 8610 AHCIDBG(AHCIDBG_EVENT, ahci_ctlp, 8611 "port %d sending event up: SATA_EVNT_DEVICE_RESET", port); 8612 8613 return (AHCI_SUCCESS); 8614 } 8615 8616 /* Device change: Non-PMult -> PMult */ 8617 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 8618 8619 /* NOTE: The PxCMD.PMA may be cleared by HBA reset. */ 8620 ahci_alloc_pmult(ahci_ctlp, ahci_portp); 8621 8622 (void) ahci_start_port(ahci_ctlp, ahci_portp, port); 8623 } 8624 pminfo = ahci_portp->ahciport_pmult_info; 8625 ASSERT(pminfo != NULL); 8626 8627 /* Device (may) change: PMult -> PMult */ 8628 /* 8629 * First initialize port multiplier. Set state to READY and wait for 8630 * probe entry point to initialize it 8631 */ 8632 ahci_portp->ahciport_port_state = SATA_STATE_READY; 8633 8634 /* 8635 * It's a little complicated while target is a port multiplier. we 8636 * need to COMRESET all pmports behind that PMult otherwise those 8637 * sub-links between the PMult and the sub-devices will be in an 8638 * inactive state (indicated by PSCR0/PxSSTS) and the following access 8639 * to those sub-devices will be rejected by Link-Fatal-Error. 8640 */ 8641 /* 8642 * The PxSNTF will be set soon after the pmult is plugged. While the 8643 * pmult itself is attaching, sata_hba_event_notfiy will fail. so we 8644 * simply mark every sub-port as 'unknown', then ahci_probe_pmport 8645 * will initialized it. 8646 */ 8647 for (npmport = 0; npmport < pminfo->ahcipmi_num_dev_ports; npmport++) 8648 pminfo->ahcipmi_port_state[npmport] = SATA_STATE_UNKNOWN; 8649 8650 /* Report reset event. */ 8651 ahci_portp->ahciport_reset_in_progress = 1; 8652 8653 bzero((void *)&sdevice, sizeof (sata_device_t)); 8654 sdevice.satadev_addr.cport = cport; 8655 sdevice.satadev_addr.pmport = SATA_PMULT_HOSTPORT; 8656 sdevice.satadev_addr.qual = SATA_ADDR_PMULT; 8657 sdevice.satadev_state = SATA_DSTATE_RESET | SATA_DSTATE_PWR_ACTIVE; 8658 sata_hba_event_notify(ahci_ctlp->ahcictl_dip, &sdevice, 8659 SATA_EVNT_DEVICE_RESET); 8660 8661 return (rval); 8662 } 8663 8664 /* 8665 * This routine may be called under four scenarios: 8666 * a) do the recovery from fatal error 8667 * b) or we need to timeout some commands 8668 * c) or we need to abort some commands 8669 * d) or we need reset device/port/controller 8670 * 8671 * In all these scenarios, we need to send any pending unfinished 8672 * commands up to sata framework. 8673 * 8674 * WARNING!!! ahciport_mutex should be acquired before the function is called. 8675 */ 8676 static void 8677 ahci_mop_commands(ahci_ctl_t *ahci_ctlp, 8678 ahci_port_t *ahci_portp, 8679 uint32_t slot_status, 8680 uint32_t failed_tags, 8681 uint32_t timeout_tags, 8682 uint32_t aborted_tags, 8683 uint32_t reset_tags) 8684 { 8685 uint32_t finished_tags = 0; 8686 uint32_t unfinished_tags = 0; 8687 int tmp_slot; 8688 sata_pkt_t *satapkt; 8689 int ncq_cmd_in_progress = 0; 8690 int err_retri_cmd_in_progress = 0; 8691 int rdwr_pmult_cmd_in_progress = 0; 8692 8693 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8694 "ahci_mop_commands entered: port: %d slot_status: 0x%x", 8695 ahci_portp->ahciport_port_num, slot_status); 8696 8697 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8698 "ahci_mop_commands: failed_tags: 0x%x, " 8699 "timeout_tags: 0x%x aborted_tags: 0x%x, " 8700 "reset_tags: 0x%x", failed_tags, 8701 timeout_tags, aborted_tags, reset_tags); 8702 8703 #ifdef AHCI_DEBUG 8704 if (ahci_debug_flags & AHCIDBG_ERRS) { 8705 int i; 8706 char msg_buf[200] = {0, }; 8707 for (i = 0x1f; i >= 0; i--) { 8708 if (ahci_portp->ahciport_slot_pkts[i] != NULL) 8709 msg_buf[i] = 'X'; 8710 else 8711 msg_buf[i] = '.'; 8712 } 8713 msg_buf[0x20] = '\0'; 8714 cmn_err(CE_NOTE, "port[%d] slots: %s", 8715 ahci_portp->ahciport_port_num, msg_buf); 8716 cmn_err(CE_NOTE, "[ERR-RT] %p [RW-PM] %p ", 8717 (void *)ahci_portp->ahciport_err_retri_pkt, 8718 (void *)ahci_portp->ahciport_rdwr_pmult_pkt); 8719 } 8720 #endif 8721 8722 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 8723 finished_tags = ahci_portp->ahciport_pending_tags & 8724 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 8725 8726 unfinished_tags = slot_status & 8727 AHCI_SLOT_MASK(ahci_ctlp) & 8728 ~failed_tags & 8729 ~aborted_tags & 8730 ~reset_tags & 8731 ~timeout_tags; 8732 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 8733 ncq_cmd_in_progress = 1; 8734 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 8735 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 8736 8737 unfinished_tags = slot_status & 8738 AHCI_NCQ_SLOT_MASK(ahci_portp) & 8739 ~failed_tags & 8740 ~aborted_tags & 8741 ~reset_tags & 8742 ~timeout_tags; 8743 } else if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 8744 8745 /* 8746 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT is 8747 * set, it means REQUEST SENSE or READ LOG EXT command doesn't 8748 * complete successfully due to one of the following three 8749 * conditions: 8750 * 8751 * 1. Fatal error - failed_tags includes its slot 8752 * 2. Timed out - timeout_tags includes its slot 8753 * 3. Aborted when hot unplug - aborted_tags includes its 8754 * slot 8755 * 8756 * Please note that the command is always sent down in Slot 0 8757 */ 8758 err_retri_cmd_in_progress = 1; 8759 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_NCQ, ahci_ctlp, 8760 "ahci_mop_commands is called for port %d while " 8761 "REQUEST SENSE or READ LOG EXT for error retrieval " 8762 "is being executed slot_status = 0x%x", 8763 ahci_portp->ahciport_port_num, slot_status); 8764 ASSERT(ahci_portp->ahciport_mop_in_progress > 1); 8765 ASSERT(slot_status == 0x1); 8766 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 8767 rdwr_pmult_cmd_in_progress = 1; 8768 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_PMULT, ahci_ctlp, 8769 "ahci_mop_commands is called for port %d while " 8770 "READ/WRITE PORTMULT command is being executed", 8771 ahci_portp->ahciport_port_num); 8772 8773 ASSERT(slot_status == 0x1); 8774 } 8775 8776 #ifdef AHCI_DEBUG 8777 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_ENTRY, ahci_ctlp, 8778 "ahci_mop_commands: finished_tags: 0x%x, " 8779 "unfinished_tags 0x%x", finished_tags, unfinished_tags); 8780 #endif 8781 8782 /* Send up finished packets with SATA_PKT_COMPLETED */ 8783 while (finished_tags) { 8784 tmp_slot = ddi_ffs(finished_tags) - 1; 8785 if (tmp_slot == -1) { 8786 break; 8787 } 8788 8789 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8790 ASSERT(satapkt != NULL); 8791 8792 AHCIDBG(AHCIDBG_INFO, ahci_ctlp, "ahci_mop_commands: " 8793 "sending up pkt 0x%p with SATA_PKT_COMPLETED", 8794 (void *)satapkt); 8795 8796 /* 8797 * Cannot fetch the return register content since the port 8798 * was restarted, so the corresponding tag will be set to 8799 * aborted tags. 8800 */ 8801 if (satapkt->satapkt_cmd.satacmd_flags.sata_special_regs) { 8802 CLEAR_BIT(finished_tags, tmp_slot); 8803 aborted_tags |= tmp_slot; 8804 continue; 8805 } 8806 8807 if (ncq_cmd_in_progress) 8808 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8809 tmp_slot); 8810 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8811 CLEAR_BIT(finished_tags, tmp_slot); 8812 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8813 8814 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_COMPLETED); 8815 } 8816 8817 /* Send up failed packets with SATA_PKT_DEV_ERROR. */ 8818 while (failed_tags) { 8819 if (err_retri_cmd_in_progress) { 8820 satapkt = ahci_portp->ahciport_err_retri_pkt; 8821 ASSERT(satapkt != NULL); 8822 ASSERT(failed_tags == 0x1); 8823 8824 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8825 "sending up pkt 0x%p with SATA_PKT_DEV_ERROR", 8826 (void *)satapkt); 8827 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8828 break; 8829 } 8830 if (rdwr_pmult_cmd_in_progress) { 8831 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8832 ASSERT(satapkt != NULL); 8833 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8834 "ahci_mop_commands: sending up " 8835 "rdwr pmult pkt 0x%p with SATA_PKT_DEV_ERROR", 8836 (void *)satapkt); 8837 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8838 break; 8839 } 8840 8841 tmp_slot = ddi_ffs(failed_tags) - 1; 8842 if (tmp_slot == -1) { 8843 break; 8844 } 8845 8846 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8847 ASSERT(satapkt != NULL); 8848 8849 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8850 "sending up pkt 0x%p with SATA_PKT_DEV_ERROR", 8851 (void *)satapkt); 8852 8853 if (ncq_cmd_in_progress) 8854 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8855 tmp_slot); 8856 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8857 CLEAR_BIT(failed_tags, tmp_slot); 8858 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8859 8860 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_DEV_ERROR); 8861 } 8862 8863 /* Send up timeout packets with SATA_PKT_TIMEOUT. */ 8864 while (timeout_tags) { 8865 if (err_retri_cmd_in_progress) { 8866 satapkt = ahci_portp->ahciport_err_retri_pkt; 8867 ASSERT(satapkt != NULL); 8868 ASSERT(timeout_tags == 0x1); 8869 8870 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8871 "sending up pkt 0x%p with SATA_PKT_TIMEOUT", 8872 (void *)satapkt); 8873 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8874 break; 8875 } 8876 if (rdwr_pmult_cmd_in_progress) { 8877 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8878 ASSERT(satapkt != NULL); 8879 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8880 "ahci_mop_commands: sending up " 8881 "rdwr pmult pkt 0x%p with SATA_PKT_TIMEOUT", 8882 (void *)satapkt); 8883 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8884 break; 8885 } 8886 8887 tmp_slot = ddi_ffs(timeout_tags) - 1; 8888 if (tmp_slot == -1) { 8889 break; 8890 } 8891 8892 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8893 ASSERT(satapkt != NULL); 8894 8895 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8896 "sending up pkt 0x%p with SATA_PKT_TIMEOUT", 8897 (void *)satapkt); 8898 8899 if (ncq_cmd_in_progress) 8900 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8901 tmp_slot); 8902 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8903 CLEAR_BIT(timeout_tags, tmp_slot); 8904 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8905 8906 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_TIMEOUT); 8907 } 8908 8909 /* Send up aborted packets with SATA_PKT_ABORTED */ 8910 while (aborted_tags) { 8911 if (err_retri_cmd_in_progress) { 8912 satapkt = ahci_portp->ahciport_err_retri_pkt; 8913 ASSERT(satapkt != NULL); 8914 ASSERT(aborted_tags == 0x1); 8915 8916 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8917 "sending up pkt 0x%p with SATA_PKT_ABORTED", 8918 (void *)satapkt); 8919 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_ABORTED); 8920 break; 8921 } 8922 if (rdwr_pmult_cmd_in_progress) { 8923 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8924 ASSERT(satapkt != NULL); 8925 ASSERT(aborted_tags == 0x1); 8926 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8927 "ahci_mop_commands: sending up " 8928 "rdwr pmult pkt 0x%p with SATA_PKT_ABORTED", 8929 (void *)satapkt); 8930 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_ABORTED); 8931 break; 8932 } 8933 8934 tmp_slot = ddi_ffs(aborted_tags) - 1; 8935 if (tmp_slot == -1) { 8936 break; 8937 } 8938 8939 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8940 ASSERT(satapkt != NULL); 8941 8942 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8943 "sending up pkt 0x%p with SATA_PKT_ABORTED", 8944 (void *)satapkt); 8945 8946 if (ncq_cmd_in_progress) 8947 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8948 tmp_slot); 8949 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8950 CLEAR_BIT(aborted_tags, tmp_slot); 8951 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8952 8953 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_ABORTED); 8954 } 8955 8956 /* Send up reset packets with SATA_PKT_RESET. */ 8957 while (reset_tags) { 8958 if (rdwr_pmult_cmd_in_progress) { 8959 satapkt = ahci_portp->ahciport_rdwr_pmult_pkt; 8960 ASSERT(satapkt != NULL); 8961 ASSERT(aborted_tags == 0x1); 8962 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 8963 "ahci_mop_commands: sending up " 8964 "rdwr pmult pkt 0x%p with SATA_PKT_RESET", 8965 (void *)satapkt); 8966 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_RESET); 8967 break; 8968 } 8969 8970 tmp_slot = ddi_ffs(reset_tags) - 1; 8971 if (tmp_slot == -1) { 8972 break; 8973 } 8974 8975 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 8976 ASSERT(satapkt != NULL); 8977 8978 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 8979 "sending up pkt 0x%p with SATA_PKT_RESET", 8980 (void *)satapkt); 8981 8982 if (ncq_cmd_in_progress) 8983 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 8984 tmp_slot); 8985 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 8986 CLEAR_BIT(reset_tags, tmp_slot); 8987 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 8988 8989 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_RESET); 8990 } 8991 8992 /* Send up unfinished packets with SATA_PKT_RESET */ 8993 while (unfinished_tags) { 8994 tmp_slot = ddi_ffs(unfinished_tags) - 1; 8995 if (tmp_slot == -1) { 8996 break; 8997 } 8998 8999 satapkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 9000 ASSERT(satapkt != NULL); 9001 9002 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, "ahci_mop_commands: " 9003 "sending up pkt 0x%p with SATA_PKT_RESET", 9004 (void *)satapkt); 9005 9006 if (ncq_cmd_in_progress) 9007 CLEAR_BIT(ahci_portp->ahciport_pending_ncq_tags, 9008 tmp_slot); 9009 CLEAR_BIT(ahci_portp->ahciport_pending_tags, tmp_slot); 9010 CLEAR_BIT(unfinished_tags, tmp_slot); 9011 ahci_portp->ahciport_slot_pkts[tmp_slot] = NULL; 9012 9013 ahci_add_doneq(ahci_portp, satapkt, SATA_PKT_RESET); 9014 } 9015 9016 ahci_portp->ahciport_mop_in_progress--; 9017 ASSERT(ahci_portp->ahciport_mop_in_progress >= 0); 9018 9019 if (ahci_portp->ahciport_mop_in_progress == 0) 9020 ahci_portp->ahciport_flags &= ~AHCI_PORT_FLAG_MOPPING; 9021 9022 ahci_flush_doneq(ahci_portp); 9023 } 9024 9025 /* 9026 * This routine is going to first request a READ LOG EXT sata pkt from sata 9027 * module, and then deliver it to the HBA to get the ncq failure context. 9028 * The return value is the exactly failed tags. 9029 */ 9030 static uint32_t 9031 ahci_get_rdlogext_data(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 9032 uint8_t port) 9033 { 9034 sata_device_t sdevice; 9035 sata_pkt_t *rdlog_spkt, *spkt; 9036 ddi_dma_handle_t buf_dma_handle; 9037 ahci_addr_t addr; 9038 int loop_count; 9039 int rval; 9040 int failed_slot; 9041 uint32_t failed_tags = 0; 9042 struct sata_ncq_error_recovery_page *ncq_err_page; 9043 9044 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_NCQ, ahci_ctlp, 9045 "ahci_get_rdlogext_data enter: port %d", port); 9046 9047 /* Prepare the sdevice data */ 9048 bzero((void *)&sdevice, sizeof (sata_device_t)); 9049 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 9050 9051 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 9052 sdevice.satadev_addr.pmport = 0; 9053 9054 /* Translate sata_device.satadev_addr -> ahci_addr */ 9055 ahci_get_ahci_addr(ahci_ctlp, &sdevice, &addr); 9056 9057 /* 9058 * Call the sata hba interface to get a rdlog spkt 9059 */ 9060 loop_count = 0; 9061 loop: 9062 rdlog_spkt = sata_get_error_retrieval_pkt(ahci_ctlp->ahcictl_dip, 9063 &sdevice, SATA_ERR_RETR_PKT_TYPE_NCQ); 9064 if (rdlog_spkt == NULL) { 9065 if (loop_count++ < AHCI_POLLRATE_GET_SPKT) { 9066 /* Sleep for a while */ 9067 drv_usecwait(AHCI_10MS_USECS); 9068 goto loop; 9069 } 9070 /* Timed out after 1s */ 9071 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9072 "failed to get rdlog spkt for port %d", port); 9073 return (failed_tags); 9074 } 9075 9076 ASSERT(rdlog_spkt->satapkt_op_mode & SATA_OPMODE_SYNCH); 9077 9078 /* 9079 * This flag is used to handle the specific error recovery when the 9080 * READ LOG EXT command gets a failure (fatal error or time-out). 9081 */ 9082 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RDLOGEXT; 9083 9084 /* 9085 * This start is not supposed to fail because after port is restarted, 9086 * the whole command list is empty. 9087 */ 9088 ahci_portp->ahciport_err_retri_pkt = rdlog_spkt; 9089 (void) ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, rdlog_spkt); 9090 ahci_portp->ahciport_err_retri_pkt = NULL; 9091 9092 /* Remove the flag after READ LOG EXT command is completed */ 9093 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_RDLOGEXT; 9094 9095 if (rdlog_spkt->satapkt_reason == SATA_PKT_COMPLETED) { 9096 /* Update the request log data */ 9097 buf_dma_handle = *(ddi_dma_handle_t *) 9098 (rdlog_spkt->satapkt_cmd.satacmd_err_ret_buf_handle); 9099 rval = ddi_dma_sync(buf_dma_handle, 0, 0, 9100 DDI_DMA_SYNC_FORKERNEL); 9101 if (rval == DDI_SUCCESS) { 9102 ncq_err_page = 9103 (struct sata_ncq_error_recovery_page *)rdlog_spkt-> 9104 satapkt_cmd.satacmd_bp->b_un.b_addr; 9105 9106 /* Get the failed tag */ 9107 failed_slot = ncq_err_page->ncq_tag; 9108 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9109 "ahci_get_rdlogext_data: port %d " 9110 "failed slot %d", port, failed_slot); 9111 if (failed_slot & NQ) { 9112 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9113 "the failed slot is not a valid tag", NULL); 9114 goto out; 9115 } 9116 9117 failed_slot &= NCQ_TAG_MASK; 9118 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 9119 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9120 "ahci_get_rdlogext_data: failed spkt 0x%p", 9121 (void *)spkt); 9122 if (spkt == NULL) { 9123 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9124 "the failed slot spkt is NULL", NULL); 9125 goto out; 9126 } 9127 9128 failed_tags = 0x1 << failed_slot; 9129 9130 /* Fill out the error context */ 9131 ahci_copy_ncq_err_page(&spkt->satapkt_cmd, 9132 ncq_err_page); 9133 ahci_update_sata_registers(ahci_ctlp, port, 9134 &spkt->satapkt_device); 9135 } 9136 } 9137 out: 9138 sata_free_error_retrieval_pkt(rdlog_spkt); 9139 9140 return (failed_tags); 9141 } 9142 9143 /* 9144 * This routine is going to first request a REQUEST SENSE sata pkt from sata 9145 * module, and then deliver it to the HBA to get the sense data and copy 9146 * the sense data back to the orignal failed sata pkt, and free the REQUEST 9147 * SENSE sata pkt later. 9148 */ 9149 static void 9150 ahci_get_rqsense_data(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 9151 uint8_t port, sata_pkt_t *spkt) 9152 { 9153 sata_device_t sdevice; 9154 sata_pkt_t *rs_spkt; 9155 sata_cmd_t *sata_cmd; 9156 ddi_dma_handle_t buf_dma_handle; 9157 ahci_addr_t addr; 9158 int loop_count; 9159 #if AHCI_DEBUG 9160 struct scsi_extended_sense *rqsense; 9161 #endif 9162 9163 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 9164 "ahci_get_rqsense_data enter: port %d", port); 9165 9166 /* Prepare the sdevice data */ 9167 bzero((void *)&sdevice, sizeof (sata_device_t)); 9168 sdevice.satadev_addr.cport = ahci_ctlp->ahcictl_port_to_cport[port]; 9169 9170 sdevice.satadev_addr.qual = SATA_ADDR_DCPORT; 9171 sdevice.satadev_addr.pmport = 0; 9172 9173 /* Translate sata_device.satadev_addr -> ahci_addr */ 9174 ahci_get_ahci_addr(ahci_ctlp, &sdevice, &addr); 9175 9176 sata_cmd = &spkt->satapkt_cmd; 9177 9178 /* 9179 * Call the sata hba interface to get a rs spkt 9180 */ 9181 loop_count = 0; 9182 loop: 9183 rs_spkt = sata_get_error_retrieval_pkt(ahci_ctlp->ahcictl_dip, 9184 &sdevice, SATA_ERR_RETR_PKT_TYPE_ATAPI); 9185 if (rs_spkt == NULL) { 9186 if (loop_count++ < AHCI_POLLRATE_GET_SPKT) { 9187 /* Sleep for a while */ 9188 drv_usecwait(AHCI_10MS_USECS); 9189 goto loop; 9190 9191 } 9192 /* Timed out after 1s */ 9193 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9194 "failed to get rs spkt for port %d", port); 9195 return; 9196 } 9197 9198 ASSERT(rs_spkt->satapkt_op_mode & SATA_OPMODE_SYNCH); 9199 9200 /* 9201 * This flag is used to handle the specific error recovery when the 9202 * REQUEST SENSE command gets a faiure (fatal error or time-out). 9203 */ 9204 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_RQSENSE; 9205 9206 /* 9207 * This start is not supposed to fail because after port is restarted, 9208 * the whole command list is empty. 9209 */ 9210 ahci_portp->ahciport_err_retri_pkt = rs_spkt; 9211 (void) ahci_do_sync_start(ahci_ctlp, ahci_portp, &addr, rs_spkt); 9212 ahci_portp->ahciport_err_retri_pkt = NULL; 9213 9214 /* Remove the flag after REQUEST SENSE command is completed */ 9215 ahci_portp->ahciport_flags &= ~ AHCI_PORT_FLAG_RQSENSE; 9216 9217 if (rs_spkt->satapkt_reason == SATA_PKT_COMPLETED) { 9218 /* Update the request sense data */ 9219 buf_dma_handle = *(ddi_dma_handle_t *) 9220 (rs_spkt->satapkt_cmd.satacmd_err_ret_buf_handle); 9221 (void) ddi_dma_sync(buf_dma_handle, 0, 0, 9222 DDI_DMA_SYNC_FORKERNEL); 9223 /* Copy the request sense data */ 9224 bcopy(rs_spkt-> 9225 satapkt_cmd.satacmd_bp->b_un.b_addr, 9226 &sata_cmd->satacmd_rqsense, 9227 SATA_ATAPI_MIN_RQSENSE_LEN); 9228 #if AHCI_DEBUG 9229 rqsense = (struct scsi_extended_sense *) 9230 sata_cmd->satacmd_rqsense; 9231 9232 /* Dump the sense data */ 9233 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, "\n", NULL); 9234 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, 9235 "Sense data for satapkt %p ATAPI cmd 0x%x", 9236 spkt, sata_cmd->satacmd_acdb[0]); 9237 AHCIDBG(AHCIDBG_SENSEDATA, ahci_ctlp, 9238 " es_code 0x%x es_class 0x%x " 9239 "es_key 0x%x es_add_code 0x%x " 9240 "es_qual_code 0x%x", 9241 rqsense->es_code, rqsense->es_class, 9242 rqsense->es_key, rqsense->es_add_code, 9243 rqsense->es_qual_code); 9244 #endif 9245 } 9246 9247 sata_free_error_retrieval_pkt(rs_spkt); 9248 } 9249 9250 /* 9251 * Fatal errors will cause the HBA to enter the ERR: Fatal state. To recover, 9252 * the port must be restarted. When the HBA detects thus error, it may try 9253 * to abort a transfer. And if the transfer was aborted, the device is 9254 * expected to send a D2H Register FIS with PxTFD.STS.ERR set to '1' and both 9255 * PxTFD.STS.BSY and PxTFD.STS.DRQ cleared to '0'. Then system software knows 9256 * that the device is in a stable status and transfers may be restarted without 9257 * issuing a COMRESET to the device. If PxTFD.STS.BSY or PxTFD.STS.DRQ is set, 9258 * then the software will send the COMRESET to do the port reset. 9259 * 9260 * Software should perform the appropriate error recovery actions based on 9261 * whether non-queued commands were being issued or natived command queuing 9262 * commands were being issued. 9263 * 9264 * And software will complete the command that had the error with error mark 9265 * to higher level software. 9266 * 9267 * Fatal errors include the following: 9268 * PxIS.IFS - Interface Fatal Error Status 9269 * PxIS.HBDS - Host Bus Data Error Status 9270 * PxIS.HBFS - Host Bus Fatal Error Status 9271 * PxIS.TFES - Task File Error Status 9272 * 9273 * WARNING!!! ahciport_mutex should be acquired before the function is called. 9274 */ 9275 static void 9276 ahci_fatal_error_recovery_handler(ahci_ctl_t *ahci_ctlp, 9277 ahci_port_t *ahci_portp, ahci_addr_t *addrp, uint32_t intr_status) 9278 { 9279 uint32_t port_cmd_status; 9280 uint32_t slot_status = 0; 9281 uint32_t failed_tags = 0; 9282 int failed_slot; 9283 int reset_flag = 0, flag = 0; 9284 ahci_fis_d2h_register_t *ahci_rcvd_fisp; 9285 sata_cmd_t *sata_cmd = NULL; 9286 sata_pkt_t *spkt = NULL; 9287 #if AHCI_DEBUG 9288 ahci_cmd_header_t *cmd_header; 9289 #endif 9290 uint8_t port = addrp->aa_port; 9291 9292 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 9293 "ahci_fatal_error_recovery_handler enter: port %d", port); 9294 9295 /* Port multiplier error */ 9296 if (ahci_portp->ahciport_device_type == SATA_DTYPE_PMULT) { 9297 /* FBS code is neither completed nor tested. */ 9298 ahci_pmult_error_recovery_handler(ahci_ctlp, ahci_portp, 9299 port, intr_status); 9300 9301 /* Force a port reset */ 9302 flag = AHCI_PORT_RESET; 9303 } 9304 9305 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 9306 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9307 9308 /* Read PxCI to see which commands are still outstanding */ 9309 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9310 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 9311 9312 /* 9313 * Read PxCMD.CCS to determine the slot that the HBA 9314 * was processing when the error occurred. 9315 */ 9316 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9317 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 9318 failed_slot = (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 9319 AHCI_CMD_STATUS_CCS_SHIFT; 9320 9321 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9322 spkt = ahci_portp->ahciport_err_retri_pkt; 9323 ASSERT(spkt != NULL); 9324 } else { 9325 spkt = ahci_portp->ahciport_slot_pkts[failed_slot]; 9326 if (spkt == NULL) { 9327 /* May happen when interface errors occur? */ 9328 goto next; 9329 } 9330 } 9331 9332 #if AHCI_DEBUG 9333 /* 9334 * Debugging purpose... 9335 */ 9336 if (ahci_portp->ahciport_prd_bytecounts[failed_slot]) { 9337 cmd_header = 9338 &ahci_portp->ahciport_cmd_list[failed_slot]; 9339 AHCIDBG(AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 9340 "ahci_fatal_error_recovery_handler: port %d, " 9341 "PRD Byte Count = 0x%x, " 9342 "ahciport_prd_bytecounts = 0x%x", port, 9343 cmd_header->ahcich_prd_byte_count, 9344 ahci_portp->ahciport_prd_bytecounts[failed_slot]); 9345 } 9346 #endif 9347 9348 sata_cmd = &spkt->satapkt_cmd; 9349 9350 /* Fill out the status and error registers for PxIS.TFES */ 9351 if (intr_status & AHCI_INTR_STATUS_TFES) { 9352 ahci_rcvd_fisp = &(ahci_portp->ahciport_rcvd_fis-> 9353 ahcirf_d2h_register_fis); 9354 9355 /* Copy the error context back to the sata_cmd */ 9356 ahci_copy_err_cnxt(sata_cmd, ahci_rcvd_fisp); 9357 } 9358 9359 /* The failed command must be one of the outstanding commands */ 9360 failed_tags = 0x1 << failed_slot; 9361 ASSERT(failed_tags & slot_status); 9362 9363 /* Update the sata registers, especially PxSERR register */ 9364 ahci_update_sata_registers(ahci_ctlp, port, 9365 &spkt->satapkt_device); 9366 9367 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9368 /* Read PxSACT to see which commands are still outstanding */ 9369 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9370 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 9371 } 9372 next: 9373 9374 #if AHCI_DEBUG 9375 /* 9376 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT flag is 9377 * set, it means a fatal error happened after REQUEST SENSE command 9378 * or READ LOG EXT command is delivered to the HBA during the error 9379 * recovery process. At this time, the only outstanding command is 9380 * supposed to be REQUEST SENSE command or READ LOG EXT command. 9381 */ 9382 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9383 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9384 "ahci_fatal_error_recovery_handler: port %d REQUEST SENSE " 9385 "command or READ LOG EXT command for error data retrieval " 9386 "failed", port); 9387 ASSERT(slot_status == 0x1); 9388 ASSERT(failed_slot == 0); 9389 ASSERT(spkt->satapkt_cmd.satacmd_acdb[0] == 9390 SCMD_REQUEST_SENSE || 9391 spkt->satapkt_cmd.satacmd_cmd_reg == 9392 SATAC_READ_LOG_EXT); 9393 } 9394 #endif 9395 9396 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 9397 ahci_portp->ahciport_mop_in_progress++; 9398 9399 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 9400 port, flag, &reset_flag); 9401 9402 /* 9403 * Won't retrieve error information: 9404 * 1. Port reset was involved to recover 9405 * 2. Device is gone 9406 * 3. IDENTIFY DEVICE command sent to ATAPI device 9407 * 4. REQUEST SENSE or READ LOG EXT command during error recovery 9408 */ 9409 if (reset_flag || 9410 ahci_portp->ahciport_device_type == SATA_DTYPE_NONE || 9411 spkt && spkt->satapkt_cmd.satacmd_cmd_reg == SATAC_ID_DEVICE || 9412 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 9413 goto out; 9414 9415 /* 9416 * Deliver READ LOG EXT to gather information about the error when 9417 * a COMRESET has not been performed as part of the error recovery 9418 * during NCQ command processing. 9419 */ 9420 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9421 failed_tags = ahci_get_rdlogext_data(ahci_ctlp, 9422 ahci_portp, port); 9423 goto out; 9424 } 9425 9426 /* 9427 * Deliver REQUEST SENSE for ATAPI command to gather information about 9428 * the error when a COMRESET has not been performed as part of the 9429 * error recovery. 9430 */ 9431 if (spkt && ahci_portp->ahciport_device_type == SATA_DTYPE_ATAPI) 9432 ahci_get_rqsense_data(ahci_ctlp, ahci_portp, port, spkt); 9433 out: 9434 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9435 "ahci_fatal_error_recovery_handler: port %d fatal error " 9436 "occurred slot_status = 0x%x, pending_tags = 0x%x, " 9437 "pending_ncq_tags = 0x%x failed_tags = 0x%x", 9438 port, slot_status, ahci_portp->ahciport_pending_tags, 9439 ahci_portp->ahciport_pending_ncq_tags, failed_tags); 9440 9441 ahci_mop_commands(ahci_ctlp, 9442 ahci_portp, 9443 slot_status, 9444 failed_tags, /* failed tags */ 9445 0, /* timeout tags */ 9446 0, /* aborted tags */ 9447 0); /* reset tags */ 9448 } 9449 9450 /* 9451 * Used to recovery a PMULT pmport fatal error under FIS-based switching. 9452 * 1. device specific.PxFBS.SDE=1 9453 * 2. Non-Deivce specific. 9454 * Nothing will be done when Command-based switching is employed. 9455 * 9456 * Currently code is neither completed nor tested. 9457 * 9458 * WARNING!!! ahciport_mutex should be acquired before the function 9459 * is called. 9460 */ 9461 static void 9462 ahci_pmult_error_recovery_handler(ahci_ctl_t *ahci_ctlp, 9463 ahci_port_t *ahci_portp, uint8_t port, uint32_t intr_status) 9464 { 9465 #ifndef __lock_lint 9466 _NOTE(ARGUNUSED(intr_status)) 9467 #endif 9468 uint32_t port_fbs_ctrl; 9469 int loop_count = 0; 9470 ahci_addr_t addr; 9471 9472 /* Nothing will be done under Command-based switching. */ 9473 if (!(ahci_ctlp->ahcictl_cap & AHCI_CAP_PMULT_FBSS)) 9474 return; 9475 9476 port_fbs_ctrl = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9477 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port)); 9478 9479 if (!(port_fbs_ctrl & AHCI_FBS_EN)) 9480 /* FBS is not enabled. */ 9481 return; 9482 9483 /* Problem's getting complicated now. */ 9484 /* 9485 * If FIS-based switching is used, we need to check 9486 * the PxFBS to see the error type. 9487 */ 9488 port_fbs_ctrl = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9489 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port)); 9490 9491 /* Refer to spec(v1.2) 9.3.6.1 */ 9492 if (port_fbs_ctrl & AHCI_FBS_SDE) { 9493 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, 9494 "A Device Sepcific Error: port %d", port); 9495 /* 9496 * Controller has paused commands for all other 9497 * sub-devices until PxFBS.DEC is set. 9498 */ 9499 ahci_reject_all_abort_pkts(ahci_ctlp, 9500 ahci_portp, 0); 9501 9502 ddi_put32(ahci_ctlp->ahcictl_ahci_acc_handle, 9503 (uint32_t *)AHCI_PORT_PxFBS(ahci_ctlp, port), 9504 port_fbs_ctrl | AHCI_FBS_DEC); 9505 9506 /* 9507 * Wait controller clear PxFBS.DEC, 9508 * then we can continue. 9509 */ 9510 loop_count = 0; 9511 do { 9512 port_fbs_ctrl = ddi_get32(ahci_ctlp-> 9513 ahcictl_ahci_acc_handle, (uint32_t *) 9514 AHCI_PORT_PxFBS(ahci_ctlp, port)); 9515 9516 if (loop_count++ > 1000) 9517 /* 9518 * Esclate the error. Follow 9519 * non-device specific error 9520 * procedure. 9521 */ 9522 return; 9523 9524 drv_usecwait(AHCI_100US_USECS); 9525 } while (port_fbs_ctrl & AHCI_FBS_DEC); 9526 9527 /* 9528 * Issue a software reset to ensure drive is in 9529 * a known state. 9530 */ 9531 (void) ahci_software_reset(ahci_ctlp, 9532 ahci_portp, &addr); 9533 9534 } else { 9535 9536 /* Process Non-Device Specific Error. */ 9537 /* This will be handled later on. */ 9538 cmn_err(CE_NOTE, "!FBS is not supported now."); 9539 } 9540 } 9541 /* 9542 * Handle events - fatal error recovery 9543 */ 9544 static void 9545 ahci_events_handler(void *args) 9546 { 9547 ahci_event_arg_t *ahci_event_arg; 9548 ahci_ctl_t *ahci_ctlp; 9549 ahci_port_t *ahci_portp; 9550 ahci_addr_t *addrp; 9551 uint32_t event; 9552 9553 ahci_event_arg = (ahci_event_arg_t *)args; 9554 9555 ahci_ctlp = ahci_event_arg->ahciea_ctlp; 9556 ahci_portp = ahci_event_arg->ahciea_portp; 9557 addrp = ahci_event_arg->ahciea_addrp; 9558 event = ahci_event_arg->ahciea_event; 9559 9560 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR|AHCIDBG_ERRS, ahci_ctlp, 9561 "ahci_events_handler enter: port %d intr_status = 0x%x", 9562 ahci_portp->ahciport_port_num, event); 9563 9564 mutex_enter(&ahci_portp->ahciport_mutex); 9565 9566 /* 9567 * ahci_intr_phyrdy_change() may have rendered it to 9568 * SATA_DTYPE_NONE. 9569 */ 9570 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 9571 AHCIDBG(AHCIDBG_ENTRY|AHCIDBG_INTR, ahci_ctlp, 9572 "ahci_events_handler: port %d no device attached, " 9573 "and just return without doing anything", 9574 ahci_portp->ahciport_port_num); 9575 goto out; 9576 } 9577 9578 if (event & (AHCI_INTR_STATUS_IFS | 9579 AHCI_INTR_STATUS_HBDS | 9580 AHCI_INTR_STATUS_HBFS | 9581 AHCI_INTR_STATUS_TFES)) 9582 ahci_fatal_error_recovery_handler(ahci_ctlp, ahci_portp, 9583 addrp, event); 9584 9585 out: 9586 mutex_exit(&ahci_portp->ahciport_mutex); 9587 } 9588 9589 /* 9590 * ahci_watchdog_handler() and ahci_do_sync_start will call us if they 9591 * detect there are some commands which are timed out. 9592 */ 9593 static void 9594 ahci_timeout_pkts(ahci_ctl_t *ahci_ctlp, ahci_port_t *ahci_portp, 9595 uint8_t port, uint32_t tmp_timeout_tags) 9596 { 9597 uint32_t slot_status = 0; 9598 uint32_t finished_tags = 0; 9599 uint32_t timeout_tags = 0; 9600 9601 AHCIDBG(AHCIDBG_TIMEOUT|AHCIDBG_ENTRY, ahci_ctlp, 9602 "ahci_timeout_pkts enter: port %d", port); 9603 9604 mutex_enter(&ahci_portp->ahciport_mutex); 9605 9606 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) || 9607 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp) || 9608 ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9609 /* Read PxCI to see which commands are still outstanding */ 9610 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9611 (uint32_t *)AHCI_PORT_PxCI(ahci_ctlp, port)); 9612 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9613 /* Read PxSACT to see which commands are still outstanding */ 9614 slot_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9615 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 9616 } 9617 9618 #if AHCI_DEBUG 9619 /* 9620 * When AHCI_PORT_FLAG_RQSENSE or AHCI_PORT_FLAG_RDLOGEXT flag is 9621 * set, it means a fatal error happened after REQUEST SENSE command 9622 * or READ LOG EXT command is delivered to the HBA during the error 9623 * recovery process. At this time, the only outstanding command is 9624 * supposed to be REQUEST SENSE command or READ LOG EXT command. 9625 */ 9626 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) { 9627 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, ahci_ctlp, 9628 "ahci_timeout_pkts called while REQUEST SENSE " 9629 "command or READ LOG EXT command for error recovery " 9630 "timed out timeout_tags = 0x%x, slot_status = 0x%x, " 9631 "pending_tags = 0x%x, pending_ncq_tags = 0x%x", 9632 tmp_timeout_tags, slot_status, 9633 ahci_portp->ahciport_pending_tags, 9634 ahci_portp->ahciport_pending_ncq_tags); 9635 ASSERT(slot_status == 0x1); 9636 } else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9637 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, ahci_ctlp, 9638 "ahci_timeout_pkts called while executing R/W PMULT " 9639 "command timeout_tags = 0x%x, slot_status = 0x%x", 9640 tmp_timeout_tags, slot_status); 9641 ASSERT(slot_status == 0x1); 9642 } 9643 #endif 9644 9645 ahci_portp->ahciport_flags |= AHCI_PORT_FLAG_MOPPING; 9646 ahci_portp->ahciport_mop_in_progress++; 9647 9648 (void) ahci_restart_port_wait_till_ready(ahci_ctlp, ahci_portp, 9649 port, AHCI_PORT_RESET, NULL); 9650 9651 /* 9652 * Re-identify timeout tags because some previously checked commands 9653 * could already complete. 9654 */ 9655 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9656 finished_tags = ahci_portp->ahciport_pending_tags & 9657 ~slot_status & AHCI_SLOT_MASK(ahci_ctlp); 9658 timeout_tags = tmp_timeout_tags & ~finished_tags; 9659 9660 AHCIDBG(AHCIDBG_TIMEOUT, ahci_ctlp, 9661 "ahci_timeout_pkts: port %d, finished_tags = 0x%x, " 9662 "timeout_tags = 0x%x, port_cmd_issue = 0x%x, " 9663 "pending_tags = 0x%x ", 9664 port, finished_tags, timeout_tags, 9665 slot_status, ahci_portp->ahciport_pending_tags); 9666 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9667 finished_tags = ahci_portp->ahciport_pending_ncq_tags & 9668 ~slot_status & AHCI_NCQ_SLOT_MASK(ahci_portp); 9669 timeout_tags = tmp_timeout_tags & ~finished_tags; 9670 9671 AHCIDBG(AHCIDBG_TIMEOUT|AHCIDBG_NCQ, ahci_ctlp, 9672 "ahci_timeout_pkts: port %d, finished_tags = 0x%x, " 9673 "timeout_tags = 0x%x, port_sactive = 0x%x, " 9674 "pending_ncq_tags = 0x%x ", 9675 port, finished_tags, timeout_tags, 9676 slot_status, ahci_portp->ahciport_pending_ncq_tags); 9677 } else if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 9678 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9679 timeout_tags = tmp_timeout_tags; 9680 } 9681 9682 ahci_mop_commands(ahci_ctlp, 9683 ahci_portp, 9684 slot_status, 9685 0, /* failed tags */ 9686 timeout_tags, /* timeout tags */ 9687 0, /* aborted tags */ 9688 0); /* reset tags */ 9689 9690 mutex_exit(&ahci_portp->ahciport_mutex); 9691 } 9692 9693 /* 9694 * Watchdog handler kicks in every 5 seconds to timeout any commands pending 9695 * for long time. 9696 */ 9697 static void 9698 ahci_watchdog_handler(ahci_ctl_t *ahci_ctlp) 9699 { 9700 ahci_port_t *ahci_portp; 9701 sata_pkt_t *spkt; 9702 uint32_t pending_tags; 9703 uint32_t timeout_tags; 9704 uint32_t port_cmd_status; 9705 uint32_t port_sactive; 9706 uint8_t port; 9707 int tmp_slot; 9708 int current_slot; 9709 uint32_t current_tags; 9710 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 9711 9712 mutex_enter(&ahci_ctlp->ahcictl_mutex); 9713 9714 AHCIDBG(AHCIDBG_ENTRY, ahci_ctlp, 9715 "ahci_watchdog_handler entered", NULL); 9716 9717 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 9718 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 9719 continue; 9720 } 9721 9722 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 9723 9724 mutex_enter(&ahci_portp->ahciport_mutex); 9725 if (ahci_portp->ahciport_device_type == SATA_DTYPE_NONE) { 9726 mutex_exit(&ahci_portp->ahciport_mutex); 9727 continue; 9728 } 9729 9730 /* Skip the check for those ports in error recovery */ 9731 if ((ahci_portp->ahciport_flags & AHCI_PORT_FLAG_MOPPING) && 9732 !(ERR_RETRI_CMD_IN_PROGRESS(ahci_portp))) { 9733 mutex_exit(&ahci_portp->ahciport_mutex); 9734 continue; 9735 } 9736 9737 pending_tags = 0; 9738 port_cmd_status = ddi_get32(ahci_ctlp->ahcictl_ahci_acc_handle, 9739 (uint32_t *)AHCI_PORT_PxCMD(ahci_ctlp, port)); 9740 9741 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp) || 9742 RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) { 9743 current_slot = 0; 9744 pending_tags = 0x1; 9745 } else if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9746 current_slot = 9747 (port_cmd_status & AHCI_CMD_STATUS_CCS) >> 9748 AHCI_CMD_STATUS_CCS_SHIFT; 9749 pending_tags = ahci_portp->ahciport_pending_tags; 9750 } else if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9751 port_sactive = ddi_get32( 9752 ahci_ctlp->ahcictl_ahci_acc_handle, 9753 (uint32_t *)AHCI_PORT_PxSACT(ahci_ctlp, port)); 9754 current_tags = port_sactive & 9755 ~port_cmd_status & 9756 AHCI_NCQ_SLOT_MASK(ahci_portp); 9757 pending_tags = ahci_portp->ahciport_pending_ncq_tags; 9758 } 9759 9760 timeout_tags = 0; 9761 while (pending_tags) { 9762 tmp_slot = ddi_ffs(pending_tags) - 1; 9763 if (tmp_slot == -1) { 9764 break; 9765 } 9766 9767 if (ERR_RETRI_CMD_IN_PROGRESS(ahci_portp)) 9768 spkt = ahci_portp->ahciport_err_retri_pkt; 9769 else if (RDWR_PMULT_CMD_IN_PROGRESS(ahci_portp)) 9770 spkt = ahci_portp->ahciport_rdwr_pmult_pkt; 9771 else 9772 spkt = ahci_portp->ahciport_slot_pkts[tmp_slot]; 9773 9774 if ((spkt != NULL) && spkt->satapkt_time && 9775 !(spkt->satapkt_op_mode & SATA_OPMODE_POLLING)) { 9776 /* 9777 * If a packet has survived for more than it's 9778 * max life cycles, it is a candidate for time 9779 * out. 9780 */ 9781 ahci_portp->ahciport_slot_timeout[tmp_slot] -= 9782 ahci_watchdog_timeout; 9783 9784 if (ahci_portp->ahciport_slot_timeout[tmp_slot] 9785 > 0) 9786 goto next; 9787 9788 #if AHCI_DEBUG 9789 if (NCQ_CMD_IN_PROGRESS(ahci_portp)) { 9790 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, 9791 ahci_ctlp, "watchdog: the current " 9792 "tags is 0x%x", current_tags); 9793 } else { 9794 AHCIDBG(AHCIDBG_ERRS|AHCIDBG_TIMEOUT, 9795 ahci_ctlp, "watchdog: the current " 9796 "slot is %d", current_slot); 9797 } 9798 #endif 9799 9800 /* 9801 * We need to check whether the HBA has 9802 * begun to execute the command, if not, 9803 * then re-set the timer of the command. 9804 */ 9805 if (NON_NCQ_CMD_IN_PROGRESS(ahci_portp) && 9806 (tmp_slot != current_slot) || 9807 NCQ_CMD_IN_PROGRESS(ahci_portp) && 9808 ((0x1 << tmp_slot) & current_tags)) { 9809 ahci_portp->ahciport_slot_timeout \ 9810 [tmp_slot] = spkt->satapkt_time; 9811 } else { 9812 timeout_tags |= (0x1 << tmp_slot); 9813 cmn_err(CE_WARN, "!ahci%d: watchdog " 9814 "port %d satapkt 0x%p timed out\n", 9815 instance, port, (void *)spkt); 9816 } 9817 } 9818 next: 9819 CLEAR_BIT(pending_tags, tmp_slot); 9820 } 9821 9822 if (timeout_tags) { 9823 mutex_exit(&ahci_portp->ahciport_mutex); 9824 mutex_exit(&ahci_ctlp->ahcictl_mutex); 9825 ahci_timeout_pkts(ahci_ctlp, ahci_portp, 9826 port, timeout_tags); 9827 mutex_enter(&ahci_ctlp->ahcictl_mutex); 9828 mutex_enter(&ahci_portp->ahciport_mutex); 9829 } 9830 9831 mutex_exit(&ahci_portp->ahciport_mutex); 9832 } 9833 9834 /* Re-install the watchdog timeout handler */ 9835 if (ahci_ctlp->ahcictl_timeout_id != 0) { 9836 ahci_ctlp->ahcictl_timeout_id = 9837 timeout((void (*)(void *))ahci_watchdog_handler, 9838 (caddr_t)ahci_ctlp, ahci_watchdog_tick); 9839 } 9840 9841 mutex_exit(&ahci_ctlp->ahcictl_mutex); 9842 } 9843 9844 /* 9845 * Fill the error context into sata_cmd for non-queued command error. 9846 */ 9847 static void 9848 ahci_copy_err_cnxt(sata_cmd_t *scmd, ahci_fis_d2h_register_t *rfisp) 9849 { 9850 scmd->satacmd_status_reg = GET_RFIS_STATUS(rfisp); 9851 scmd->satacmd_error_reg = GET_RFIS_ERROR(rfisp); 9852 scmd->satacmd_sec_count_lsb = GET_RFIS_SECTOR_COUNT(rfisp); 9853 scmd->satacmd_lba_low_lsb = GET_RFIS_CYL_LOW(rfisp); 9854 scmd->satacmd_lba_mid_lsb = GET_RFIS_CYL_MID(rfisp); 9855 scmd->satacmd_lba_high_lsb = GET_RFIS_CYL_HI(rfisp); 9856 scmd->satacmd_device_reg = GET_RFIS_DEV_HEAD(rfisp); 9857 9858 if (scmd->satacmd_addr_type == ATA_ADDR_LBA48) { 9859 scmd->satacmd_sec_count_msb = GET_RFIS_SECTOR_COUNT_EXP(rfisp); 9860 scmd->satacmd_lba_low_msb = GET_RFIS_CYL_LOW_EXP(rfisp); 9861 scmd->satacmd_lba_mid_msb = GET_RFIS_CYL_MID_EXP(rfisp); 9862 scmd->satacmd_lba_high_msb = GET_RFIS_CYL_HI_EXP(rfisp); 9863 } 9864 } 9865 9866 /* 9867 * Fill the ncq error page into sata_cmd for queued command error. 9868 */ 9869 static void 9870 ahci_copy_ncq_err_page(sata_cmd_t *scmd, 9871 struct sata_ncq_error_recovery_page *ncq_err_page) 9872 { 9873 scmd->satacmd_sec_count_msb = ncq_err_page->ncq_sector_count_ext; 9874 scmd->satacmd_sec_count_lsb = ncq_err_page->ncq_sector_count; 9875 scmd->satacmd_lba_low_msb = ncq_err_page->ncq_sector_number_ext; 9876 scmd->satacmd_lba_low_lsb = ncq_err_page->ncq_sector_number; 9877 scmd->satacmd_lba_mid_msb = ncq_err_page->ncq_cyl_low_ext; 9878 scmd->satacmd_lba_mid_lsb = ncq_err_page->ncq_cyl_low; 9879 scmd->satacmd_lba_high_msb = ncq_err_page->ncq_cyl_high_ext; 9880 scmd->satacmd_lba_high_lsb = ncq_err_page->ncq_cyl_high; 9881 scmd->satacmd_device_reg = ncq_err_page->ncq_dev_head; 9882 scmd->satacmd_status_reg = ncq_err_page->ncq_status; 9883 scmd->satacmd_error_reg = ncq_err_page->ncq_error; 9884 } 9885 9886 /* 9887 * Put the respective register value to sata_cmd_t for satacmd_flags. 9888 */ 9889 static void 9890 ahci_copy_out_regs(sata_cmd_t *scmd, ahci_fis_d2h_register_t *rfisp) 9891 { 9892 if (scmd->satacmd_flags.sata_copy_out_sec_count_msb) 9893 scmd->satacmd_sec_count_msb = GET_RFIS_SECTOR_COUNT_EXP(rfisp); 9894 if (scmd->satacmd_flags.sata_copy_out_lba_low_msb) 9895 scmd->satacmd_lba_low_msb = GET_RFIS_CYL_LOW_EXP(rfisp); 9896 if (scmd->satacmd_flags.sata_copy_out_lba_mid_msb) 9897 scmd->satacmd_lba_mid_msb = GET_RFIS_CYL_MID_EXP(rfisp); 9898 if (scmd->satacmd_flags.sata_copy_out_lba_high_msb) 9899 scmd->satacmd_lba_high_msb = GET_RFIS_CYL_HI_EXP(rfisp); 9900 if (scmd->satacmd_flags.sata_copy_out_sec_count_lsb) 9901 scmd->satacmd_sec_count_lsb = GET_RFIS_SECTOR_COUNT(rfisp); 9902 if (scmd->satacmd_flags.sata_copy_out_lba_low_lsb) 9903 scmd->satacmd_lba_low_lsb = GET_RFIS_CYL_LOW(rfisp); 9904 if (scmd->satacmd_flags.sata_copy_out_lba_mid_lsb) 9905 scmd->satacmd_lba_mid_lsb = GET_RFIS_CYL_MID(rfisp); 9906 if (scmd->satacmd_flags.sata_copy_out_lba_high_lsb) 9907 scmd->satacmd_lba_high_lsb = GET_RFIS_CYL_HI(rfisp); 9908 if (scmd->satacmd_flags.sata_copy_out_device_reg) 9909 scmd->satacmd_device_reg = GET_RFIS_DEV_HEAD(rfisp); 9910 if (scmd->satacmd_flags.sata_copy_out_error_reg) 9911 scmd->satacmd_error_reg = GET_RFIS_ERROR(rfisp); 9912 } 9913 9914 static void 9915 ahci_log_fatal_error_message(ahci_ctl_t *ahci_ctlp, uint8_t port, 9916 uint32_t intr_status) 9917 { 9918 int instance = ddi_get_instance(ahci_ctlp->ahcictl_dip); 9919 9920 if (intr_status & AHCI_INTR_STATUS_IFS) 9921 cmn_err(CE_WARN, "!ahci%d: ahci port %d has interface fatal " 9922 "error", instance, port); 9923 9924 if (intr_status & AHCI_INTR_STATUS_HBDS) 9925 cmn_err(CE_WARN, "!ahci%d: ahci port %d has bus data error", 9926 instance, port); 9927 9928 if (intr_status & AHCI_INTR_STATUS_HBFS) 9929 cmn_err(CE_WARN, "!ahci%d: ahci port %d has bus fatal error", 9930 instance, port); 9931 9932 if (intr_status & AHCI_INTR_STATUS_TFES) 9933 cmn_err(CE_WARN, "!ahci%d: ahci port %d has task file error", 9934 instance, port); 9935 9936 cmn_err(CE_WARN, "!ahci%d: ahci port %d is trying to do error " 9937 "recovery", instance, port); 9938 } 9939 9940 /* 9941 * Dump the serror message to the log. 9942 */ 9943 static void 9944 ahci_log_serror_message(ahci_ctl_t *ahci_ctlp, uint8_t port, 9945 uint32_t port_serror, int debug_only) 9946 { 9947 static char err_buf[512]; 9948 static char err_msg_header[16]; 9949 char *err_msg = err_buf; 9950 9951 *err_buf = '\0'; 9952 *err_msg_header = '\0'; 9953 9954 if (port_serror & SERROR_DATA_ERR_FIXED) { 9955 err_msg = strcat(err_msg, 9956 "\tRecovered Data Integrity Error (I)\n"); 9957 } 9958 9959 if (port_serror & SERROR_COMM_ERR_FIXED) { 9960 err_msg = strcat(err_msg, 9961 "\tRecovered Communication Error (M)\n"); 9962 } 9963 9964 if (port_serror & SERROR_DATA_ERR) { 9965 err_msg = strcat(err_msg, 9966 "\tTransient Data Integrity Error (T)\n"); 9967 } 9968 9969 if (port_serror & SERROR_PERSISTENT_ERR) { 9970 err_msg = strcat(err_msg, 9971 "\tPersistent Communication or Data Integrity Error (C)\n"); 9972 } 9973 9974 if (port_serror & SERROR_PROTOCOL_ERR) { 9975 err_msg = strcat(err_msg, "\tProtocol Error (P)\n"); 9976 } 9977 9978 if (port_serror & SERROR_INT_ERR) { 9979 err_msg = strcat(err_msg, "\tInternal Error (E)\n"); 9980 } 9981 9982 if (port_serror & SERROR_PHY_RDY_CHG) { 9983 err_msg = strcat(err_msg, "\tPhyRdy Change (N)\n"); 9984 } 9985 9986 if (port_serror & SERROR_PHY_INT_ERR) { 9987 err_msg = strcat(err_msg, "\tPhy Internal Error (I)\n"); 9988 } 9989 9990 if (port_serror & SERROR_COMM_WAKE) { 9991 err_msg = strcat(err_msg, "\tComm Wake (W)\n"); 9992 } 9993 9994 if (port_serror & SERROR_10B_TO_8B_ERR) { 9995 err_msg = strcat(err_msg, "\t10B to 8B Decode Error (B)\n"); 9996 } 9997 9998 if (port_serror & SERROR_DISPARITY_ERR) { 9999 err_msg = strcat(err_msg, "\tDisparity Error (D)\n"); 10000 } 10001 10002 if (port_serror & SERROR_CRC_ERR) { 10003 err_msg = strcat(err_msg, "\tCRC Error (C)\n"); 10004 } 10005 10006 if (port_serror & SERROR_HANDSHAKE_ERR) { 10007 err_msg = strcat(err_msg, "\tHandshake Error (H)\n"); 10008 } 10009 10010 if (port_serror & SERROR_LINK_SEQ_ERR) { 10011 err_msg = strcat(err_msg, "\tLink Sequence Error (S)\n"); 10012 } 10013 10014 if (port_serror & SERROR_TRANS_ERR) { 10015 err_msg = strcat(err_msg, 10016 "\tTransport state transition error (T)\n"); 10017 } 10018 10019 if (port_serror & SERROR_FIS_TYPE) { 10020 err_msg = strcat(err_msg, "\tUnknown FIS Type (F)\n"); 10021 } 10022 10023 if (port_serror & SERROR_EXCHANGED_ERR) { 10024 err_msg = strcat(err_msg, "\tExchanged (X)\n"); 10025 } 10026 10027 if (err_msg == NULL) 10028 return; 10029 10030 if (debug_only) { 10031 (void) sprintf(err_msg_header, "port %d", port); 10032 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, err_msg_header, NULL); 10033 AHCIDBG(AHCIDBG_ERRS, ahci_ctlp, err_msg, NULL); 10034 } else if (ahci_ctlp) { 10035 cmn_err(CE_WARN, "!ahci%d: %s %s", 10036 ddi_get_instance(ahci_ctlp->ahcictl_dip), 10037 err_msg_header, err_msg); 10038 10039 /* sata trace debug */ 10040 sata_trace_debug(ahci_ctlp->ahcictl_dip, 10041 "ahci%d: %s %s", ddi_get_instance(ahci_ctlp->ahcictl_dip), 10042 err_msg_header, err_msg); 10043 } else { 10044 cmn_err(CE_WARN, "!ahci: %s %s", err_msg_header, err_msg); 10045 10046 /* sata trace debug */ 10047 sata_trace_debug(NULL, "ahci: %s %s", err_msg_header, err_msg); 10048 } 10049 } 10050 10051 /* 10052 * Translate the sata_address_t type into the ahci_addr_t type. 10053 * sata_device.satadev_addr structure is used as source. 10054 */ 10055 static void 10056 ahci_get_ahci_addr(ahci_ctl_t *ahci_ctlp, sata_device_t *sd, 10057 ahci_addr_t *ahci_addrp) 10058 { 10059 sata_address_t *sata_addrp = &sd->satadev_addr; 10060 ahci_addrp->aa_port = 10061 ahci_ctlp->ahcictl_cport_to_port[sata_addrp->cport]; 10062 ahci_addrp->aa_pmport = sata_addrp->pmport; 10063 10064 switch (sata_addrp->qual) { 10065 case SATA_ADDR_DCPORT: 10066 case SATA_ADDR_CPORT: 10067 ahci_addrp->aa_qual = AHCI_ADDR_PORT; 10068 break; 10069 case SATA_ADDR_PMULT: 10070 case SATA_ADDR_PMULT_SPEC: 10071 ahci_addrp->aa_qual = AHCI_ADDR_PMULT; 10072 break; 10073 case SATA_ADDR_DPMPORT: 10074 case SATA_ADDR_PMPORT: 10075 ahci_addrp->aa_qual = AHCI_ADDR_PMPORT; 10076 break; 10077 case SATA_ADDR_NULL: 10078 default: 10079 /* something went wrong */ 10080 ahci_addrp->aa_qual = AHCI_ADDR_NULL; 10081 break; 10082 } 10083 } 10084 10085 /* 10086 * This routine is to calculate the total number of ports implemented 10087 * by the HBA. 10088 */ 10089 static int 10090 ahci_get_num_implemented_ports(uint32_t ports_implemented) 10091 { 10092 uint8_t i; 10093 int num = 0; 10094 10095 for (i = 0; i < AHCI_MAX_PORTS; i++) { 10096 if (((uint32_t)0x1 << i) & ports_implemented) 10097 num++; 10098 } 10099 10100 return (num); 10101 } 10102 10103 #if AHCI_DEBUG 10104 static void 10105 ahci_log(ahci_ctl_t *ahci_ctlp, uint_t level, char *fmt, ...) 10106 { 10107 static char name[16]; 10108 va_list ap; 10109 10110 mutex_enter(&ahci_log_mutex); 10111 10112 va_start(ap, fmt); 10113 if (ahci_ctlp) { 10114 (void) sprintf(name, "ahci%d: ", 10115 ddi_get_instance(ahci_ctlp->ahcictl_dip)); 10116 } else { 10117 (void) sprintf(name, "ahci: "); 10118 } 10119 10120 (void) vsprintf(ahci_log_buf, fmt, ap); 10121 va_end(ap); 10122 10123 cmn_err(level, "%s%s", name, ahci_log_buf); 10124 10125 mutex_exit(&ahci_log_mutex); 10126 } 10127 #endif 10128 10129 /* 10130 * quiesce(9E) entry point. 10131 * 10132 * This function is called when the system is single-threaded at high 10133 * PIL with preemption disabled. Therefore, this function must not be 10134 * blocked. 10135 * 10136 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure. 10137 * DDI_FAILURE indicates an error condition and should almost never happen. 10138 */ 10139 static int 10140 ahci_quiesce(dev_info_t *dip) 10141 { 10142 ahci_ctl_t *ahci_ctlp; 10143 ahci_port_t *ahci_portp; 10144 int instance, port; 10145 10146 instance = ddi_get_instance(dip); 10147 ahci_ctlp = ddi_get_soft_state(ahci_statep, instance); 10148 10149 if (ahci_ctlp == NULL) 10150 return (DDI_FAILURE); 10151 10152 #if AHCI_DEBUG 10153 ahci_debug_flags = 0; 10154 #endif 10155 10156 /* disable all the interrupts. */ 10157 ahci_disable_all_intrs(ahci_ctlp); 10158 10159 for (port = 0; port < ahci_ctlp->ahcictl_num_ports; port++) { 10160 if (!AHCI_PORT_IMPLEMENTED(ahci_ctlp, port)) { 10161 continue; 10162 } 10163 10164 ahci_portp = ahci_ctlp->ahcictl_ports[port]; 10165 10166 /* 10167 * Stop the port by clearing PxCMD.ST 10168 * 10169 * Here we must disable the port interrupt because 10170 * ahci_disable_all_intrs only clear GHC.IE, and IS 10171 * register will be still set if PxIE is enabled. 10172 * When ahci shares one IRQ with other drivers, the 10173 * intr handler may claim the intr mistakenly. 10174 */ 10175 ahci_disable_port_intrs(ahci_ctlp, port); 10176 (void) ahci_put_port_into_notrunning_state(ahci_ctlp, 10177 ahci_portp, port); 10178 } 10179 10180 return (DDI_SUCCESS); 10181 } 10182 10183 /* 10184 * The function will add a sata packet to the done queue. 10185 * 10186 * WARNING!!! ahciport_mutex should be acquired before the function 10187 * is called. 10188 */ 10189 static void 10190 ahci_add_doneq(ahci_port_t *ahci_portp, sata_pkt_t *satapkt, int reason) 10191 { 10192 ASSERT(satapkt != NULL); 10193 10194 /* set the reason for all packets */ 10195 satapkt->satapkt_reason = reason; 10196 satapkt->satapkt_hba_driver_private = NULL; 10197 10198 if (! (satapkt->satapkt_op_mode & SATA_OPMODE_SYNCH) && 10199 satapkt->satapkt_comp) { 10200 /* 10201 * only add to queue when mode is not synch and there is 10202 * completion callback 10203 */ 10204 *ahci_portp->ahciport_doneqtail = satapkt; 10205 ahci_portp->ahciport_doneqtail = 10206 (sata_pkt_t **)&(satapkt->satapkt_hba_driver_private); 10207 ahci_portp->ahciport_doneq_len ++; 10208 10209 } else if ((satapkt->satapkt_op_mode & SATA_OPMODE_SYNCH) && 10210 ! (satapkt->satapkt_op_mode & SATA_OPMODE_POLLING)) 10211 /* 10212 * for sync/non-poll mode, just call cv_broadcast 10213 */ 10214 cv_broadcast(&ahci_portp->ahciport_cv); 10215 } 10216 10217 /* 10218 * The function will call completion callback of sata packet on the 10219 * completed queue 10220 * 10221 * WARNING!!! ahciport_mutex should be acquired before the function 10222 * is called. 10223 */ 10224 static void 10225 ahci_flush_doneq(ahci_port_t *ahci_portp) 10226 { 10227 sata_pkt_t *satapkt, *next; 10228 10229 if (ahci_portp->ahciport_doneq) { 10230 satapkt = ahci_portp->ahciport_doneq; 10231 10232 ahci_portp->ahciport_doneq = NULL; 10233 ahci_portp->ahciport_doneqtail = &ahci_portp->ahciport_doneq; 10234 ahci_portp->ahciport_doneq_len = 0; 10235 10236 mutex_exit(&ahci_portp->ahciport_mutex); 10237 10238 while (satapkt != NULL) { 10239 next = satapkt->satapkt_hba_driver_private; 10240 satapkt->satapkt_hba_driver_private = NULL; 10241 10242 /* Call the callback */ 10243 (*satapkt->satapkt_comp)(satapkt); 10244 10245 satapkt = next; 10246 } 10247 10248 mutex_enter(&ahci_portp->ahciport_mutex); 10249 } 10250 } 10251