1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2010 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 /* 28 * Copyright (c) 2000 to 2010, LSI Corporation. 29 * All rights reserved. 30 * 31 * Redistribution and use in source and binary forms of all code within 32 * this file that is exclusively owned by LSI, with or without 33 * modification, is permitted provided that, in addition to the CDDL 1.0 34 * License requirements, the following conditions are met: 35 * 36 * Neither the name of the author nor the names of its contributors may be 37 * used to endorse or promote products derived from this software without 38 * specific prior written permission. 39 * 40 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 41 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 42 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 43 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 44 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 45 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 46 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 47 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 48 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 49 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 50 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH 51 * DAMAGE. 52 */ 53 54 /* 55 * mptsas_impl - This file contains all the basic functions for communicating 56 * to MPT based hardware. 57 */ 58 59 #if defined(lint) || defined(DEBUG) 60 #define MPTSAS_DEBUG 61 #endif 62 63 /* 64 * standard header files 65 */ 66 #include <sys/note.h> 67 #include <sys/scsi/scsi.h> 68 #include <sys/pci.h> 69 70 #pragma pack(1) 71 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_type.h> 72 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2.h> 73 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_cnfg.h> 74 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_init.h> 75 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_ioc.h> 76 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_sas.h> 77 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_tool.h> 78 #pragma pack() 79 80 /* 81 * private header files. 82 */ 83 #include <sys/scsi/adapters/mpt_sas/mptsas_var.h> 84 85 /* 86 * FMA header files. 87 */ 88 #include <sys/fm/io/ddi.h> 89 90 #if defined(MPTSAS_DEBUG) 91 extern uint32_t mptsas_debug_flags; 92 #endif 93 94 /* 95 * prototypes 96 */ 97 static void mptsas_ioc_event_cmdq_add(mptsas_t *mpt, m_event_struct_t *cmd); 98 static void mptsas_ioc_event_cmdq_delete(mptsas_t *mpt, m_event_struct_t *cmd); 99 static m_event_struct_t *mptsas_ioc_event_find_by_cmd(mptsas_t *mpt, 100 struct mptsas_cmd *cmd); 101 102 /* 103 * add ioc evnet cmd into the queue 104 */ 105 static void 106 mptsas_ioc_event_cmdq_add(mptsas_t *mpt, m_event_struct_t *cmd) 107 { 108 if ((cmd->m_event_linkp = mpt->m_ioc_event_cmdq) == NULL) { 109 mpt->m_ioc_event_cmdtail = &cmd->m_event_linkp; 110 mpt->m_ioc_event_cmdq = cmd; 111 } else { 112 cmd->m_event_linkp = NULL; 113 *(mpt->m_ioc_event_cmdtail) = cmd; 114 mpt->m_ioc_event_cmdtail = &cmd->m_event_linkp; 115 } 116 } 117 118 /* 119 * remove specified cmd from the ioc event queue 120 */ 121 static void 122 mptsas_ioc_event_cmdq_delete(mptsas_t *mpt, m_event_struct_t *cmd) 123 { 124 m_event_struct_t *prev = mpt->m_ioc_event_cmdq; 125 if (prev == cmd) { 126 if ((mpt->m_ioc_event_cmdq = cmd->m_event_linkp) == NULL) { 127 mpt->m_ioc_event_cmdtail = &mpt->m_ioc_event_cmdq; 128 } 129 cmd->m_event_linkp = NULL; 130 return; 131 } 132 while (prev != NULL) { 133 if (prev->m_event_linkp == cmd) { 134 prev->m_event_linkp = cmd->m_event_linkp; 135 if (cmd->m_event_linkp == NULL) { 136 mpt->m_ioc_event_cmdtail = &prev->m_event_linkp; 137 } 138 139 cmd->m_event_linkp = NULL; 140 return; 141 } 142 prev = prev->m_event_linkp; 143 } 144 } 145 146 static m_event_struct_t * 147 mptsas_ioc_event_find_by_cmd(mptsas_t *mpt, struct mptsas_cmd *cmd) 148 { 149 m_event_struct_t *ioc_cmd = NULL; 150 151 ioc_cmd = mpt->m_ioc_event_cmdq; 152 while (ioc_cmd != NULL) { 153 if (&(ioc_cmd->m_event_cmd) == cmd) { 154 return (ioc_cmd); 155 } 156 ioc_cmd = ioc_cmd->m_event_linkp; 157 } 158 ioc_cmd = NULL; 159 return (ioc_cmd); 160 } 161 162 void 163 mptsas_destroy_ioc_event_cmd(mptsas_t *mpt) 164 { 165 m_event_struct_t *ioc_cmd = NULL; 166 m_event_struct_t *ioc_cmd_tmp = NULL; 167 ioc_cmd = mpt->m_ioc_event_cmdq; 168 169 /* 170 * because the IOC event queue is resource of per instance for driver, 171 * it's not only ACK event commands used it, but also some others used 172 * it. We need destroy all ACK event commands when IOC reset, but can't 173 * disturb others.So we use filter to clear the ACK event cmd in ioc 174 * event queue, and other requests should be reserved, and they would 175 * be free by its owner. 176 */ 177 while (ioc_cmd != NULL) { 178 if (ioc_cmd->m_event_cmd.cmd_flags & CFLAG_CMDACK) { 179 NDBG20(("destroy!! remove Ack Flag ioc_cmd\n")); 180 if ((mpt->m_ioc_event_cmdq = 181 ioc_cmd->m_event_linkp) == NULL) 182 mpt->m_ioc_event_cmdtail = 183 &mpt->m_ioc_event_cmdq; 184 ioc_cmd_tmp = ioc_cmd; 185 ioc_cmd = ioc_cmd->m_event_linkp; 186 kmem_free(ioc_cmd_tmp, M_EVENT_STRUCT_SIZE); 187 } else { 188 /* 189 * it's not ack cmd, so continue to check next one 190 */ 191 192 NDBG20(("destroy!! it's not Ack Flag, continue\n")); 193 ioc_cmd = ioc_cmd->m_event_linkp; 194 } 195 196 } 197 } 198 199 void 200 mptsas_start_config_page_access(mptsas_t *mpt, mptsas_cmd_t *cmd) 201 { 202 pMpi2ConfigRequest_t request; 203 pMpi2SGESimple64_t sge; 204 struct scsi_pkt *pkt = cmd->cmd_pkt; 205 mptsas_config_request_t *config = pkt->pkt_ha_private; 206 uint8_t direction; 207 uint32_t length, flagslength, request_desc_low; 208 209 ASSERT(mutex_owned(&mpt->m_mutex)); 210 211 /* 212 * Point to the correct message and clear it as well as the global 213 * config page memory. 214 */ 215 request = (pMpi2ConfigRequest_t)(mpt->m_req_frame + 216 (mpt->m_req_frame_size * cmd->cmd_slot)); 217 bzero(request, mpt->m_req_frame_size); 218 219 /* 220 * Form the request message. 221 */ 222 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Function, 223 MPI2_FUNCTION_CONFIG); 224 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Action, config->action); 225 direction = MPI2_SGE_FLAGS_IOC_TO_HOST; 226 length = 0; 227 sge = (pMpi2SGESimple64_t)&request->PageBufferSGE; 228 if (config->action == MPI2_CONFIG_ACTION_PAGE_HEADER) { 229 if (config->page_type > MPI2_CONFIG_PAGETYPE_MASK) { 230 ddi_put8(mpt->m_acc_req_frame_hdl, 231 &request->Header.PageType, 232 MPI2_CONFIG_PAGETYPE_EXTENDED); 233 ddi_put8(mpt->m_acc_req_frame_hdl, 234 &request->ExtPageType, config->page_type); 235 } else { 236 ddi_put8(mpt->m_acc_req_frame_hdl, 237 &request->Header.PageType, config->page_type); 238 } 239 } else { 240 ddi_put8(mpt->m_acc_req_frame_hdl, &request->ExtPageType, 241 config->ext_page_type); 242 ddi_put16(mpt->m_acc_req_frame_hdl, &request->ExtPageLength, 243 config->ext_page_length); 244 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Header.PageType, 245 config->page_type); 246 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Header.PageLength, 247 config->page_length); 248 ddi_put8(mpt->m_acc_req_frame_hdl, 249 &request->Header.PageVersion, config->page_version); 250 if ((config->page_type & MPI2_CONFIG_PAGETYPE_MASK) == 251 MPI2_CONFIG_PAGETYPE_EXTENDED) { 252 length = config->ext_page_length * 4; 253 } else { 254 length = config->page_length * 4; 255 } 256 257 if (config->action == MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM) { 258 direction = MPI2_SGE_FLAGS_HOST_TO_IOC; 259 } 260 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->Address.Low, 261 (uint32_t)cmd->cmd_dma_addr); 262 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->Address.High, 263 (uint32_t)(cmd->cmd_dma_addr >> 32)); 264 } 265 ddi_put8(mpt->m_acc_req_frame_hdl, &request->Header.PageNumber, 266 config->page_number); 267 ddi_put32(mpt->m_acc_req_frame_hdl, &request->PageAddress, 268 config->page_address); 269 flagslength = ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT | 270 MPI2_SGE_FLAGS_END_OF_BUFFER | 271 MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 272 MPI2_SGE_FLAGS_SYSTEM_ADDRESS | 273 MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 274 direction | 275 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT); 276 flagslength |= length; 277 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->FlagsLength, flagslength); 278 279 (void) ddi_dma_sync(mpt->m_dma_req_frame_hdl, 0, 0, 280 DDI_DMA_SYNC_FORDEV); 281 request_desc_low = (cmd->cmd_slot << 16) + 282 MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 283 cmd->cmd_rfm = NULL; 284 MPTSAS_START_CMD(mpt, request_desc_low, 0); 285 if ((mptsas_check_dma_handle(mpt->m_dma_req_frame_hdl) != 286 DDI_SUCCESS) || 287 (mptsas_check_acc_handle(mpt->m_acc_req_frame_hdl) != 288 DDI_SUCCESS)) { 289 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED); 290 } 291 } 292 293 int 294 mptsas_access_config_page(mptsas_t *mpt, uint8_t action, uint8_t page_type, 295 uint8_t page_number, uint32_t page_address, int (*callback) (mptsas_t *, 296 caddr_t, ddi_acc_handle_t, uint16_t, uint32_t, va_list), ...) 297 { 298 va_list ap; 299 ddi_dma_attr_t attrs; 300 uint_t ncookie; 301 ddi_dma_cookie_t cookie; 302 ddi_acc_handle_t accessp; 303 size_t len = 0, alloc_len; 304 mptsas_config_request_t config; 305 int rval = DDI_SUCCESS, config_flags = 0; 306 mptsas_cmd_t *cmd; 307 struct scsi_pkt *pkt; 308 pMpi2ConfigReply_t reply; 309 uint16_t iocstatus = 0; 310 uint32_t iocloginfo; 311 caddr_t page_memp; 312 313 va_start(ap, callback); 314 ASSERT(mutex_owned(&mpt->m_mutex)); 315 316 /* 317 * Get a command from the pool. 318 */ 319 if ((rval = (mptsas_request_from_pool(mpt, &cmd, &pkt))) == -1) { 320 mptsas_log(mpt, CE_NOTE, "command pool is full for config " 321 "page request"); 322 rval = DDI_FAILURE; 323 goto page_done; 324 } 325 config_flags |= MPTSAS_REQUEST_POOL_CMD; 326 327 bzero((caddr_t)cmd, sizeof (*cmd)); 328 bzero((caddr_t)pkt, scsi_pkt_size()); 329 bzero((caddr_t)&config, sizeof (config)); 330 331 /* 332 * Save the data for this request to be used in the call to start the 333 * config header request. 334 */ 335 config.action = MPI2_CONFIG_ACTION_PAGE_HEADER; 336 config.page_type = page_type; 337 config.page_number = page_number; 338 config.page_address = page_address; 339 340 /* 341 * Form a blank cmd/pkt to store the acknowledgement message 342 */ 343 pkt->pkt_ha_private = (opaque_t)&config; 344 pkt->pkt_flags = FLAG_HEAD; 345 pkt->pkt_time = 60; 346 cmd->cmd_pkt = pkt; 347 cmd->cmd_flags = CFLAG_CMDIOC | CFLAG_CONFIG; 348 349 /* 350 * Save the config header request message in a slot. 351 */ 352 if (mptsas_save_cmd(mpt, cmd) == TRUE) { 353 cmd->cmd_flags |= CFLAG_PREPARED; 354 mptsas_start_config_page_access(mpt, cmd); 355 } else { 356 mptsas_waitq_add(mpt, cmd); 357 } 358 359 /* 360 * If this is a request for a RAID info page, or any page called during 361 * the RAID info page request, poll because these config page requests 362 * are nested. Poll to avoid data corruption due to one page's data 363 * overwriting the outer page request's data. This can happen when 364 * the mutex is released in cv_wait. 365 */ 366 if ((page_type == MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG) || 367 (page_type == MPI2_CONFIG_PAGETYPE_RAID_VOLUME) || 368 (page_type == MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK)) { 369 (void) mptsas_poll(mpt, cmd, pkt->pkt_time * 1000); 370 } else { 371 while ((cmd->cmd_flags & CFLAG_FINISHED) == 0) { 372 cv_wait(&mpt->m_config_cv, &mpt->m_mutex); 373 } 374 } 375 376 /* 377 * Check if the header request completed without timing out 378 */ 379 if (cmd->cmd_flags & CFLAG_TIMEOUT) { 380 mptsas_log(mpt, CE_WARN, "config header request timeout"); 381 rval = DDI_FAILURE; 382 goto page_done; 383 } 384 385 /* 386 * cmd_rfm points to the reply message if a reply was given. Check the 387 * IOCStatus to make sure everything went OK with the header request. 388 */ 389 if (cmd->cmd_rfm) { 390 config_flags |= MPTSAS_ADDRESS_REPLY; 391 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0, 392 DDI_DMA_SYNC_FORCPU); 393 reply = (pMpi2ConfigReply_t)(mpt->m_reply_frame + (cmd->cmd_rfm 394 - mpt->m_reply_frame_dma_addr)); 395 config.page_type = ddi_get8(mpt->m_acc_reply_frame_hdl, 396 &reply->Header.PageType); 397 config.page_number = ddi_get8(mpt->m_acc_reply_frame_hdl, 398 &reply->Header.PageNumber); 399 config.page_length = ddi_get8(mpt->m_acc_reply_frame_hdl, 400 &reply->Header.PageLength); 401 config.page_version = ddi_get8(mpt->m_acc_reply_frame_hdl, 402 &reply->Header.PageVersion); 403 config.ext_page_type = ddi_get8(mpt->m_acc_reply_frame_hdl, 404 &reply->ExtPageType); 405 config.ext_page_length = ddi_get16(mpt->m_acc_reply_frame_hdl, 406 &reply->ExtPageLength); 407 408 iocstatus = ddi_get16(mpt->m_acc_reply_frame_hdl, 409 &reply->IOCStatus); 410 iocloginfo = ddi_get32(mpt->m_acc_reply_frame_hdl, 411 &reply->IOCLogInfo); 412 413 if (iocstatus) { 414 NDBG13(("mptsas_access_config_page header: " 415 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus, 416 iocloginfo)); 417 rval = DDI_FAILURE; 418 goto page_done; 419 } 420 421 if ((config.page_type & MPI2_CONFIG_PAGETYPE_MASK) == 422 MPI2_CONFIG_PAGETYPE_EXTENDED) 423 len = (config.ext_page_length * 4); 424 else 425 len = (config.page_length * 4); 426 427 } 428 429 if (pkt->pkt_reason == CMD_RESET) { 430 mptsas_log(mpt, CE_WARN, "ioc reset abort config header " 431 "request"); 432 rval = DDI_FAILURE; 433 goto page_done; 434 } 435 436 /* 437 * Put the reply frame back on the free queue, increment the free 438 * index, and write the new index to the free index register. But only 439 * if this reply is an ADDRESS reply. 440 */ 441 if (config_flags & MPTSAS_ADDRESS_REPLY) { 442 ddi_put32(mpt->m_acc_free_queue_hdl, 443 &((uint32_t *)(void *)mpt->m_free_queue)[mpt->m_free_index], 444 cmd->cmd_rfm); 445 (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0, 446 DDI_DMA_SYNC_FORDEV); 447 if (++mpt->m_free_index == mpt->m_free_queue_depth) { 448 mpt->m_free_index = 0; 449 } 450 ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyFreeHostIndex, 451 mpt->m_free_index); 452 config_flags &= (~MPTSAS_ADDRESS_REPLY); 453 } 454 455 /* 456 * Allocate DMA buffer here. Store the info regarding this buffer in 457 * the cmd struct so that it can be used for this specific command and 458 * de-allocated after the command completes. The size of the reply 459 * will not be larger than the reply frame size. 460 */ 461 attrs = mpt->m_msg_dma_attr; 462 attrs.dma_attr_sgllen = 1; 463 attrs.dma_attr_granular = (uint32_t)len; 464 465 if (ddi_dma_alloc_handle(mpt->m_dip, &attrs, 466 DDI_DMA_SLEEP, NULL, &cmd->cmd_dmahandle) != DDI_SUCCESS) { 467 mptsas_log(mpt, CE_WARN, "unable to allocate dma handle for " 468 "config page."); 469 rval = DDI_FAILURE; 470 goto page_done; 471 } 472 if (ddi_dma_mem_alloc(cmd->cmd_dmahandle, len, 473 &mpt->m_dev_acc_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, 474 &page_memp, &alloc_len, &accessp) != DDI_SUCCESS) { 475 ddi_dma_free_handle(&cmd->cmd_dmahandle); 476 cmd->cmd_dmahandle = NULL; 477 mptsas_log(mpt, CE_WARN, "unable to allocate config page " 478 "structure."); 479 rval = DDI_FAILURE; 480 goto page_done; 481 } 482 483 if (ddi_dma_addr_bind_handle(cmd->cmd_dmahandle, NULL, page_memp, 484 alloc_len, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, 485 &cookie, &ncookie) != DDI_DMA_MAPPED) { 486 (void) ddi_dma_mem_free(&accessp); 487 ddi_dma_free_handle(&cmd->cmd_dmahandle); 488 cmd->cmd_dmahandle = NULL; 489 mptsas_log(mpt, CE_WARN, "unable to bind DMA resources for " 490 "config page."); 491 rval = DDI_FAILURE; 492 goto page_done; 493 } 494 cmd->cmd_dma_addr = cookie.dmac_laddress; 495 bzero(page_memp, len); 496 497 /* 498 * Save the data for this request to be used in the call to start the 499 * config page read 500 */ 501 config.action = action; 502 config.page_address = page_address; 503 504 /* 505 * Re-use the cmd that was used to get the header. Reset some of the 506 * values. 507 */ 508 bzero((caddr_t)pkt, scsi_pkt_size()); 509 pkt->pkt_ha_private = (opaque_t)&config; 510 pkt->pkt_flags = FLAG_HEAD; 511 pkt->pkt_time = 60; 512 cmd->cmd_flags = CFLAG_PREPARED | CFLAG_CMDIOC | CFLAG_CONFIG; 513 514 /* 515 * Send the config page request. cmd is re-used from header request. 516 */ 517 mptsas_start_config_page_access(mpt, cmd); 518 519 /* 520 * If this is a request for a RAID info page, or any page called during 521 * the RAID info page request, poll because these config page requests 522 * are nested. Poll to avoid data corruption due to one page's data 523 * overwriting the outer page request's data. This can happen when 524 * the mutex is released in cv_wait. 525 */ 526 if ((page_type == MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG) || 527 (page_type == MPI2_CONFIG_PAGETYPE_RAID_VOLUME) || 528 (page_type == MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK)) { 529 (void) mptsas_poll(mpt, cmd, pkt->pkt_time * 1000); 530 } else { 531 while ((cmd->cmd_flags & CFLAG_FINISHED) == 0) { 532 cv_wait(&mpt->m_config_cv, &mpt->m_mutex); 533 } 534 } 535 536 /* 537 * Check if the request completed without timing out 538 */ 539 if (cmd->cmd_flags & CFLAG_TIMEOUT) { 540 mptsas_log(mpt, CE_WARN, "config page request timeout"); 541 rval = DDI_FAILURE; 542 goto page_done; 543 } 544 545 /* 546 * cmd_rfm points to the reply message if a reply was given. The reply 547 * frame and the config page are returned from this function in the 548 * param list. 549 */ 550 if (cmd->cmd_rfm) { 551 config_flags |= MPTSAS_ADDRESS_REPLY; 552 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0, 553 DDI_DMA_SYNC_FORCPU); 554 (void) ddi_dma_sync(cmd->cmd_dmahandle, 0, 0, 555 DDI_DMA_SYNC_FORCPU); 556 reply = (pMpi2ConfigReply_t)(mpt->m_reply_frame + (cmd->cmd_rfm 557 - mpt->m_reply_frame_dma_addr)); 558 iocstatus = ddi_get16(mpt->m_acc_reply_frame_hdl, 559 &reply->IOCStatus); 560 iocstatus = MPTSAS_IOCSTATUS(iocstatus); 561 iocloginfo = ddi_get32(mpt->m_acc_reply_frame_hdl, 562 &reply->IOCLogInfo); 563 } 564 565 if (callback(mpt, page_memp, accessp, iocstatus, iocloginfo, ap)) { 566 rval = DDI_FAILURE; 567 goto page_done; 568 } 569 570 mptsas_fma_check(mpt, cmd); 571 /* 572 * Check the DMA/ACC handles and then free the DMA buffer. 573 */ 574 if ((mptsas_check_dma_handle(cmd->cmd_dmahandle) != DDI_SUCCESS) || 575 (mptsas_check_acc_handle(accessp) != DDI_SUCCESS)) { 576 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED); 577 rval = DDI_FAILURE; 578 } 579 580 if (pkt->pkt_reason == CMD_TRAN_ERR) { 581 mptsas_log(mpt, CE_WARN, "config fma error"); 582 rval = DDI_FAILURE; 583 goto page_done; 584 } 585 if (pkt->pkt_reason == CMD_RESET) { 586 mptsas_log(mpt, CE_WARN, "ioc reset abort config request"); 587 rval = DDI_FAILURE; 588 goto page_done; 589 } 590 591 page_done: 592 va_end(ap); 593 /* 594 * Put the reply frame back on the free queue, increment the free 595 * index, and write the new index to the free index register. But only 596 * if this reply is an ADDRESS reply. 597 */ 598 if (config_flags & MPTSAS_ADDRESS_REPLY) { 599 ddi_put32(mpt->m_acc_free_queue_hdl, 600 &((uint32_t *)(void *)mpt->m_free_queue)[mpt->m_free_index], 601 cmd->cmd_rfm); 602 (void) ddi_dma_sync(mpt->m_dma_free_queue_hdl, 0, 0, 603 DDI_DMA_SYNC_FORDEV); 604 if (++mpt->m_free_index == mpt->m_free_queue_depth) { 605 mpt->m_free_index = 0; 606 } 607 ddi_put32(mpt->m_datap, &mpt->m_reg->ReplyFreeHostIndex, 608 mpt->m_free_index); 609 } 610 611 if (cmd->cmd_dmahandle != NULL) { 612 (void) ddi_dma_unbind_handle(cmd->cmd_dmahandle); 613 (void) ddi_dma_mem_free(&accessp); 614 ddi_dma_free_handle(&cmd->cmd_dmahandle); 615 } 616 617 if (cmd && (cmd->cmd_flags & CFLAG_PREPARED)) { 618 mptsas_remove_cmd(mpt, cmd); 619 config_flags &= (~MPTSAS_REQUEST_POOL_CMD); 620 } 621 if (config_flags & MPTSAS_REQUEST_POOL_CMD) 622 mptsas_return_to_pool(mpt, cmd); 623 624 if (config_flags & MPTSAS_CMD_TIMEOUT) { 625 if ((mptsas_restart_ioc(mpt)) == DDI_FAILURE) { 626 mptsas_log(mpt, CE_WARN, "mptsas_restart_ioc failed"); 627 } 628 } 629 630 return (rval); 631 } 632 633 int 634 mptsas_send_config_request_msg(mptsas_t *mpt, uint8_t action, uint8_t pagetype, 635 uint32_t pageaddress, uint8_t pagenumber, uint8_t pageversion, 636 uint8_t pagelength, uint32_t SGEflagslength, uint32_t SGEaddress32) 637 { 638 pMpi2ConfigRequest_t config; 639 int send_numbytes; 640 641 bzero(mpt->m_hshk_memp, sizeof (MPI2_CONFIG_REQUEST)); 642 config = (pMpi2ConfigRequest_t)mpt->m_hshk_memp; 643 ddi_put8(mpt->m_hshk_acc_hdl, &config->Function, MPI2_FUNCTION_CONFIG); 644 ddi_put8(mpt->m_hshk_acc_hdl, &config->Action, action); 645 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageNumber, pagenumber); 646 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageType, pagetype); 647 ddi_put32(mpt->m_hshk_acc_hdl, &config->PageAddress, pageaddress); 648 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageVersion, pageversion); 649 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageLength, pagelength); 650 ddi_put32(mpt->m_hshk_acc_hdl, 651 &config->PageBufferSGE.MpiSimple.FlagsLength, SGEflagslength); 652 ddi_put32(mpt->m_hshk_acc_hdl, 653 &config->PageBufferSGE.MpiSimple.u.Address32, SGEaddress32); 654 send_numbytes = sizeof (MPI2_CONFIG_REQUEST); 655 656 /* 657 * Post message via handshake 658 */ 659 if (mptsas_send_handshake_msg(mpt, (caddr_t)config, send_numbytes, 660 mpt->m_hshk_acc_hdl)) { 661 return (-1); 662 } 663 return (0); 664 } 665 666 int 667 mptsas_send_extended_config_request_msg(mptsas_t *mpt, uint8_t action, 668 uint8_t extpagetype, uint32_t pageaddress, uint8_t pagenumber, 669 uint8_t pageversion, uint16_t extpagelength, 670 uint32_t SGEflagslength, uint32_t SGEaddress32) 671 { 672 pMpi2ConfigRequest_t config; 673 int send_numbytes; 674 675 bzero(mpt->m_hshk_memp, sizeof (MPI2_CONFIG_REQUEST)); 676 config = (pMpi2ConfigRequest_t)mpt->m_hshk_memp; 677 ddi_put8(mpt->m_hshk_acc_hdl, &config->Function, MPI2_FUNCTION_CONFIG); 678 ddi_put8(mpt->m_hshk_acc_hdl, &config->Action, action); 679 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageNumber, pagenumber); 680 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageType, 681 MPI2_CONFIG_PAGETYPE_EXTENDED); 682 ddi_put8(mpt->m_hshk_acc_hdl, &config->ExtPageType, extpagetype); 683 ddi_put32(mpt->m_hshk_acc_hdl, &config->PageAddress, pageaddress); 684 ddi_put8(mpt->m_hshk_acc_hdl, &config->Header.PageVersion, pageversion); 685 ddi_put16(mpt->m_hshk_acc_hdl, &config->ExtPageLength, extpagelength); 686 ddi_put32(mpt->m_hshk_acc_hdl, 687 &config->PageBufferSGE.MpiSimple.FlagsLength, SGEflagslength); 688 ddi_put32(mpt->m_hshk_acc_hdl, 689 &config->PageBufferSGE.MpiSimple.u.Address32, SGEaddress32); 690 send_numbytes = sizeof (MPI2_CONFIG_REQUEST); 691 692 /* 693 * Post message via handshake 694 */ 695 if (mptsas_send_handshake_msg(mpt, (caddr_t)config, send_numbytes, 696 mpt->m_hshk_acc_hdl)) { 697 return (-1); 698 } 699 return (0); 700 } 701 702 int 703 mptsas_ioc_wait_for_response(mptsas_t *mpt) 704 { 705 int polls = 0; 706 707 while ((ddi_get32(mpt->m_datap, 708 &mpt->m_reg->HostInterruptStatus) & MPI2_HIS_IOP_DOORBELL_STATUS)) { 709 drv_usecwait(1000); 710 if (polls++ > 60000) { 711 return (-1); 712 } 713 } 714 return (0); 715 } 716 717 int 718 mptsas_ioc_wait_for_doorbell(mptsas_t *mpt) 719 { 720 int polls = 0; 721 722 while ((ddi_get32(mpt->m_datap, 723 &mpt->m_reg->HostInterruptStatus) & MPI2_HIM_DIM) == 0) { 724 drv_usecwait(1000); 725 if (polls++ > 300000) { 726 return (-1); 727 } 728 } 729 return (0); 730 } 731 732 int 733 mptsas_send_handshake_msg(mptsas_t *mpt, caddr_t memp, int numbytes, 734 ddi_acc_handle_t accessp) 735 { 736 int i; 737 738 /* 739 * clean pending doorbells 740 */ 741 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0); 742 ddi_put32(mpt->m_datap, &mpt->m_reg->Doorbell, 743 ((MPI2_FUNCTION_HANDSHAKE << MPI2_DOORBELL_FUNCTION_SHIFT) | 744 ((numbytes / 4) << MPI2_DOORBELL_ADD_DWORDS_SHIFT))); 745 746 if (mptsas_ioc_wait_for_doorbell(mpt)) { 747 NDBG19(("mptsas_send_handshake failed. Doorbell not ready\n")); 748 return (-1); 749 } 750 751 /* 752 * clean pending doorbells again 753 */ 754 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0); 755 756 if (mptsas_ioc_wait_for_response(mpt)) { 757 NDBG19(("mptsas_send_handshake failed. Doorbell not " 758 "cleared\n")); 759 return (-1); 760 } 761 762 /* 763 * post handshake message 764 */ 765 for (i = 0; (i < numbytes / 4); i++, memp += 4) { 766 ddi_put32(mpt->m_datap, &mpt->m_reg->Doorbell, 767 ddi_get32(accessp, (uint32_t *)((void *)(memp)))); 768 if (mptsas_ioc_wait_for_response(mpt)) { 769 NDBG19(("mptsas_send_handshake failed posting " 770 "message\n")); 771 return (-1); 772 } 773 } 774 775 if (mptsas_check_acc_handle(mpt->m_datap) != DDI_SUCCESS) { 776 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED); 777 ddi_fm_acc_err_clear(mpt->m_datap, DDI_FME_VER0); 778 return (-1); 779 } 780 781 return (0); 782 } 783 784 int 785 mptsas_get_handshake_msg(mptsas_t *mpt, caddr_t memp, int numbytes, 786 ddi_acc_handle_t accessp) 787 { 788 int i, totalbytes, bytesleft; 789 uint16_t val; 790 791 /* 792 * wait for doorbell 793 */ 794 if (mptsas_ioc_wait_for_doorbell(mpt)) { 795 NDBG19(("mptsas_get_handshake failed. Doorbell not ready\n")); 796 return (-1); 797 } 798 799 /* 800 * get first 2 bytes of handshake message to determine how much 801 * data we will be getting 802 */ 803 for (i = 0; i < 2; i++, memp += 2) { 804 val = (ddi_get32(mpt->m_datap, 805 &mpt->m_reg->Doorbell) & MPI2_DOORBELL_DATA_MASK); 806 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0); 807 if (mptsas_ioc_wait_for_doorbell(mpt)) { 808 NDBG19(("mptsas_get_handshake failure getting initial" 809 " data\n")); 810 return (-1); 811 } 812 ddi_put16(accessp, (uint16_t *)((void *)(memp)), val); 813 if (i == 1) { 814 totalbytes = (val & 0xFF) * 2; 815 } 816 } 817 818 /* 819 * If we are expecting less bytes than the message wants to send 820 * we simply save as much as we expected and then throw out the rest 821 * later 822 */ 823 if (totalbytes > (numbytes / 2)) { 824 bytesleft = ((numbytes / 2) - 2); 825 } else { 826 bytesleft = (totalbytes - 2); 827 } 828 829 /* 830 * Get the rest of the data 831 */ 832 for (i = 0; i < bytesleft; i++, memp += 2) { 833 val = (ddi_get32(mpt->m_datap, 834 &mpt->m_reg->Doorbell) & MPI2_DOORBELL_DATA_MASK); 835 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0); 836 if (mptsas_ioc_wait_for_doorbell(mpt)) { 837 NDBG19(("mptsas_get_handshake failure getting" 838 " main data\n")); 839 return (-1); 840 } 841 ddi_put16(accessp, (uint16_t *)((void *)(memp)), val); 842 } 843 844 /* 845 * Sometimes the device will send more data than is expected 846 * This data is not used by us but needs to be cleared from 847 * ioc doorbell. So we just read the values and throw 848 * them out. 849 */ 850 if (totalbytes > (numbytes / 2)) { 851 for (i = (numbytes / 2); i < totalbytes; i++) { 852 val = (ddi_get32(mpt->m_datap, 853 &mpt->m_reg->Doorbell) & 854 MPI2_DOORBELL_DATA_MASK); 855 ddi_put32(mpt->m_datap, 856 &mpt->m_reg->HostInterruptStatus, 0); 857 if (mptsas_ioc_wait_for_doorbell(mpt)) { 858 NDBG19(("mptsas_get_handshake failure getting " 859 "extra garbage data\n")); 860 return (-1); 861 } 862 } 863 } 864 865 ddi_put32(mpt->m_datap, &mpt->m_reg->HostInterruptStatus, 0); 866 867 if (mptsas_check_acc_handle(mpt->m_datap) != DDI_SUCCESS) { 868 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED); 869 ddi_fm_acc_err_clear(mpt->m_datap, DDI_FME_VER0); 870 return (-1); 871 } 872 873 return (0); 874 } 875 876 int 877 mptsas_kick_start(mptsas_t *mpt) 878 { 879 int polls = 0; 880 uint32_t diag_reg, ioc_state, saved_HCB_size; 881 882 /* 883 * Start a hard reset. Write magic number and wait 900 uSeconds. 884 */ 885 MPTSAS_ENABLE_DRWE(mpt); 886 drv_usecwait(900); 887 888 /* 889 * Read the current Diag Reg and save the Host Controlled Boot size. 890 */ 891 diag_reg = ddi_get32(mpt->m_datap, &mpt->m_reg->HostDiagnostic); 892 saved_HCB_size = ddi_get32(mpt->m_datap, &mpt->m_reg->HCBSize); 893 894 /* 895 * Set Reset Adapter bit and wait 50 mSeconds. 896 */ 897 diag_reg |= MPI2_DIAG_RESET_ADAPTER; 898 ddi_put32(mpt->m_datap, &mpt->m_reg->HostDiagnostic, diag_reg); 899 drv_usecwait(50000); 900 901 /* 902 * Poll, waiting for Reset Adapter bit to clear. 300 Seconds max 903 * (600000 * 500 = 300,000,000 uSeconds, 300 seconds). 904 * If no more adapter (all FF's), just return failure. 905 */ 906 for (polls = 0; polls < 600000; polls++) { 907 diag_reg = ddi_get32(mpt->m_datap, 908 &mpt->m_reg->HostDiagnostic); 909 if (diag_reg == 0xFFFFFFFF) { 910 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE); 911 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST); 912 return (DDI_FAILURE); 913 } 914 if (!(diag_reg & MPI2_DIAG_RESET_ADAPTER)) { 915 break; 916 } 917 drv_usecwait(500); 918 } 919 if (polls == 600000) { 920 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE); 921 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST); 922 return (DDI_FAILURE); 923 } 924 925 /* 926 * Check if adapter is in Host Boot Mode. If so, restart adapter 927 * assuming the HCB points to good FW. 928 * Set BootDeviceSel to HCDW (Host Code and Data Window). 929 */ 930 if (diag_reg & MPI2_DIAG_HCB_MODE) { 931 diag_reg &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK; 932 diag_reg |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW; 933 ddi_put32(mpt->m_datap, &mpt->m_reg->HostDiagnostic, diag_reg); 934 935 /* 936 * Re-enable the HCDW. 937 */ 938 ddi_put32(mpt->m_datap, &mpt->m_reg->HCBSize, 939 (saved_HCB_size | MPI2_HCB_SIZE_HCB_ENABLE)); 940 } 941 942 /* 943 * Restart the adapter. 944 */ 945 diag_reg &= ~MPI2_DIAG_HOLD_IOC_RESET; 946 ddi_put32(mpt->m_datap, &mpt->m_reg->HostDiagnostic, diag_reg); 947 948 /* 949 * Disable writes to the Host Diag register. 950 */ 951 ddi_put32(mpt->m_datap, &mpt->m_reg->WriteSequence, 952 MPI2_WRSEQ_FLUSH_KEY_VALUE); 953 954 /* 955 * Wait 60 seconds max for FW to come to ready state. 956 */ 957 for (polls = 0; polls < 60000; polls++) { 958 ioc_state = ddi_get32(mpt->m_datap, &mpt->m_reg->Doorbell); 959 if (ioc_state == 0xFFFFFFFF) { 960 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE); 961 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST); 962 return (DDI_FAILURE); 963 } 964 if ((ioc_state & MPI2_IOC_STATE_MASK) == 965 MPI2_IOC_STATE_READY) { 966 break; 967 } 968 drv_usecwait(1000); 969 } 970 if (polls == 60000) { 971 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE); 972 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST); 973 return (DDI_FAILURE); 974 } 975 976 /* 977 * Clear the ioc ack events queue. 978 */ 979 mptsas_destroy_ioc_event_cmd(mpt); 980 981 return (DDI_SUCCESS); 982 } 983 984 int 985 mptsas_ioc_reset(mptsas_t *mpt) 986 { 987 #ifdef SLM 988 int polls = 0; 989 uint32_t reset_msg; 990 991 #endif 992 uint32_t ioc_state; 993 ioc_state = ddi_get32(mpt->m_datap, &mpt->m_reg->Doorbell); 994 /* 995 * If chip is already in ready state then there is nothing to do. 996 */ 997 if (ioc_state == MPI2_IOC_STATE_READY) { 998 return (MPTSAS_NO_RESET); 999 } 1000 1001 /* 1002 * SLM-test; skip MUR for now 1003 */ 1004 #ifdef SLM 1005 /* 1006 * If the chip is already operational, we just need to send 1007 * it a message unit reset to put it back in the ready state 1008 */ 1009 if (ioc_state & MPI2_IOC_STATE_OPERATIONAL) { 1010 reset_msg = MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET; 1011 ddi_put32(mpt->m_datap, &mpt->m_reg->Doorbell, 1012 (reset_msg << MPI2_DOORBELL_FUNCTION_SHIFT)); 1013 if (mptsas_ioc_wait_for_response(mpt)) { 1014 NDBG19(("mptsas_ioc_reset failure sending " 1015 "message_unit_reset\n")); 1016 goto hard_reset; 1017 } 1018 1019 /* 1020 * Wait no more than 60 seconds for chip to become ready. 1021 */ 1022 while ((ddi_get32(mpt->m_datap, &mpt->m_reg->Doorbell) & 1023 MPI2_IOC_STATE_READY) == 0x0) { 1024 drv_usecwait(1000); 1025 if (polls++ > 60000) { 1026 goto hard_reset; 1027 } 1028 } 1029 /* 1030 * the message unit reset would do reset operations 1031 * clear reply and request queue, so we should clear 1032 * ACK event cmd. 1033 */ 1034 mptsas_destroy_ioc_event_cmd(mpt); 1035 return (MPTSAS_NO_RESET); 1036 } 1037 1038 hard_reset: 1039 #endif 1040 if (mptsas_kick_start(mpt) == DDI_FAILURE) { 1041 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE); 1042 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST); 1043 return (MPTSAS_RESET_FAIL); 1044 } 1045 return (MPTSAS_SUCCESS_HARDRESET); 1046 } 1047 1048 1049 int 1050 mptsas_request_from_pool(mptsas_t *mpt, mptsas_cmd_t **cmd, 1051 struct scsi_pkt **pkt) 1052 { 1053 m_event_struct_t *ioc_cmd = NULL; 1054 1055 ioc_cmd = kmem_zalloc(M_EVENT_STRUCT_SIZE, KM_SLEEP); 1056 if (ioc_cmd == NULL) { 1057 return (DDI_FAILURE); 1058 } 1059 ioc_cmd->m_event_linkp = NULL; 1060 mptsas_ioc_event_cmdq_add(mpt, ioc_cmd); 1061 *cmd = &(ioc_cmd->m_event_cmd); 1062 *pkt = &(ioc_cmd->m_event_pkt); 1063 1064 return (DDI_SUCCESS); 1065 } 1066 1067 void 1068 mptsas_return_to_pool(mptsas_t *mpt, mptsas_cmd_t *cmd) 1069 { 1070 m_event_struct_t *ioc_cmd = NULL; 1071 1072 ioc_cmd = mptsas_ioc_event_find_by_cmd(mpt, cmd); 1073 if (ioc_cmd == NULL) { 1074 return; 1075 } 1076 1077 mptsas_ioc_event_cmdq_delete(mpt, ioc_cmd); 1078 kmem_free(ioc_cmd, M_EVENT_STRUCT_SIZE); 1079 ioc_cmd = NULL; 1080 } 1081 1082 /* 1083 * NOTE: We should be able to queue TM requests in the controller to make this 1084 * a lot faster. If resetting all targets, for example, we can load the hi 1085 * priority queue with its limit and the controller will reply as they are 1086 * completed. This way, we don't have to poll for one reply at a time. 1087 * Think about enhancing this later. 1088 */ 1089 int 1090 mptsas_ioc_task_management(mptsas_t *mpt, int task_type, uint16_t dev_handle, 1091 int lun, uint8_t *reply, uint32_t reply_size, int mode) 1092 { 1093 /* 1094 * In order to avoid allocating variables on the stack, 1095 * we make use of the pre-existing mptsas_cmd_t and 1096 * scsi_pkt which are included in the mptsas_t which 1097 * is passed to this routine. 1098 */ 1099 1100 pMpi2SCSITaskManagementRequest_t task; 1101 int rval = FALSE; 1102 mptsas_cmd_t *cmd; 1103 struct scsi_pkt *pkt; 1104 mptsas_slots_t *slots = mpt->m_active; 1105 uint32_t request_desc_low, i; 1106 pMPI2DefaultReply_t reply_msg; 1107 1108 /* 1109 * Can't start another task management routine. 1110 */ 1111 if (slots->m_slot[MPTSAS_TM_SLOT(mpt)] != NULL) { 1112 mptsas_log(mpt, CE_WARN, "Can only start 1 task management" 1113 " command at a time\n"); 1114 return (FALSE); 1115 } 1116 1117 cmd = &(mpt->m_event_task_mgmt.m_event_cmd); 1118 pkt = &(mpt->m_event_task_mgmt.m_event_pkt); 1119 1120 bzero((caddr_t)cmd, sizeof (*cmd)); 1121 bzero((caddr_t)pkt, scsi_pkt_size()); 1122 1123 pkt->pkt_cdbp = (opaque_t)&cmd->cmd_cdb[0]; 1124 pkt->pkt_scbp = (opaque_t)&cmd->cmd_scb; 1125 pkt->pkt_ha_private = (opaque_t)cmd; 1126 pkt->pkt_flags = (FLAG_NOINTR | FLAG_HEAD); 1127 pkt->pkt_time = 60; 1128 pkt->pkt_address.a_target = dev_handle; 1129 pkt->pkt_address.a_lun = (uchar_t)lun; 1130 cmd->cmd_pkt = pkt; 1131 cmd->cmd_scblen = 1; 1132 cmd->cmd_flags = CFLAG_TM_CMD; 1133 cmd->cmd_slot = MPTSAS_TM_SLOT(mpt); 1134 1135 slots->m_slot[MPTSAS_TM_SLOT(mpt)] = cmd; 1136 1137 /* 1138 * Store the TM message in memory location corresponding to the TM slot 1139 * number. 1140 */ 1141 task = (pMpi2SCSITaskManagementRequest_t)(mpt->m_req_frame + 1142 (mpt->m_req_frame_size * cmd->cmd_slot)); 1143 bzero(task, mpt->m_req_frame_size); 1144 1145 /* 1146 * form message for requested task 1147 */ 1148 mptsas_init_std_hdr(mpt->m_acc_req_frame_hdl, task, dev_handle, lun, 0, 1149 MPI2_FUNCTION_SCSI_TASK_MGMT); 1150 1151 /* 1152 * Set the task type 1153 */ 1154 ddi_put8(mpt->m_acc_req_frame_hdl, &task->TaskType, task_type); 1155 1156 /* 1157 * Send TM request using High Priority Queue. 1158 */ 1159 (void) ddi_dma_sync(mpt->m_dma_req_frame_hdl, 0, 0, 1160 DDI_DMA_SYNC_FORDEV); 1161 request_desc_low = (cmd->cmd_slot << 16) + 1162 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; 1163 MPTSAS_START_CMD(mpt, request_desc_low, 0); 1164 rval = mptsas_poll(mpt, cmd, MPTSAS_POLL_TIME); 1165 1166 if (pkt->pkt_reason == CMD_INCOMPLETE) 1167 rval = FALSE; 1168 1169 /* 1170 * If a reply frame was used and there is a reply buffer to copy the 1171 * reply data into, copy it. If this fails, log a message, but don't 1172 * fail the TM request. 1173 */ 1174 if (cmd->cmd_rfm && reply) { 1175 (void) ddi_dma_sync(mpt->m_dma_reply_frame_hdl, 0, 0, 1176 DDI_DMA_SYNC_FORCPU); 1177 reply_msg = (pMPI2DefaultReply_t) 1178 (mpt->m_reply_frame + (cmd->cmd_rfm - 1179 mpt->m_reply_frame_dma_addr)); 1180 if (reply_size > sizeof (MPI2_SCSI_TASK_MANAGE_REPLY)) { 1181 reply_size = sizeof (MPI2_SCSI_TASK_MANAGE_REPLY); 1182 } 1183 mutex_exit(&mpt->m_mutex); 1184 for (i = 0; i < reply_size; i++) { 1185 if (ddi_copyout((uint8_t *)reply_msg + i, reply + i, 1, 1186 mode)) { 1187 mptsas_log(mpt, CE_WARN, "failed to copy out " 1188 "reply data for TM request"); 1189 break; 1190 } 1191 } 1192 mutex_enter(&mpt->m_mutex); 1193 } 1194 1195 /* 1196 * clear the TM slot before returning 1197 */ 1198 slots->m_slot[MPTSAS_TM_SLOT(mpt)] = NULL; 1199 1200 /* 1201 * If we lost our task management command 1202 * we need to reset the ioc 1203 */ 1204 if (rval == FALSE) { 1205 mptsas_log(mpt, CE_WARN, "mptsas_ioc_task_management failed " 1206 "try to reset ioc to recovery!"); 1207 if (mptsas_restart_ioc(mpt)) { 1208 mptsas_log(mpt, CE_WARN, "mptsas_restart_ioc failed"); 1209 rval = FAILED; 1210 } 1211 } 1212 1213 return (rval); 1214 } 1215 1216 int 1217 mptsas_update_flash(mptsas_t *mpt, caddr_t ptrbuffer, uint32_t size, 1218 uint8_t type, int mode) 1219 { 1220 1221 /* 1222 * In order to avoid allocating variables on the stack, 1223 * we make use of the pre-existing mptsas_cmd_t and 1224 * scsi_pkt which are included in the mptsas_t which 1225 * is passed to this routine. 1226 */ 1227 1228 ddi_dma_attr_t flsh_dma_attrs; 1229 uint_t flsh_ncookie; 1230 ddi_dma_cookie_t flsh_cookie; 1231 ddi_dma_handle_t flsh_dma_handle; 1232 ddi_acc_handle_t flsh_accessp; 1233 size_t flsh_alloc_len; 1234 caddr_t memp, flsh_memp; 1235 uint32_t flagslength; 1236 pMpi2FWDownloadRequest fwdownload; 1237 pMpi2FWDownloadTCSGE_t tcsge; 1238 pMpi2SGESimple64_t sge; 1239 mptsas_cmd_t *cmd; 1240 struct scsi_pkt *pkt; 1241 int i; 1242 int rvalue = 0; 1243 uint32_t request_desc_low; 1244 1245 if ((rvalue = (mptsas_request_from_pool(mpt, &cmd, &pkt))) == -1) { 1246 mptsas_log(mpt, CE_WARN, "mptsas_update_flash(): allocation " 1247 "failed. event ack command pool is full\n"); 1248 return (rvalue); 1249 } 1250 1251 bzero((caddr_t)cmd, sizeof (*cmd)); 1252 bzero((caddr_t)pkt, scsi_pkt_size()); 1253 cmd->ioc_cmd_slot = (uint32_t)rvalue; 1254 1255 /* 1256 * dynamically create a customized dma attribute structure 1257 * that describes the flash file. 1258 */ 1259 flsh_dma_attrs = mpt->m_msg_dma_attr; 1260 flsh_dma_attrs.dma_attr_sgllen = 1; 1261 1262 if (ddi_dma_alloc_handle(mpt->m_dip, &flsh_dma_attrs, 1263 DDI_DMA_SLEEP, NULL, &flsh_dma_handle) != DDI_SUCCESS) { 1264 mptsas_log(mpt, CE_WARN, 1265 "(unable to allocate dma handle."); 1266 mptsas_return_to_pool(mpt, cmd); 1267 return (-1); 1268 } 1269 1270 if (ddi_dma_mem_alloc(flsh_dma_handle, size, 1271 &mpt->m_dev_acc_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, 1272 &flsh_memp, &flsh_alloc_len, &flsh_accessp) != DDI_SUCCESS) { 1273 ddi_dma_free_handle(&flsh_dma_handle); 1274 mptsas_log(mpt, CE_WARN, 1275 "unable to allocate flash structure."); 1276 mptsas_return_to_pool(mpt, cmd); 1277 return (-1); 1278 } 1279 1280 if (ddi_dma_addr_bind_handle(flsh_dma_handle, NULL, flsh_memp, 1281 flsh_alloc_len, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, 1282 NULL, &flsh_cookie, &flsh_ncookie) != DDI_DMA_MAPPED) { 1283 (void) ddi_dma_mem_free(&flsh_accessp); 1284 ddi_dma_free_handle(&flsh_dma_handle); 1285 mptsas_log(mpt, CE_WARN, "unable to bind DMA resources."); 1286 mptsas_return_to_pool(mpt, cmd); 1287 return (-1); 1288 } 1289 bzero(flsh_memp, size); 1290 1291 for (i = 0; i < size; i++) { 1292 (void) ddi_copyin(ptrbuffer + i, flsh_memp + i, 1, mode); 1293 } 1294 (void) ddi_dma_sync(flsh_dma_handle, 0, 0, DDI_DMA_SYNC_FORDEV); 1295 1296 /* 1297 * form a cmd/pkt to store the fw download message 1298 */ 1299 pkt->pkt_cdbp = (opaque_t)&cmd->cmd_cdb[0]; 1300 pkt->pkt_scbp = (opaque_t)&cmd->cmd_scb; 1301 pkt->pkt_ha_private = (opaque_t)cmd; 1302 pkt->pkt_flags = FLAG_HEAD; 1303 pkt->pkt_time = 60; 1304 cmd->cmd_pkt = pkt; 1305 cmd->cmd_scblen = 1; 1306 cmd->cmd_flags = CFLAG_CMDIOC | CFLAG_FW_CMD; 1307 1308 /* 1309 * Save the command in a slot 1310 */ 1311 if (mptsas_save_cmd(mpt, cmd) == FALSE) { 1312 (void) ddi_dma_unbind_handle(flsh_dma_handle); 1313 (void) ddi_dma_mem_free(&flsh_accessp); 1314 ddi_dma_free_handle(&flsh_dma_handle); 1315 mptsas_return_to_pool(mpt, cmd); 1316 return (-1); 1317 } 1318 1319 /* 1320 * Fill in fw download message 1321 */ 1322 ASSERT(cmd->cmd_slot != 0); 1323 memp = mpt->m_req_frame + (mpt->m_req_frame_size * cmd->cmd_slot); 1324 bzero(memp, mpt->m_req_frame_size); 1325 fwdownload = (void *)memp; 1326 ddi_put8(mpt->m_acc_req_frame_hdl, &fwdownload->Function, 1327 MPI2_FUNCTION_FW_DOWNLOAD); 1328 ddi_put8(mpt->m_acc_req_frame_hdl, &fwdownload->ImageType, type); 1329 ddi_put8(mpt->m_acc_req_frame_hdl, &fwdownload->MsgFlags, 1330 MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT); 1331 ddi_put32(mpt->m_acc_req_frame_hdl, &fwdownload->TotalImageSize, size); 1332 1333 tcsge = (pMpi2FWDownloadTCSGE_t)&fwdownload->SGL; 1334 ddi_put8(mpt->m_acc_req_frame_hdl, &tcsge->ContextSize, 0); 1335 ddi_put8(mpt->m_acc_req_frame_hdl, &tcsge->DetailsLength, 12); 1336 ddi_put8(mpt->m_acc_req_frame_hdl, &tcsge->Flags, 0); 1337 ddi_put32(mpt->m_acc_req_frame_hdl, &tcsge->ImageOffset, 0); 1338 ddi_put32(mpt->m_acc_req_frame_hdl, &tcsge->ImageSize, size); 1339 1340 sge = (pMpi2SGESimple64_t)(tcsge + 1); 1341 flagslength = size; 1342 flagslength |= ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT | 1343 MPI2_SGE_FLAGS_END_OF_BUFFER | 1344 MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 1345 MPI2_SGE_FLAGS_SYSTEM_ADDRESS | 1346 MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 1347 MPI2_SGE_FLAGS_HOST_TO_IOC | 1348 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT); 1349 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->FlagsLength, flagslength); 1350 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->Address.Low, 1351 flsh_cookie.dmac_address); 1352 ddi_put32(mpt->m_acc_req_frame_hdl, &sge->Address.High, 1353 (uint32_t)(flsh_cookie.dmac_laddress >> 32)); 1354 1355 /* 1356 * Start command 1357 */ 1358 (void) ddi_dma_sync(mpt->m_dma_req_frame_hdl, 0, 0, 1359 DDI_DMA_SYNC_FORDEV); 1360 request_desc_low = (cmd->cmd_slot << 16) + 1361 MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 1362 cmd->cmd_rfm = NULL; 1363 MPTSAS_START_CMD(mpt, request_desc_low, 0); 1364 1365 rvalue = 0; 1366 (void) cv_reltimedwait(&mpt->m_fw_cv, &mpt->m_mutex, 1367 drv_usectohz(60 * MICROSEC), TR_CLOCK_TICK); 1368 if (!(cmd->cmd_flags & CFLAG_FINISHED)) { 1369 if ((mptsas_restart_ioc(mpt)) == DDI_FAILURE) { 1370 mptsas_log(mpt, CE_WARN, "mptsas_restart_ioc failed"); 1371 } 1372 rvalue = -1; 1373 } 1374 mptsas_remove_cmd(mpt, cmd); 1375 1376 (void) ddi_dma_unbind_handle(flsh_dma_handle); 1377 (void) ddi_dma_mem_free(&flsh_accessp); 1378 ddi_dma_free_handle(&flsh_dma_handle); 1379 1380 return (rvalue); 1381 } 1382 1383 static int 1384 mptsas_sasdevpage_0_cb(mptsas_t *mpt, caddr_t page_memp, 1385 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo, 1386 va_list ap) 1387 { 1388 #ifndef __lock_lint 1389 _NOTE(ARGUNUSED(ap)) 1390 #endif 1391 pMpi2SasDevicePage0_t sasdevpage; 1392 int rval = DDI_SUCCESS, i; 1393 uint8_t *sas_addr = NULL; 1394 uint8_t tmp_sas_wwn[SAS_WWN_BYTE_SIZE]; 1395 uint16_t *devhdl; 1396 uint64_t *sas_wwn; 1397 uint32_t *dev_info; 1398 uint8_t *physport, *phynum; 1399 uint32_t page_address; 1400 1401 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) && 1402 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) { 1403 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_device_page0 " 1404 "header: IOCStatus=0x%x, IOCLogInfo=0x%x", 1405 iocstatus, iocloginfo); 1406 rval = DDI_FAILURE; 1407 return (rval); 1408 } 1409 page_address = va_arg(ap, uint32_t); 1410 /* 1411 * The INVALID_PAGE status is normal if using GET_NEXT_HANDLE and there 1412 * are no more pages. If everything is OK up to this point but the 1413 * status is INVALID_PAGE, change rval to FAILURE and quit. Also, 1414 * signal that device traversal is complete. 1415 */ 1416 if (iocstatus == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) { 1417 if ((page_address & MPI2_SAS_DEVICE_PGAD_FORM_MASK) == 1418 MPI2_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE) { 1419 mpt->m_done_traverse_dev = 1; 1420 } 1421 rval = DDI_FAILURE; 1422 return (rval); 1423 } 1424 devhdl = va_arg(ap, uint16_t *); 1425 sas_wwn = va_arg(ap, uint64_t *); 1426 dev_info = va_arg(ap, uint32_t *); 1427 physport = va_arg(ap, uint8_t *); 1428 phynum = va_arg(ap, uint8_t *); 1429 1430 sasdevpage = (pMpi2SasDevicePage0_t)page_memp; 1431 1432 *dev_info = ddi_get32(accessp, &sasdevpage->DeviceInfo); 1433 *devhdl = ddi_get16(accessp, &sasdevpage->DevHandle); 1434 sas_addr = (uint8_t *)(&sasdevpage->SASAddress); 1435 for (i = 0; i < SAS_WWN_BYTE_SIZE; i++) { 1436 tmp_sas_wwn[i] = ddi_get8(accessp, sas_addr + i); 1437 } 1438 bcopy(tmp_sas_wwn, sas_wwn, SAS_WWN_BYTE_SIZE); 1439 *sas_wwn = LE_64(*sas_wwn); 1440 *physport = ddi_get8(accessp, &sasdevpage->PhysicalPort); 1441 *phynum = ddi_get8(accessp, &sasdevpage->PhyNum); 1442 return (rval); 1443 } 1444 1445 /* 1446 * Request MPI configuration page SAS device page 0 to get DevHandle, device 1447 * info and SAS address. 1448 */ 1449 int 1450 mptsas_get_sas_device_page0(mptsas_t *mpt, uint32_t page_address, 1451 uint16_t *dev_handle, uint64_t *sas_wwn, uint32_t *dev_info, 1452 uint8_t *physport, uint8_t *phynum) 1453 { 1454 int rval = DDI_SUCCESS; 1455 1456 ASSERT(mutex_owned(&mpt->m_mutex)); 1457 1458 /* 1459 * Get the header and config page. reply contains the reply frame, 1460 * which holds status info for the request. 1461 */ 1462 rval = mptsas_access_config_page(mpt, 1463 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT, 1464 MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE, 0, page_address, 1465 mptsas_sasdevpage_0_cb, page_address, dev_handle, sas_wwn, 1466 dev_info, physport, phynum); 1467 1468 return (rval); 1469 } 1470 1471 static int 1472 mptsas_sasexpdpage_0_cb(mptsas_t *mpt, caddr_t page_memp, 1473 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo, 1474 va_list ap) 1475 { 1476 #ifndef __lock_lint 1477 _NOTE(ARGUNUSED(ap)) 1478 #endif 1479 pMpi2ExpanderPage0_t expddevpage; 1480 int rval = DDI_SUCCESS, i; 1481 uint8_t *sas_addr = NULL; 1482 uint8_t tmp_sas_wwn[SAS_WWN_BYTE_SIZE]; 1483 uint16_t *devhdl; 1484 uint64_t *sas_wwn; 1485 uint8_t physport; 1486 mptsas_phymask_t *phymask; 1487 uint32_t page_address; 1488 1489 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) && 1490 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) { 1491 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_expander_page0 " 1492 "config: IOCStatus=0x%x, IOCLogInfo=0x%x", 1493 iocstatus, iocloginfo); 1494 rval = DDI_FAILURE; 1495 return (rval); 1496 } 1497 page_address = va_arg(ap, uint32_t); 1498 /* 1499 * The INVALID_PAGE status is normal if using GET_NEXT_HANDLE and there 1500 * are no more pages. If everything is OK up to this point but the 1501 * status is INVALID_PAGE, change rval to FAILURE and quit. Also, 1502 * signal that device traversal is complete. 1503 */ 1504 if (iocstatus == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) { 1505 if ((page_address & MPI2_SAS_EXPAND_PGAD_FORM_MASK) == 1506 MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL) { 1507 mpt->m_done_traverse_smp = 1; 1508 } 1509 rval = DDI_FAILURE; 1510 return (rval); 1511 } 1512 devhdl = va_arg(ap, uint16_t *); 1513 sas_wwn = va_arg(ap, uint64_t *); 1514 phymask = va_arg(ap, mptsas_phymask_t *); 1515 1516 expddevpage = (pMpi2ExpanderPage0_t)page_memp; 1517 1518 *devhdl = ddi_get16(accessp, &expddevpage->DevHandle); 1519 physport = ddi_get8(accessp, &expddevpage->PhysicalPort); 1520 *phymask = mptsas_physport_to_phymask(mpt, physport); 1521 sas_addr = (uint8_t *)(&expddevpage->SASAddress); 1522 for (i = 0; i < SAS_WWN_BYTE_SIZE; i++) { 1523 tmp_sas_wwn[i] = ddi_get8(accessp, sas_addr + i); 1524 } 1525 bcopy(tmp_sas_wwn, sas_wwn, SAS_WWN_BYTE_SIZE); 1526 *sas_wwn = LE_64(*sas_wwn); 1527 return (rval); 1528 } 1529 1530 /* 1531 * Request MPI configuration page SAS device page 0 to get DevHandle, phymask 1532 * and SAS address. 1533 */ 1534 int 1535 mptsas_get_sas_expander_page0(mptsas_t *mpt, uint32_t page_address, 1536 mptsas_smp_t *info) 1537 { 1538 int rval = DDI_SUCCESS; 1539 1540 ASSERT(mutex_owned(&mpt->m_mutex)); 1541 1542 /* 1543 * Get the header and config page. reply contains the reply frame, 1544 * which holds status info for the request. 1545 */ 1546 rval = mptsas_access_config_page(mpt, 1547 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT, 1548 MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER, 0, page_address, 1549 mptsas_sasexpdpage_0_cb, page_address, &info->m_devhdl, 1550 &info->m_sasaddr, &info->m_phymask); 1551 1552 return (rval); 1553 } 1554 1555 static int 1556 mptsas_sasportpage_0_cb(mptsas_t *mpt, caddr_t page_memp, 1557 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo, 1558 va_list ap) 1559 { 1560 #ifndef __lock_lint 1561 _NOTE(ARGUNUSED(ap)) 1562 #endif 1563 int rval = DDI_SUCCESS, i; 1564 uint8_t *sas_addr = NULL; 1565 uint64_t *sas_wwn; 1566 uint8_t tmp_sas_wwn[SAS_WWN_BYTE_SIZE]; 1567 uint8_t *portwidth; 1568 pMpi2SasPortPage0_t sasportpage; 1569 1570 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) { 1571 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_port_page0 " 1572 "config: IOCStatus=0x%x, IOCLogInfo=0x%x", 1573 iocstatus, iocloginfo); 1574 rval = DDI_FAILURE; 1575 return (rval); 1576 } 1577 sas_wwn = va_arg(ap, uint64_t *); 1578 portwidth = va_arg(ap, uint8_t *); 1579 1580 sasportpage = (pMpi2SasPortPage0_t)page_memp; 1581 sas_addr = (uint8_t *)(&sasportpage->SASAddress); 1582 for (i = 0; i < SAS_WWN_BYTE_SIZE; i++) { 1583 tmp_sas_wwn[i] = ddi_get8(accessp, sas_addr + i); 1584 } 1585 bcopy(tmp_sas_wwn, sas_wwn, SAS_WWN_BYTE_SIZE); 1586 *sas_wwn = LE_64(*sas_wwn); 1587 *portwidth = ddi_get8(accessp, &sasportpage->PortWidth); 1588 return (rval); 1589 } 1590 1591 /* 1592 * Request MPI configuration page SAS port page 0 to get initiator SAS address 1593 * and port width. 1594 */ 1595 int 1596 mptsas_get_sas_port_page0(mptsas_t *mpt, uint32_t page_address, 1597 uint64_t *sas_wwn, uint8_t *portwidth) 1598 { 1599 int rval = DDI_SUCCESS; 1600 1601 ASSERT(mutex_owned(&mpt->m_mutex)); 1602 1603 /* 1604 * Get the header and config page. reply contains the reply frame, 1605 * which holds status info for the request. 1606 */ 1607 rval = mptsas_access_config_page(mpt, 1608 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT, 1609 MPI2_CONFIG_EXTPAGETYPE_SAS_PORT, 0, page_address, 1610 mptsas_sasportpage_0_cb, sas_wwn, portwidth); 1611 1612 return (rval); 1613 } 1614 1615 static int 1616 mptsas_sasiou_page_0_cb(mptsas_t *mpt, caddr_t page_memp, 1617 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo, 1618 va_list ap) 1619 { 1620 #ifndef __lock_lint 1621 _NOTE(ARGUNUSED(ap)) 1622 #endif 1623 int rval = DDI_SUCCESS; 1624 pMpi2SasIOUnitPage0_t sasioupage0; 1625 int i, num_phys; 1626 uint32_t cpdi[MPTSAS_MAX_PHYS], *retrypage0, *readpage1; 1627 uint8_t port_flags; 1628 1629 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) { 1630 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_io_unit_page0 " 1631 "config: IOCStatus=0x%x, IOCLogInfo=0x%x", 1632 iocstatus, iocloginfo); 1633 rval = DDI_FAILURE; 1634 return (rval); 1635 } 1636 readpage1 = va_arg(ap, uint32_t *); 1637 retrypage0 = va_arg(ap, uint32_t *); 1638 1639 sasioupage0 = (pMpi2SasIOUnitPage0_t)page_memp; 1640 1641 num_phys = ddi_get8(accessp, &sasioupage0->NumPhys); 1642 /* 1643 * ASSERT that the num_phys value in SAS IO Unit Page 0 is the same as 1644 * was initially set. This should never change throughout the life of 1645 * the driver. 1646 */ 1647 ASSERT(num_phys == mpt->m_num_phys); 1648 for (i = 0; i < num_phys; i++) { 1649 cpdi[i] = ddi_get32(accessp, 1650 &sasioupage0->PhyData[i]. 1651 ControllerPhyDeviceInfo); 1652 port_flags = ddi_get8(accessp, 1653 &sasioupage0->PhyData[i].PortFlags); 1654 mpt->m_phy_info[i].port_num = 1655 ddi_get8(accessp, 1656 &sasioupage0->PhyData[i].Port); 1657 mpt->m_phy_info[i].ctrl_devhdl = 1658 ddi_get16(accessp, &sasioupage0-> 1659 PhyData[i].ControllerDevHandle); 1660 mpt->m_phy_info[i].attached_devhdl = 1661 ddi_get16(accessp, &sasioupage0-> 1662 PhyData[i].AttachedDevHandle); 1663 mpt->m_phy_info[i].phy_device_type = cpdi[i]; 1664 mpt->m_phy_info[i].port_flags = port_flags; 1665 1666 if (port_flags & DISCOVERY_IN_PROGRESS) { 1667 *retrypage0 = *retrypage0 + 1; 1668 break; 1669 } else { 1670 *retrypage0 = 0; 1671 } 1672 if (!(port_flags & AUTO_PORT_CONFIGURATION)) { 1673 /* 1674 * some PHY configuration described in 1675 * SAS IO Unit Page1 1676 */ 1677 *readpage1 = 1; 1678 } 1679 } 1680 1681 return (rval); 1682 } 1683 1684 static int 1685 mptsas_sasiou_page_1_cb(mptsas_t *mpt, caddr_t page_memp, 1686 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo, 1687 va_list ap) 1688 { 1689 #ifndef __lock_lint 1690 _NOTE(ARGUNUSED(ap)) 1691 #endif 1692 int rval = DDI_SUCCESS; 1693 pMpi2SasIOUnitPage1_t sasioupage1; 1694 int i, num_phys; 1695 uint32_t cpdi[MPTSAS_MAX_PHYS]; 1696 uint8_t port_flags; 1697 1698 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) { 1699 mptsas_log(mpt, CE_WARN, "mptsas_get_sas_io_unit_page1 " 1700 "config: IOCStatus=0x%x, IOCLogInfo=0x%x", 1701 iocstatus, iocloginfo); 1702 rval = DDI_FAILURE; 1703 return (rval); 1704 } 1705 1706 sasioupage1 = (pMpi2SasIOUnitPage1_t)page_memp; 1707 num_phys = ddi_get8(accessp, &sasioupage1->NumPhys); 1708 /* 1709 * ASSERT that the num_phys value in SAS IO Unit Page 1 is the same as 1710 * was initially set. This should never change throughout the life of 1711 * the driver. 1712 */ 1713 ASSERT(num_phys == mpt->m_num_phys); 1714 for (i = 0; i < num_phys; i++) { 1715 cpdi[i] = ddi_get32(accessp, &sasioupage1->PhyData[i]. 1716 ControllerPhyDeviceInfo); 1717 port_flags = ddi_get8(accessp, 1718 &sasioupage1->PhyData[i].PortFlags); 1719 mpt->m_phy_info[i].port_num = 1720 ddi_get8(accessp, 1721 &sasioupage1->PhyData[i].Port); 1722 mpt->m_phy_info[i].port_flags = port_flags; 1723 mpt->m_phy_info[i].phy_device_type = cpdi[i]; 1724 1725 } 1726 return (rval); 1727 } 1728 1729 /* 1730 * Read IO unit page 0 to get information for each PHY. If needed, Read IO Unit 1731 * page1 to update the PHY information. This is the message passing method of 1732 * this function which should be called except during initialization. 1733 */ 1734 int 1735 mptsas_get_sas_io_unit_page(mptsas_t *mpt) 1736 { 1737 int rval = DDI_SUCCESS, state; 1738 uint32_t readpage1 = 0, retrypage0 = 0; 1739 1740 ASSERT(mutex_owned(&mpt->m_mutex)); 1741 1742 /* 1743 * Now we cycle through the state machine. Here's what happens: 1744 * 1. Read IO unit page 0 and set phy information 1745 * 2. See if Read IO unit page1 is needed because of port configuration 1746 * 3. Read IO unit page 1 and update phy information. 1747 */ 1748 state = IOUC_READ_PAGE0; 1749 while (state != IOUC_DONE) { 1750 if (state == IOUC_READ_PAGE0) { 1751 rval = mptsas_access_config_page(mpt, 1752 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT, 1753 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT, 0, 0, 1754 mptsas_sasiou_page_0_cb, &readpage1, 1755 &retrypage0); 1756 } else if (state == IOUC_READ_PAGE1) { 1757 rval = mptsas_access_config_page(mpt, 1758 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT, 1759 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT, 1, 0, 1760 mptsas_sasiou_page_1_cb); 1761 } 1762 1763 if (rval == DDI_SUCCESS) { 1764 switch (state) { 1765 case IOUC_READ_PAGE0: 1766 /* 1767 * retry 30 times if discovery is in process 1768 */ 1769 if (retrypage0 && (retrypage0 < 30)) { 1770 drv_usecwait(1000 * 100); 1771 state = IOUC_READ_PAGE0; 1772 break; 1773 } else if (retrypage0 == 30) { 1774 mptsas_log(mpt, CE_WARN, 1775 "!Discovery in progress, can't " 1776 "verify IO unit config, then " 1777 "after 30 times retry, give " 1778 "up!"); 1779 state = IOUC_DONE; 1780 rval = DDI_FAILURE; 1781 break; 1782 } 1783 1784 if (readpage1 == 0) { 1785 state = IOUC_DONE; 1786 rval = DDI_SUCCESS; 1787 break; 1788 } 1789 1790 state = IOUC_READ_PAGE1; 1791 break; 1792 1793 case IOUC_READ_PAGE1: 1794 state = IOUC_DONE; 1795 rval = DDI_SUCCESS; 1796 break; 1797 } 1798 } else { 1799 return (rval); 1800 } 1801 } 1802 1803 return (rval); 1804 } 1805 1806 static int 1807 mptsas_biospage_3_cb(mptsas_t *mpt, caddr_t page_memp, 1808 ddi_acc_handle_t accessp, uint16_t iocstatus, uint32_t iocloginfo, 1809 va_list ap) 1810 { 1811 #ifndef __lock_lint 1812 _NOTE(ARGUNUSED(ap)) 1813 #endif 1814 pMpi2BiosPage3_t sasbiospage; 1815 int rval = DDI_SUCCESS; 1816 uint32_t *bios_version; 1817 1818 if ((iocstatus != MPI2_IOCSTATUS_SUCCESS) && 1819 (iocstatus != MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)) { 1820 mptsas_log(mpt, CE_WARN, "mptsas_get_bios_page3 header: " 1821 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus, iocloginfo); 1822 rval = DDI_FAILURE; 1823 return (rval); 1824 } 1825 bios_version = va_arg(ap, uint32_t *); 1826 sasbiospage = (pMpi2BiosPage3_t)page_memp; 1827 *bios_version = ddi_get32(accessp, &sasbiospage->BiosVersion); 1828 1829 return (rval); 1830 } 1831 1832 /* 1833 * Request MPI configuration page BIOS page 3 to get BIOS version. Since all 1834 * other information in this page is not needed, just ignore it. 1835 */ 1836 int 1837 mptsas_get_bios_page3(mptsas_t *mpt, uint32_t *bios_version) 1838 { 1839 int rval = DDI_SUCCESS; 1840 1841 ASSERT(mutex_owned(&mpt->m_mutex)); 1842 1843 /* 1844 * Get the header and config page. reply contains the reply frame, 1845 * which holds status info for the request. 1846 */ 1847 rval = mptsas_access_config_page(mpt, 1848 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT, MPI2_CONFIG_PAGETYPE_BIOS, 3, 1849 0, mptsas_biospage_3_cb, bios_version); 1850 1851 return (rval); 1852 } 1853 1854 /* 1855 * Read IO unit page 0 to get information for each PHY. If needed, Read IO Unit 1856 * page1 to update the PHY information. This is the handshaking version of 1857 * this function, which should be called during initialization only. 1858 */ 1859 int 1860 mptsas_get_sas_io_unit_page_hndshk(mptsas_t *mpt) 1861 { 1862 ddi_dma_attr_t recv_dma_attrs, page_dma_attrs; 1863 uint_t recv_ncookie, page_ncookie; 1864 ddi_dma_cookie_t recv_cookie, page_cookie; 1865 ddi_dma_handle_t recv_dma_handle, page_dma_handle; 1866 ddi_acc_handle_t recv_accessp, page_accessp; 1867 size_t recv_alloc_len, page_alloc_len; 1868 pMpi2ConfigReply_t configreply; 1869 pMpi2SasIOUnitPage0_t sasioupage0; 1870 pMpi2SasIOUnitPage1_t sasioupage1; 1871 int recv_numbytes; 1872 caddr_t recv_memp, page_memp; 1873 int recv_dmastate = 0; 1874 int page_dmastate = 0; 1875 int i, num_phys, start_phy = 0; 1876 int page0_size = 1877 sizeof (MPI2_CONFIG_PAGE_SASIOUNIT_0) + 1878 (sizeof (MPI2_SAS_IO_UNIT0_PHY_DATA) * (MPTSAS_MAX_PHYS - 1)); 1879 int page1_size = 1880 sizeof (MPI2_CONFIG_PAGE_SASIOUNIT_1) + 1881 (sizeof (MPI2_SAS_IO_UNIT1_PHY_DATA) * (MPTSAS_MAX_PHYS - 1)); 1882 uint32_t flags_length; 1883 uint32_t cpdi[MPTSAS_MAX_PHYS]; 1884 uint32_t readpage1 = 0, retrypage0 = 0; 1885 uint16_t iocstatus; 1886 uint8_t port_flags, page_number, action; 1887 uint32_t reply_size = 256; /* Big enough for any page */ 1888 uint_t state; 1889 int rval = DDI_FAILURE; 1890 1891 /* 1892 * Initialize our "state machine". This is a bit convoluted, 1893 * but it keeps us from having to do the ddi allocations numerous 1894 * times. 1895 */ 1896 1897 NDBG20(("mptsas_get_sas_io_unit_page_hndshk enter")); 1898 ASSERT(mutex_owned(&mpt->m_mutex)); 1899 state = IOUC_READ_PAGE0; 1900 1901 /* 1902 * dynamically create a customized dma attribute structure 1903 * that describes mpt's config reply page request structure. 1904 */ 1905 recv_dma_attrs = mpt->m_msg_dma_attr; 1906 recv_dma_attrs.dma_attr_sgllen = 1; 1907 recv_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_REPLY)); 1908 1909 if (ddi_dma_alloc_handle(mpt->m_dip, &recv_dma_attrs, 1910 DDI_DMA_SLEEP, NULL, &recv_dma_handle) != DDI_SUCCESS) { 1911 goto cleanup; 1912 } 1913 1914 recv_dmastate |= MPTSAS_DMA_HANDLE_ALLOCD; 1915 1916 if (ddi_dma_mem_alloc(recv_dma_handle, 1917 (sizeof (MPI2_CONFIG_REPLY)), 1918 &mpt->m_dev_acc_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, 1919 &recv_memp, &recv_alloc_len, &recv_accessp) != DDI_SUCCESS) { 1920 goto cleanup; 1921 } 1922 1923 recv_dmastate |= MPTSAS_DMA_MEMORY_ALLOCD; 1924 1925 if (ddi_dma_addr_bind_handle(recv_dma_handle, NULL, recv_memp, 1926 recv_alloc_len, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, 1927 NULL, &recv_cookie, &recv_ncookie) != DDI_DMA_MAPPED) { 1928 goto cleanup; 1929 } 1930 1931 recv_dmastate |= MPTSAS_DMA_HANDLE_BOUND; 1932 1933 page_dma_attrs = mpt->m_msg_dma_attr; 1934 page_dma_attrs.dma_attr_sgllen = 1; 1935 page_dma_attrs.dma_attr_granular = reply_size; 1936 1937 if (ddi_dma_alloc_handle(mpt->m_dip, &page_dma_attrs, 1938 DDI_DMA_SLEEP, NULL, &page_dma_handle) != DDI_SUCCESS) { 1939 goto cleanup; 1940 } 1941 1942 page_dmastate |= MPTSAS_DMA_HANDLE_ALLOCD; 1943 1944 /* 1945 * Page 0 size is larger, so just use that for both. 1946 */ 1947 1948 if (ddi_dma_mem_alloc(page_dma_handle, reply_size, 1949 &mpt->m_dev_acc_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, 1950 &page_memp, &page_alloc_len, &page_accessp) != DDI_SUCCESS) { 1951 goto cleanup; 1952 } 1953 1954 page_dmastate |= MPTSAS_DMA_MEMORY_ALLOCD; 1955 1956 if (ddi_dma_addr_bind_handle(page_dma_handle, NULL, page_memp, 1957 page_alloc_len, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, 1958 NULL, &page_cookie, &page_ncookie) != DDI_DMA_MAPPED) { 1959 goto cleanup; 1960 } 1961 1962 page_dmastate |= MPTSAS_DMA_HANDLE_BOUND; 1963 1964 /* 1965 * Now we cycle through the state machine. Here's what happens: 1966 * 1. Read IO unit page 0 and set phy information 1967 * 2. See if Read IO unit page1 is needed because of port configuration 1968 * 3. Read IO unit page 1 and update phy information. 1969 */ 1970 1971 sasioupage0 = (pMpi2SasIOUnitPage0_t)page_memp; 1972 sasioupage1 = (pMpi2SasIOUnitPage1_t)page_memp; 1973 1974 while (state != IOUC_DONE) { 1975 switch (state) { 1976 case IOUC_READ_PAGE0: 1977 page_number = 0; 1978 action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT; 1979 flags_length = (uint32_t)page0_size; 1980 flags_length |= ((uint32_t)( 1981 MPI2_SGE_FLAGS_LAST_ELEMENT | 1982 MPI2_SGE_FLAGS_END_OF_BUFFER | 1983 MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 1984 MPI2_SGE_FLAGS_SYSTEM_ADDRESS | 1985 MPI2_SGE_FLAGS_32_BIT_ADDRESSING | 1986 MPI2_SGE_FLAGS_IOC_TO_HOST | 1987 MPI2_SGE_FLAGS_END_OF_LIST) << 1988 MPI2_SGE_FLAGS_SHIFT); 1989 1990 break; 1991 1992 case IOUC_READ_PAGE1: 1993 page_number = 1; 1994 action = MPI2_CONFIG_ACTION_PAGE_READ_CURRENT; 1995 flags_length = (uint32_t)page1_size; 1996 flags_length |= ((uint32_t)( 1997 MPI2_SGE_FLAGS_LAST_ELEMENT | 1998 MPI2_SGE_FLAGS_END_OF_BUFFER | 1999 MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2000 MPI2_SGE_FLAGS_SYSTEM_ADDRESS | 2001 MPI2_SGE_FLAGS_32_BIT_ADDRESSING | 2002 MPI2_SGE_FLAGS_IOC_TO_HOST | 2003 MPI2_SGE_FLAGS_END_OF_LIST) << 2004 MPI2_SGE_FLAGS_SHIFT); 2005 2006 break; 2007 default: 2008 break; 2009 } 2010 2011 bzero(recv_memp, sizeof (MPI2_CONFIG_REPLY)); 2012 configreply = (pMpi2ConfigReply_t)recv_memp; 2013 recv_numbytes = sizeof (MPI2_CONFIG_REPLY); 2014 2015 if (mptsas_send_extended_config_request_msg(mpt, 2016 MPI2_CONFIG_ACTION_PAGE_HEADER, 2017 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT, 2018 0, page_number, 0, 0, 0, 0)) { 2019 goto cleanup; 2020 } 2021 2022 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes, 2023 recv_accessp)) { 2024 goto cleanup; 2025 } 2026 2027 iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus); 2028 iocstatus = MPTSAS_IOCSTATUS(iocstatus); 2029 2030 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) { 2031 mptsas_log(mpt, CE_WARN, 2032 "mptsas_get_sas_io_unit_page_hndshk: read page " 2033 "header iocstatus = 0x%x", iocstatus); 2034 goto cleanup; 2035 } 2036 2037 if (action != MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM) { 2038 bzero(page_memp, reply_size); 2039 } 2040 2041 if (mptsas_send_extended_config_request_msg(mpt, action, 2042 MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT, 0, page_number, 2043 ddi_get8(recv_accessp, &configreply->Header.PageVersion), 2044 ddi_get16(recv_accessp, &configreply->ExtPageLength), 2045 flags_length, page_cookie.dmac_address)) { 2046 goto cleanup; 2047 } 2048 2049 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes, 2050 recv_accessp)) { 2051 goto cleanup; 2052 } 2053 2054 iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus); 2055 iocstatus = MPTSAS_IOCSTATUS(iocstatus); 2056 2057 if (iocstatus != MPI2_IOCSTATUS_SUCCESS) { 2058 mptsas_log(mpt, CE_WARN, 2059 "mptsas_get_sas_io_unit_page_hndshk: IO unit " 2060 "config failed for action %d, iocstatus = 0x%x", 2061 action, iocstatus); 2062 goto cleanup; 2063 } 2064 2065 switch (state) { 2066 case IOUC_READ_PAGE0: 2067 if ((ddi_dma_sync(page_dma_handle, 0, 0, 2068 DDI_DMA_SYNC_FORCPU)) != DDI_SUCCESS) { 2069 goto cleanup; 2070 } 2071 2072 num_phys = ddi_get8(page_accessp, 2073 &sasioupage0->NumPhys); 2074 ASSERT(num_phys == mpt->m_num_phys); 2075 if (num_phys > MPTSAS_MAX_PHYS) { 2076 mptsas_log(mpt, CE_WARN, "Number of phys " 2077 "supported by HBA (%d) is more than max " 2078 "supported by driver (%d). Driver will " 2079 "not attach.", num_phys, 2080 MPTSAS_MAX_PHYS); 2081 rval = DDI_FAILURE; 2082 goto cleanup; 2083 } 2084 for (i = start_phy; i < num_phys; i++, start_phy = i) { 2085 cpdi[i] = ddi_get32(page_accessp, 2086 &sasioupage0->PhyData[i]. 2087 ControllerPhyDeviceInfo); 2088 port_flags = ddi_get8(page_accessp, 2089 &sasioupage0->PhyData[i].PortFlags); 2090 2091 mpt->m_phy_info[i].port_num = 2092 ddi_get8(page_accessp, 2093 &sasioupage0->PhyData[i].Port); 2094 mpt->m_phy_info[i].ctrl_devhdl = 2095 ddi_get16(page_accessp, &sasioupage0-> 2096 PhyData[i].ControllerDevHandle); 2097 mpt->m_phy_info[i].attached_devhdl = 2098 ddi_get16(page_accessp, &sasioupage0-> 2099 PhyData[i].AttachedDevHandle); 2100 mpt->m_phy_info[i].phy_device_type = cpdi[i]; 2101 mpt->m_phy_info[i].port_flags = port_flags; 2102 2103 if (port_flags & DISCOVERY_IN_PROGRESS) { 2104 retrypage0++; 2105 NDBG20(("Discovery in progress, can't " 2106 "verify IO unit config, then NO.%d" 2107 " times retry", retrypage0)); 2108 break; 2109 } else { 2110 retrypage0 = 0; 2111 } 2112 if (!(port_flags & AUTO_PORT_CONFIGURATION)) { 2113 /* 2114 * some PHY configuration described in 2115 * SAS IO Unit Page1 2116 */ 2117 readpage1 = 1; 2118 } 2119 } 2120 2121 /* 2122 * retry 30 times if discovery is in process 2123 */ 2124 if (retrypage0 && (retrypage0 < 30)) { 2125 drv_usecwait(1000 * 100); 2126 state = IOUC_READ_PAGE0; 2127 break; 2128 } else if (retrypage0 == 30) { 2129 mptsas_log(mpt, CE_WARN, 2130 "!Discovery in progress, can't " 2131 "verify IO unit config, then after" 2132 " 30 times retry, give up!"); 2133 state = IOUC_DONE; 2134 rval = DDI_FAILURE; 2135 break; 2136 } 2137 2138 if (readpage1 == 0) { 2139 state = IOUC_DONE; 2140 rval = DDI_SUCCESS; 2141 break; 2142 } 2143 2144 state = IOUC_READ_PAGE1; 2145 break; 2146 2147 case IOUC_READ_PAGE1: 2148 if ((ddi_dma_sync(page_dma_handle, 0, 0, 2149 DDI_DMA_SYNC_FORCPU)) != DDI_SUCCESS) { 2150 goto cleanup; 2151 } 2152 2153 num_phys = ddi_get8(page_accessp, 2154 &sasioupage1->NumPhys); 2155 ASSERT(num_phys == mpt->m_num_phys); 2156 if (num_phys > MPTSAS_MAX_PHYS) { 2157 mptsas_log(mpt, CE_WARN, "Number of phys " 2158 "supported by HBA (%d) is more than max " 2159 "supported by driver (%d). Driver will " 2160 "not attach.", num_phys, 2161 MPTSAS_MAX_PHYS); 2162 rval = DDI_FAILURE; 2163 goto cleanup; 2164 } 2165 for (i = 0; i < num_phys; i++) { 2166 cpdi[i] = ddi_get32(page_accessp, 2167 &sasioupage1->PhyData[i]. 2168 ControllerPhyDeviceInfo); 2169 port_flags = ddi_get8(page_accessp, 2170 &sasioupage1->PhyData[i].PortFlags); 2171 mpt->m_phy_info[i].port_num = 2172 ddi_get8(page_accessp, 2173 &sasioupage1->PhyData[i].Port); 2174 mpt->m_phy_info[i].port_flags = port_flags; 2175 mpt->m_phy_info[i].phy_device_type = cpdi[i]; 2176 2177 } 2178 2179 state = IOUC_DONE; 2180 rval = DDI_SUCCESS; 2181 break; 2182 } 2183 } 2184 if ((mptsas_check_dma_handle(recv_dma_handle) != DDI_SUCCESS) || 2185 (mptsas_check_dma_handle(page_dma_handle) != DDI_SUCCESS)) { 2186 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED); 2187 rval = DDI_FAILURE; 2188 goto cleanup; 2189 } 2190 if ((mptsas_check_acc_handle(recv_accessp) != DDI_SUCCESS) || 2191 (mptsas_check_acc_handle(page_accessp) != DDI_SUCCESS)) { 2192 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED); 2193 rval = DDI_FAILURE; 2194 goto cleanup; 2195 } 2196 2197 cleanup: 2198 if (recv_dmastate & MPTSAS_DMA_HANDLE_BOUND) 2199 (void) ddi_dma_unbind_handle(recv_dma_handle); 2200 if (page_dmastate & MPTSAS_DMA_HANDLE_BOUND) 2201 (void) ddi_dma_unbind_handle(page_dma_handle); 2202 if (recv_dmastate & MPTSAS_DMA_MEMORY_ALLOCD) 2203 (void) ddi_dma_mem_free(&recv_accessp); 2204 if (page_dmastate & MPTSAS_DMA_MEMORY_ALLOCD) 2205 (void) ddi_dma_mem_free(&page_accessp); 2206 if (recv_dmastate & MPTSAS_DMA_HANDLE_ALLOCD) 2207 ddi_dma_free_handle(&recv_dma_handle); 2208 if (page_dmastate & MPTSAS_DMA_HANDLE_ALLOCD) 2209 ddi_dma_free_handle(&page_dma_handle); 2210 2211 if (rval != DDI_SUCCESS) { 2212 mptsas_fm_ereport(mpt, DDI_FM_DEVICE_NO_RESPONSE); 2213 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_LOST); 2214 } 2215 return (rval); 2216 } 2217 2218 /* 2219 * mptsas_get_manufacture_page5 2220 * 2221 * This function will retrieve the base WWID from the adapter. Since this 2222 * function is only called during the initialization process, use handshaking. 2223 */ 2224 int 2225 mptsas_get_manufacture_page5(mptsas_t *mpt) 2226 { 2227 ddi_dma_attr_t recv_dma_attrs, page_dma_attrs; 2228 ddi_dma_cookie_t recv_cookie, page_cookie; 2229 ddi_dma_handle_t recv_dma_handle, page_dma_handle; 2230 ddi_acc_handle_t recv_accessp, page_accessp; 2231 size_t recv_alloc_len, page_alloc_len; 2232 pMpi2ConfigReply_t configreply; 2233 uint_t recv_ncookie, page_ncookie; 2234 caddr_t recv_memp, page_memp; 2235 int recv_numbytes; 2236 pMpi2ManufacturingPage5_t m5; 2237 int recv_dmastate = 0; 2238 int page_dmastate = 0; 2239 uint32_t flagslength; 2240 int rval = DDI_SUCCESS; 2241 uint_t iocstatus; 2242 2243 MPTSAS_DISABLE_INTR(mpt); 2244 2245 if (mptsas_send_config_request_msg(mpt, MPI2_CONFIG_ACTION_PAGE_HEADER, 2246 MPI2_CONFIG_PAGETYPE_MANUFACTURING, 0, 5, 0, 0, 0, 0)) { 2247 rval = DDI_FAILURE; 2248 goto done; 2249 } 2250 2251 /* 2252 * dynamically create a customized dma attribute structure 2253 * that describes the MPT's config reply page request structure. 2254 */ 2255 recv_dma_attrs = mpt->m_msg_dma_attr; 2256 recv_dma_attrs.dma_attr_sgllen = 1; 2257 recv_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_REPLY)); 2258 2259 if (ddi_dma_alloc_handle(mpt->m_dip, &recv_dma_attrs, 2260 DDI_DMA_SLEEP, NULL, &recv_dma_handle) != DDI_SUCCESS) { 2261 mptsas_log(mpt, CE_WARN, 2262 "(unable to allocate dma handle."); 2263 rval = DDI_FAILURE; 2264 goto done; 2265 } 2266 recv_dmastate |= MPTSAS_DMA_HANDLE_ALLOCD; 2267 2268 if (ddi_dma_mem_alloc(recv_dma_handle, 2269 (sizeof (MPI2_CONFIG_REPLY)), 2270 &mpt->m_dev_acc_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, 2271 &recv_memp, &recv_alloc_len, &recv_accessp) != DDI_SUCCESS) { 2272 mptsas_log(mpt, CE_WARN, 2273 "unable to allocate config_reply structure."); 2274 rval = DDI_FAILURE; 2275 goto done; 2276 } 2277 recv_dmastate |= MPTSAS_DMA_MEMORY_ALLOCD; 2278 2279 if (ddi_dma_addr_bind_handle(recv_dma_handle, NULL, recv_memp, 2280 recv_alloc_len, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, 2281 NULL, &recv_cookie, &recv_ncookie) != DDI_DMA_MAPPED) { 2282 mptsas_log(mpt, CE_WARN, "unable to bind DMA resources."); 2283 rval = DDI_FAILURE; 2284 goto done; 2285 } 2286 recv_dmastate |= MPTSAS_DMA_HANDLE_BOUND; 2287 bzero(recv_memp, sizeof (MPI2_CONFIG_REPLY)); 2288 configreply = (pMpi2ConfigReply_t)recv_memp; 2289 recv_numbytes = sizeof (MPI2_CONFIG_REPLY); 2290 2291 /* 2292 * get config reply message 2293 */ 2294 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes, 2295 recv_accessp)) { 2296 rval = DDI_FAILURE; 2297 goto done; 2298 } 2299 2300 if (iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus)) { 2301 mptsas_log(mpt, CE_WARN, "mptsas_get_manufacture_page5 update: " 2302 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus, 2303 ddi_get32(recv_accessp, &configreply->IOCLogInfo)); 2304 goto done; 2305 } 2306 2307 /* 2308 * dynamically create a customized dma attribute structure 2309 * that describes the MPT's config page structure. 2310 */ 2311 page_dma_attrs = mpt->m_msg_dma_attr; 2312 page_dma_attrs.dma_attr_sgllen = 1; 2313 page_dma_attrs.dma_attr_granular = (sizeof (MPI2_CONFIG_PAGE_MAN_5)); 2314 2315 if (ddi_dma_alloc_handle(mpt->m_dip, &page_dma_attrs, 2316 DDI_DMA_SLEEP, NULL, &page_dma_handle) != DDI_SUCCESS) { 2317 mptsas_log(mpt, CE_WARN, 2318 "(unable to allocate dma handle."); 2319 rval = DDI_FAILURE; 2320 goto done; 2321 } 2322 page_dmastate |= MPTSAS_DMA_HANDLE_ALLOCD; 2323 2324 if (ddi_dma_mem_alloc(page_dma_handle, 2325 (sizeof (MPI2_CONFIG_PAGE_MAN_5)), 2326 &mpt->m_dev_acc_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, 2327 &page_memp, &page_alloc_len, &page_accessp) != DDI_SUCCESS) { 2328 mptsas_log(mpt, CE_WARN, 2329 "unable to allocate manufacturing page structure."); 2330 rval = DDI_FAILURE; 2331 goto done; 2332 } 2333 page_dmastate |= MPTSAS_DMA_MEMORY_ALLOCD; 2334 2335 if (ddi_dma_addr_bind_handle(page_dma_handle, NULL, page_memp, 2336 page_alloc_len, DDI_DMA_RDWR | DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, 2337 NULL, &page_cookie, &page_ncookie) != DDI_DMA_MAPPED) { 2338 mptsas_log(mpt, CE_WARN, "unable to bind DMA resources."); 2339 rval = DDI_FAILURE; 2340 goto done; 2341 } 2342 page_dmastate |= MPTSAS_DMA_HANDLE_BOUND; 2343 bzero(page_memp, sizeof (MPI2_CONFIG_PAGE_MAN_5)); 2344 m5 = (pMpi2ManufacturingPage5_t)page_memp; 2345 2346 /* 2347 * Give reply address to IOC to store config page in and send 2348 * config request out. 2349 */ 2350 2351 flagslength = sizeof (MPI2_CONFIG_PAGE_MAN_5); 2352 flagslength |= ((uint32_t)(MPI2_SGE_FLAGS_LAST_ELEMENT | 2353 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_SIMPLE_ELEMENT | 2354 MPI2_SGE_FLAGS_SYSTEM_ADDRESS | MPI2_SGE_FLAGS_32_BIT_ADDRESSING | 2355 MPI2_SGE_FLAGS_IOC_TO_HOST | 2356 MPI2_SGE_FLAGS_END_OF_LIST) << MPI2_SGE_FLAGS_SHIFT); 2357 2358 if (mptsas_send_config_request_msg(mpt, 2359 MPI2_CONFIG_ACTION_PAGE_READ_CURRENT, 2360 MPI2_CONFIG_PAGETYPE_MANUFACTURING, 0, 5, 2361 ddi_get8(recv_accessp, &configreply->Header.PageVersion), 2362 ddi_get8(recv_accessp, &configreply->Header.PageLength), 2363 flagslength, page_cookie.dmac_address)) { 2364 rval = DDI_FAILURE; 2365 goto done; 2366 } 2367 2368 /* 2369 * get reply view handshake 2370 */ 2371 if (mptsas_get_handshake_msg(mpt, recv_memp, recv_numbytes, 2372 recv_accessp)) { 2373 rval = DDI_FAILURE; 2374 goto done; 2375 } 2376 2377 if (iocstatus = ddi_get16(recv_accessp, &configreply->IOCStatus)) { 2378 mptsas_log(mpt, CE_WARN, "mptsas_get_manufacture_page5 config: " 2379 "IOCStatus=0x%x, IOCLogInfo=0x%x", iocstatus, 2380 ddi_get32(recv_accessp, &configreply->IOCLogInfo)); 2381 goto done; 2382 } 2383 2384 (void) ddi_dma_sync(page_dma_handle, 0, 0, DDI_DMA_SYNC_FORCPU); 2385 2386 /* 2387 * Fusion-MPT stores fields in little-endian format. This is 2388 * why the low-order 32 bits are stored first. 2389 */ 2390 mpt->un.sasaddr.m_base_wwid_lo = 2391 ddi_get32(page_accessp, (uint32_t *)(void *)&m5->Phy[0].WWID); 2392 mpt->un.sasaddr.m_base_wwid_hi = 2393 ddi_get32(page_accessp, (uint32_t *)(void *)&m5->Phy[0].WWID + 1); 2394 2395 if (ddi_prop_update_int64(DDI_DEV_T_NONE, mpt->m_dip, 2396 "base-wwid", mpt->un.m_base_wwid) != DDI_PROP_SUCCESS) { 2397 NDBG2(("%s%d: failed to create base-wwid property", 2398 ddi_driver_name(mpt->m_dip), ddi_get_instance(mpt->m_dip))); 2399 } 2400 2401 /* 2402 * Set the number of PHYs present. 2403 */ 2404 mpt->m_num_phys = ddi_get8(page_accessp, (uint8_t *)&m5->NumPhys); 2405 2406 if (ddi_prop_update_int(DDI_DEV_T_NONE, mpt->m_dip, 2407 "num-phys", mpt->m_num_phys) != DDI_PROP_SUCCESS) { 2408 NDBG2(("%s%d: failed to create num-phys property", 2409 ddi_driver_name(mpt->m_dip), ddi_get_instance(mpt->m_dip))); 2410 } 2411 2412 mptsas_log(mpt, CE_NOTE, "!mpt%d: Initiator WWNs: 0x%016llx-0x%016llx", 2413 mpt->m_instance, (unsigned long long)mpt->un.m_base_wwid, 2414 (unsigned long long)mpt->un.m_base_wwid + mpt->m_num_phys - 1); 2415 2416 if ((mptsas_check_dma_handle(recv_dma_handle) != DDI_SUCCESS) || 2417 (mptsas_check_dma_handle(page_dma_handle) != DDI_SUCCESS)) { 2418 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED); 2419 rval = DDI_FAILURE; 2420 goto done; 2421 } 2422 if ((mptsas_check_acc_handle(recv_accessp) != DDI_SUCCESS) || 2423 (mptsas_check_acc_handle(page_accessp) != DDI_SUCCESS)) { 2424 ddi_fm_service_impact(mpt->m_dip, DDI_SERVICE_UNAFFECTED); 2425 rval = DDI_FAILURE; 2426 } 2427 done: 2428 /* 2429 * free up memory 2430 */ 2431 if (recv_dmastate & MPTSAS_DMA_HANDLE_BOUND) 2432 (void) ddi_dma_unbind_handle(recv_dma_handle); 2433 if (page_dmastate & MPTSAS_DMA_HANDLE_BOUND) 2434 (void) ddi_dma_unbind_handle(page_dma_handle); 2435 if (recv_dmastate & MPTSAS_DMA_MEMORY_ALLOCD) 2436 (void) ddi_dma_mem_free(&recv_accessp); 2437 if (page_dmastate & MPTSAS_DMA_MEMORY_ALLOCD) 2438 (void) ddi_dma_mem_free(&page_accessp); 2439 if (recv_dmastate & MPTSAS_DMA_HANDLE_ALLOCD) 2440 ddi_dma_free_handle(&recv_dma_handle); 2441 if (page_dmastate & MPTSAS_DMA_HANDLE_ALLOCD) 2442 ddi_dma_free_handle(&page_dma_handle); 2443 2444 MPTSAS_ENABLE_INTR(mpt); 2445 2446 return (rval); 2447 } 2448