1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 /* 29 * Open Host Controller Driver (OHCI) 30 * 31 * The USB Open Host Controller driver is a software driver which interfaces 32 * to the Universal Serial Bus layer (USBA) and the USB Open Host Controller. 33 * The interface to USB Open Host Controller is defined by the OpenHCI Host 34 * Controller Interface. 35 * 36 * This module contains the specific ohci code used in POLLED mode and this 37 * code is in a separate file since it will never become part of ohci driver. 38 */ 39 #include <sys/usb/hcd/openhci/ohcid.h> 40 #include <sys/usb/hcd/openhci/ohci_polled.h> 41 42 /* 43 * Internal Function Prototypes 44 */ 45 46 /* Polled initialization routines */ 47 static int ohci_polled_init( 48 usba_pipe_handle_data_t *ph, 49 ohci_state_t *ohcip, 50 usb_console_info_impl_t *console_input_info); 51 52 /* Polled deinitialization routines */ 53 static int ohci_polled_fini(ohci_polled_t *ohci_polledp); 54 55 /* Polled save state routines */ 56 static void ohci_polled_save_state(ohci_polled_t *ohci_polledp); 57 static void ohci_polled_stop_processing( 58 ohci_polled_t *ohci_polledp); 59 60 /* Polled restore state routines */ 61 static void ohci_polled_restore_state(ohci_polled_t *ohci_polledp); 62 static void ohci_polled_start_processing( 63 ohci_polled_t *ohci_polledp); 64 65 /* Polled read routines */ 66 static ohci_td_t *ohci_polled_pickup_done_list( 67 ohci_polled_t *ohci_polledp, 68 ohci_td_t *done_head); 69 static int ohci_polled_check_done_list( 70 ohci_polled_t *ohci_polledp); 71 static void ohci_polled_create_input_list( 72 ohci_polled_t *ohci_polledp, 73 ohci_td_t *head_done_list); 74 static int ohci_polled_process_input_list( 75 ohci_polled_t *ohci_polledp); 76 static int ohci_polled_handle_normal_td( 77 ohci_polled_t *ohci_polledp, 78 ohci_td_t *td); 79 static void ohci_polled_insert_td(ohci_state_t *ohcip, 80 ohci_td_t *td); 81 static void ohci_polled_fill_in_td(ohci_state_t *ohcip, 82 ohci_td_t *td, 83 ohci_td_t *new_dummy, 84 uint_t hctd_ctrl, 85 uint32_t hctd_iommu_cbp, 86 size_t hctd_length, 87 ohci_trans_wrapper_t *tw); 88 static void ohci_polled_insert_td_on_tw( 89 ohci_state_t *ohcip, 90 ohci_trans_wrapper_t *tw, 91 ohci_td_t *td); 92 static void ohci_polled_handle_frame_number_overflow( 93 ohci_state_t *ohcip); 94 static void ohci_polled_finish_interrupt( 95 ohci_state_t *ohcip, 96 uint_t intr); 97 /* 98 * POLLED entry points 99 * 100 * These functions are entry points into the POLLED code. 101 */ 102 103 /* 104 * ohci_hcdi_polled_input_init: 105 * 106 * This is the initialization routine for handling the USB keyboard 107 * in POLLED mode. This routine is not called from POLLED mode, so 108 * it is OK to acquire mutexes. 109 */ 110 int 111 ohci_hcdi_polled_input_init( 112 usba_pipe_handle_data_t *ph, 113 uchar_t **polled_buf, 114 usb_console_info_impl_t *console_input_info) 115 { 116 ohci_polled_t *ohci_polledp; 117 ohci_state_t *ohcip; 118 int ret; 119 120 ohcip = ohci_obtain_state(ph->p_usba_device->usb_root_hub_dip); 121 122 /* 123 * Grab the ohci_int_mutex so that things don't change on us 124 * if an interrupt comes in. 125 */ 126 mutex_enter(&ohcip->ohci_int_mutex); 127 128 ret = ohci_polled_init(ph, ohcip, console_input_info); 129 130 if (ret != USB_SUCCESS) { 131 132 /* Allow interrupts to continue */ 133 mutex_exit(&ohcip->ohci_int_mutex); 134 135 return (ret); 136 } 137 138 ohci_polledp = (ohci_polled_t *)console_input_info->uci_private; 139 140 /* 141 * Mark the structure so that if we are using it, we don't free 142 * the structures if one of them is unplugged. 143 */ 144 ohci_polledp->ohci_polled_flags |= POLLED_INPUT_MODE; 145 146 /* increase the polled kbd counter for keyboard connected */ 147 ohcip->ohci_polled_kbd_count ++; 148 149 /* 150 * This is the buffer we will copy characters into. It will be 151 * copied into at this layer, so we need to keep track of it. 152 */ 153 ohci_polledp->ohci_polled_buf = 154 (uchar_t *)kmem_zalloc(POLLED_RAW_BUF_SIZE, KM_SLEEP); 155 156 *polled_buf = ohci_polledp->ohci_polled_buf; 157 158 /* 159 * This is a software workaround to fix schizo hardware bug. 160 * Existence of "no-prom-cdma-sync" property means consistent 161 * dma sync should not be done while in prom or polled mode. 162 */ 163 if (ddi_prop_exists(DDI_DEV_T_ANY, ohcip->ohci_dip, 164 DDI_PROP_NOTPROM, "no-prom-cdma-sync")) { 165 ohci_polledp->ohci_polled_no_sync_flag = B_TRUE; 166 } 167 168 /* Allow interrupts to continue */ 169 mutex_exit(&ohcip->ohci_int_mutex); 170 171 return (USB_SUCCESS); 172 } 173 174 175 /* 176 * ohci_hcdi_polled_input_fini: 177 */ 178 int 179 ohci_hcdi_polled_input_fini(usb_console_info_impl_t *info) 180 { 181 ohci_polled_t *ohci_polledp; 182 ohci_state_t *ohcip; 183 int ret; 184 185 ohci_polledp = (ohci_polled_t *)info->uci_private; 186 187 ohcip = ohci_polledp->ohci_polled_ohcip; 188 189 mutex_enter(&ohcip->ohci_int_mutex); 190 191 /* 192 * Reset the POLLED_INPUT_MODE flag so that we can tell if 193 * this structure is in use in the ohci_polled_fini routine. 194 */ 195 ohci_polledp->ohci_polled_flags &= ~POLLED_INPUT_MODE; 196 197 /* Decrease the polled kbd counter for keyboard disconnected */ 198 ohcip->ohci_polled_kbd_count --; 199 200 /* Free the buffer that we copied data into */ 201 kmem_free(ohci_polledp->ohci_polled_buf, POLLED_RAW_BUF_SIZE); 202 203 ret = ohci_polled_fini(ohci_polledp); 204 205 mutex_exit(&ohcip->ohci_int_mutex); 206 207 return (ret); 208 } 209 210 211 /* 212 * ohci_hcdi_polled_input_enter: 213 * 214 * This is where we enter into POLLED mode. This routine sets up 215 * everything so that calls to ohci_hcdi_polled_read will return 216 * characters. 217 */ 218 int 219 ohci_hcdi_polled_input_enter(usb_console_info_impl_t *info) 220 { 221 ohci_polled_t *ohci_polledp; 222 223 ohci_polledp = (ohci_polled_t *)info->uci_private; 224 ohci_polledp->ohci_polled_entry++; 225 /* 226 * If the controller is already switched over, just return 227 */ 228 if (ohci_polledp->ohci_polled_entry > 1) { 229 230 return (USB_SUCCESS); 231 } 232 ohci_polled_save_state(ohci_polledp); 233 234 ohci_polledp->ohci_polled_flags |= POLLED_INPUT_MODE_INUSE; 235 236 return (USB_SUCCESS); 237 } 238 239 240 /* 241 * ohci_hcdi_polled_input_exit: 242 * 243 * This is where we exit POLLED mode. This routine restores 244 * everything that is needed to continue operation. 245 */ 246 int 247 ohci_hcdi_polled_input_exit(usb_console_info_impl_t *info) 248 { 249 ohci_polled_t *ohci_polledp; 250 251 ohci_polledp = (ohci_polled_t *)info->uci_private; 252 253 ohci_polledp->ohci_polled_entry--; 254 255 /* 256 * If there are still outstanding "enters", just return 257 */ 258 if (ohci_polledp->ohci_polled_entry > 0) 259 return (USB_SUCCESS); 260 261 ohci_polledp->ohci_polled_flags &= ~POLLED_INPUT_MODE_INUSE; 262 ohci_polled_restore_state(ohci_polledp); 263 264 return (USB_SUCCESS); 265 } 266 267 268 /* 269 * ohci_hcdi_polled_read: 270 * 271 * Get a key character 272 */ 273 int 274 ohci_hcdi_polled_read( 275 usb_console_info_impl_t *info, 276 uint_t *num_characters) 277 { 278 ohci_state_t *ohcip; 279 ohci_polled_t *ohci_polledp; 280 uint_t intr; 281 ohci_polledp = (ohci_polled_t *)info->uci_private; 282 283 ohcip = ohci_polledp->ohci_polled_ohcip; 284 285 #ifndef lint 286 _NOTE(NO_COMPETING_THREADS_NOW); 287 #endif 288 *num_characters = 0; 289 intr = (Get_OpReg(hcr_intr_status) & Get_OpReg(hcr_intr_enable)); 290 291 /* 292 * Check whether any Frame Number Overflow interrupt is pending 293 * and if it is pending, process this interrupt. 294 */ 295 296 if (intr & HCR_INTR_FNO) { 297 ohci_handle_frame_number_overflow(ohcip); 298 299 /* Acknowledge the FNO interrupt */ 300 ohci_polled_finish_interrupt(ohcip, HCR_INTR_FNO); 301 } 302 if (intr & HCR_INTR_WDH) { 303 304 /* Check to see if there are any TD's for this input device */ 305 if (ohci_polled_check_done_list(ohci_polledp) == USB_SUCCESS) { 306 307 /* Process any TD's on the input done list */ 308 *num_characters = 309 ohci_polled_process_input_list(ohci_polledp); 310 } 311 312 /* 313 * To make sure after we get the done list from DoneHead, 314 * every input device get his own TD's in the 315 * ohci_polled_done_list and then clear the interrupt status. 316 */ 317 if (ohcip->ohci_polled_done_list == NULL) { 318 319 /* Acknowledge the WDH interrupt */ 320 ohci_polled_finish_interrupt(ohcip, HCR_INTR_WDH); 321 } 322 } 323 #ifndef lint 324 _NOTE(COMPETING_THREADS_NOW); 325 #endif 326 327 return (USB_SUCCESS); 328 } 329 330 331 /* 332 * Internal Functions 333 */ 334 335 /* 336 * Polled initialization routines 337 */ 338 339 340 /* 341 * ohci_polled_init: 342 * 343 * Initialize generic information Uthat is needed to provide USB/POLLED 344 * support. 345 */ 346 static int 347 ohci_polled_init( 348 usba_pipe_handle_data_t *ph, 349 ohci_state_t *ohcip, 350 usb_console_info_impl_t *console_info) 351 { 352 ohci_polled_t *ohci_polledp; 353 ohci_pipe_private_t *pp; 354 355 ASSERT(mutex_owned(&ohcip->ohci_int_mutex)); 356 357 /* 358 * We have already initialized this structure. If the structure 359 * has already been initialized, then we don't need to redo it. 360 */ 361 if (console_info->uci_private) { 362 363 return (USB_SUCCESS); 364 } 365 366 /* Allocate and intitialize a state structure */ 367 ohci_polledp = (ohci_polled_t *) 368 kmem_zalloc(sizeof (ohci_polled_t), KM_SLEEP); 369 370 console_info->uci_private = (usb_console_info_private_t)ohci_polledp; 371 372 /* 373 * Store away the ohcip so that we can get to it when we are in 374 * POLLED mode. We don't want to have to call ohci_obtain_state 375 * every time we want to access this structure. Also save ohci 376 * polled state information in ohcip. 377 */ 378 ohci_polledp->ohci_polled_ohcip = ohcip; 379 380 /* 381 * Save usb device and endpoint number information from the usb 382 * pipe handle. 383 */ 384 mutex_enter(&ph->p_mutex); 385 ohci_polledp->ohci_polled_usb_dev = ph->p_usba_device; 386 ohci_polledp->ohci_polled_ep_addr = ph->p_ep.bEndpointAddress; 387 mutex_exit(&ph->p_mutex); 388 389 /* 390 * Allocate memory to make duplicate of original usb pipe handle. 391 */ 392 ohci_polledp->ohci_polled_input_pipe_handle = 393 kmem_zalloc(sizeof (usba_pipe_handle_data_t), KM_SLEEP); 394 395 /* 396 * Copy the USB handle into the new pipe handle. Also 397 * create new lock for the new pipe handle. 398 */ 399 bcopy((void *)ph, 400 (void *)ohci_polledp->ohci_polled_input_pipe_handle, 401 sizeof (usba_pipe_handle_data_t)); 402 403 /* 404 * uint64_t typecast to make sure amd64 can compile 405 */ 406 mutex_init(&ohci_polledp->ohci_polled_input_pipe_handle->p_mutex, 407 NULL, MUTEX_DRIVER, (void *)(uintptr_t)ohcip->ohci_intr_pri); 408 409 /* Create a new ohci pipe private structure */ 410 pp = (ohci_pipe_private_t *) 411 kmem_zalloc(sizeof (ohci_pipe_private_t), KM_SLEEP); 412 413 /* 414 * Store the pointer in the pipe handle. This structure was also 415 * just allocated. 416 */ 417 mutex_enter(&ohci_polledp->ohci_polled_input_pipe_handle->p_mutex); 418 419 ohci_polledp->ohci_polled_input_pipe_handle-> 420 p_hcd_private = (usb_opaque_t)pp; 421 422 mutex_exit(&ohci_polledp->ohci_polled_input_pipe_handle->p_mutex); 423 424 /* 425 * Store a pointer to the pipe handle. This structure was just 426 * allocated and it is not in use yet. The locking is there to 427 * satisfy warlock. 428 */ 429 mutex_enter(&ph->p_mutex); 430 431 bcopy(&ph->p_policy, &pp->pp_policy, sizeof (usb_pipe_policy_t)); 432 433 mutex_exit(&ph->p_mutex); 434 435 pp->pp_pipe_handle = ohci_polledp->ohci_polled_input_pipe_handle; 436 437 /* 438 * Allocate a dummy for the interrupt table. This dummy will be 439 * put into the action when we switch interrupt tables during 440 * ohci_hcdi_polled_enter. Dummy is placed on the unused lattice 441 * entries. When the ED is allocated we will replace dummy ED by 442 * valid interrupt ED in one or more locations in the interrupt 443 * lattice depending on the requested polling interval. Also we 444 * will hang a dummy TD to the ED & dummy TD is used to indicate 445 * the end of the TD chain. 446 */ 447 ohci_polledp->ohci_polled_dummy_ed = ohci_alloc_hc_ed(ohcip, NULL); 448 449 if (ohci_polledp->ohci_polled_dummy_ed == NULL) { 450 451 return (USB_NO_RESOURCES); 452 } 453 454 /* 455 * Allocate the interrupt endpoint. This ED will be inserted in 456 * to the lattice chain for the keyboard device. This endpoint 457 * will have the TDs hanging off of it for the processing. 458 */ 459 ohci_polledp->ohci_polled_ed = ohci_alloc_hc_ed(ohcip, 460 ohci_polledp->ohci_polled_input_pipe_handle); 461 462 if (ohci_polledp->ohci_polled_ed == NULL) { 463 464 return (USB_NO_RESOURCES); 465 } 466 467 /* Set the state of pipe as idle */ 468 pp->pp_state = OHCI_PIPE_STATE_IDLE; 469 470 /* Insert the endpoint onto the pipe handle */ 471 pp->pp_ept = ohci_polledp->ohci_polled_ed; 472 473 /* 474 * Set soft interrupt handler flag in the normal mode usb 475 * pipe handle. 476 */ 477 mutex_enter(&ph->p_mutex); 478 ph->p_spec_flag |= USBA_PH_FLAG_USE_SOFT_INTR; 479 mutex_exit(&ph->p_mutex); 480 481 /* 482 * Insert a Interrupt polling request onto the endpoint. 483 * 484 * There will now be two TDs on the ED, one is the dummy TD that 485 * was allocated above in the ohci_alloc_hc_ed and this new one. 486 */ 487 if ((ohci_start_periodic_pipe_polling(ohcip, 488 ohci_polledp->ohci_polled_input_pipe_handle, 489 NULL, USB_FLAGS_SLEEP)) != USB_SUCCESS) { 490 491 return (USB_NO_RESOURCES); 492 } 493 494 return (USB_SUCCESS); 495 } 496 497 498 /* 499 * Polled deinitialization routines 500 */ 501 502 503 /* 504 * ohci_polled_fini: 505 */ 506 static int 507 ohci_polled_fini(ohci_polled_t *ohci_polledp) 508 { 509 ohci_state_t *ohcip = ohci_polledp->ohci_polled_ohcip; 510 ohci_pipe_private_t *pp; 511 ohci_td_t *curr_td, *next_td; 512 ohci_trans_wrapper_t *curr_tw, *next_tw; 513 ASSERT(mutex_owned(&ohcip->ohci_int_mutex)); 514 515 /* 516 * If the structure is already in use, then don't free it. 517 */ 518 if (ohci_polledp->ohci_polled_flags & POLLED_INPUT_MODE) { 519 520 return (USB_SUCCESS); 521 } 522 523 pp = (ohci_pipe_private_t *) 524 ohci_polledp->ohci_polled_input_pipe_handle->p_hcd_private; 525 526 /* 527 * Deallocate all the pre-allocated interrupt requests 528 */ 529 ohci_handle_outstanding_requests(ohcip, pp); 530 531 /* 532 * Traverse the list of TD's on this endpoint and these TD's 533 * have outstanding transfer requests. Since list processing 534 * is stopped, these TDs can be deallocated. 535 */ 536 ohci_traverse_tds(ohcip, pp->pp_pipe_handle); 537 538 /* 539 * For each transfer wrapper on this pipe, free the TD and 540 * free the TW. We don't free the last TD in the chain 541 * because it will be freed by ohci_deallocate_ed. All TD's 542 * on this TW are also on the end point associated with this 543 * pipe. 544 */ 545 next_tw = pp->pp_tw_head; 546 547 while (next_tw) { 548 next_td = (ohci_td_t *)next_tw->tw_hctd_head; 549 550 /* 551 * Walk through each TD for this transfer 552 * wrapper and free that TD. 553 */ 554 while (next_td) { 555 curr_td = next_td; 556 557 next_td = ohci_td_iommu_to_cpu(ohcip, 558 Get_TD(next_td->hctd_tw_next_td)); 559 560 ohci_deallocate_td(ohcip, curr_td); 561 } 562 563 curr_tw = next_tw; 564 next_tw = curr_tw->tw_next; 565 566 /* Free the transfer wrapper */ 567 ohci_deallocate_tw_resources(ohcip, pp, curr_tw); 568 } 569 570 /* 571 * Deallocate the endpoint descriptors that we allocated 572 * with ohci_alloc_hc_ed. 573 */ 574 if (ohci_polledp->ohci_polled_dummy_ed) { 575 ohci_deallocate_ed(ohcip, ohci_polledp->ohci_polled_dummy_ed); 576 } 577 578 if (ohci_polledp->ohci_polled_ed) { 579 ohci_deallocate_ed(ohcip, ohci_polledp->ohci_polled_ed); 580 } 581 582 mutex_destroy(&ohci_polledp->ohci_polled_input_pipe_handle->p_mutex); 583 584 /* 585 * Destroy everything about the pipe that we allocated in 586 * ohci_polled_duplicate_pipe_handle 587 */ 588 kmem_free(pp, sizeof (ohci_pipe_private_t)); 589 590 kmem_free(ohci_polledp->ohci_polled_input_pipe_handle, 591 sizeof (usba_pipe_handle_data_t)); 592 593 /* 594 * We use this field to determine if a TD is for input or not, 595 * so NULL the pointer so we don't check deallocated data. 596 */ 597 ohci_polledp->ohci_polled_input_pipe_handle = NULL; 598 599 /* 600 * Finally, free off the structure that we use to keep track 601 * of all this. 602 */ 603 kmem_free(ohci_polledp, sizeof (ohci_polled_t)); 604 605 return (USB_SUCCESS); 606 } 607 608 609 /* 610 * Polled save state routines 611 */ 612 613 614 /* 615 * ohci_polled_save_state: 616 */ 617 static void 618 ohci_polled_save_state(ohci_polled_t *ohci_polledp) 619 { 620 ohci_state_t *ohcip; 621 int i; 622 uint_t polled_toggle; 623 uint_t real_toggle; 624 ohci_pipe_private_t *pp = NULL; /* Normal mode Pipe */ 625 ohci_pipe_private_t *polled_pp; /* Polled mode Pipe */ 626 usba_pipe_handle_data_t *ph; 627 uint8_t ep_addr; 628 ohci_save_intr_sts_t *ohci_intr_sts; 629 ohci_regs_t *ohci_polled_regsp; 630 ohci_td_t *td, *prev_td; 631 ohci_td_t *done_head, **done_list; 632 633 #ifndef lint 634 _NOTE(NO_COMPETING_THREADS_NOW); 635 #endif 636 637 /* 638 * If either of these two flags are set, then we have already 639 * saved off the state information and setup the controller. 640 */ 641 if (ohci_polledp->ohci_polled_flags & POLLED_INPUT_MODE_INUSE) { 642 #ifndef lint 643 _NOTE(COMPETING_THREADS_NOW); 644 #endif 645 return; 646 } 647 648 ohcip = ohci_polledp->ohci_polled_ohcip; 649 650 /* 651 * Check if the number of keyboard reach the max number we can 652 * support in polled mode 653 */ 654 if (++ ohcip->ohci_polled_enter_count > MAX_NUM_FOR_KEYBOARD) { 655 #ifndef lint 656 _NOTE(COMPETING_THREADS_NOW); 657 #endif 658 return; 659 } 660 /* Get the endpoint addr. */ 661 ep_addr = ohci_polledp->ohci_polled_ep_addr; 662 663 /* Get the normal mode usb pipe handle */ 664 ph = usba_hcdi_get_ph_data(ohci_polledp->ohci_polled_usb_dev, ep_addr); 665 ohci_intr_sts = &ohcip->ohci_save_intr_sts; 666 ohci_polled_regsp = &ohcip->ohci_polled_save_regs; 667 668 /* 669 * Only the first enter keyboard entry disable the interrupt, save the 670 * information of normal mode, stop the processing, initialize the 671 * frame list table. 672 */ 673 if (ohcip->ohci_polled_enter_count == 1) { 674 /* 675 * Prevent the ohci interrupt handler from handling interrupt. 676 * We will turn off interrupts. This keeps us from generating 677 * a hardware interrupt.This is the useful for testing because 678 * in POLLED mode we can't get interrupts anyway. We can test 679 * this code by shutting off hardware interrupt generation and 680 * polling for the interrupts. 681 */ 682 Set_OpReg(hcr_intr_disable, HCR_INTR_MIE); 683 /* 684 * Save the current normal mode ohci registers and later this 685 * saved register copy is used to replace some of required ohci 686 * registers before switching from polled mode to normal mode. 687 */ 688 bzero((void *)ohci_polled_regsp, sizeof (ohci_regs_t)); 689 690 ohci_polled_regsp->hcr_control = Get_OpReg(hcr_control); 691 ohci_polled_regsp->hcr_cmd_status = Get_OpReg(hcr_cmd_status); 692 ohci_polled_regsp->hcr_intr_enable = Get_OpReg(hcr_intr_enable); 693 ohci_polled_regsp->hcr_HCCA = Get_OpReg(hcr_HCCA); 694 ohci_polled_regsp->hcr_done_head = Get_OpReg(hcr_done_head); 695 ohci_polled_regsp->hcr_bulk_head = Get_OpReg(hcr_bulk_head); 696 ohci_polled_regsp->hcr_ctrl_head = Get_OpReg(hcr_ctrl_head); 697 698 /* 699 * The functionality & importance of critical code section in 700 * the normal mode ohci interrupt handler and its usage in the 701 * polled mode is explained below. 702 * 703 * (a) Normal mode: 704 * 705 * - Set the flag indicating that processing critical code 706 * in ohci interrupt handler. 707 * 708 * - Process the missed ohci interrupts by copying missed 709 * interrupt events & done head list fields information 710 * to the critical interrupt events & done list fields. 711 * 712 * - Reset the missed ohci interrupt events and done head 713 * list fields so that the new missed interrupt events 714 * and done head list information can be saved. 715 * 716 * - All above steps will be executed within the critical 717 * section of the interrupt handler. Then ohci missed 718 * interrupt handler will be called to service the ohci 719 * missed interrupts. 720 * 721 * (b) Polled mode: 722 * 723 * - On entering the polled code, checks for the critical 724 * section code execution within normal mode interrupt 725 * handler. 726 * 727 * - If critical section code is executing in the normal 728 * mode ohci interrupt handler & if copying of the ohci 729 * missed interrupt events and done head list fields to 730 * the critical fields is finished then, save the "any 731 * missed interrupt events and done head list" because 732 * of current polled mode switch into "critical missed 733 * interrupt events & done list fields" instead actual 734 * missed events and done list fields. 735 * 736 * - Otherwise save "any missed interrupt events and done 737 * list" because of this current polled mode switch in 738 * the actual missed interrupt events & done head list 739 * fields. 740 */ 741 742 /* 743 * Check and save the pending SOF interrupt condition for the 744 * ohci normal mode. This information will be saved either in 745 * the critical missed event fields or in actual missed event 746 * fields depending on the whether the critical code section's 747 * execution flag was set or not when switched to polled mode 748 * from normal mode. 749 */ 750 if ((ohci_intr_sts->ohci_intr_flag & OHCI_INTR_CRITICAL) && 751 (ohci_intr_sts->ohci_critical_intr_sts != 0)) { 752 753 ohci_intr_sts->ohci_critical_intr_sts |= 754 ((Get_OpReg(hcr_intr_status) & 755 Get_OpReg(hcr_intr_enable)) & HCR_INTR_SOF); 756 } else { 757 ohci_intr_sts->ohci_missed_intr_sts |= 758 ((Get_OpReg(hcr_intr_status) & 759 Get_OpReg(hcr_intr_enable)) & HCR_INTR_SOF); 760 } 761 ohci_polled_stop_processing(ohci_polledp); 762 763 /* Process any missed Frame Number Overflow (FNO) interrupt */ 764 ohci_polled_handle_frame_number_overflow(ohcip); 765 766 /* 767 * By this time all list processing has been stopped.Now check 768 * and save the information about the pending HCCA done list, 769 * done head ohci register and WDH bit in the interrupt status 770 * register. This information will be saved either in critical 771 * missed event fields or in actual missed event fields depend 772 * on the whether the critical code section's execution flag 773 * was set or not when switched to polled mode from the normal 774 * mode. 775 */ 776 777 /* Read and Save the HCCA DoneHead value */ 778 done_head = (ohci_td_t *)(uintptr_t)(Get_HCCA( 779 ohcip->ohci_hccap->HccaDoneHead) & HCCA_DONE_HEAD_MASK); 780 781 if ((done_head) && 782 (done_head != ohci_intr_sts->ohci_curr_done_lst)) { 783 784 if ((ohci_intr_sts->ohci_intr_flag & 785 OHCI_INTR_CRITICAL) && 786 ((ohci_intr_sts->ohci_critical_done_lst) || 787 (ohci_intr_sts->ohci_missed_done_lst == NULL))) { 788 789 done_list = 790 &ohci_intr_sts->ohci_critical_done_lst; 791 ohci_intr_sts->ohci_critical_intr_sts |= 792 HCR_INTR_WDH; 793 } else { 794 done_list = 795 &ohci_intr_sts->ohci_missed_done_lst; 796 ohci_intr_sts->ohci_missed_intr_sts |= 797 HCR_INTR_WDH; 798 } 799 800 if (*done_list) { 801 td = (ohci_td_t *) 802 ohci_td_iommu_to_cpu(ohcip, 803 (uintptr_t)done_head); 804 805 while (td) { 806 prev_td = td; 807 td = ohci_td_iommu_to_cpu(ohcip, 808 Get_TD(td->hctd_next_td)); 809 } 810 811 Set_TD(prev_td->hctd_next_td, *done_list); 812 813 *done_list = done_head; 814 } else { 815 *done_list = (ohci_td_t *)done_head; 816 } 817 } 818 819 /* 820 * Save the latest hcr_done_head ohci register value, so that 821 * this value can be replaced when exit from the POLLED mode. 822 */ 823 ohci_polled_regsp->hcr_done_head = Get_OpReg(hcr_done_head); 824 /* 825 * Reset the HCCA done head and ohci done head register. 826 */ 827 Set_HCCA(ohcip->ohci_hccap->HccaDoneHead, NULL); 828 Set_OpReg(hcr_done_head, (uint32_t)0x0); 829 830 /* 831 * Clear the WriteDoneHead interrupt bit in the ohci interrupt 832 * status register. 833 */ 834 Set_OpReg(hcr_intr_status, HCR_INTR_WDH); 835 836 /* 837 * Save the current interrupt lattice and replace this lattice 838 * with an lattice used in POLLED mode. We will restore lattice 839 * back when we exit from the POLLED mode. 840 */ 841 for (i = 0; i < NUM_INTR_ED_LISTS; i++) { 842 ohcip->ohci_polled_save_IntTble[i] = 843 (ohci_ed_t *)(uintptr_t)Get_HCCA( 844 ohcip->ohci_hccap->HccaIntTble[i]); 845 } 846 /* 847 * Fill in the lattice with dummy EDs. These EDs are used so the 848 * controller can tell that it is at the end of the ED list. 849 */ 850 for (i = 0; i < NUM_INTR_ED_LISTS; i++) { 851 Set_HCCA(ohcip->ohci_hccap->HccaIntTble[i], 852 ohci_ed_cpu_to_iommu(ohcip, 853 ohci_polledp->ohci_polled_dummy_ed)); 854 } 855 } 856 /* Get the polled mode ohci pipe private structure */ 857 polled_pp = (ohci_pipe_private_t *) 858 ohci_polledp->ohci_polled_input_pipe_handle->p_hcd_private; 859 860 /* 861 * Before replacing the lattice, adjust the data togggle on the 862 * on the ohci's interrupt ed 863 */ 864 polled_toggle = (Get_ED(polled_pp->pp_ept->hced_headp) & 865 HC_EPT_Carry) ? DATA1:DATA0; 866 867 /* 868 * If normal mode interrupt pipe endpoint is active, get the data 869 * toggle from the this interrupt endpoint through the corresponding 870 * interrupt pipe handle. Else get the data toggle information from 871 * the usb device structure and this information is saved during the 872 * normal mode interrupt pipe close. Use this data toggle information 873 * to fix the data toggle of polled mode interrupt endpoint. 874 */ 875 if (ph) { 876 /* Get the normal mode ohci pipe private structure */ 877 pp = (ohci_pipe_private_t *)ph->p_hcd_private; 878 879 real_toggle = (Get_ED(pp->pp_ept->hced_headp) & 880 HC_EPT_Carry) ? DATA1:DATA0; 881 } else { 882 real_toggle = usba_hcdi_get_data_toggle( 883 ohci_polledp->ohci_polled_usb_dev, ep_addr); 884 } 885 886 if (polled_toggle != real_toggle) { 887 if (real_toggle == DATA0) { 888 Set_ED(polled_pp->pp_ept->hced_headp, 889 Get_ED(polled_pp->pp_ept->hced_headp) & 890 ~HC_EPT_Carry); 891 } else { 892 Set_ED(polled_pp->pp_ept->hced_headp, 893 Get_ED(polled_pp->pp_ept->hced_headp) | 894 HC_EPT_Carry); 895 } 896 } 897 898 /* 899 * Check whether Halt bit is set in the ED and if so clear the 900 * halt bit. 901 */ 902 if (polled_pp->pp_ept->hced_headp & HC_EPT_Halt) { 903 904 /* Clear the halt bit */ 905 Set_ED(polled_pp->pp_ept->hced_headp, 906 (Get_ED(polled_pp->pp_ept->hced_headp) & ~HC_EPT_Halt)); 907 } 908 909 /* 910 * Now, add the endpoint to the lattice that we will hang our 911 * TD's off of. We need to poll this device at every 8 ms and 912 * hence add this ED needs 4 entries in interrupt lattice. 913 */ 914 for (i = (ohcip->ohci_polled_enter_count -1); i < NUM_INTR_ED_LISTS; 915 i = i + MIN_LOW_SPEED_POLL_INTERVAL) { 916 Set_HCCA(ohcip->ohci_hccap->HccaIntTble[i], 917 ohci_ed_cpu_to_iommu(ohcip, 918 ohci_polledp->ohci_polled_ed)); 919 } 920 /* 921 * Only the first enter keyboard entry clear the contents of 922 * periodic ED register and enable the WDH interrupt and 923 * start process the periodic list. 924 */ 925 if (ohcip->ohci_polled_enter_count == 1) { 926 /* 927 * Clear the contents of current ohci periodic ED register that 928 * is physical address of current Isochronous or Interrupt ED. 929 */ 930 931 Set_OpReg(hcr_periodic_curr, (uint32_t)0x0); 932 933 /* Make sure WriteDoneHead interrupt is enabled */ 934 Set_OpReg(hcr_intr_enable, HCR_INTR_WDH); 935 936 /* 937 * Enable the periodic list. We will now start processing EDs & 938 * TDs again. 939 */ 940 Set_OpReg(hcr_control, 941 (Get_OpReg(hcr_control) | HCR_CONTROL_PLE)); 942 } 943 #ifndef lint 944 _NOTE(COMPETING_THREADS_NOW); 945 #endif 946 } 947 948 949 /* 950 * ohci_polled_stop_processing: 951 */ 952 static void 953 ohci_polled_stop_processing(ohci_polled_t *ohci_polledp) 954 { 955 ohci_state_t *ohcip; 956 uint_t count; 957 ohci_regs_t *ohci_polled_regsp; 958 959 ohcip = ohci_polledp->ohci_polled_ohcip; 960 ohci_polled_regsp = &ohcip->ohci_polled_save_regs; 961 962 /* 963 * Turn off all list processing. This will take place starting 964 * at the next frame. 965 */ 966 Set_OpReg(hcr_control, 967 (ohci_polled_regsp->hcr_control) & ~(HCR_CONTROL_CLE| 968 HCR_CONTROL_PLE| HCR_CONTROL_BLE|HCR_CONTROL_IE)); 969 970 /* 971 * Make sure that the SOF interrupt bit is cleared in the ohci 972 * interrupt status register. 973 */ 974 Set_OpReg(hcr_intr_status, HCR_INTR_SOF); 975 976 /* Enable SOF interrupt */ 977 Set_OpReg(hcr_intr_enable, HCR_INTR_SOF); 978 979 /* 980 * According to OHCI Specification, we have to wait for eight 981 * start of frames to make sure that the Host Controller writes 982 * contents of done head register to done head filed of HCCA. 983 */ 984 for (count = 0; count <= DONE_QUEUE_INTR_COUNTER; count++) { 985 while (!((Get_OpReg(hcr_intr_status)) & HCR_INTR_SOF)) { 986 continue; 987 } 988 989 /* Acknowledge the SOF interrupt */ 990 ohci_polled_finish_interrupt(ohcip, HCR_INTR_SOF); 991 } 992 993 Set_OpReg(hcr_intr_disable, HCR_INTR_SOF); 994 } 995 996 997 /* 998 * Polled restore state routines 999 */ 1000 1001 /* 1002 * ohci_polled_restore_state: 1003 */ 1004 static void 1005 ohci_polled_restore_state(ohci_polled_t *ohci_polledp) 1006 { 1007 ohci_state_t *ohcip; 1008 int i; 1009 uint_t polled_toggle; 1010 uint_t real_toggle; 1011 ohci_pipe_private_t *pp = NULL; /* Normal mode Pipe */ 1012 ohci_pipe_private_t *polled_pp; /* Polled mode Pipe */ 1013 ohci_td_t *td; 1014 ohci_td_t *next_td; /* TD pointers */ 1015 uint_t count; 1016 ohci_save_intr_sts_t *ohci_intr_sts; 1017 ohci_regs_t *ohci_polled_regsp; 1018 uint32_t mask; 1019 usba_pipe_handle_data_t *ph; 1020 uint8_t ep_addr; 1021 1022 #ifndef lint 1023 _NOTE(NO_COMPETING_THREADS_NOW); 1024 #endif 1025 1026 /* 1027 * If this flag is set, then we are still using this structure, 1028 * so don't restore any controller state information yet. 1029 */ 1030 if (ohci_polledp->ohci_polled_flags & POLLED_INPUT_MODE_INUSE) { 1031 1032 #ifndef lint 1033 _NOTE(COMPETING_THREADS_NOW); 1034 #endif 1035 1036 return; 1037 } 1038 1039 ohcip = ohci_polledp->ohci_polled_ohcip; 1040 ohci_intr_sts = &ohcip->ohci_save_intr_sts; 1041 ohci_polled_regsp = &ohcip->ohci_polled_save_regs; 1042 ohcip->ohci_polled_enter_count --; 1043 1044 /* Get the endpoint addr. */ 1045 ep_addr = ohci_polledp->ohci_polled_ep_addr; 1046 /* Get the normal mode usb pipe handle */ 1047 ph = usba_hcdi_get_ph_data(ohci_polledp->ohci_polled_usb_dev, ep_addr); 1048 1049 /* 1050 * Only the first leave keyboard entry turn off all list processing. 1051 * This will take place starting at the next frame. 1052 */ 1053 if (Get_OpReg(hcr_control) & HCR_CONTROL_PLE) { 1054 Set_OpReg(hcr_control, 1055 (Get_OpReg(hcr_control) & ~HCR_CONTROL_PLE)); 1056 } 1057 1058 /* 1059 * Only the last leave keyboard entry restore the info for 1060 * normal mode. 1061 */ 1062 if (ohcip->ohci_polled_enter_count == 0) { 1063 Set_OpReg(hcr_intr_enable, HCR_INTR_SOF); 1064 1065 /* 1066 * According to OHCI Specification, we have to wait for eight 1067 * start of frames to make sure that the Host Controller writes 1068 * contents of done head register to done head filed of HCCA. 1069 */ 1070 for (count = 0; count <= DONE_QUEUE_INTR_COUNTER; count++) { 1071 while (!((Get_OpReg(hcr_intr_status)) & HCR_INTR_SOF)) { 1072 continue; 1073 } 1074 /* Acknowledge the SOF interrupt */ 1075 ohci_polled_finish_interrupt(ohcip, HCR_INTR_SOF); 1076 } 1077 1078 /* 1079 * Check any Frame Number Overflow interrupt (FNO) is pending. 1080 */ 1081 ohci_polled_handle_frame_number_overflow(ohcip); 1082 1083 /* 1084 * Before switching back, we have to process last TD in the 1085 * POLLED mode. It may be in the hcr_done_head register or 1086 * in done list or in the lattice. If it is either on the 1087 * hcr_done_head register or in the done list, just re-inserted 1088 * into the ED's TD list. 1089 * 1090 * First look up at the TD's that are in the hcr_done_head 1091 * register and re-insert them back into the ED's TD list. 1092 */ 1093 td = ohci_td_iommu_to_cpu(ohcip, 1094 (uintptr_t)Get_OpReg(hcr_done_head)); 1095 1096 while (td) { 1097 1098 next_td = ohci_td_iommu_to_cpu(ohcip, Get_TD(td->hctd_next_td)); 1099 1100 /* 1101 * Insert valid interrupt TD back into ED's 1102 * TD list. No periodic TD's will be processed 1103 * since all processing has been stopped. 1104 */ 1105 ohci_polled_insert_td(ohcip, td); 1106 1107 td = next_td; 1108 } 1109 1110 /* 1111 * Now look up at the TD's that are in the HCCA done head list & 1112 * re-insert them back into the ED's TD list. 1113 */ 1114 td = ohci_td_iommu_to_cpu(ohcip, (Get_HCCA( 1115 ohcip->ohci_hccap->HccaDoneHead) & HCCA_DONE_HEAD_MASK)); 1116 1117 while (td) { 1118 1119 next_td = ohci_td_iommu_to_cpu(ohcip, 1120 Get_TD(td->hctd_next_td)); 1121 1122 /* 1123 * Insert valid interrupt TD back into ED's 1124 * TD list. No periodic TD's will be processed 1125 * since all processing has been stopped. 1126 */ 1127 ohci_polled_insert_td(ohcip, td); 1128 1129 td = next_td; 1130 } 1131 /* Reset the HCCA done head list to NULL */ 1132 Set_HCCA(ohcip->ohci_hccap->HccaDoneHead, NULL); 1133 1134 /* 1135 * Replace the hcr_done_head register field with the saved copy 1136 * of current normal mode hcr_done_head register contents. 1137 */ 1138 Set_OpReg(hcr_done_head, 1139 (uint32_t)ohci_polled_regsp->hcr_done_head); 1140 1141 /* 1142 * Clear the WriteDoneHead and SOF interrupt bits in the ohci 1143 * interrupt status register. 1144 */ 1145 Set_OpReg(hcr_intr_status, (HCR_INTR_WDH | HCR_INTR_SOF)); 1146 } 1147 1148 /* Get the polled mode ohci pipe private structure */ 1149 polled_pp = (ohci_pipe_private_t *) 1150 ohci_polledp->ohci_polled_input_pipe_handle->p_hcd_private; 1151 1152 /* 1153 * Before replacing the lattice, adjust the data togggle 1154 * on the on the ohci's interrupt ed 1155 */ 1156 polled_toggle = (Get_ED(polled_pp->pp_ept->hced_headp) & 1157 HC_EPT_Carry) ? DATA1:DATA0; 1158 1159 /* 1160 * If normal mode interrupt pipe endpoint is active, fix the 1161 * data toggle for this interrupt endpoint by getting the data 1162 * toggle information from the polled interrupt endpoint. Else 1163 * save the data toggle information in usb device structure. 1164 */ 1165 if (ph) { 1166 /* Get the normal mode ohci pipe private structure */ 1167 pp = (ohci_pipe_private_t *)ph->p_hcd_private; 1168 1169 real_toggle = (Get_ED(pp->pp_ept->hced_headp) & 1170 HC_EPT_Carry) ? DATA1:DATA0; 1171 1172 if (polled_toggle != real_toggle) { 1173 if (polled_toggle == DATA0) { 1174 Set_ED(pp->pp_ept->hced_headp, 1175 Get_ED(pp->pp_ept->hced_headp) & 1176 ~HC_EPT_Carry); 1177 } else { 1178 Set_ED(pp->pp_ept->hced_headp, 1179 Get_ED(pp->pp_ept->hced_headp) | 1180 HC_EPT_Carry); 1181 } 1182 } 1183 } else { 1184 usba_hcdi_set_data_toggle(ohci_polledp->ohci_polled_usb_dev, 1185 ep_addr, polled_toggle); 1186 } 1187 /* 1188 * Only the last leave keyboard entry restore the Interrupt table, 1189 * start processing and enable the interrupt. 1190 */ 1191 if (ohcip->ohci_polled_enter_count == 0) { 1192 /* Replace the lattice */ 1193 for (i = 0; i < NUM_INTR_ED_LISTS; i++) { 1194 Set_HCCA(ohcip->ohci_hccap->HccaIntTble[i], 1195 (uintptr_t)ohcip->ohci_polled_save_IntTble[i]); 1196 } 1197 1198 /* 1199 * Clear the contents of current ohci periodic ED register that 1200 * is physical address of current Isochronous or Interrupt ED. 1201 */ 1202 Set_OpReg(hcr_periodic_curr, (uint32_t)0x0); 1203 1204 ohci_polled_start_processing(ohci_polledp); 1205 1206 /* 1207 * Check and enable required ohci interrupts before switching 1208 * back to normal mode from the POLLED mode. 1209 */ 1210 mask = (uint32_t)ohci_polled_regsp->hcr_intr_enable & 1211 (HCR_INTR_SOF | HCR_INTR_WDH); 1212 1213 if (ohci_intr_sts->ohci_intr_flag & OHCI_INTR_HANDLING) { 1214 Set_OpReg(hcr_intr_enable, mask); 1215 } else { 1216 Set_OpReg(hcr_intr_enable, mask | HCR_INTR_MIE); 1217 } 1218 } 1219 1220 #ifndef lint 1221 _NOTE(COMPETING_THREADS_NOW); 1222 #endif 1223 } 1224 1225 /* 1226 * ohci_polled_start_processing: 1227 */ 1228 static void 1229 ohci_polled_start_processing(ohci_polled_t *ohci_polledp) 1230 { 1231 ohci_state_t *ohcip; 1232 uint32_t control; 1233 uint32_t mask; 1234 ohci_regs_t *ohci_polled_regsp; 1235 1236 ohcip = ohci_polledp->ohci_polled_ohcip; 1237 ohci_polled_regsp = &ohcip->ohci_polled_save_regs; 1238 1239 mask = ((uint32_t)ohci_polled_regsp->hcr_control) & (HCR_CONTROL_CLE | 1240 HCR_CONTROL_PLE | HCR_CONTROL_BLE | HCR_CONTROL_IE); 1241 1242 control = Get_OpReg(hcr_control) & ~(HCR_CONTROL_CLE | 1243 HCR_CONTROL_PLE | HCR_CONTROL_BLE | HCR_CONTROL_IE); 1244 1245 Set_OpReg(hcr_control, (control | mask)); 1246 } 1247 1248 1249 /* 1250 * Polled read routines 1251 */ 1252 1253 1254 /* 1255 * ohci_polled_check_done_list: 1256 * 1257 * Check to see it there are any TD's on the done head. If there are 1258 * then reverse the done list and put the TD's on the appropriated list. 1259 */ 1260 static int 1261 ohci_polled_check_done_list(ohci_polled_t *ohci_polledp) 1262 { 1263 ohci_state_t *ohcip = ohci_polledp->ohci_polled_ohcip; 1264 ohci_td_t *done_head, *done_list; 1265 1266 /* Sync HCCA area */ 1267 if (ohci_polledp->ohci_polled_no_sync_flag == B_FALSE) { 1268 Sync_HCCA(ohcip); 1269 } 1270 1271 /* Read and Save the HCCA DoneHead value */ 1272 done_head = (ohci_td_t *)(uintptr_t) 1273 (Get_HCCA(ohcip->ohci_hccap->HccaDoneHead) & HCCA_DONE_HEAD_MASK); 1274 1275 /* 1276 * Look at the Done Head and if it is NULL and ohci done list is NULL, 1277 * just return; else if ohci done list is not NULL, should check it. 1278 */ 1279 if (done_head == NULL) { 1280 if (ohcip->ohci_polled_done_list) { 1281 done_head = ohcip->ohci_polled_done_list; 1282 } else { 1283 1284 return (USB_FAILURE); 1285 } 1286 } else { 1287 /* Reset the done head to NULL */ 1288 Set_HCCA(ohcip->ohci_hccap->HccaDoneHead, NULL); 1289 ohcip->ohci_polled_done_list = NULL; 1290 } 1291 1292 /* Sync ED and TD pool */ 1293 if (ohci_polledp->ohci_polled_no_sync_flag == B_FALSE) { 1294 Sync_ED_TD_Pool(ohcip); 1295 } 1296 1297 /* Pickup own tds in the done head */ 1298 done_list = ohci_polled_pickup_done_list(ohci_polledp, done_head); 1299 1300 /* 1301 * Look at the own done list which is pickup'ed 1302 * and if it is NULL, just return. 1303 */ 1304 if (done_list == NULL) { 1305 1306 return (USB_FAILURE); 1307 } 1308 /* Create the input done list */ 1309 ohci_polled_create_input_list(ohci_polledp, done_list); 1310 1311 return (USB_SUCCESS); 1312 } 1313 1314 /* 1315 * ohci_polled_pickup_done_list: 1316 * 1317 * Pickup the TDs of own in the Done Head List 1318 */ 1319 static ohci_td_t * 1320 ohci_polled_pickup_done_list( 1321 ohci_polled_t *ohci_polledp, 1322 ohci_td_t *done_head) 1323 { 1324 ohci_state_t *ohcip = ohci_polledp->ohci_polled_ohcip; 1325 ohci_td_t *reserve_head = NULL, *reserve_tail = NULL; 1326 ohci_td_t *create_head = NULL, *current_td, *td; 1327 ohci_trans_wrapper_t *tw; 1328 ohci_pipe_private_t *pp; 1329 1330 /* 1331 * Current_td pointers point to the done head. 1332 */ 1333 current_td = (ohci_td_t *) 1334 ohci_td_iommu_to_cpu(ohcip, (uintptr_t)done_head); 1335 while (current_td) { 1336 td = (ohci_td_t *)ohci_td_iommu_to_cpu(ohcip, 1337 Get_TD(current_td->hctd_next_td)); 1338 1339 Set_TD(current_td->hctd_next_td, NULL); 1340 1341 /* Obtain the transfer wrapper from the TD */ 1342 tw = (ohci_trans_wrapper_t *)OHCI_LOOKUP_ID( 1343 (uint32_t)Get_TD(current_td->hctd_trans_wrapper)); 1344 1345 /* Get the pipe handle for this transfer wrapper. */ 1346 pp = tw->tw_pipe_private; 1347 1348 /* 1349 * Figure out which done list to put this TD on and put it 1350 * there. If the pipe handle of the TD matches the pipe 1351 * handle we are using for the input device, then this must 1352 * be an input TD, reverse the order and link to the list for 1353 * this input device. Else put the TD to the reserve done list 1354 * for other input devices. 1355 */ 1356 1357 if (pp->pp_pipe_handle == 1358 ohci_polledp->ohci_polled_input_pipe_handle) { 1359 if (create_head == NULL) { 1360 create_head = current_td; 1361 } else { 1362 Set_TD(current_td->hctd_next_td, 1363 ohci_td_cpu_to_iommu(ohcip, create_head)); 1364 create_head = current_td; 1365 } 1366 } else { 1367 if (reserve_head == NULL) { 1368 reserve_head = reserve_tail = current_td; 1369 } else { 1370 Set_TD(reserve_tail->hctd_next_td, 1371 ohci_td_cpu_to_iommu(ohcip, current_td)); 1372 reserve_tail = current_td; 1373 } 1374 } 1375 current_td = td; 1376 } 1377 1378 /* Check if there is other TDs left for other input devices */ 1379 if (reserve_head) { 1380 ohcip->ohci_polled_done_list = (ohci_td_t *)(uintptr_t) 1381 ohci_td_cpu_to_iommu(ohcip, reserve_head); 1382 1383 } else { 1384 ohcip->ohci_polled_done_list = NULL; 1385 } 1386 1387 return (create_head); 1388 } 1389 1390 /* 1391 * ohci_polled_create_input_list: 1392 * 1393 * Create the input done list from the actual done head list. 1394 */ 1395 static void 1396 ohci_polled_create_input_list( 1397 ohci_polled_t *ohci_polledp, 1398 ohci_td_t *head_done_list) 1399 { 1400 ohci_state_t *ohcip = ohci_polledp->ohci_polled_ohcip; 1401 ohci_td_t *cpu_save, *td; 1402 1403 ASSERT(head_done_list != NULL); 1404 1405 /* Get the done head list */ 1406 td = (ohci_td_t *)head_done_list; 1407 1408 /* 1409 * Traverse the done list and create the input done list. 1410 */ 1411 while (td) { 1412 1413 /* 1414 * Convert the iommu pointer to a cpu pointer. No point 1415 * in doing this over and over, might as well do it once. 1416 */ 1417 cpu_save = ohci_td_iommu_to_cpu(ohcip, 1418 Get_TD(td->hctd_next_td)); 1419 1420 /* 1421 * Terminate this TD by setting its next pointer to NULL. 1422 */ 1423 Set_TD(td->hctd_next_td, NULL); 1424 1425 /* This is an input TD, so put it on the input done list */ 1426 if (ohci_polledp->ohci_polled_input_done_head == NULL) { 1427 1428 /* 1429 * There is nothing on the input done list, 1430 * so put this TD on the head. 1431 */ 1432 ohci_polledp->ohci_polled_input_done_head = td; 1433 } else { 1434 Set_TD(ohci_polledp-> 1435 ohci_polled_input_done_tail->hctd_next_td, 1436 ohci_td_cpu_to_iommu(ohcip, td)); 1437 } 1438 1439 /* The tail points to the new TD */ 1440 ohci_polledp->ohci_polled_input_done_tail = td; 1441 td = cpu_save; 1442 } 1443 } 1444 1445 1446 /* 1447 * ohci_polled_process_input_list: 1448 * 1449 * This routine takes the TD's off of the input done head and processes 1450 * them. It returns the number of characters that have been copied for 1451 * input. 1452 */ 1453 static int 1454 ohci_polled_process_input_list(ohci_polled_t *ohci_polledp) 1455 { 1456 ohci_state_t *ohcip = ohci_polledp->ohci_polled_ohcip; 1457 ohci_td_t *td, *next_td; 1458 uint_t ctrl; 1459 uint_t num_characters; 1460 ohci_trans_wrapper_t *tw; 1461 ohci_pipe_private_t *pp; 1462 1463 /* 1464 * Get the first TD on the input done head. 1465 */ 1466 td = ohci_polledp->ohci_polled_input_done_head; 1467 1468 ohci_polledp->ohci_polled_input_done_head = NULL; 1469 1470 num_characters = 0; 1471 1472 /* 1473 * Traverse the list of transfer descriptors. We can't destroy 1474 * hctd_next_td pointers of these TDs because we are using it 1475 * to traverse the done list. Therefore, we can not put these 1476 * TDs back on the ED until we are done processing all of them. 1477 */ 1478 while (td) { 1479 1480 /* Get the next TD from the input done list */ 1481 next_td = (ohci_td_t *) 1482 ohci_td_iommu_to_cpu(ohcip, Get_TD(td->hctd_next_td)); 1483 1484 /* Look at the status */ 1485 ctrl = (uint_t)Get_TD(td->hctd_ctrl) & (uint32_t)HC_TD_CC; 1486 1487 /* 1488 * Check to see if there is an error. If there is error 1489 * clear the halt condition in the Endpoint Descriptor 1490 * (ED) associated with this Transfer Descriptor (TD). 1491 */ 1492 if (ctrl != HC_TD_CC_NO_E) { 1493 /* Obtain the transfer wrapper from the TD */ 1494 tw = (ohci_trans_wrapper_t *)OHCI_LOOKUP_ID( 1495 (uint32_t)Get_TD(td->hctd_trans_wrapper)); 1496 1497 /* Get the pipe handle for this transfer wrapper */ 1498 pp = tw->tw_pipe_private; 1499 1500 /* Clear the halt bit */ 1501 Set_ED(pp->pp_ept->hced_headp, 1502 (Get_ED(pp->pp_ept->hced_headp) & ~HC_EPT_Halt)); 1503 } else { 1504 num_characters += 1505 ohci_polled_handle_normal_td(ohci_polledp, td); 1506 } 1507 1508 /* Insert this interrupt TD back onto the ED's TD list */ 1509 ohci_polled_insert_td(ohcip, td); 1510 1511 td = next_td; 1512 } 1513 1514 return (num_characters); 1515 } 1516 1517 1518 /* 1519 * ohci_polled_handle_normal_td: 1520 */ 1521 static int 1522 ohci_polled_handle_normal_td( 1523 ohci_polled_t *ohci_polledp, 1524 ohci_td_t *td) 1525 { 1526 ohci_state_t *ohcip = ohci_polledp->ohci_polled_ohcip; 1527 uchar_t *buf; 1528 ohci_trans_wrapper_t *tw; 1529 int length; 1530 1531 /* Obtain the transfer wrapper from the TD */ 1532 tw = (ohci_trans_wrapper_t *)OHCI_LOOKUP_ID((uint32_t) 1533 Get_TD(td->hctd_trans_wrapper)); 1534 1535 ASSERT(tw != NULL); 1536 1537 buf = (uchar_t *)tw->tw_buf; 1538 1539 length = tw->tw_length; 1540 1541 /* 1542 * If "CurrentBufferPointer" of Transfer Descriptor (TD) is 1543 * not equal to zero, then we received less data from the 1544 * device than requested by us. In that case, get the actual 1545 * received data size. 1546 */ 1547 if (Get_TD(td->hctd_cbp)) { 1548 1549 length = Get_TD(td->hctd_cbp) - 1550 tw->tw_cookie.dmac_address; 1551 } 1552 1553 /* Sync IO buffer */ 1554 if (ohci_polledp->ohci_polled_no_sync_flag == B_FALSE) { 1555 Sync_IO_Buffer(tw->tw_dmahandle, length); 1556 } 1557 1558 /* Copy the data into the message */ 1559 ddi_rep_get8(tw->tw_accesshandle, 1560 (uint8_t *)ohci_polledp->ohci_polled_buf, 1561 (uint8_t *)buf, length, DDI_DEV_AUTOINCR); 1562 1563 return (length); 1564 } 1565 1566 1567 /* 1568 * ohci_polled_insert_td: 1569 * 1570 * Insert a Transfer Descriptor (TD) on an Endpoint Descriptor (ED). 1571 */ 1572 static void 1573 ohci_polled_insert_td( 1574 ohci_state_t *ohcip, 1575 ohci_td_t *td) 1576 { 1577 ohci_pipe_private_t *pp; 1578 ohci_ed_t *ept; 1579 uint_t td_control; 1580 ohci_trans_wrapper_t *tw; 1581 ohci_td_t *cpu_current_dummy; 1582 usb_intr_req_t *intr_req; 1583 1584 /* Obtain the transfer wrapper from the TD */ 1585 tw = (ohci_trans_wrapper_t *)OHCI_LOOKUP_ID( 1586 (uint32_t)Get_TD(td->hctd_trans_wrapper)); 1587 1588 /* 1589 * Take this TD off the transfer wrapper's list since 1590 * the pipe is FIFO, this must be the first TD on the 1591 * list. 1592 */ 1593 ASSERT((ohci_td_t *)tw->tw_hctd_head == td); 1594 1595 tw->tw_hctd_head = (ohci_td_t *) 1596 ohci_td_iommu_to_cpu(ohcip, Get_TD(td->hctd_tw_next_td)); 1597 1598 /* 1599 * If the head becomes NULL, then there are no more 1600 * active TD's for this transfer wrapper. Also set 1601 * the tail to NULL. 1602 */ 1603 if (tw->tw_hctd_head == NULL) { 1604 tw->tw_hctd_tail = NULL; 1605 } 1606 1607 /* Convert current valid TD as new dummy TD */ 1608 bzero((char *)td, sizeof (ohci_td_t)); 1609 Set_TD(td->hctd_state, HC_TD_DUMMY); 1610 1611 pp = tw->tw_pipe_private; 1612 1613 /* Obtain the endpoint and interrupt request */ 1614 ept = pp->pp_ept; 1615 1616 intr_req = (usb_intr_req_t *)tw->tw_curr_xfer_reqp; 1617 1618 if (intr_req->intr_attributes & USB_ATTRS_SHORT_XFER_OK) { 1619 td_control = HC_TD_IN|HC_TD_1I|HC_TD_R; 1620 } else { 1621 td_control = HC_TD_IN|HC_TD_1I; 1622 } 1623 1624 /* Get the current dummy */ 1625 cpu_current_dummy = (ohci_td_t *) 1626 (ohci_td_iommu_to_cpu(ohcip, Get_ED(ept->hced_tailp))); 1627 1628 /* 1629 * Fill in the current dummy td and 1630 * add the new dummy to the end. 1631 */ 1632 ohci_polled_fill_in_td(ohcip, cpu_current_dummy, td, 1633 td_control, tw->tw_cookie.dmac_address, tw->tw_length, tw); 1634 1635 /* Insert this td onto the tw */ 1636 ohci_polled_insert_td_on_tw(ohcip, tw, cpu_current_dummy); 1637 1638 /* 1639 * Add the new dummy to the ED's list. When this occurs, 1640 * the Host Controller will see the newly filled in dummy 1641 * TD. 1642 */ 1643 Set_ED(ept->hced_tailp, (ohci_td_cpu_to_iommu(ohcip, td))); 1644 } 1645 1646 1647 /* 1648 * ohci_polled_fill_in_td: 1649 * 1650 * Fill in the fields of a Transfer Descriptor (TD). 1651 */ 1652 static void 1653 ohci_polled_fill_in_td( 1654 ohci_state_t *ohcip, 1655 ohci_td_t *td, 1656 ohci_td_t *new_dummy, 1657 uint_t hctd_ctrl, 1658 uint32_t hctd_iommu_cbp, 1659 size_t hctd_length, 1660 ohci_trans_wrapper_t *tw) 1661 { 1662 /* Assert that the td to be filled in is a dummy */ 1663 ASSERT(Get_TD(td->hctd_state) == HC_TD_DUMMY); 1664 1665 /* Clear the TD */ 1666 bzero((char *)td, sizeof (ohci_td_t)); 1667 1668 /* Update the dummy with control information */ 1669 Set_TD(td->hctd_ctrl, (hctd_ctrl | HC_TD_CC_NA)); 1670 1671 /* Update the beginning of the buffer */ 1672 Set_TD(td->hctd_cbp, hctd_iommu_cbp); 1673 1674 /* The current dummy now points to the new dummy */ 1675 Set_TD(td->hctd_next_td, (ohci_td_cpu_to_iommu(ohcip, new_dummy))); 1676 1677 /* Fill in the end of the buffer */ 1678 if (hctd_length == 0) { 1679 ASSERT(Get_TD(td->hctd_cbp) == 0); 1680 ASSERT(hctd_iommu_cbp == 0); 1681 Set_TD(td->hctd_buf_end, 0); 1682 } else { 1683 Set_TD(td->hctd_buf_end, 1684 hctd_iommu_cbp + hctd_length - 1); 1685 } 1686 1687 /* Fill in the wrapper portion of the TD */ 1688 Set_TD(td->hctd_trans_wrapper, (uint32_t)tw->tw_id); 1689 Set_TD(td->hctd_tw_next_td, NULL); 1690 } 1691 1692 1693 /* 1694 * ohci_polled_insert_td_on_tw: 1695 * 1696 * The transfer wrapper keeps a list of all Transfer Descriptors (TD) that 1697 * are allocated for this transfer. Insert a TD onto this list. The list 1698 * of TD's does not include the dummy TD that is at the end of the list of 1699 * TD's for the endpoint. 1700 */ 1701 static void 1702 ohci_polled_insert_td_on_tw( 1703 ohci_state_t *ohcip, 1704 ohci_trans_wrapper_t *tw, 1705 ohci_td_t *td) 1706 { 1707 1708 /* 1709 * Set the next pointer to NULL because 1710 * this is the last TD on list. 1711 */ 1712 Set_TD(td->hctd_tw_next_td, NULL); 1713 1714 if (tw->tw_hctd_head == NULL) { 1715 ASSERT(tw->tw_hctd_tail == NULL); 1716 tw->tw_hctd_head = td; 1717 tw->tw_hctd_tail = td; 1718 } else { 1719 ohci_td_t *dummy = (ohci_td_t *)tw->tw_hctd_tail; 1720 1721 ASSERT(dummy != NULL); 1722 ASSERT(dummy != td); 1723 ASSERT(Get_TD(td->hctd_state) == HC_TD_DUMMY); 1724 1725 /* Add the td to the end of the list */ 1726 Set_TD(dummy->hctd_tw_next_td, ohci_td_cpu_to_iommu(ohcip, td)); 1727 tw->tw_hctd_tail = td; 1728 1729 ASSERT(Get_TD(td->hctd_tw_next_td) == NULL); 1730 } 1731 } 1732 1733 1734 /* 1735 * ohci_polled_handle_frame_number_overflow: 1736 * 1737 * Process Frame Number Overflow (FNO) interrupt in polled mode. 1738 */ 1739 static void 1740 ohci_polled_handle_frame_number_overflow(ohci_state_t *ohcip) 1741 { 1742 uint_t intr; 1743 1744 /* Read the Interrupt Status & Interrupt enable register */ 1745 intr = (Get_OpReg(hcr_intr_status) & Get_OpReg(hcr_intr_enable)); 1746 1747 /* 1748 * Check whether any Frame Number Overflow interrupt is pending 1749 * and if it is pending, process this interrupt. 1750 */ 1751 if (intr & HCR_INTR_FNO) { 1752 ohci_handle_frame_number_overflow(ohcip); 1753 1754 /* Acknowledge the FNO interrupt */ 1755 ohci_polled_finish_interrupt(ohcip, HCR_INTR_FNO); 1756 } 1757 } 1758 1759 1760 /* 1761 * ohci_polled_finish_interrupt: 1762 */ 1763 static void 1764 ohci_polled_finish_interrupt( 1765 ohci_state_t *ohcip, 1766 uint_t intr) 1767 { 1768 /* Acknowledge the interrupt */ 1769 Set_OpReg(hcr_intr_status, intr); 1770 1771 /* 1772 * Read interrupt status register to make sure that any PIO 1773 * store to clear the ISR has made it on the PCI bus before 1774 * returning from its interrupt handler. 1775 */ 1776 (void) Get_OpReg(hcr_intr_status); 1777 } 1778