xref: /illumos-gate/usr/src/uts/common/sys/asy.h (revision 03831d35)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*	Copyright (c) 1990, 1991 UNIX System Laboratories, Inc.	*/
23 /*	Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T	*/
24 /*	  All Rights Reserved 	*/
25 
26 /*
27  * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
28  * Use is subject to license terms.
29  */
30 
31 #ifndef	_SYS_ASY_H
32 #define	_SYS_ASY_H
33 
34 #pragma ident	"%Z%%M%	%I%	%E% SMI"
35 
36 #ifdef __cplusplus
37 extern "C" {
38 #endif
39 
40 #include <sys/tty.h>
41 #include <sys/ksynch.h>
42 #include <sys/dditypes.h>
43 
44 #define	COM1_IOADDR	0x3f8
45 #define	COM2_IOADDR	0x2f8
46 #define	COM3_IOADDR	0x3e8
47 #define	COM4_IOADDR	0x2e8
48 
49 /*
50  * Definitions for INS8250 / 16550  chips
51  */
52 
53 /* defined as offsets from the data register */
54 #define	DAT		0 	/* receive/transmit data */
55 #define	ICR		1  	/* interrupt control register */
56 #define	ISR		2   	/* interrupt status register */
57 #define	LCR		3   	/* line control register */
58 #define	MCR		4   	/* modem control register */
59 #define	LSR		5   	/* line status register */
60 #define	MSR		6   	/* modem status register */
61 #define	SCR		7   	/* scratch register */
62 #define	DLL		0   	/* divisor latch (lsb) */
63 #define	DLH		1   	/* divisor latch (msb) */
64 #define	FIFOR		ISR	/* FIFO register for 16550 */
65 #define	EFR		ISR	/* Enhanced feature register for 16650 */
66 
67 /*
68  * INTEL 8210-A/B & 16450/16550 Registers Structure.
69  */
70 
71 /* Line Control Register */
72 #define	WLS0		0x01	/* word length select bit 0 */
73 #define	WLS1		0x02	/* word length select bit 2 */
74 #define	STB		0x04	/* number of stop bits */
75 #define	PEN		0x08	/* parity enable */
76 #define	EPS		0x10	/* even parity select */
77 #define	SETBREAK 	0x40	/* break key */
78 #define	DLAB		0x80	/* divisor latch access bit */
79 #define	RXLEN   	0x03   	/* # of data bits per received/xmitted char */
80 #define	STOP1   	0x00
81 #define	STOP2   	0x04
82 #define	PAREN   	0x08
83 #define	PAREVN  	0x10
84 #define	PARMARK 	0x20
85 #define	SNDBRK  	0x40
86 #define	EFRACCESS	0xBF	/* magic value for 16650 EFR access */
87 
88 #define	BITS5		0x00	/* 5 bits per char */
89 #define	BITS6		0x01	/* 6 bits per char */
90 #define	BITS7		0x02	/* 7 bits per char */
91 #define	BITS8		0x03	/* 8 bits per char */
92 
93 /* Line Status Register */
94 #define	RCA		0x01	/* data ready */
95 #define	OVRRUN		0x02	/* overrun error */
96 #define	PARERR		0x04	/* parity error */
97 #define	FRMERR		0x08	/* framing error */
98 #define	BRKDET  	0x10	/* a break has arrived */
99 #define	XHRE		0x20	/* tx hold reg is now empty */
100 #define	XSRE		0x40	/* tx shift reg is now empty */
101 #define	RFBE		0x80	/* rx FIFO Buffer error */
102 
103 /* Interrupt Id Regisger */
104 #define	MSTATUS		0x00	/* modem status changed */
105 #define	NOINTERRUPT	0x01	/* no interrupt pending */
106 #define	TxRDY		0x02	/* Transmitter Holding Register Empty */
107 #define	RxRDY		0x04	/* Receiver Data Available */
108 #define	FFTMOUT 	0x0c	/* FIFO timeout - 16550AF */
109 #define	RSTATUS 	0x06	/* Receiver Line Status */
110 
111 /* Interrupt Enable Register */
112 #define	RIEN		0x01	/* Received Data Ready */
113 #define	TIEN		0x02	/* Tx Hold Register Empty */
114 #define	SIEN		0x04	/* Receiver Line Status */
115 #define	MIEN		0x08	/* Modem Status */
116 
117 /* Modem Control Register */
118 #define	DTR		0x01	/* Data Terminal Ready */
119 #define	RTS		0x02	/* Request To Send */
120 #define	OUT1		0x04	/* Aux output - not used */
121 #define	OUT2		0x08	/* turns intr to 386 on/off */
122 #define	ASY_LOOP	0x10	/* loopback for diagnostics */
123 
124 /* Modem Status Register */
125 #define	DCTS		0x01	/* Delta Clear To Send */
126 #define	DDSR		0x02	/* Delta Data Set Ready */
127 #define	DRI		0x04	/* Trail Edge Ring Indicator */
128 #define	DDCD		0x08	/* Delta Data Carrier Detect */
129 #define	CTS		0x10	/* Clear To Send */
130 #define	DSR		0x20	/* Data Set Ready */
131 #define	RI		0x40	/* Ring Indicator */
132 #define	DCD		0x80	/* Data Carrier Detect */
133 
134 #define	DELTAS(x)	((x)&(DCTS|DDSR|DRI|DDCD))
135 #define	STATES(x)	((x)&(CTS|DSR|RI|DCD))
136 
137 /* flags for FCR (FIFO Control register) */
138 #define	FIFO_OFF	0x00	/* fifo disabled */
139 #define	FIFO_ON		0x01	/* fifo enabled */
140 #define	FIFORXFLSH	0x02	/* flush receiver FIFO */
141 #define	FIFOTXFLSH	0x04	/* flush transmitter FIFO */
142 #define	FIFODMA		0x08	/* DMA mode 1 */
143 #define	FIFOEXTRA1	0x10	/* Longer fifos on some 16650's */
144 #define	FIFOEXTRA2	0x20	/* Longer fifos on some 16650's and 16750 */
145 #define	FIFO_TRIG_1	0x00	/* 1 byte trigger level */
146 #define	FIFO_TRIG_4	0x40	/* 4 byte trigger level */
147 #define	FIFO_TRIG_8	0x80	/* 8 byte trigger level */
148 #define	FIFO_TRIG_14	0xC0	/* 14 byte trigger level */
149 
150 /* Serial in/out requests */
151 
152 #define	OVERRUN		040000
153 #define	FRERROR		020000
154 #define	PERROR		010000
155 #define	S_ERRORS	(PERROR|OVERRUN|FRERROR)
156 
157 /* EFR - Enhanced feature register for 16650 */
158 #define	ENHENABLE	0x10
159 
160 /* SCR - scratch register */
161 #define	SCRTEST		0x5a	/* arbritrary value for testing SCR register */
162 
163 /*
164  * Ring buffer and async line management definitions.
165  */
166 #define	RINGBITS	10		/* # of bits in ring ptrs */
167 #define	RINGSIZE	(1<<RINGBITS)   /* size of ring */
168 #define	RINGMASK	(RINGSIZE-1)
169 #define	RINGFRAC	8		/* fraction of ring to force flush */
170 
171 #define	RING_INIT(ap)  ((ap)->async_rput = (ap)->async_rget = 0)
172 #define	RING_CNT(ap)   (((ap)->async_rput >= (ap)->async_rget) ? \
173 	((ap)->async_rput - (ap)->async_rget):\
174 	((0x10000 - (ap)->async_rget) + (ap)->async_rput))
175 #define	RING_FRAC(ap)  ((int)RING_CNT(ap) >= (int)(RINGSIZE/RINGFRAC))
176 #define	RING_POK(ap, n) ((int)RING_CNT(ap) < (int)(RINGSIZE-(n)))
177 #define	RING_PUT(ap, c) \
178 	((ap)->async_ring[(ap)->async_rput++ & RINGMASK] =  (uchar_t)(c))
179 #define	RING_UNPUT(ap) ((ap)->async_rput--)
180 #define	RING_GOK(ap, n) ((int)RING_CNT(ap) >= (int)(n))
181 #define	RING_GET(ap)   ((ap)->async_ring[(ap)->async_rget++ & RINGMASK])
182 #define	RING_EAT(ap, n) ((ap)->async_rget += (n))
183 #define	RING_MARK(ap, c, s) \
184 	((ap)->async_ring[(ap)->async_rput++ & RINGMASK] = ((uchar_t)(c)|(s)))
185 #define	RING_UNMARK(ap) \
186 	((ap)->async_ring[((ap)->async_rget) & RINGMASK] &= ~S_ERRORS)
187 #define	RING_ERR(ap, c) \
188 	((ap)->async_ring[((ap)->async_rget) & RINGMASK] & (c))
189 
190 /*
191  * Asy tracing macros.  These are a bit similar to some macros in sys/vtrace.h .
192  *
193  * XXX - Needs review:  would it be better to use the macros in sys/vtrace.h ?
194  */
195 #ifdef DEBUG
196 #define	DEBUGWARN0(fac, format) \
197 	if (debug & (fac)) \
198 		cmn_err(CE_WARN, format)
199 #define	DEBUGNOTE0(fac, format) \
200 	if (debug & (fac)) \
201 		cmn_err(CE_NOTE, format)
202 #define	DEBUGNOTE1(fac, format, arg1) \
203 	if (debug & (fac)) \
204 		cmn_err(CE_NOTE, format, arg1)
205 #define	DEBUGNOTE2(fac, format, arg1, arg2) \
206 	if (debug & (fac)) \
207 		cmn_err(CE_NOTE, format, arg1, arg2)
208 #define	DEBUGNOTE3(fac, format, arg1, arg2, arg3) \
209 	if (debug & (fac)) \
210 		cmn_err(CE_NOTE, format, arg1, arg2, arg3)
211 #define	DEBUGCONT0(fac, format) \
212 	if (debug & (fac)) \
213 		cmn_err(CE_CONT, format)
214 #define	DEBUGCONT1(fac, format, arg1) \
215 	if (debug & (fac)) \
216 		cmn_err(CE_CONT, format, arg1)
217 #define	DEBUGCONT2(fac, format, arg1, arg2) \
218 	if (debug & (fac)) \
219 		cmn_err(CE_CONT, format, arg1, arg2)
220 #define	DEBUGCONT3(fac, format, arg1, arg2, arg3) \
221 	if (debug & (fac)) \
222 		cmn_err(CE_CONT, format, arg1, arg2, arg3)
223 #define	DEBUGCONT4(fac, format, arg1, arg2, arg3, arg4) \
224 	if (debug & (fac)) \
225 		cmn_err(CE_CONT, format, arg1, arg2, arg3, arg4)
226 #define	DEBUGCONT10(fac, format, \
227 	arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9, arg10) \
228 	if (debug & (fac)) \
229 		cmn_err(CE_CONT, format, \
230 		arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9, arg10)
231 #else
232 #define	DEBUGWARN0(fac, format)
233 #define	DEBUGNOTE0(fac, format)
234 #define	DEBUGNOTE1(fac, format, arg1)
235 #define	DEBUGNOTE2(fac, format, arg1, arg2)
236 #define	DEBUGNOTE3(fac, format, arg1, arg2, arg3)
237 #define	DEBUGCONT0(fac, format)
238 #define	DEBUGCONT1(fac, format, arg1)
239 #define	DEBUGCONT2(fac, format, arg1, arg2)
240 #define	DEBUGCONT3(fac, format, arg1, arg2, arg3)
241 #define	DEBUGCONT4(fac, format, arg1, arg2, arg3, arg4)
242 #define	DEBUGCONT10(fac, format, \
243 	arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8, arg9, arg10)
244 #endif
245 
246 /*
247  * Hardware channel common data. One structure per port.
248  * Each of the fields in this structure is required to be protected by a
249  * mutex lock at the highest priority at which it can be altered.
250  * The asy_flags, and asy_next fields can be altered by interrupt
251  * handling code that must be protected by the mutex whose handle is
252  * stored in asy_excl_hi.  All others can be protected by the asy_excl
253  * mutex, which is lower priority and adaptive.
254  */
255 
256 struct asycom {
257 	int		asy_flags;	/* random flags  */
258 					/* protected by asy_excl_hi lock */
259 	uint_t		asy_hwtype;	/* HW type: ASY16550A, etc. */
260 	uint_t		asy_use_fifo;	/* HW FIFO use it or not ?? */
261 	uint_t		asy_fifo_buf;	/* With FIFO = 16, otherwise = 1 */
262 	uint_t		asy_flags2;	/* flags which don't change, no lock */
263 	uint8_t		*asy_ioaddr;	/* i/o address of ASY port */
264 	struct asyncline *asy_priv;	/* protocol private data -- asyncline */
265 	dev_info_t	*asy_dip;	/* dev_info */
266 	int		asy_unit;	/* which port */
267 	ddi_iblock_cookie_t asy_iblock;
268 	kmutex_t	asy_excl;	/* asy adaptive mutex */
269 	kmutex_t	asy_excl_hi;	/* asy spinlock mutex */
270 	uchar_t		asy_msr;	/* saved modem status */
271 	uchar_t		asy_mcr;	/* soft carrier bits */
272 	uchar_t		asy_lcr;	/* console lcr bits */
273 	uchar_t		asy_bidx;	/* console baud rate index */
274 	tcflag_t	asy_cflag;	/* console mode bits */
275 	struct cons_polledio	polledio;	/* polled I/O functions */
276 	ddi_acc_handle_t	asy_iohandle;	/* Data access handle */
277 	tcflag_t	asy_ocflag;	/* old console mode bits */
278 	uchar_t		asy_com_port;	/* COM port number, or zero */
279 	uchar_t		asy_fifor;	/* FIFOR register setting */
280 #ifdef DEBUG
281 	int		asy_msint_cnt;	/* number of times in async_msint */
282 #endif
283 };
284 
285 /*
286  * Asychronous protocol private data structure for ASY.
287  * Each of the fields in the structure is required to be protected by
288  * the lower priority lock except the fields that are set only at
289  * base level but cleared (with out lock) at interrupt level.
290  */
291 
292 struct asyncline {
293 	int		async_flags;	/* random flags */
294 	kcondvar_t	async_flags_cv; /* condition variable for flags */
295 	dev_t		async_dev;	/* device major/minor numbers */
296 	mblk_t		*async_xmitblk;	/* transmit: active msg block */
297 	struct asycom	*async_common;	/* device common data */
298 	tty_common_t 	async_ttycommon; /* tty driver common data */
299 	bufcall_id_t	async_wbufcid;	/* id for pending write-side bufcall */
300 	timeout_id_t	async_polltid;	/* softint poll timeout id */
301 	timeout_id_t    async_dtrtid;   /* delaying DTR turn on */
302 	timeout_id_t    async_utbrktid; /* hold minimum untimed break time id */
303 
304 	/*
305 	 * The following fields are protected by the asy_excl_hi lock.
306 	 * Some, such as async_flowc, are set only at the base level and
307 	 * cleared (without the lock) only by the interrupt level.
308 	 */
309 	uchar_t		*async_optr;	/* output pointer */
310 	int		async_ocnt;	/* output count */
311 	ushort_t	async_rput;	/* producing pointer for input */
312 	ushort_t	async_rget;	/* consuming pointer for input */
313 
314 	/*
315 	 * Each character stuffed into the ring has two bytes associated
316 	 * with it.  The first byte is used to indicate special conditions
317 	 * and the second byte is the actual data.  The ring buffer
318 	 * needs to be defined as ushort_t to accomodate this.
319 	 */
320 	ushort_t	async_ring[RINGSIZE];
321 
322 	short		async_break;	/* break count */
323 	int		async_inflow_source; /* input flow control type */
324 
325 	union {
326 		struct {
327 			uchar_t _hw;	/* overrun (hw) */
328 			uchar_t _sw;	/* overrun (sw) */
329 		} _a;
330 		ushort_t uover_overrun;
331 	} async_uover;
332 #define	async_overrun		async_uover._a.uover_overrun
333 #define	async_hw_overrun	async_uover._a._hw
334 #define	async_sw_overrun	async_uover._a._sw
335 	short		async_ext;	/* modem status change count */
336 	short		async_work;	/* work to do flag */
337 	timeout_id_t	async_timer;	/* close drain progress timer */
338 };
339 
340 /* definitions for async_flags field */
341 #define	ASYNC_EXCL_OPEN	 0x10000000	/* exclusive open */
342 #define	ASYNC_WOPEN	 0x00000001	/* waiting for open to complete */
343 #define	ASYNC_ISOPEN	 0x00000002	/* open is complete */
344 #define	ASYNC_OUT	 0x00000004	/* line being used for dialout */
345 #define	ASYNC_CARR_ON	 0x00000008	/* carrier on last time we looked */
346 #define	ASYNC_STOPPED	 0x00000010	/* output is stopped */
347 #define	ASYNC_DELAY	 0x00000020	/* waiting for delay to finish */
348 #define	ASYNC_BREAK	 0x00000040	/* waiting for break to finish */
349 #define	ASYNC_BUSY	 0x00000080	/* waiting for transmission to finish */
350 #define	ASYNC_DRAINING	 0x00000100	/* waiting for output to drain */
351 #define	ASYNC_SERVICEIMM 0x00000200	/* queue soft interrupt as soon as */
352 #define	ASYNC_HW_IN_FLOW 0x00000400	/* input flow control in effect */
353 #define	ASYNC_HW_OUT_FLW 0x00000800	/* output flow control in effect */
354 #define	ASYNC_PROGRESS	 0x00001000	/* made progress on output effort */
355 #define	ASYNC_CLOSING	 0x00002000	/* processing close on stream */
356 #define	ASYNC_OUT_SUSPEND 0x00004000    /* waiting for TIOCSBRK to finish */
357 #define	ASYNC_HOLD_UTBRK 0x00008000	/* waiting for untimed break hold */
358 					/* the minimum time */
359 #define	ASYNC_DTR_DELAY  0x00010000	/* delaying DTR turn on */
360 #define	ASYNC_SW_IN_FLOW 0x00020000	/* sw input flow control in effect */
361 #define	ASYNC_SW_OUT_FLW 0x00040000	/* sw output flow control in effect */
362 #define	ASYNC_SW_IN_NEEDED 0x00080000	/* sw input flow control char is */
363 					/* needed to be sent */
364 #define	ASYNC_OUT_FLW_RESUME 0x00100000 /* output need to be resumed */
365 					/* because of transition of flow */
366 					/* control from stop to start */
367 
368 /* asy_hwtype definitions */
369 #define	ASY8250A	0x2		/* 8250A or 16450 */
370 #define	ASY16550	0x3		/* broken FIFO which must not be used */
371 #define	ASY16550A	0x4		/* usable FIFO */
372 #define	ASY16650	0x5
373 #define	ASY16750	0x6
374 
375 /* definitions for asy_flags field */
376 #define	ASY_NEEDSOFT	0x00000001
377 #define	ASY_DOINGSOFT	0x00000002
378 #define	ASY_PPS		0x00000004
379 #define	ASY_PPS_EDGE	0x00000008
380 #define	ASY_DOINGSOFT_RETRY	0x00000010
381 #define	ASY_RTS_DTR_OFF	0x00000020
382 #define	ASY_IGNORE_CD	0x00000040
383 #define	ASY_CONSOLE	0x00000080
384 
385 /* definitions for asy_flags2 field */
386 #define	ASY2_NO_LOOPBACK 0x00000001	/* Device doesn't support loopback */
387 
388 /* definitions for async_inflow_source field in struct asyncline */
389 #define	IN_FLOW_NULL	0x00000000
390 #define	IN_FLOW_RINGBUFF	0x00000001
391 #define	IN_FLOW_STREAMS	0x00000002
392 #define	IN_FLOW_USER	0x00000004
393 
394 /*
395  * OUTLINE defines the high-order flag bit in the minor device number that
396  * controls use of a tty line for dialin and dialout simultaneously.
397  */
398 #ifdef _LP64
399 #define	OUTLINE		(1 << (NBITSMINOR32 - 1))
400 #else
401 #define	OUTLINE		(1 << (NBITSMINOR - 1))
402 #endif
403 #define	UNIT(x)		(getminor(x) & ~OUTLINE)
404 
405 /*
406  * ASYSETSOFT macro to pend a soft interrupt if one isn't already pending.
407  */
408 
409 extern kmutex_t	asy_soft_lock;		/* ptr to lock for asysoftpend */
410 extern int asysoftpend;			/* secondary interrupt pending */
411 
412 #define	ASYSETSOFT(asy)	{			\
413 	mutex_enter(&asy_soft_lock);		\
414 	asy->asy_flags |= ASY_NEEDSOFT;		\
415 	if (!asysoftpend) {			\
416 		asysoftpend = 1;		\
417 		mutex_exit(&asy_soft_lock);	\
418 		ddi_trigger_softintr(asy_softintr_id);	\
419 	}					\
420 	else					\
421 		mutex_exit(&asy_soft_lock);	\
422 }
423 
424 #ifdef __cplusplus
425 }
426 #endif
427 
428 #endif	/* _SYS_ASY_H */
429