1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved. 24 */ 25 26 #ifndef _SI3124VAR_H 27 #define _SI3124VAR_H 28 29 #ifdef __cplusplus 30 extern "C" { 31 #endif 32 33 #define SI3124_MAX_PORTS 4 34 #define SI3132_MAX_PORTS 2 35 #define SI_MAX_PORTS SI3124_MAX_PORTS 36 37 #define SI_SUCCESS (0) /* successful return */ 38 #define SI_TIMEOUT (1) /* timed out */ 39 #define SI_FAILURE (-1) /* unsuccessful return */ 40 41 #define SI_MAX_SGT_TABLES_PER_PRB 21844 42 #define SI_DEFAULT_SGT_TABLES_PER_PRB 85 43 #define SI_MIN_SGT_TABLES_PER_PRB 1 44 /* 45 * While the si_sge_t and si_sgt_t correspond to the actual SGE and SGT 46 * definitions as per the datasheet, the si_sgblock_t (i.e scatter gather 47 * block) is a logical data structure which can hold dynamic SGEs and it 48 * is tunable through global variables /etc/system si3124:si_dma_sg_number. 49 * The idea is to use multiple tunable chained SGT tables per each PRB request. 50 */ 51 52 typedef struct si_sgblock { 53 si_sgt_t sgb_sgt[1]; 54 } si_sgblock_t; 55 56 /* 57 * Each SGT (Scatter Gather Table) has 4 SGEs (Scatter Gather Entries). 58 * But each SGT effectively can host only 3 SGEs since the last SGE entry 59 * is used to hold a link to the next SGT in the chain. However the last 60 * SGT in the chain can host all the 4 entries since it does not need to 61 * link any more. 62 */ 63 #define SGE_LENGTH(x) (3*(x)+1) 64 #define SI_DEFAULT_SGL_LENGTH SGE_LENGTH(SI_DEFAULT_SGT_TABLES_PER_PRB) 65 66 /* Argument to be used for calls to timeout() */ 67 typedef struct si_event_arg { 68 void *siea_ctlp; 69 void *siea_portp; 70 int siea_port; 71 } si_event_arg_t; 72 73 typedef struct si_portmult_state { 74 int sipm_num_ports; 75 uint8_t sipm_port_type[15]; 76 /* one of PORT_TYPE_[NODEV | MULTIPLIER | ATAPI | DISK | UNKNOWN] */ 77 78 /* 79 * sipm_port_type[] is good enough to capture the state of ports 80 * behind the multiplier. Since any of the port behind a multiplier 81 * is accessed through the same main controller port, we don't need 82 * additional si_port_state_t here. 83 */ 84 85 } si_portmult_state_t; 86 87 88 /* The following are for port types */ 89 #define PORT_TYPE_NODEV 0x0 90 #define PORT_TYPE_MULTIPLIER 0x1 91 #define PORT_TYPE_ATAPI 0x2 92 #define PORT_TYPE_DISK 0x3 93 #define PORT_TYPE_UNKNOWN 0x4 94 95 /* The following are for active state */ 96 #define PORT_INACTIVE 0x0 97 #define PORT_ACTIVE 0x1 98 99 typedef struct si_port_state { 100 uint8_t siport_port_type; 101 /* one of PORT_TYPE_[NODEV | MULTIPLIER | ATAPI | DISK | UNKNOWN] */ 102 103 uint8_t siport_active; /* one of ACTIVE or INACTIVE */ 104 105 si_portmult_state_t siport_portmult_state; 106 107 si_prb_t *siport_prbpool; /* These are 31 incore PRBs */ 108 uint64_t siport_prbpool_physaddr; 109 ddi_dma_handle_t siport_prbpool_dma_handle; 110 ddi_acc_handle_t siport_prbpool_acc_handle; 111 112 113 si_sgblock_t *siport_sgbpool; /* These are 31 incore sg blocks */ 114 uint64_t siport_sgbpool_physaddr; 115 ddi_dma_handle_t siport_sgbpool_dma_handle; 116 ddi_acc_handle_t siport_sgbpool_acc_handle; 117 118 kmutex_t siport_mutex; /* main per port mutex */ 119 uint32_t siport_pending_tags; /* remembers the pending tags */ 120 sata_pkt_t *siport_slot_pkts[SI_NUM_SLOTS]; 121 122 /* 123 * While the reset is in progress, we don't accept any more commands 124 * until we receive the command with SATA_CLEAR_DEV_RESET_STATE flag. 125 * However any commands with SATA_IGNORE_DEV_RESET_STATE are allowed in 126 * during such blockage. 127 */ 128 int siport_reset_in_progress; 129 130 /* Argument to be used for calls to timeout() */ 131 si_event_arg_t *siport_event_args; 132 133 /* 134 * We mop the commands for either abort, reset, timeout or 135 * error handling cases. This counts how many mops are in progress. 136 * It is also used to return BUSY in tran_start if a mop is going on. 137 */ 138 int mopping_in_progress; 139 140 /* error recovery related info */ 141 uint32_t siport_err_tags_SDBERROR; 142 uint32_t siport_err_tags_nonSDBERROR; 143 int siport_pending_ncq_count; 144 145 } si_port_state_t; 146 147 /* Warlock annotation */ 148 _NOTE(MUTEX_PROTECTS_DATA(si_port_state_t::siport_mutex, si_port_state_t)) 149 _NOTE(READ_ONLY_DATA(si_port_state_t::siport_prbpool_dma_handle)) 150 _NOTE(READ_ONLY_DATA(si_port_state_t::siport_sgbpool_dma_handle)) 151 152 153 typedef struct si_ctl_state { 154 155 dev_info_t *sictl_devinfop; 156 157 int sictl_num_ports; /* number of controller ports */ 158 si_port_state_t *sictl_ports[SI_MAX_PORTS]; 159 160 int sictl_devid; /* whether it is 3124 or 3132 */ 161 int sictl_flags; /* some important state of controller */ 162 int sictl_power_level; 163 164 /* pci config space handle */ 165 ddi_acc_handle_t sictl_pci_conf_handle; 166 167 /* mapping into bar 0 */ 168 ddi_acc_handle_t sictl_global_acc_handle; 169 uintptr_t sictl_global_addr; 170 171 /* mapping into bar 1 */ 172 ddi_acc_handle_t sictl_port_acc_handle; 173 uintptr_t sictl_port_addr; 174 175 struct sata_hba_tran *sictl_sata_hba_tran; 176 timeout_id_t sictl_timeout_id; 177 178 kmutex_t sictl_mutex; /* per controller mutex */ 179 180 ddi_intr_handle_t *sictl_htable; /* For array of interrupts */ 181 int sictl_intr_type; /* What type of interrupt */ 182 int sictl_intr_cnt; /* # of intrs count returned */ 183 size_t sictl_intr_size; /* Size of intr array */ 184 uint_t sictl_intr_pri; /* Interrupt priority */ 185 int sictl_intr_cap; /* Interrupt capabilities */ 186 int fm_capabilities; /* FMA capabilities */ 187 188 } si_ctl_state_t; 189 190 /* Warlock annotation */ 191 _NOTE(MUTEX_PROTECTS_DATA(si_ctl_state_t::sictl_mutex, 192 si_ctl_state_t::sictl_ports)) 193 _NOTE(MUTEX_PROTECTS_DATA(si_ctl_state_t::sictl_mutex, 194 si_ctl_state_t::sictl_power_level)) 195 _NOTE(MUTEX_PROTECTS_DATA(si_ctl_state_t::sictl_mutex, 196 si_ctl_state_t::sictl_flags)) 197 _NOTE(MUTEX_PROTECTS_DATA(si_ctl_state_t::sictl_mutex, 198 si_ctl_state_t::sictl_timeout_id)) 199 /* 200 * flags for si_flags 201 */ 202 #define SI_PM 0x01 203 #define SI_ATTACH 0x02 204 #define SI_DETACH 0x04 205 #define SI_NO_TIMEOUTS 0x08 206 #define SI_FRAMEWORK_ATTACHED 0x10 /* are we attached to framework ? */ 207 208 /* progress values for si_attach */ 209 #define ATTACH_PROGRESS_NONE (1<<0) 210 #define ATTACH_PROGRESS_STATEP_ALLOC (1<<1) 211 #define ATTACH_PROGRESS_INIT_FMA (1<<2) 212 #define ATTACH_PROGRESS_CONF_HANDLE (1<<3) 213 #define ATTACH_PROGRESS_BAR0_MAP (1<<4) 214 #define ATTACH_PROGRESS_BAR1_MAP (1<<5) 215 #define ATTACH_PROGRESS_INTR_ADDED (1<<6) 216 #define ATTACH_PROGRESS_MUTEX_INIT (1<<7) 217 #define ATTACH_PROGRESS_HW_INIT (1<<8) 218 219 #define SI_10MS_TICKS (drv_usectohz(10000)) /* ticks in 10 millisec */ 220 #define SI_1MS_TICKS (drv_usectohz(1000)) /* ticks in 1 millisec */ 221 #define SI_1MS_USECS (1000) /* usecs in 1 millisec */ 222 #define SI_POLLRATE_SOFT_RESET 1000 223 #define SI_POLLRATE_SSTATUS 10 224 #define SI_POLLRATE_PORTREADY 50 225 #define SI_POLLRATE_SLOTSTATUS 50 226 #define SI_POLLRATE_RECOVERPORTMULT 1000 227 228 #define PORTMULT_CONTROL_PORT 0xf 229 230 /* clearing & setting the n'th bit in a given tag */ 231 #define CLEAR_BIT(tag, bit) (tag &= ~(0x1<<bit)) 232 #define SET_BIT(tag, bit) (tag |= (0x1<<bit)) 233 234 #if DEBUG 235 236 #define SI_DEBUG 1 237 238 #define SIDBG_TEST 0x0001 239 #define SIDBG_INIT 0x0002 240 #define SIDBG_ENTRY 0x0004 241 #define SIDBG_DUMP_PRB 0x0008 242 #define SIDBG_EVENT 0x0010 243 #define SIDBG_POLL_LOOP 0x0020 244 #define SIDBG_PKTCOMP 0x0040 245 #define SIDBG_TIMEOUT 0x0080 246 #define SIDBG_INFO 0x0100 247 #define SIDBG_VERBOSE 0x0200 248 #define SIDBG_INTR 0x0400 249 #define SIDBG_ERRS 0x0800 250 #define SIDBG_COOKIES 0x1000 251 #define SIDBG_POWER 0x2000 252 253 extern uint32_t si_debug_flags; 254 255 #define SIDBG0(flag, softp, format) \ 256 if (si_debug_flags & (flag)) { \ 257 si_log(softp, CE_WARN, format); \ 258 } 259 260 #define SIDBG1(flag, softp, format, arg1) \ 261 if (si_debug_flags & (flag)) { \ 262 si_log(softp, CE_WARN, format, arg1); \ 263 } 264 265 #define SIDBG2(flag, softp, format, arg1, arg2) \ 266 if (si_debug_flags & (flag)) { \ 267 si_log(softp, CE_WARN, format, arg1, arg2); \ 268 } 269 270 #define SIDBG3(flag, softp, format, arg1, arg2, arg3) \ 271 if (si_debug_flags & (flag)) { \ 272 si_log(softp, CE_WARN, format, arg1, arg2, arg3); \ 273 } 274 275 #define SIDBG4(flag, softp, format, arg1, arg2, arg3, arg4) \ 276 if (si_debug_flags & (flag)) { \ 277 si_log(softp, CE_WARN, format, arg1, arg2, arg3, arg4); \ 278 } 279 #else 280 281 #define SIDBG0(flag, dip, frmt) 282 #define SIDBG1(flag, dip, frmt, arg1) 283 #define SIDBG2(flag, dip, frmt, arg1, arg2) 284 #define SIDBG3(flag, dip, frmt, arg1, arg2, arg3) 285 #define SIDBG4(flag, dip, frmt, arg1, arg2, arg3, arg4) 286 287 #endif /* DEBUG */ 288 289 /* Flags controlling the reset behavior */ 290 #define SI_PORT_RESET 0x1 /* Reset the port */ 291 #define SI_DEVICE_RESET 0x2 /* Reset the device, not the port */ 292 #define SI_RESET_NO_EVENTS_UP 0x4 /* Don't send reset events up */ 293 294 #ifdef __cplusplus 295 } 296 #endif 297 298 #endif /* _SI3124VAR_H */ 299