1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2010 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 /* 27 * x86 root nexus driver 28 */ 29 30 #include <sys/sysmacros.h> 31 #include <sys/conf.h> 32 #include <sys/autoconf.h> 33 #include <sys/sysmacros.h> 34 #include <sys/debug.h> 35 #include <sys/psw.h> 36 #include <sys/ddidmareq.h> 37 #include <sys/promif.h> 38 #include <sys/devops.h> 39 #include <sys/kmem.h> 40 #include <sys/cmn_err.h> 41 #include <vm/seg.h> 42 #include <vm/seg_kmem.h> 43 #include <vm/seg_dev.h> 44 #include <sys/vmem.h> 45 #include <sys/mman.h> 46 #include <vm/hat.h> 47 #include <vm/as.h> 48 #include <vm/page.h> 49 #include <sys/avintr.h> 50 #include <sys/errno.h> 51 #include <sys/modctl.h> 52 #include <sys/ddi_impldefs.h> 53 #include <sys/sunddi.h> 54 #include <sys/sunndi.h> 55 #include <sys/mach_intr.h> 56 #include <sys/psm.h> 57 #include <sys/ontrap.h> 58 #include <sys/atomic.h> 59 #include <sys/sdt.h> 60 #include <sys/rootnex.h> 61 #include <vm/hat_i86.h> 62 #include <sys/ddifm.h> 63 #include <sys/ddi_isa.h> 64 65 #ifdef __xpv 66 #include <sys/bootinfo.h> 67 #include <sys/hypervisor.h> 68 #include <sys/bootconf.h> 69 #include <vm/kboot_mmu.h> 70 #else 71 #include <sys/intel_iommu.h> 72 #endif 73 74 75 /* 76 * enable/disable extra checking of function parameters. Useful for debugging 77 * drivers. 78 */ 79 #ifdef DEBUG 80 int rootnex_alloc_check_parms = 1; 81 int rootnex_bind_check_parms = 1; 82 int rootnex_bind_check_inuse = 1; 83 int rootnex_unbind_verify_buffer = 0; 84 int rootnex_sync_check_parms = 1; 85 #else 86 int rootnex_alloc_check_parms = 0; 87 int rootnex_bind_check_parms = 0; 88 int rootnex_bind_check_inuse = 0; 89 int rootnex_unbind_verify_buffer = 0; 90 int rootnex_sync_check_parms = 0; 91 #endif 92 93 /* Master Abort and Target Abort panic flag */ 94 int rootnex_fm_ma_ta_panic_flag = 0; 95 96 /* Semi-temporary patchables to phase in bug fixes, test drivers, etc. */ 97 int rootnex_bind_fail = 1; 98 int rootnex_bind_warn = 1; 99 uint8_t *rootnex_warn_list; 100 /* bitmasks for rootnex_warn_list. Up to 8 different warnings with uint8_t */ 101 #define ROOTNEX_BIND_WARNING (0x1 << 0) 102 103 /* 104 * revert back to old broken behavior of always sync'ing entire copy buffer. 105 * This is useful if be have a buggy driver which doesn't correctly pass in 106 * the offset and size into ddi_dma_sync(). 107 */ 108 int rootnex_sync_ignore_params = 0; 109 110 /* 111 * For the 64-bit kernel, pre-alloc enough cookies for a 256K buffer plus 1 112 * page for alignment. For the 32-bit kernel, pre-alloc enough cookies for a 113 * 64K buffer plus 1 page for alignment (we have less kernel space in a 32-bit 114 * kernel). Allocate enough windows to handle a 256K buffer w/ at least 65 115 * sgllen DMA engine, and enough copybuf buffer state pages to handle 2 pages 116 * (< 8K). We will still need to allocate the copy buffer during bind though 117 * (if we need one). These can only be modified in /etc/system before rootnex 118 * attach. 119 */ 120 #if defined(__amd64) 121 int rootnex_prealloc_cookies = 65; 122 int rootnex_prealloc_windows = 4; 123 int rootnex_prealloc_copybuf = 2; 124 #else 125 int rootnex_prealloc_cookies = 33; 126 int rootnex_prealloc_windows = 4; 127 int rootnex_prealloc_copybuf = 2; 128 #endif 129 130 /* driver global state */ 131 static rootnex_state_t *rootnex_state; 132 133 /* shortcut to rootnex counters */ 134 static uint64_t *rootnex_cnt; 135 136 /* 137 * XXX - does x86 even need these or are they left over from the SPARC days? 138 */ 139 /* statically defined integer/boolean properties for the root node */ 140 static rootnex_intprop_t rootnex_intprp[] = { 141 { "PAGESIZE", PAGESIZE }, 142 { "MMU_PAGESIZE", MMU_PAGESIZE }, 143 { "MMU_PAGEOFFSET", MMU_PAGEOFFSET }, 144 { DDI_RELATIVE_ADDRESSING, 1 }, 145 }; 146 #define NROOT_INTPROPS (sizeof (rootnex_intprp) / sizeof (rootnex_intprop_t)) 147 148 #ifdef __xpv 149 typedef maddr_t rootnex_addr_t; 150 #define ROOTNEX_PADDR_TO_RBASE(xinfo, pa) \ 151 (DOMAIN_IS_INITDOMAIN(xinfo) ? pa_to_ma(pa) : (pa)) 152 #else 153 typedef paddr_t rootnex_addr_t; 154 #endif 155 156 #if !defined(__xpv) 157 char _depends_on[] = "mach/pcplusmp misc/iommulib misc/acpica"; 158 #endif 159 160 static struct cb_ops rootnex_cb_ops = { 161 nodev, /* open */ 162 nodev, /* close */ 163 nodev, /* strategy */ 164 nodev, /* print */ 165 nodev, /* dump */ 166 nodev, /* read */ 167 nodev, /* write */ 168 nodev, /* ioctl */ 169 nodev, /* devmap */ 170 nodev, /* mmap */ 171 nodev, /* segmap */ 172 nochpoll, /* chpoll */ 173 ddi_prop_op, /* cb_prop_op */ 174 NULL, /* struct streamtab */ 175 D_NEW | D_MP | D_HOTPLUG, /* compatibility flags */ 176 CB_REV, /* Rev */ 177 nodev, /* cb_aread */ 178 nodev /* cb_awrite */ 179 }; 180 181 static int rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, 182 off_t offset, off_t len, caddr_t *vaddrp); 183 static int rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, 184 struct hat *hat, struct seg *seg, caddr_t addr, 185 struct devpage *dp, pfn_t pfn, uint_t prot, uint_t lock); 186 static int rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 187 struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep); 188 static int rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, 189 ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 190 ddi_dma_handle_t *handlep); 191 static int rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, 192 ddi_dma_handle_t handle); 193 static int rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 194 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 195 ddi_dma_cookie_t *cookiep, uint_t *ccountp); 196 static int rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 197 ddi_dma_handle_t handle); 198 static int rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, 199 ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 200 static int rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, 201 ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 202 ddi_dma_cookie_t *cookiep, uint_t *ccountp); 203 static int rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, 204 ddi_dma_handle_t handle, enum ddi_dma_ctlops request, 205 off_t *offp, size_t *lenp, caddr_t *objp, uint_t cache_flags); 206 static int rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, 207 ddi_ctl_enum_t ctlop, void *arg, void *result); 208 static int rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 209 ddi_iblock_cookie_t *ibc); 210 static int rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, 211 ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); 212 213 static int rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip, 214 ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 215 ddi_dma_handle_t *handlep); 216 static int rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip, 217 ddi_dma_handle_t handle); 218 static int rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 219 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 220 ddi_dma_cookie_t *cookiep, uint_t *ccountp); 221 static int rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 222 ddi_dma_handle_t handle); 223 #if !defined(__xpv) 224 static void rootnex_coredma_reset_cookies(dev_info_t *dip, 225 ddi_dma_handle_t handle); 226 static int rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 227 ddi_dma_cookie_t **cookiepp, uint_t *ccountp); 228 static int rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 229 ddi_dma_cookie_t *cookiep, uint_t ccount); 230 static int rootnex_coredma_clear_cookies(dev_info_t *dip, 231 ddi_dma_handle_t handle); 232 static int rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle); 233 #endif 234 static int rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, 235 ddi_dma_handle_t handle, off_t off, size_t len, uint_t cache_flags); 236 static int rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, 237 ddi_dma_handle_t handle, uint_t win, off_t *offp, size_t *lenp, 238 ddi_dma_cookie_t *cookiep, uint_t *ccountp); 239 240 static struct bus_ops rootnex_bus_ops = { 241 BUSO_REV, 242 rootnex_map, 243 NULL, 244 NULL, 245 NULL, 246 rootnex_map_fault, 247 rootnex_dma_map, 248 rootnex_dma_allochdl, 249 rootnex_dma_freehdl, 250 rootnex_dma_bindhdl, 251 rootnex_dma_unbindhdl, 252 rootnex_dma_sync, 253 rootnex_dma_win, 254 rootnex_dma_mctl, 255 rootnex_ctlops, 256 ddi_bus_prop_op, 257 i_ddi_rootnex_get_eventcookie, 258 i_ddi_rootnex_add_eventcall, 259 i_ddi_rootnex_remove_eventcall, 260 i_ddi_rootnex_post_event, 261 0, /* bus_intr_ctl */ 262 0, /* bus_config */ 263 0, /* bus_unconfig */ 264 rootnex_fm_init, /* bus_fm_init */ 265 NULL, /* bus_fm_fini */ 266 NULL, /* bus_fm_access_enter */ 267 NULL, /* bus_fm_access_exit */ 268 NULL, /* bus_powr */ 269 rootnex_intr_ops /* bus_intr_op */ 270 }; 271 272 static int rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd); 273 static int rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd); 274 275 static struct dev_ops rootnex_ops = { 276 DEVO_REV, 277 0, 278 ddi_no_info, 279 nulldev, 280 nulldev, 281 rootnex_attach, 282 rootnex_detach, 283 nulldev, 284 &rootnex_cb_ops, 285 &rootnex_bus_ops, 286 NULL, 287 ddi_quiesce_not_needed, /* quiesce */ 288 }; 289 290 static struct modldrv rootnex_modldrv = { 291 &mod_driverops, 292 "i86pc root nexus", 293 &rootnex_ops 294 }; 295 296 static struct modlinkage rootnex_modlinkage = { 297 MODREV_1, 298 (void *)&rootnex_modldrv, 299 NULL 300 }; 301 302 #if !defined(__xpv) 303 static iommulib_nexops_t iommulib_nexops = { 304 IOMMU_NEXOPS_VERSION, 305 "Rootnex IOMMU ops Vers 1.1", 306 NULL, 307 rootnex_coredma_allochdl, 308 rootnex_coredma_freehdl, 309 rootnex_coredma_bindhdl, 310 rootnex_coredma_unbindhdl, 311 rootnex_coredma_reset_cookies, 312 rootnex_coredma_get_cookies, 313 rootnex_coredma_set_cookies, 314 rootnex_coredma_clear_cookies, 315 rootnex_coredma_get_sleep_flags, 316 rootnex_coredma_sync, 317 rootnex_coredma_win, 318 rootnex_dma_map, 319 rootnex_dma_mctl 320 }; 321 #endif 322 323 /* 324 * extern hacks 325 */ 326 extern struct seg_ops segdev_ops; 327 extern int ignore_hardware_nodes; /* force flag from ddi_impl.c */ 328 #ifdef DDI_MAP_DEBUG 329 extern int ddi_map_debug_flag; 330 #define ddi_map_debug if (ddi_map_debug_flag) prom_printf 331 #endif 332 extern void i86_pp_map(page_t *pp, caddr_t kaddr); 333 extern void i86_va_map(caddr_t vaddr, struct as *asp, caddr_t kaddr); 334 extern int (*psm_intr_ops)(dev_info_t *, ddi_intr_handle_impl_t *, 335 psm_intr_op_t, int *); 336 extern int impl_ddi_sunbus_initchild(dev_info_t *dip); 337 extern void impl_ddi_sunbus_removechild(dev_info_t *dip); 338 339 /* 340 * Use device arena to use for device control register mappings. 341 * Various kernel memory walkers (debugger, dtrace) need to know 342 * to avoid this address range to prevent undesired device activity. 343 */ 344 extern void *device_arena_alloc(size_t size, int vm_flag); 345 extern void device_arena_free(void * vaddr, size_t size); 346 347 348 /* 349 * Internal functions 350 */ 351 static int rootnex_dma_init(); 352 static void rootnex_add_props(dev_info_t *); 353 static int rootnex_ctl_reportdev(dev_info_t *dip); 354 static struct intrspec *rootnex_get_ispec(dev_info_t *rdip, int inum); 355 static int rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 356 static int rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp); 357 static int rootnex_map_handle(ddi_map_req_t *mp); 358 static void rootnex_clean_dmahdl(ddi_dma_impl_t *hp); 359 static int rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegsize); 360 static int rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, 361 ddi_dma_attr_t *attr); 362 static void rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 363 rootnex_sglinfo_t *sglinfo); 364 static int rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 365 rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag); 366 static int rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 367 rootnex_dma_t *dma, ddi_dma_attr_t *attr); 368 static void rootnex_teardown_copybuf(rootnex_dma_t *dma); 369 static int rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 370 ddi_dma_attr_t *attr, int kmflag); 371 static void rootnex_teardown_windows(rootnex_dma_t *dma); 372 static void rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 373 rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset); 374 static void rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, 375 rootnex_dma_t *dma, ddi_dma_cookie_t *cookie, off_t cur_offset, 376 size_t *copybuf_used, page_t **cur_pp); 377 static int rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, 378 rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, 379 ddi_dma_attr_t *attr, off_t cur_offset); 380 static int rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, 381 rootnex_dma_t *dma, rootnex_window_t **windowp, 382 ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used); 383 static int rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, 384 rootnex_dma_t *dma, rootnex_window_t **windowp, ddi_dma_cookie_t *cookie); 385 static int rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 386 off_t offset, size_t size, uint_t cache_flags); 387 static int rootnex_verify_buffer(rootnex_dma_t *dma); 388 static int rootnex_dma_check(dev_info_t *dip, const void *handle, 389 const void *comp_addr, const void *not_used); 390 391 /* 392 * _init() 393 * 394 */ 395 int 396 _init(void) 397 { 398 399 rootnex_state = NULL; 400 return (mod_install(&rootnex_modlinkage)); 401 } 402 403 404 /* 405 * _info() 406 * 407 */ 408 int 409 _info(struct modinfo *modinfop) 410 { 411 return (mod_info(&rootnex_modlinkage, modinfop)); 412 } 413 414 415 /* 416 * _fini() 417 * 418 */ 419 int 420 _fini(void) 421 { 422 return (EBUSY); 423 } 424 425 426 /* 427 * rootnex_attach() 428 * 429 */ 430 static int 431 rootnex_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) 432 { 433 int fmcap; 434 int e; 435 436 switch (cmd) { 437 case DDI_ATTACH: 438 break; 439 case DDI_RESUME: 440 return (DDI_SUCCESS); 441 default: 442 return (DDI_FAILURE); 443 } 444 445 /* 446 * We should only have one instance of rootnex. Save it away since we 447 * don't have an easy way to get it back later. 448 */ 449 ASSERT(rootnex_state == NULL); 450 rootnex_state = kmem_zalloc(sizeof (rootnex_state_t), KM_SLEEP); 451 452 rootnex_state->r_dip = dip; 453 rootnex_state->r_err_ibc = (ddi_iblock_cookie_t)ipltospl(15); 454 rootnex_state->r_reserved_msg_printed = B_FALSE; 455 rootnex_cnt = &rootnex_state->r_counters[0]; 456 rootnex_state->r_intel_iommu_enabled = B_FALSE; 457 458 /* 459 * Set minimum fm capability level for i86pc platforms and then 460 * initialize error handling. Since we're the rootnex, we don't 461 * care what's returned in the fmcap field. 462 */ 463 ddi_system_fmcap = DDI_FM_EREPORT_CAPABLE | DDI_FM_ERRCB_CAPABLE | 464 DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE; 465 fmcap = ddi_system_fmcap; 466 ddi_fm_init(dip, &fmcap, &rootnex_state->r_err_ibc); 467 468 /* initialize DMA related state */ 469 e = rootnex_dma_init(); 470 if (e != DDI_SUCCESS) { 471 kmem_free(rootnex_state, sizeof (rootnex_state_t)); 472 return (DDI_FAILURE); 473 } 474 475 /* Add static root node properties */ 476 rootnex_add_props(dip); 477 478 /* since we can't call ddi_report_dev() */ 479 cmn_err(CE_CONT, "?root nexus = %s\n", ddi_get_name(dip)); 480 481 /* Initialize rootnex event handle */ 482 i_ddi_rootnex_init_events(dip); 483 484 #if !defined(__xpv) 485 #if defined(__amd64) 486 /* probe intel iommu */ 487 intel_iommu_probe_and_parse(); 488 489 /* attach the iommu nodes */ 490 if (intel_iommu_support) { 491 if (intel_iommu_attach_dmar_nodes() == DDI_SUCCESS) { 492 rootnex_state->r_intel_iommu_enabled = B_TRUE; 493 } else { 494 intel_iommu_release_dmar_info(); 495 } 496 } 497 #endif 498 499 e = iommulib_nexus_register(dip, &iommulib_nexops, 500 &rootnex_state->r_iommulib_handle); 501 502 ASSERT(e == DDI_SUCCESS); 503 #endif 504 505 return (DDI_SUCCESS); 506 } 507 508 509 /* 510 * rootnex_detach() 511 * 512 */ 513 /*ARGSUSED*/ 514 static int 515 rootnex_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) 516 { 517 switch (cmd) { 518 case DDI_SUSPEND: 519 break; 520 default: 521 return (DDI_FAILURE); 522 } 523 524 return (DDI_SUCCESS); 525 } 526 527 528 /* 529 * rootnex_dma_init() 530 * 531 */ 532 /*ARGSUSED*/ 533 static int 534 rootnex_dma_init() 535 { 536 size_t bufsize; 537 538 539 /* 540 * size of our cookie/window/copybuf state needed in dma bind that we 541 * pre-alloc in dma_alloc_handle 542 */ 543 rootnex_state->r_prealloc_cookies = rootnex_prealloc_cookies; 544 rootnex_state->r_prealloc_size = 545 (rootnex_state->r_prealloc_cookies * sizeof (ddi_dma_cookie_t)) + 546 (rootnex_prealloc_windows * sizeof (rootnex_window_t)) + 547 (rootnex_prealloc_copybuf * sizeof (rootnex_pgmap_t)); 548 549 /* 550 * setup DDI DMA handle kmem cache, align each handle on 64 bytes, 551 * allocate 16 extra bytes for struct pointer alignment 552 * (p->dmai_private & dma->dp_prealloc_buffer) 553 */ 554 bufsize = sizeof (ddi_dma_impl_t) + sizeof (rootnex_dma_t) + 555 rootnex_state->r_prealloc_size + 0x10; 556 rootnex_state->r_dmahdl_cache = kmem_cache_create("rootnex_dmahdl", 557 bufsize, 64, NULL, NULL, NULL, NULL, NULL, 0); 558 if (rootnex_state->r_dmahdl_cache == NULL) { 559 return (DDI_FAILURE); 560 } 561 562 /* 563 * allocate array to track which major numbers we have printed warnings 564 * for. 565 */ 566 rootnex_warn_list = kmem_zalloc(devcnt * sizeof (*rootnex_warn_list), 567 KM_SLEEP); 568 569 return (DDI_SUCCESS); 570 } 571 572 573 /* 574 * rootnex_add_props() 575 * 576 */ 577 static void 578 rootnex_add_props(dev_info_t *dip) 579 { 580 rootnex_intprop_t *rpp; 581 int i; 582 583 /* Add static integer/boolean properties to the root node */ 584 rpp = rootnex_intprp; 585 for (i = 0; i < NROOT_INTPROPS; i++) { 586 (void) e_ddi_prop_update_int(DDI_DEV_T_NONE, dip, 587 rpp[i].prop_name, rpp[i].prop_value); 588 } 589 } 590 591 592 593 /* 594 * ************************* 595 * ctlops related routines 596 * ************************* 597 */ 598 599 /* 600 * rootnex_ctlops() 601 * 602 */ 603 /*ARGSUSED*/ 604 static int 605 rootnex_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop, 606 void *arg, void *result) 607 { 608 int n, *ptr; 609 struct ddi_parent_private_data *pdp; 610 611 switch (ctlop) { 612 case DDI_CTLOPS_DMAPMAPC: 613 /* 614 * Return 'partial' to indicate that dma mapping 615 * has to be done in the main MMU. 616 */ 617 return (DDI_DMA_PARTIAL); 618 619 case DDI_CTLOPS_BTOP: 620 /* 621 * Convert byte count input to physical page units. 622 * (byte counts that are not a page-size multiple 623 * are rounded down) 624 */ 625 *(ulong_t *)result = btop(*(ulong_t *)arg); 626 return (DDI_SUCCESS); 627 628 case DDI_CTLOPS_PTOB: 629 /* 630 * Convert size in physical pages to bytes 631 */ 632 *(ulong_t *)result = ptob(*(ulong_t *)arg); 633 return (DDI_SUCCESS); 634 635 case DDI_CTLOPS_BTOPR: 636 /* 637 * Convert byte count input to physical page units 638 * (byte counts that are not a page-size multiple 639 * are rounded up) 640 */ 641 *(ulong_t *)result = btopr(*(ulong_t *)arg); 642 return (DDI_SUCCESS); 643 644 case DDI_CTLOPS_INITCHILD: 645 return (impl_ddi_sunbus_initchild(arg)); 646 647 case DDI_CTLOPS_UNINITCHILD: 648 impl_ddi_sunbus_removechild(arg); 649 return (DDI_SUCCESS); 650 651 case DDI_CTLOPS_REPORTDEV: 652 return (rootnex_ctl_reportdev(rdip)); 653 654 case DDI_CTLOPS_IOMIN: 655 /* 656 * Nothing to do here but reflect back.. 657 */ 658 return (DDI_SUCCESS); 659 660 case DDI_CTLOPS_REGSIZE: 661 case DDI_CTLOPS_NREGS: 662 break; 663 664 case DDI_CTLOPS_SIDDEV: 665 if (ndi_dev_is_prom_node(rdip)) 666 return (DDI_SUCCESS); 667 if (ndi_dev_is_persistent_node(rdip)) 668 return (DDI_SUCCESS); 669 return (DDI_FAILURE); 670 671 case DDI_CTLOPS_POWER: 672 return ((*pm_platform_power)((power_req_t *)arg)); 673 674 case DDI_CTLOPS_RESERVED0: /* Was DDI_CTLOPS_NINTRS, obsolete */ 675 case DDI_CTLOPS_RESERVED1: /* Was DDI_CTLOPS_POKE_INIT, obsolete */ 676 case DDI_CTLOPS_RESERVED2: /* Was DDI_CTLOPS_POKE_FLUSH, obsolete */ 677 case DDI_CTLOPS_RESERVED3: /* Was DDI_CTLOPS_POKE_FINI, obsolete */ 678 case DDI_CTLOPS_RESERVED4: /* Was DDI_CTLOPS_INTR_HILEVEL, obsolete */ 679 case DDI_CTLOPS_RESERVED5: /* Was DDI_CTLOPS_XLATE_INTRS, obsolete */ 680 if (!rootnex_state->r_reserved_msg_printed) { 681 rootnex_state->r_reserved_msg_printed = B_TRUE; 682 cmn_err(CE_WARN, "Failing ddi_ctlops call(s) for " 683 "1 or more reserved/obsolete operations."); 684 } 685 return (DDI_FAILURE); 686 687 default: 688 return (DDI_FAILURE); 689 } 690 /* 691 * The rest are for "hardware" properties 692 */ 693 if ((pdp = ddi_get_parent_data(rdip)) == NULL) 694 return (DDI_FAILURE); 695 696 if (ctlop == DDI_CTLOPS_NREGS) { 697 ptr = (int *)result; 698 *ptr = pdp->par_nreg; 699 } else { 700 off_t *size = (off_t *)result; 701 702 ptr = (int *)arg; 703 n = *ptr; 704 if (n >= pdp->par_nreg) { 705 return (DDI_FAILURE); 706 } 707 *size = (off_t)pdp->par_reg[n].regspec_size; 708 } 709 return (DDI_SUCCESS); 710 } 711 712 713 /* 714 * rootnex_ctl_reportdev() 715 * 716 */ 717 static int 718 rootnex_ctl_reportdev(dev_info_t *dev) 719 { 720 int i, n, len, f_len = 0; 721 char *buf; 722 723 buf = kmem_alloc(REPORTDEV_BUFSIZE, KM_SLEEP); 724 f_len += snprintf(buf, REPORTDEV_BUFSIZE, 725 "%s%d at root", ddi_driver_name(dev), ddi_get_instance(dev)); 726 len = strlen(buf); 727 728 for (i = 0; i < sparc_pd_getnreg(dev); i++) { 729 730 struct regspec *rp = sparc_pd_getreg(dev, i); 731 732 if (i == 0) 733 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 734 ": "); 735 else 736 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 737 " and "); 738 len = strlen(buf); 739 740 switch (rp->regspec_bustype) { 741 742 case BTEISA: 743 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 744 "%s 0x%x", DEVI_EISA_NEXNAME, rp->regspec_addr); 745 break; 746 747 case BTISA: 748 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 749 "%s 0x%x", DEVI_ISA_NEXNAME, rp->regspec_addr); 750 break; 751 752 default: 753 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 754 "space %x offset %x", 755 rp->regspec_bustype, rp->regspec_addr); 756 break; 757 } 758 len = strlen(buf); 759 } 760 for (i = 0, n = sparc_pd_getnintr(dev); i < n; i++) { 761 int pri; 762 763 if (i != 0) { 764 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 765 ","); 766 len = strlen(buf); 767 } 768 pri = INT_IPL(sparc_pd_getintr(dev, i)->intrspec_pri); 769 f_len += snprintf(buf + len, REPORTDEV_BUFSIZE - len, 770 " sparc ipl %d", pri); 771 len = strlen(buf); 772 } 773 #ifdef DEBUG 774 if (f_len + 1 >= REPORTDEV_BUFSIZE) { 775 cmn_err(CE_NOTE, "next message is truncated: " 776 "printed length 1024, real length %d", f_len); 777 } 778 #endif /* DEBUG */ 779 cmn_err(CE_CONT, "?%s\n", buf); 780 kmem_free(buf, REPORTDEV_BUFSIZE); 781 return (DDI_SUCCESS); 782 } 783 784 785 /* 786 * ****************** 787 * map related code 788 * ****************** 789 */ 790 791 /* 792 * rootnex_map() 793 * 794 */ 795 static int 796 rootnex_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, off_t offset, 797 off_t len, caddr_t *vaddrp) 798 { 799 struct regspec *rp, tmp_reg; 800 ddi_map_req_t mr = *mp; /* Get private copy of request */ 801 int error; 802 803 mp = &mr; 804 805 switch (mp->map_op) { 806 case DDI_MO_MAP_LOCKED: 807 case DDI_MO_UNMAP: 808 case DDI_MO_MAP_HANDLE: 809 break; 810 default: 811 #ifdef DDI_MAP_DEBUG 812 cmn_err(CE_WARN, "rootnex_map: unimplemented map op %d.", 813 mp->map_op); 814 #endif /* DDI_MAP_DEBUG */ 815 return (DDI_ME_UNIMPLEMENTED); 816 } 817 818 if (mp->map_flags & DDI_MF_USER_MAPPING) { 819 #ifdef DDI_MAP_DEBUG 820 cmn_err(CE_WARN, "rootnex_map: unimplemented map type: user."); 821 #endif /* DDI_MAP_DEBUG */ 822 return (DDI_ME_UNIMPLEMENTED); 823 } 824 825 /* 826 * First, if given an rnumber, convert it to a regspec... 827 * (Presumably, this is on behalf of a child of the root node?) 828 */ 829 830 if (mp->map_type == DDI_MT_RNUMBER) { 831 832 int rnumber = mp->map_obj.rnumber; 833 #ifdef DDI_MAP_DEBUG 834 static char *out_of_range = 835 "rootnex_map: Out of range rnumber <%d>, device <%s>"; 836 #endif /* DDI_MAP_DEBUG */ 837 838 rp = i_ddi_rnumber_to_regspec(rdip, rnumber); 839 if (rp == NULL) { 840 #ifdef DDI_MAP_DEBUG 841 cmn_err(CE_WARN, out_of_range, rnumber, 842 ddi_get_name(rdip)); 843 #endif /* DDI_MAP_DEBUG */ 844 return (DDI_ME_RNUMBER_RANGE); 845 } 846 847 /* 848 * Convert the given ddi_map_req_t from rnumber to regspec... 849 */ 850 851 mp->map_type = DDI_MT_REGSPEC; 852 mp->map_obj.rp = rp; 853 } 854 855 /* 856 * Adjust offset and length correspnding to called values... 857 * XXX: A non-zero length means override the one in the regspec 858 * XXX: (regardless of what's in the parent's range?) 859 */ 860 861 tmp_reg = *(mp->map_obj.rp); /* Preserve underlying data */ 862 rp = mp->map_obj.rp = &tmp_reg; /* Use tmp_reg in request */ 863 864 #ifdef DDI_MAP_DEBUG 865 cmn_err(CE_CONT, "rootnex: <%s,%s> <0x%x, 0x%x, 0x%d> offset %d len %d " 866 "handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 867 rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, offset, 868 len, mp->map_handlep); 869 #endif /* DDI_MAP_DEBUG */ 870 871 /* 872 * I/O or memory mapping: 873 * 874 * <bustype=0, addr=x, len=x>: memory 875 * <bustype=1, addr=x, len=x>: i/o 876 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 877 */ 878 879 if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 880 cmn_err(CE_WARN, "<%s,%s> invalid register spec" 881 " <0x%x, 0x%x, 0x%x>", ddi_get_name(dip), 882 ddi_get_name(rdip), rp->regspec_bustype, 883 rp->regspec_addr, rp->regspec_size); 884 return (DDI_ME_INVAL); 885 } 886 887 if (rp->regspec_bustype > 1 && rp->regspec_addr == 0) { 888 /* 889 * compatibility i/o mapping 890 */ 891 rp->regspec_bustype += (uint_t)offset; 892 } else { 893 /* 894 * Normal memory or i/o mapping 895 */ 896 rp->regspec_addr += (uint_t)offset; 897 } 898 899 if (len != 0) 900 rp->regspec_size = (uint_t)len; 901 902 #ifdef DDI_MAP_DEBUG 903 cmn_err(CE_CONT, " <%s,%s> <0x%x, 0x%x, 0x%d> offset %d " 904 "len %d handle 0x%x\n", ddi_get_name(dip), ddi_get_name(rdip), 905 rp->regspec_bustype, rp->regspec_addr, rp->regspec_size, 906 offset, len, mp->map_handlep); 907 #endif /* DDI_MAP_DEBUG */ 908 909 /* 910 * Apply any parent ranges at this level, if applicable. 911 * (This is where nexus specific regspec translation takes place. 912 * Use of this function is implicit agreement that translation is 913 * provided via ddi_apply_range.) 914 */ 915 916 #ifdef DDI_MAP_DEBUG 917 ddi_map_debug("applying range of parent <%s> to child <%s>...\n", 918 ddi_get_name(dip), ddi_get_name(rdip)); 919 #endif /* DDI_MAP_DEBUG */ 920 921 if ((error = i_ddi_apply_range(dip, rdip, mp->map_obj.rp)) != 0) 922 return (error); 923 924 switch (mp->map_op) { 925 case DDI_MO_MAP_LOCKED: 926 927 /* 928 * Set up the locked down kernel mapping to the regspec... 929 */ 930 931 return (rootnex_map_regspec(mp, vaddrp)); 932 933 case DDI_MO_UNMAP: 934 935 /* 936 * Release mapping... 937 */ 938 939 return (rootnex_unmap_regspec(mp, vaddrp)); 940 941 case DDI_MO_MAP_HANDLE: 942 943 return (rootnex_map_handle(mp)); 944 945 default: 946 return (DDI_ME_UNIMPLEMENTED); 947 } 948 } 949 950 951 /* 952 * rootnex_map_fault() 953 * 954 * fault in mappings for requestors 955 */ 956 /*ARGSUSED*/ 957 static int 958 rootnex_map_fault(dev_info_t *dip, dev_info_t *rdip, struct hat *hat, 959 struct seg *seg, caddr_t addr, struct devpage *dp, pfn_t pfn, uint_t prot, 960 uint_t lock) 961 { 962 963 #ifdef DDI_MAP_DEBUG 964 ddi_map_debug("rootnex_map_fault: address <%x> pfn <%x>", addr, pfn); 965 ddi_map_debug(" Seg <%s>\n", 966 seg->s_ops == &segdev_ops ? "segdev" : 967 seg == &kvseg ? "segkmem" : "NONE!"); 968 #endif /* DDI_MAP_DEBUG */ 969 970 /* 971 * This is all terribly broken, but it is a start 972 * 973 * XXX Note that this test means that segdev_ops 974 * must be exported from seg_dev.c. 975 * XXX What about devices with their own segment drivers? 976 */ 977 if (seg->s_ops == &segdev_ops) { 978 struct segdev_data *sdp = (struct segdev_data *)seg->s_data; 979 980 if (hat == NULL) { 981 /* 982 * This is one plausible interpretation of 983 * a null hat i.e. use the first hat on the 984 * address space hat list which by convention is 985 * the hat of the system MMU. At alternative 986 * would be to panic .. this might well be better .. 987 */ 988 ASSERT(AS_READ_HELD(seg->s_as, &seg->s_as->a_lock)); 989 hat = seg->s_as->a_hat; 990 cmn_err(CE_NOTE, "rootnex_map_fault: nil hat"); 991 } 992 hat_devload(hat, addr, MMU_PAGESIZE, pfn, prot | sdp->hat_attr, 993 (lock ? HAT_LOAD_LOCK : HAT_LOAD)); 994 } else if (seg == &kvseg && dp == NULL) { 995 hat_devload(kas.a_hat, addr, MMU_PAGESIZE, pfn, prot, 996 HAT_LOAD_LOCK); 997 } else 998 return (DDI_FAILURE); 999 return (DDI_SUCCESS); 1000 } 1001 1002 1003 /* 1004 * rootnex_map_regspec() 1005 * we don't support mapping of I/O cards above 4Gb 1006 */ 1007 static int 1008 rootnex_map_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1009 { 1010 rootnex_addr_t rbase; 1011 void *cvaddr; 1012 uint_t npages, pgoffset; 1013 struct regspec *rp; 1014 ddi_acc_hdl_t *hp; 1015 ddi_acc_impl_t *ap; 1016 uint_t hat_acc_flags; 1017 paddr_t pbase; 1018 1019 rp = mp->map_obj.rp; 1020 hp = mp->map_handlep; 1021 1022 #ifdef DDI_MAP_DEBUG 1023 ddi_map_debug( 1024 "rootnex_map_regspec: <0x%x 0x%x 0x%x> handle 0x%x\n", 1025 rp->regspec_bustype, rp->regspec_addr, 1026 rp->regspec_size, mp->map_handlep); 1027 #endif /* DDI_MAP_DEBUG */ 1028 1029 /* 1030 * I/O or memory mapping 1031 * 1032 * <bustype=0, addr=x, len=x>: memory 1033 * <bustype=1, addr=x, len=x>: i/o 1034 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1035 */ 1036 1037 if (rp->regspec_bustype > 1 && rp->regspec_addr != 0) { 1038 cmn_err(CE_WARN, "rootnex: invalid register spec" 1039 " <0x%x, 0x%x, 0x%x>", rp->regspec_bustype, 1040 rp->regspec_addr, rp->regspec_size); 1041 return (DDI_FAILURE); 1042 } 1043 1044 if (rp->regspec_bustype != 0) { 1045 /* 1046 * I/O space - needs a handle. 1047 */ 1048 if (hp == NULL) { 1049 return (DDI_FAILURE); 1050 } 1051 ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1052 ap->ahi_acc_attr |= DDI_ACCATTR_IO_SPACE; 1053 impl_acc_hdl_init(hp); 1054 1055 if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1056 #ifdef DDI_MAP_DEBUG 1057 ddi_map_debug("rootnex_map_regspec: mmap() " 1058 "to I/O space is not supported.\n"); 1059 #endif /* DDI_MAP_DEBUG */ 1060 return (DDI_ME_INVAL); 1061 } else { 1062 /* 1063 * 1275-compliant vs. compatibility i/o mapping 1064 */ 1065 *vaddrp = 1066 (rp->regspec_bustype > 1 && rp->regspec_addr == 0) ? 1067 ((caddr_t)(uintptr_t)rp->regspec_bustype) : 1068 ((caddr_t)(uintptr_t)rp->regspec_addr); 1069 #ifdef __xpv 1070 if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1071 hp->ah_pfn = xen_assign_pfn( 1072 mmu_btop((ulong_t)rp->regspec_addr & 1073 MMU_PAGEMASK)); 1074 } else { 1075 hp->ah_pfn = mmu_btop( 1076 (ulong_t)rp->regspec_addr & MMU_PAGEMASK); 1077 } 1078 #else 1079 hp->ah_pfn = mmu_btop((ulong_t)rp->regspec_addr & 1080 MMU_PAGEMASK); 1081 #endif 1082 hp->ah_pnum = mmu_btopr(rp->regspec_size + 1083 (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET); 1084 } 1085 1086 #ifdef DDI_MAP_DEBUG 1087 ddi_map_debug( 1088 "rootnex_map_regspec: \"Mapping\" %d bytes I/O space at 0x%x\n", 1089 rp->regspec_size, *vaddrp); 1090 #endif /* DDI_MAP_DEBUG */ 1091 return (DDI_SUCCESS); 1092 } 1093 1094 /* 1095 * Memory space 1096 */ 1097 1098 if (hp != NULL) { 1099 /* 1100 * hat layer ignores 1101 * hp->ah_acc.devacc_attr_endian_flags. 1102 */ 1103 switch (hp->ah_acc.devacc_attr_dataorder) { 1104 case DDI_STRICTORDER_ACC: 1105 hat_acc_flags = HAT_STRICTORDER; 1106 break; 1107 case DDI_UNORDERED_OK_ACC: 1108 hat_acc_flags = HAT_UNORDERED_OK; 1109 break; 1110 case DDI_MERGING_OK_ACC: 1111 hat_acc_flags = HAT_MERGING_OK; 1112 break; 1113 case DDI_LOADCACHING_OK_ACC: 1114 hat_acc_flags = HAT_LOADCACHING_OK; 1115 break; 1116 case DDI_STORECACHING_OK_ACC: 1117 hat_acc_flags = HAT_STORECACHING_OK; 1118 break; 1119 } 1120 ap = (ddi_acc_impl_t *)hp->ah_platform_private; 1121 ap->ahi_acc_attr |= DDI_ACCATTR_CPU_VADDR; 1122 impl_acc_hdl_init(hp); 1123 hp->ah_hat_flags = hat_acc_flags; 1124 } else { 1125 hat_acc_flags = HAT_STRICTORDER; 1126 } 1127 1128 rbase = (rootnex_addr_t)(rp->regspec_addr & MMU_PAGEMASK); 1129 #ifdef __xpv 1130 /* 1131 * If we're dom0, we're using a real device so we need to translate 1132 * the MA to a PA. 1133 */ 1134 if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1135 pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))); 1136 } else { 1137 pbase = rbase; 1138 } 1139 #else 1140 pbase = rbase; 1141 #endif 1142 pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1143 1144 if (rp->regspec_size == 0) { 1145 #ifdef DDI_MAP_DEBUG 1146 ddi_map_debug("rootnex_map_regspec: zero regspec_size\n"); 1147 #endif /* DDI_MAP_DEBUG */ 1148 return (DDI_ME_INVAL); 1149 } 1150 1151 if (mp->map_flags & DDI_MF_DEVICE_MAPPING) { 1152 /* extra cast to make gcc happy */ 1153 *vaddrp = (caddr_t)((uintptr_t)mmu_btop(pbase)); 1154 } else { 1155 npages = mmu_btopr(rp->regspec_size + pgoffset); 1156 1157 #ifdef DDI_MAP_DEBUG 1158 ddi_map_debug("rootnex_map_regspec: Mapping %d pages " 1159 "physical %llx", npages, pbase); 1160 #endif /* DDI_MAP_DEBUG */ 1161 1162 cvaddr = device_arena_alloc(ptob(npages), VM_NOSLEEP); 1163 if (cvaddr == NULL) 1164 return (DDI_ME_NORESOURCES); 1165 1166 /* 1167 * Now map in the pages we've allocated... 1168 */ 1169 hat_devload(kas.a_hat, cvaddr, mmu_ptob(npages), 1170 mmu_btop(pbase), mp->map_prot | hat_acc_flags, 1171 HAT_LOAD_LOCK); 1172 *vaddrp = (caddr_t)cvaddr + pgoffset; 1173 1174 /* save away pfn and npages for FMA */ 1175 hp = mp->map_handlep; 1176 if (hp) { 1177 hp->ah_pfn = mmu_btop(pbase); 1178 hp->ah_pnum = npages; 1179 } 1180 } 1181 1182 #ifdef DDI_MAP_DEBUG 1183 ddi_map_debug("at virtual 0x%x\n", *vaddrp); 1184 #endif /* DDI_MAP_DEBUG */ 1185 return (DDI_SUCCESS); 1186 } 1187 1188 1189 /* 1190 * rootnex_unmap_regspec() 1191 * 1192 */ 1193 static int 1194 rootnex_unmap_regspec(ddi_map_req_t *mp, caddr_t *vaddrp) 1195 { 1196 caddr_t addr = (caddr_t)*vaddrp; 1197 uint_t npages, pgoffset; 1198 struct regspec *rp; 1199 1200 if (mp->map_flags & DDI_MF_DEVICE_MAPPING) 1201 return (0); 1202 1203 rp = mp->map_obj.rp; 1204 1205 if (rp->regspec_size == 0) { 1206 #ifdef DDI_MAP_DEBUG 1207 ddi_map_debug("rootnex_unmap_regspec: zero regspec_size\n"); 1208 #endif /* DDI_MAP_DEBUG */ 1209 return (DDI_ME_INVAL); 1210 } 1211 1212 /* 1213 * I/O or memory mapping: 1214 * 1215 * <bustype=0, addr=x, len=x>: memory 1216 * <bustype=1, addr=x, len=x>: i/o 1217 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1218 */ 1219 if (rp->regspec_bustype != 0) { 1220 /* 1221 * This is I/O space, which requires no particular 1222 * processing on unmap since it isn't mapped in the 1223 * first place. 1224 */ 1225 return (DDI_SUCCESS); 1226 } 1227 1228 /* 1229 * Memory space 1230 */ 1231 pgoffset = (uintptr_t)addr & MMU_PAGEOFFSET; 1232 npages = mmu_btopr(rp->regspec_size + pgoffset); 1233 hat_unload(kas.a_hat, addr - pgoffset, ptob(npages), HAT_UNLOAD_UNLOCK); 1234 device_arena_free(addr - pgoffset, ptob(npages)); 1235 1236 /* 1237 * Destroy the pointer - the mapping has logically gone 1238 */ 1239 *vaddrp = NULL; 1240 1241 return (DDI_SUCCESS); 1242 } 1243 1244 1245 /* 1246 * rootnex_map_handle() 1247 * 1248 */ 1249 static int 1250 rootnex_map_handle(ddi_map_req_t *mp) 1251 { 1252 rootnex_addr_t rbase; 1253 ddi_acc_hdl_t *hp; 1254 uint_t pgoffset; 1255 struct regspec *rp; 1256 paddr_t pbase; 1257 1258 rp = mp->map_obj.rp; 1259 1260 #ifdef DDI_MAP_DEBUG 1261 ddi_map_debug( 1262 "rootnex_map_handle: <0x%x 0x%x 0x%x> handle 0x%x\n", 1263 rp->regspec_bustype, rp->regspec_addr, 1264 rp->regspec_size, mp->map_handlep); 1265 #endif /* DDI_MAP_DEBUG */ 1266 1267 /* 1268 * I/O or memory mapping: 1269 * 1270 * <bustype=0, addr=x, len=x>: memory 1271 * <bustype=1, addr=x, len=x>: i/o 1272 * <bustype>1, addr=0, len=x>: x86-compatibility i/o 1273 */ 1274 if (rp->regspec_bustype != 0) { 1275 /* 1276 * This refers to I/O space, and we don't support "mapping" 1277 * I/O space to a user. 1278 */ 1279 return (DDI_FAILURE); 1280 } 1281 1282 /* 1283 * Set up the hat_flags for the mapping. 1284 */ 1285 hp = mp->map_handlep; 1286 1287 switch (hp->ah_acc.devacc_attr_endian_flags) { 1288 case DDI_NEVERSWAP_ACC: 1289 hp->ah_hat_flags = HAT_NEVERSWAP | HAT_STRICTORDER; 1290 break; 1291 case DDI_STRUCTURE_LE_ACC: 1292 hp->ah_hat_flags = HAT_STRUCTURE_LE; 1293 break; 1294 case DDI_STRUCTURE_BE_ACC: 1295 return (DDI_FAILURE); 1296 default: 1297 return (DDI_REGS_ACC_CONFLICT); 1298 } 1299 1300 switch (hp->ah_acc.devacc_attr_dataorder) { 1301 case DDI_STRICTORDER_ACC: 1302 break; 1303 case DDI_UNORDERED_OK_ACC: 1304 hp->ah_hat_flags |= HAT_UNORDERED_OK; 1305 break; 1306 case DDI_MERGING_OK_ACC: 1307 hp->ah_hat_flags |= HAT_MERGING_OK; 1308 break; 1309 case DDI_LOADCACHING_OK_ACC: 1310 hp->ah_hat_flags |= HAT_LOADCACHING_OK; 1311 break; 1312 case DDI_STORECACHING_OK_ACC: 1313 hp->ah_hat_flags |= HAT_STORECACHING_OK; 1314 break; 1315 default: 1316 return (DDI_FAILURE); 1317 } 1318 1319 rbase = (rootnex_addr_t)rp->regspec_addr & 1320 (~(rootnex_addr_t)MMU_PAGEOFFSET); 1321 pgoffset = (ulong_t)rp->regspec_addr & MMU_PAGEOFFSET; 1322 1323 if (rp->regspec_size == 0) 1324 return (DDI_ME_INVAL); 1325 1326 #ifdef __xpv 1327 /* 1328 * If we're dom0, we're using a real device so we need to translate 1329 * the MA to a PA. 1330 */ 1331 if (DOMAIN_IS_INITDOMAIN(xen_info)) { 1332 pbase = pfn_to_pa(xen_assign_pfn(mmu_btop(rbase))) | 1333 (rbase & MMU_PAGEOFFSET); 1334 } else { 1335 pbase = rbase; 1336 } 1337 #else 1338 pbase = rbase; 1339 #endif 1340 1341 hp->ah_pfn = mmu_btop(pbase); 1342 hp->ah_pnum = mmu_btopr(rp->regspec_size + pgoffset); 1343 1344 return (DDI_SUCCESS); 1345 } 1346 1347 1348 1349 /* 1350 * ************************ 1351 * interrupt related code 1352 * ************************ 1353 */ 1354 1355 /* 1356 * rootnex_intr_ops() 1357 * bus_intr_op() function for interrupt support 1358 */ 1359 /* ARGSUSED */ 1360 static int 1361 rootnex_intr_ops(dev_info_t *pdip, dev_info_t *rdip, ddi_intr_op_t intr_op, 1362 ddi_intr_handle_impl_t *hdlp, void *result) 1363 { 1364 struct intrspec *ispec; 1365 struct ddi_parent_private_data *pdp; 1366 1367 DDI_INTR_NEXDBG((CE_CONT, 1368 "rootnex_intr_ops: pdip = %p, rdip = %p, intr_op = %x, hdlp = %p\n", 1369 (void *)pdip, (void *)rdip, intr_op, (void *)hdlp)); 1370 1371 /* Process the interrupt operation */ 1372 switch (intr_op) { 1373 case DDI_INTROP_GETCAP: 1374 /* First check with pcplusmp */ 1375 if (psm_intr_ops == NULL) 1376 return (DDI_FAILURE); 1377 1378 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_CAP, result)) { 1379 *(int *)result = 0; 1380 return (DDI_FAILURE); 1381 } 1382 break; 1383 case DDI_INTROP_SETCAP: 1384 if (psm_intr_ops == NULL) 1385 return (DDI_FAILURE); 1386 1387 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_CAP, result)) 1388 return (DDI_FAILURE); 1389 break; 1390 case DDI_INTROP_ALLOC: 1391 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1392 return (DDI_FAILURE); 1393 hdlp->ih_pri = ispec->intrspec_pri; 1394 *(int *)result = hdlp->ih_scratch1; 1395 break; 1396 case DDI_INTROP_FREE: 1397 pdp = ddi_get_parent_data(rdip); 1398 /* 1399 * Special case for 'pcic' driver' only. 1400 * If an intrspec was created for it, clean it up here 1401 * See detailed comments on this in the function 1402 * rootnex_get_ispec(). 1403 */ 1404 if (pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1405 kmem_free(pdp->par_intr, sizeof (struct intrspec) * 1406 pdp->par_nintr); 1407 /* 1408 * Set it to zero; so that 1409 * DDI framework doesn't free it again 1410 */ 1411 pdp->par_intr = NULL; 1412 pdp->par_nintr = 0; 1413 } 1414 break; 1415 case DDI_INTROP_GETPRI: 1416 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1417 return (DDI_FAILURE); 1418 *(int *)result = ispec->intrspec_pri; 1419 break; 1420 case DDI_INTROP_SETPRI: 1421 /* Validate the interrupt priority passed to us */ 1422 if (*(int *)result > LOCK_LEVEL) 1423 return (DDI_FAILURE); 1424 1425 /* Ensure that PSM is all initialized and ispec is ok */ 1426 if ((psm_intr_ops == NULL) || 1427 ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL)) 1428 return (DDI_FAILURE); 1429 1430 /* Change the priority */ 1431 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_PRI, result) == 1432 PSM_FAILURE) 1433 return (DDI_FAILURE); 1434 1435 /* update the ispec with the new priority */ 1436 ispec->intrspec_pri = *(int *)result; 1437 break; 1438 case DDI_INTROP_ADDISR: 1439 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1440 return (DDI_FAILURE); 1441 ispec->intrspec_func = hdlp->ih_cb_func; 1442 break; 1443 case DDI_INTROP_REMISR: 1444 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1445 return (DDI_FAILURE); 1446 ispec->intrspec_func = (uint_t (*)()) 0; 1447 break; 1448 case DDI_INTROP_ENABLE: 1449 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1450 return (DDI_FAILURE); 1451 1452 /* Call psmi to translate irq with the dip */ 1453 if (psm_intr_ops == NULL) 1454 return (DDI_FAILURE); 1455 1456 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 1457 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_XLATE_VECTOR, 1458 (int *)&hdlp->ih_vector) == PSM_FAILURE) 1459 return (DDI_FAILURE); 1460 1461 /* Add the interrupt handler */ 1462 if (!add_avintr((void *)hdlp, ispec->intrspec_pri, 1463 hdlp->ih_cb_func, DEVI(rdip)->devi_name, hdlp->ih_vector, 1464 hdlp->ih_cb_arg1, hdlp->ih_cb_arg2, NULL, rdip)) 1465 return (DDI_FAILURE); 1466 break; 1467 case DDI_INTROP_DISABLE: 1468 if ((ispec = rootnex_get_ispec(rdip, hdlp->ih_inum)) == NULL) 1469 return (DDI_FAILURE); 1470 1471 /* Call psm_ops() to translate irq with the dip */ 1472 if (psm_intr_ops == NULL) 1473 return (DDI_FAILURE); 1474 1475 ((ihdl_plat_t *)hdlp->ih_private)->ip_ispecp = ispec; 1476 (void) (*psm_intr_ops)(rdip, hdlp, 1477 PSM_INTR_OP_XLATE_VECTOR, (int *)&hdlp->ih_vector); 1478 1479 /* Remove the interrupt handler */ 1480 rem_avintr((void *)hdlp, ispec->intrspec_pri, 1481 hdlp->ih_cb_func, hdlp->ih_vector); 1482 break; 1483 case DDI_INTROP_SETMASK: 1484 if (psm_intr_ops == NULL) 1485 return (DDI_FAILURE); 1486 1487 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_SET_MASK, NULL)) 1488 return (DDI_FAILURE); 1489 break; 1490 case DDI_INTROP_CLRMASK: 1491 if (psm_intr_ops == NULL) 1492 return (DDI_FAILURE); 1493 1494 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_CLEAR_MASK, NULL)) 1495 return (DDI_FAILURE); 1496 break; 1497 case DDI_INTROP_GETPENDING: 1498 if (psm_intr_ops == NULL) 1499 return (DDI_FAILURE); 1500 1501 if ((*psm_intr_ops)(rdip, hdlp, PSM_INTR_OP_GET_PENDING, 1502 result)) { 1503 *(int *)result = 0; 1504 return (DDI_FAILURE); 1505 } 1506 break; 1507 case DDI_INTROP_NAVAIL: 1508 case DDI_INTROP_NINTRS: 1509 *(int *)result = i_ddi_get_intx_nintrs(rdip); 1510 if (*(int *)result == 0) { 1511 /* 1512 * Special case for 'pcic' driver' only. This driver 1513 * driver is a child of 'isa' and 'rootnex' drivers. 1514 * 1515 * See detailed comments on this in the function 1516 * rootnex_get_ispec(). 1517 * 1518 * Children of 'pcic' send 'NINITR' request all the 1519 * way to rootnex driver. But, the 'pdp->par_nintr' 1520 * field may not initialized. So, we fake it here 1521 * to return 1 (a la what PCMCIA nexus does). 1522 */ 1523 if (strcmp(ddi_get_name(rdip), "pcic") == 0) 1524 *(int *)result = 1; 1525 else 1526 return (DDI_FAILURE); 1527 } 1528 break; 1529 case DDI_INTROP_SUPPORTED_TYPES: 1530 *(int *)result = DDI_INTR_TYPE_FIXED; /* Always ... */ 1531 break; 1532 default: 1533 return (DDI_FAILURE); 1534 } 1535 1536 return (DDI_SUCCESS); 1537 } 1538 1539 1540 /* 1541 * rootnex_get_ispec() 1542 * convert an interrupt number to an interrupt specification. 1543 * The interrupt number determines which interrupt spec will be 1544 * returned if more than one exists. 1545 * 1546 * Look into the parent private data area of the 'rdip' to find out 1547 * the interrupt specification. First check to make sure there is 1548 * one that matchs "inumber" and then return a pointer to it. 1549 * 1550 * Return NULL if one could not be found. 1551 * 1552 * NOTE: This is needed for rootnex_intr_ops() 1553 */ 1554 static struct intrspec * 1555 rootnex_get_ispec(dev_info_t *rdip, int inum) 1556 { 1557 struct ddi_parent_private_data *pdp = ddi_get_parent_data(rdip); 1558 1559 /* 1560 * Special case handling for drivers that provide their own 1561 * intrspec structures instead of relying on the DDI framework. 1562 * 1563 * A broken hardware driver in ON could potentially provide its 1564 * own intrspec structure, instead of relying on the hardware. 1565 * If these drivers are children of 'rootnex' then we need to 1566 * continue to provide backward compatibility to them here. 1567 * 1568 * Following check is a special case for 'pcic' driver which 1569 * was found to have broken hardwre andby provides its own intrspec. 1570 * 1571 * Verbatim comments from this driver are shown here: 1572 * "Don't use the ddi_add_intr since we don't have a 1573 * default intrspec in all cases." 1574 * 1575 * Since an 'ispec' may not be always created for it, 1576 * check for that and create one if so. 1577 * 1578 * NOTE: Currently 'pcic' is the only driver found to do this. 1579 */ 1580 if (!pdp->par_intr && strcmp(ddi_get_name(rdip), "pcic") == 0) { 1581 pdp->par_nintr = 1; 1582 pdp->par_intr = kmem_zalloc(sizeof (struct intrspec) * 1583 pdp->par_nintr, KM_SLEEP); 1584 } 1585 1586 /* Validate the interrupt number */ 1587 if (inum >= pdp->par_nintr) 1588 return (NULL); 1589 1590 /* Get the interrupt structure pointer and return that */ 1591 return ((struct intrspec *)&pdp->par_intr[inum]); 1592 } 1593 1594 1595 /* 1596 * ****************** 1597 * dma related code 1598 * ****************** 1599 */ 1600 1601 /*ARGSUSED*/ 1602 static int 1603 rootnex_coredma_allochdl(dev_info_t *dip, dev_info_t *rdip, 1604 ddi_dma_attr_t *attr, int (*waitfp)(caddr_t), caddr_t arg, 1605 ddi_dma_handle_t *handlep) 1606 { 1607 uint64_t maxsegmentsize_ll; 1608 uint_t maxsegmentsize; 1609 ddi_dma_impl_t *hp; 1610 rootnex_dma_t *dma; 1611 uint64_t count_max; 1612 uint64_t seg; 1613 int kmflag; 1614 int e; 1615 1616 1617 /* convert our sleep flags */ 1618 if (waitfp == DDI_DMA_SLEEP) { 1619 kmflag = KM_SLEEP; 1620 } else { 1621 kmflag = KM_NOSLEEP; 1622 } 1623 1624 /* 1625 * We try to do only one memory allocation here. We'll do a little 1626 * pointer manipulation later. If the bind ends up taking more than 1627 * our prealloc's space, we'll have to allocate more memory in the 1628 * bind operation. Not great, but much better than before and the 1629 * best we can do with the current bind interfaces. 1630 */ 1631 hp = kmem_cache_alloc(rootnex_state->r_dmahdl_cache, kmflag); 1632 if (hp == NULL) { 1633 if (waitfp != DDI_DMA_DONTWAIT) { 1634 ddi_set_callback(waitfp, arg, 1635 &rootnex_state->r_dvma_call_list_id); 1636 } 1637 return (DDI_DMA_NORESOURCES); 1638 } 1639 1640 /* Do our pointer manipulation now, align the structures */ 1641 hp->dmai_private = (void *)(((uintptr_t)hp + 1642 (uintptr_t)sizeof (ddi_dma_impl_t) + 0x7) & ~0x7); 1643 dma = (rootnex_dma_t *)hp->dmai_private; 1644 dma->dp_prealloc_buffer = (uchar_t *)(((uintptr_t)dma + 1645 sizeof (rootnex_dma_t) + 0x7) & ~0x7); 1646 1647 /* setup the handle */ 1648 rootnex_clean_dmahdl(hp); 1649 dma->dp_dip = rdip; 1650 dma->dp_sglinfo.si_min_addr = attr->dma_attr_addr_lo; 1651 dma->dp_sglinfo.si_max_addr = attr->dma_attr_addr_hi; 1652 hp->dmai_minxfer = attr->dma_attr_minxfer; 1653 hp->dmai_burstsizes = attr->dma_attr_burstsizes; 1654 hp->dmai_rdip = rdip; 1655 hp->dmai_attr = *attr; 1656 1657 /* we don't need to worry about the SPL since we do a tryenter */ 1658 mutex_init(&dma->dp_mutex, NULL, MUTEX_DRIVER, NULL); 1659 1660 /* 1661 * Figure out our maximum segment size. If the segment size is greater 1662 * than 4G, we will limit it to (4G - 1) since the max size of a dma 1663 * object (ddi_dma_obj_t.dmao_size) is 32 bits. dma_attr_seg and 1664 * dma_attr_count_max are size-1 type values. 1665 * 1666 * Maximum segment size is the largest physically contiguous chunk of 1667 * memory that we can return from a bind (i.e. the maximum size of a 1668 * single cookie). 1669 */ 1670 1671 /* handle the rollover cases */ 1672 seg = attr->dma_attr_seg + 1; 1673 if (seg < attr->dma_attr_seg) { 1674 seg = attr->dma_attr_seg; 1675 } 1676 count_max = attr->dma_attr_count_max + 1; 1677 if (count_max < attr->dma_attr_count_max) { 1678 count_max = attr->dma_attr_count_max; 1679 } 1680 1681 /* 1682 * granularity may or may not be a power of two. If it isn't, we can't 1683 * use a simple mask. 1684 */ 1685 if (attr->dma_attr_granular & (attr->dma_attr_granular - 1)) { 1686 dma->dp_granularity_power_2 = B_FALSE; 1687 } else { 1688 dma->dp_granularity_power_2 = B_TRUE; 1689 } 1690 1691 /* 1692 * maxxfer should be a whole multiple of granularity. If we're going to 1693 * break up a window because we're greater than maxxfer, we might as 1694 * well make sure it's maxxfer is a whole multiple so we don't have to 1695 * worry about triming the window later on for this case. 1696 */ 1697 if (attr->dma_attr_granular > 1) { 1698 if (dma->dp_granularity_power_2) { 1699 dma->dp_maxxfer = attr->dma_attr_maxxfer - 1700 (attr->dma_attr_maxxfer & 1701 (attr->dma_attr_granular - 1)); 1702 } else { 1703 dma->dp_maxxfer = attr->dma_attr_maxxfer - 1704 (attr->dma_attr_maxxfer % attr->dma_attr_granular); 1705 } 1706 } else { 1707 dma->dp_maxxfer = attr->dma_attr_maxxfer; 1708 } 1709 1710 maxsegmentsize_ll = MIN(seg, dma->dp_maxxfer); 1711 maxsegmentsize_ll = MIN(maxsegmentsize_ll, count_max); 1712 if (maxsegmentsize_ll == 0 || (maxsegmentsize_ll > 0xFFFFFFFF)) { 1713 maxsegmentsize = 0xFFFFFFFF; 1714 } else { 1715 maxsegmentsize = maxsegmentsize_ll; 1716 } 1717 dma->dp_sglinfo.si_max_cookie_size = maxsegmentsize; 1718 dma->dp_sglinfo.si_segmask = attr->dma_attr_seg; 1719 1720 /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1721 if (rootnex_alloc_check_parms) { 1722 e = rootnex_valid_alloc_parms(attr, maxsegmentsize); 1723 if (e != DDI_SUCCESS) { 1724 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_ALLOC_FAIL]); 1725 (void) rootnex_dma_freehdl(dip, rdip, 1726 (ddi_dma_handle_t)hp); 1727 return (e); 1728 } 1729 } 1730 1731 *handlep = (ddi_dma_handle_t)hp; 1732 1733 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1734 ROOTNEX_DPROBE1(rootnex__alloc__handle, uint64_t, 1735 rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1736 1737 return (DDI_SUCCESS); 1738 } 1739 1740 1741 /* 1742 * rootnex_dma_allochdl() 1743 * called from ddi_dma_alloc_handle(). 1744 */ 1745 static int 1746 rootnex_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attr, 1747 int (*waitfp)(caddr_t), caddr_t arg, ddi_dma_handle_t *handlep) 1748 { 1749 #if !defined(__xpv) 1750 uint_t error = ENOTSUP; 1751 int retval; 1752 1753 retval = iommulib_nex_open(rdip, &error); 1754 1755 if (retval != DDI_SUCCESS && error == ENOTSUP) { 1756 /* No IOMMU */ 1757 return (rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg, 1758 handlep)); 1759 } else if (retval != DDI_SUCCESS) { 1760 return (DDI_FAILURE); 1761 } 1762 1763 ASSERT(IOMMU_USED(rdip)); 1764 1765 /* has an IOMMU */ 1766 return (iommulib_nexdma_allochdl(dip, rdip, attr, 1767 waitfp, arg, handlep)); 1768 #else 1769 return (rootnex_coredma_allochdl(dip, rdip, attr, waitfp, arg, 1770 handlep)); 1771 #endif 1772 } 1773 1774 /*ARGSUSED*/ 1775 static int 1776 rootnex_coredma_freehdl(dev_info_t *dip, dev_info_t *rdip, 1777 ddi_dma_handle_t handle) 1778 { 1779 ddi_dma_impl_t *hp; 1780 rootnex_dma_t *dma; 1781 1782 1783 hp = (ddi_dma_impl_t *)handle; 1784 dma = (rootnex_dma_t *)hp->dmai_private; 1785 1786 /* unbind should have been called first */ 1787 ASSERT(!dma->dp_inuse); 1788 1789 mutex_destroy(&dma->dp_mutex); 1790 kmem_cache_free(rootnex_state->r_dmahdl_cache, hp); 1791 1792 ROOTNEX_DPROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1793 ROOTNEX_DPROBE1(rootnex__free__handle, uint64_t, 1794 rootnex_cnt[ROOTNEX_CNT_ACTIVE_HDLS]); 1795 1796 if (rootnex_state->r_dvma_call_list_id) 1797 ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 1798 1799 return (DDI_SUCCESS); 1800 } 1801 1802 /* 1803 * rootnex_dma_freehdl() 1804 * called from ddi_dma_free_handle(). 1805 */ 1806 static int 1807 rootnex_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) 1808 { 1809 #if !defined(__xpv) 1810 if (IOMMU_USED(rdip)) { 1811 return (iommulib_nexdma_freehdl(dip, rdip, handle)); 1812 } 1813 #endif 1814 return (rootnex_coredma_freehdl(dip, rdip, handle)); 1815 } 1816 1817 1818 /*ARGSUSED*/ 1819 static int 1820 rootnex_coredma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 1821 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 1822 ddi_dma_cookie_t *cookiep, uint_t *ccountp) 1823 { 1824 rootnex_sglinfo_t *sinfo; 1825 ddi_dma_attr_t *attr; 1826 ddi_dma_impl_t *hp; 1827 rootnex_dma_t *dma; 1828 int kmflag; 1829 int e; 1830 1831 1832 hp = (ddi_dma_impl_t *)handle; 1833 dma = (rootnex_dma_t *)hp->dmai_private; 1834 sinfo = &dma->dp_sglinfo; 1835 attr = &hp->dmai_attr; 1836 1837 if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 1838 dma->dp_sleep_flags = KM_SLEEP; 1839 } else { 1840 dma->dp_sleep_flags = KM_NOSLEEP; 1841 } 1842 1843 hp->dmai_rflags = dmareq->dmar_flags & DMP_DDIFLAGS; 1844 1845 /* 1846 * This is useful for debugging a driver. Not as useful in a production 1847 * system. The only time this will fail is if you have a driver bug. 1848 */ 1849 if (rootnex_bind_check_inuse) { 1850 /* 1851 * No one else should ever have this lock unless someone else 1852 * is trying to use this handle. So contention on the lock 1853 * is the same as inuse being set. 1854 */ 1855 e = mutex_tryenter(&dma->dp_mutex); 1856 if (e == 0) { 1857 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1858 return (DDI_DMA_INUSE); 1859 } 1860 if (dma->dp_inuse) { 1861 mutex_exit(&dma->dp_mutex); 1862 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1863 return (DDI_DMA_INUSE); 1864 } 1865 dma->dp_inuse = B_TRUE; 1866 mutex_exit(&dma->dp_mutex); 1867 } 1868 1869 /* check the ddi_dma_attr arg to make sure it makes a little sense */ 1870 if (rootnex_bind_check_parms) { 1871 e = rootnex_valid_bind_parms(dmareq, attr); 1872 if (e != DDI_SUCCESS) { 1873 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1874 rootnex_clean_dmahdl(hp); 1875 return (e); 1876 } 1877 } 1878 1879 /* save away the original bind info */ 1880 dma->dp_dma = dmareq->dmar_object; 1881 1882 #if !defined(__xpv) 1883 if (rootnex_state->r_intel_iommu_enabled) { 1884 e = intel_iommu_map_sgl(handle, dmareq, 1885 rootnex_state->r_prealloc_cookies); 1886 1887 switch (e) { 1888 case IOMMU_SGL_SUCCESS: 1889 goto rootnex_sgl_end; 1890 1891 case IOMMU_SGL_DISABLE: 1892 goto rootnex_sgl_start; 1893 1894 case IOMMU_SGL_NORESOURCES: 1895 cmn_err(CE_WARN, "iommu map sgl failed for %s", 1896 ddi_node_name(dma->dp_dip)); 1897 rootnex_clean_dmahdl(hp); 1898 return (DDI_DMA_NORESOURCES); 1899 1900 default: 1901 cmn_err(CE_WARN, 1902 "undefined value returned from" 1903 " intel_iommu_map_sgl: %d", 1904 e); 1905 rootnex_clean_dmahdl(hp); 1906 return (DDI_DMA_NORESOURCES); 1907 } 1908 } 1909 #endif 1910 1911 rootnex_sgl_start: 1912 /* 1913 * Figure out a rough estimate of what maximum number of pages this 1914 * buffer could use (a high estimate of course). 1915 */ 1916 sinfo->si_max_pages = mmu_btopr(dma->dp_dma.dmao_size) + 1; 1917 1918 /* 1919 * We'll use the pre-allocated cookies for any bind that will *always* 1920 * fit (more important to be consistent, we don't want to create 1921 * additional degenerate cases). 1922 */ 1923 if (sinfo->si_max_pages <= rootnex_state->r_prealloc_cookies) { 1924 dma->dp_cookies = (ddi_dma_cookie_t *)dma->dp_prealloc_buffer; 1925 dma->dp_need_to_free_cookie = B_FALSE; 1926 DTRACE_PROBE2(rootnex__bind__prealloc, dev_info_t *, rdip, 1927 uint_t, sinfo->si_max_pages); 1928 1929 /* 1930 * For anything larger than that, we'll go ahead and allocate the 1931 * maximum number of pages we expect to see. Hopefuly, we won't be 1932 * seeing this path in the fast path for high performance devices very 1933 * frequently. 1934 * 1935 * a ddi bind interface that allowed the driver to provide storage to 1936 * the bind interface would speed this case up. 1937 */ 1938 } else { 1939 /* convert the sleep flags */ 1940 if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 1941 kmflag = KM_SLEEP; 1942 } else { 1943 kmflag = KM_NOSLEEP; 1944 } 1945 1946 /* 1947 * Save away how much memory we allocated. If we're doing a 1948 * nosleep, the alloc could fail... 1949 */ 1950 dma->dp_cookie_size = sinfo->si_max_pages * 1951 sizeof (ddi_dma_cookie_t); 1952 dma->dp_cookies = kmem_alloc(dma->dp_cookie_size, kmflag); 1953 if (dma->dp_cookies == NULL) { 1954 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 1955 rootnex_clean_dmahdl(hp); 1956 return (DDI_DMA_NORESOURCES); 1957 } 1958 dma->dp_need_to_free_cookie = B_TRUE; 1959 DTRACE_PROBE2(rootnex__bind__alloc, dev_info_t *, rdip, uint_t, 1960 sinfo->si_max_pages); 1961 } 1962 hp->dmai_cookie = dma->dp_cookies; 1963 1964 /* 1965 * Get the real sgl. rootnex_get_sgl will fill in cookie array while 1966 * looking at the contraints in the dma structure. It will then put some 1967 * additional state about the sgl in the dma struct (i.e. is the sgl 1968 * clean, or do we need to do some munging; how many pages need to be 1969 * copied, etc.) 1970 */ 1971 rootnex_get_sgl(&dmareq->dmar_object, dma->dp_cookies, 1972 &dma->dp_sglinfo); 1973 1974 rootnex_sgl_end: 1975 ASSERT(sinfo->si_sgl_size <= sinfo->si_max_pages); 1976 /* if we don't need a copy buffer, we don't need to sync */ 1977 if (sinfo->si_copybuf_req == 0) { 1978 hp->dmai_rflags |= DMP_NOSYNC; 1979 } 1980 1981 /* 1982 * if we don't need the copybuf and we don't need to do a partial, we 1983 * hit the fast path. All the high performance devices should be trying 1984 * to hit this path. To hit this path, a device should be able to reach 1985 * all of memory, shouldn't try to bind more than it can transfer, and 1986 * the buffer shouldn't require more cookies than the driver/device can 1987 * handle [sgllen]). 1988 */ 1989 if ((sinfo->si_copybuf_req == 0) && 1990 (sinfo->si_sgl_size <= attr->dma_attr_sgllen) && 1991 (dma->dp_dma.dmao_size < dma->dp_maxxfer)) { 1992 /* 1993 * If the driver supports FMA, insert the handle in the FMA DMA 1994 * handle cache. 1995 */ 1996 if (attr->dma_attr_flags & DDI_DMA_FLAGERR) { 1997 hp->dmai_error.err_cf = rootnex_dma_check; 1998 (void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL); 1999 } 2000 2001 /* 2002 * copy out the first cookie and ccountp, set the cookie 2003 * pointer to the second cookie. The first cookie is passed 2004 * back on the stack. Additional cookies are accessed via 2005 * ddi_dma_nextcookie() 2006 */ 2007 *cookiep = dma->dp_cookies[0]; 2008 *ccountp = sinfo->si_sgl_size; 2009 hp->dmai_cookie++; 2010 hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 2011 hp->dmai_nwin = 1; 2012 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2013 ROOTNEX_DPROBE3(rootnex__bind__fast, dev_info_t *, rdip, 2014 uint64_t, rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 2015 dma->dp_dma.dmao_size); 2016 return (DDI_DMA_MAPPED); 2017 } 2018 2019 /* 2020 * go to the slow path, we may need to alloc more memory, create 2021 * multiple windows, and munge up a sgl to make the device happy. 2022 */ 2023 e = rootnex_bind_slowpath(hp, dmareq, dma, attr, kmflag); 2024 if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 2025 if (dma->dp_need_to_free_cookie) { 2026 kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2027 } 2028 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_BIND_FAIL]); 2029 rootnex_clean_dmahdl(hp); /* must be after free cookie */ 2030 return (e); 2031 } 2032 2033 /* 2034 * If the driver supports FMA, insert the handle in the FMA DMA handle 2035 * cache. 2036 */ 2037 if (attr->dma_attr_flags & DDI_DMA_FLAGERR) { 2038 hp->dmai_error.err_cf = rootnex_dma_check; 2039 (void) ndi_fmc_insert(rdip, DMA_HANDLE, hp, NULL); 2040 } 2041 2042 /* if the first window uses the copy buffer, sync it for the device */ 2043 if ((dma->dp_window[dma->dp_current_win].wd_dosync) && 2044 (hp->dmai_rflags & DDI_DMA_WRITE)) { 2045 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 2046 DDI_DMA_SYNC_FORDEV); 2047 } 2048 2049 /* 2050 * copy out the first cookie and ccountp, set the cookie pointer to the 2051 * second cookie. Make sure the partial flag is set/cleared correctly. 2052 * If we have a partial map (i.e. multiple windows), the number of 2053 * cookies we return is the number of cookies in the first window. 2054 */ 2055 if (e == DDI_DMA_MAPPED) { 2056 hp->dmai_rflags &= ~DDI_DMA_PARTIAL; 2057 *ccountp = sinfo->si_sgl_size; 2058 } else { 2059 hp->dmai_rflags |= DDI_DMA_PARTIAL; 2060 *ccountp = dma->dp_window[dma->dp_current_win].wd_cookie_cnt; 2061 ASSERT(hp->dmai_nwin <= dma->dp_max_win); 2062 } 2063 *cookiep = dma->dp_cookies[0]; 2064 hp->dmai_cookie++; 2065 2066 ROOTNEX_DPROF_INC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2067 ROOTNEX_DPROBE3(rootnex__bind__slow, dev_info_t *, rdip, uint64_t, 2068 rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS], uint_t, 2069 dma->dp_dma.dmao_size); 2070 return (e); 2071 } 2072 2073 2074 /* 2075 * rootnex_dma_bindhdl() 2076 * called from ddi_dma_addr_bind_handle() and ddi_dma_buf_bind_handle(). 2077 */ 2078 static int 2079 rootnex_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, 2080 ddi_dma_handle_t handle, struct ddi_dma_req *dmareq, 2081 ddi_dma_cookie_t *cookiep, uint_t *ccountp) 2082 { 2083 #if !defined(__xpv) 2084 if (IOMMU_USED(rdip)) { 2085 return (iommulib_nexdma_bindhdl(dip, rdip, handle, dmareq, 2086 cookiep, ccountp)); 2087 } 2088 #endif 2089 return (rootnex_coredma_bindhdl(dip, rdip, handle, dmareq, 2090 cookiep, ccountp)); 2091 } 2092 2093 /*ARGSUSED*/ 2094 static int 2095 rootnex_coredma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 2096 ddi_dma_handle_t handle) 2097 { 2098 ddi_dma_impl_t *hp; 2099 rootnex_dma_t *dma; 2100 int e; 2101 2102 hp = (ddi_dma_impl_t *)handle; 2103 dma = (rootnex_dma_t *)hp->dmai_private; 2104 2105 /* make sure the buffer wasn't free'd before calling unbind */ 2106 if (rootnex_unbind_verify_buffer) { 2107 e = rootnex_verify_buffer(dma); 2108 if (e != DDI_SUCCESS) { 2109 ASSERT(0); 2110 return (DDI_FAILURE); 2111 } 2112 } 2113 2114 /* sync the current window before unbinding the buffer */ 2115 if (dma->dp_window && dma->dp_window[dma->dp_current_win].wd_dosync && 2116 (hp->dmai_rflags & DDI_DMA_READ)) { 2117 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 2118 DDI_DMA_SYNC_FORCPU); 2119 } 2120 2121 /* 2122 * If the driver supports FMA, remove the handle in the FMA DMA handle 2123 * cache. 2124 */ 2125 if (hp->dmai_attr.dma_attr_flags & DDI_DMA_FLAGERR) { 2126 if ((DEVI(rdip)->devi_fmhdl != NULL) && 2127 (DDI_FM_DMA_ERR_CAP(DEVI(rdip)->devi_fmhdl->fh_cap))) { 2128 (void) ndi_fmc_remove(rdip, DMA_HANDLE, hp); 2129 } 2130 } 2131 2132 /* 2133 * cleanup and copy buffer or window state. if we didn't use the copy 2134 * buffer or windows, there won't be much to do :-) 2135 */ 2136 rootnex_teardown_copybuf(dma); 2137 rootnex_teardown_windows(dma); 2138 2139 #if !defined(__xpv) 2140 /* 2141 * If intel iommu enabled, clean up the page tables and free the dvma 2142 */ 2143 if (rootnex_state->r_intel_iommu_enabled) { 2144 intel_iommu_unmap_sgl(handle); 2145 } 2146 #endif 2147 2148 /* 2149 * If we had to allocate space to for the worse case sgl (it didn't 2150 * fit into our pre-allocate buffer), free that up now 2151 */ 2152 if (dma->dp_need_to_free_cookie) { 2153 kmem_free(dma->dp_cookies, dma->dp_cookie_size); 2154 } 2155 2156 /* 2157 * clean up the handle so it's ready for the next bind (i.e. if the 2158 * handle is reused). 2159 */ 2160 rootnex_clean_dmahdl(hp); 2161 2162 if (rootnex_state->r_dvma_call_list_id) 2163 ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 2164 2165 ROOTNEX_DPROF_DEC(&rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2166 ROOTNEX_DPROBE1(rootnex__unbind, uint64_t, 2167 rootnex_cnt[ROOTNEX_CNT_ACTIVE_BINDS]); 2168 2169 return (DDI_SUCCESS); 2170 } 2171 2172 /* 2173 * rootnex_dma_unbindhdl() 2174 * called from ddi_dma_unbind_handle() 2175 */ 2176 /*ARGSUSED*/ 2177 static int 2178 rootnex_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, 2179 ddi_dma_handle_t handle) 2180 { 2181 #if !defined(__xpv) 2182 if (IOMMU_USED(rdip)) { 2183 return (iommulib_nexdma_unbindhdl(dip, rdip, handle)); 2184 } 2185 #endif 2186 return (rootnex_coredma_unbindhdl(dip, rdip, handle)); 2187 } 2188 2189 #if !defined(__xpv) 2190 2191 static int 2192 rootnex_coredma_get_sleep_flags(ddi_dma_handle_t handle) 2193 { 2194 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2195 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2196 2197 if (dma->dp_sleep_flags != KM_SLEEP && 2198 dma->dp_sleep_flags != KM_NOSLEEP) 2199 cmn_err(CE_PANIC, "kmem sleep flags not set in DMA handle"); 2200 return (dma->dp_sleep_flags); 2201 } 2202 /*ARGSUSED*/ 2203 static void 2204 rootnex_coredma_reset_cookies(dev_info_t *dip, ddi_dma_handle_t handle) 2205 { 2206 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2207 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2208 rootnex_window_t *window; 2209 2210 if (dma->dp_window) { 2211 window = &dma->dp_window[dma->dp_current_win]; 2212 hp->dmai_cookie = window->wd_first_cookie; 2213 } else { 2214 hp->dmai_cookie = dma->dp_cookies; 2215 } 2216 hp->dmai_cookie++; 2217 } 2218 2219 /*ARGSUSED*/ 2220 static int 2221 rootnex_coredma_get_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 2222 ddi_dma_cookie_t **cookiepp, uint_t *ccountp) 2223 { 2224 int i; 2225 int km_flags; 2226 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2227 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2228 rootnex_window_t *window; 2229 ddi_dma_cookie_t *cp; 2230 ddi_dma_cookie_t *cookie; 2231 2232 ASSERT(*cookiepp == NULL); 2233 ASSERT(*ccountp == 0); 2234 2235 if (dma->dp_window) { 2236 window = &dma->dp_window[dma->dp_current_win]; 2237 cp = window->wd_first_cookie; 2238 *ccountp = window->wd_cookie_cnt; 2239 } else { 2240 cp = dma->dp_cookies; 2241 *ccountp = dma->dp_sglinfo.si_sgl_size; 2242 } 2243 2244 km_flags = rootnex_coredma_get_sleep_flags(handle); 2245 cookie = kmem_zalloc(sizeof (ddi_dma_cookie_t) * (*ccountp), km_flags); 2246 if (cookie == NULL) { 2247 return (DDI_DMA_NORESOURCES); 2248 } 2249 2250 for (i = 0; i < *ccountp; i++) { 2251 cookie[i].dmac_notused = cp[i].dmac_notused; 2252 cookie[i].dmac_type = cp[i].dmac_type; 2253 cookie[i].dmac_address = cp[i].dmac_address; 2254 cookie[i].dmac_size = cp[i].dmac_size; 2255 } 2256 2257 *cookiepp = cookie; 2258 2259 return (DDI_SUCCESS); 2260 } 2261 2262 /*ARGSUSED*/ 2263 static int 2264 rootnex_coredma_set_cookies(dev_info_t *dip, ddi_dma_handle_t handle, 2265 ddi_dma_cookie_t *cookiep, uint_t ccount) 2266 { 2267 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2268 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2269 rootnex_window_t *window; 2270 ddi_dma_cookie_t *cur_cookiep; 2271 2272 ASSERT(cookiep); 2273 ASSERT(ccount != 0); 2274 ASSERT(dma->dp_need_to_switch_cookies == B_FALSE); 2275 2276 if (dma->dp_window) { 2277 window = &dma->dp_window[dma->dp_current_win]; 2278 dma->dp_saved_cookies = window->wd_first_cookie; 2279 window->wd_first_cookie = cookiep; 2280 ASSERT(ccount == window->wd_cookie_cnt); 2281 cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies) 2282 + window->wd_first_cookie; 2283 } else { 2284 dma->dp_saved_cookies = dma->dp_cookies; 2285 dma->dp_cookies = cookiep; 2286 ASSERT(ccount == dma->dp_sglinfo.si_sgl_size); 2287 cur_cookiep = (hp->dmai_cookie - dma->dp_saved_cookies) 2288 + dma->dp_cookies; 2289 } 2290 2291 dma->dp_need_to_switch_cookies = B_TRUE; 2292 hp->dmai_cookie = cur_cookiep; 2293 2294 return (DDI_SUCCESS); 2295 } 2296 2297 /*ARGSUSED*/ 2298 static int 2299 rootnex_coredma_clear_cookies(dev_info_t *dip, ddi_dma_handle_t handle) 2300 { 2301 ddi_dma_impl_t *hp = (ddi_dma_impl_t *)handle; 2302 rootnex_dma_t *dma = (rootnex_dma_t *)hp->dmai_private; 2303 rootnex_window_t *window; 2304 ddi_dma_cookie_t *cur_cookiep; 2305 ddi_dma_cookie_t *cookie_array; 2306 uint_t ccount; 2307 2308 /* check if cookies have not been switched */ 2309 if (dma->dp_need_to_switch_cookies == B_FALSE) 2310 return (DDI_SUCCESS); 2311 2312 ASSERT(dma->dp_saved_cookies); 2313 2314 if (dma->dp_window) { 2315 window = &dma->dp_window[dma->dp_current_win]; 2316 cookie_array = window->wd_first_cookie; 2317 window->wd_first_cookie = dma->dp_saved_cookies; 2318 dma->dp_saved_cookies = NULL; 2319 ccount = window->wd_cookie_cnt; 2320 cur_cookiep = (hp->dmai_cookie - cookie_array) 2321 + window->wd_first_cookie; 2322 } else { 2323 cookie_array = dma->dp_cookies; 2324 dma->dp_cookies = dma->dp_saved_cookies; 2325 dma->dp_saved_cookies = NULL; 2326 ccount = dma->dp_sglinfo.si_sgl_size; 2327 cur_cookiep = (hp->dmai_cookie - cookie_array) 2328 + dma->dp_cookies; 2329 } 2330 2331 kmem_free(cookie_array, sizeof (ddi_dma_cookie_t) * ccount); 2332 2333 hp->dmai_cookie = cur_cookiep; 2334 2335 dma->dp_need_to_switch_cookies = B_FALSE; 2336 2337 return (DDI_SUCCESS); 2338 } 2339 2340 #endif 2341 2342 /* 2343 * rootnex_verify_buffer() 2344 * verify buffer wasn't free'd 2345 */ 2346 static int 2347 rootnex_verify_buffer(rootnex_dma_t *dma) 2348 { 2349 page_t **pplist; 2350 caddr_t vaddr; 2351 uint_t pcnt; 2352 uint_t poff; 2353 page_t *pp; 2354 char b; 2355 int i; 2356 2357 /* Figure out how many pages this buffer occupies */ 2358 if (dma->dp_dma.dmao_type == DMA_OTYP_PAGES) { 2359 poff = dma->dp_dma.dmao_obj.pp_obj.pp_offset & MMU_PAGEOFFSET; 2360 } else { 2361 vaddr = dma->dp_dma.dmao_obj.virt_obj.v_addr; 2362 poff = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2363 } 2364 pcnt = mmu_btopr(dma->dp_dma.dmao_size + poff); 2365 2366 switch (dma->dp_dma.dmao_type) { 2367 case DMA_OTYP_PAGES: 2368 /* 2369 * for a linked list of pp's walk through them to make sure 2370 * they're locked and not free. 2371 */ 2372 pp = dma->dp_dma.dmao_obj.pp_obj.pp_pp; 2373 for (i = 0; i < pcnt; i++) { 2374 if (PP_ISFREE(pp) || !PAGE_LOCKED(pp)) { 2375 return (DDI_FAILURE); 2376 } 2377 pp = pp->p_next; 2378 } 2379 break; 2380 2381 case DMA_OTYP_VADDR: 2382 case DMA_OTYP_BUFVADDR: 2383 pplist = dma->dp_dma.dmao_obj.virt_obj.v_priv; 2384 /* 2385 * for an array of pp's walk through them to make sure they're 2386 * not free. It's possible that they may not be locked. 2387 */ 2388 if (pplist) { 2389 for (i = 0; i < pcnt; i++) { 2390 if (PP_ISFREE(pplist[i])) { 2391 return (DDI_FAILURE); 2392 } 2393 } 2394 2395 /* For a virtual address, try to peek at each page */ 2396 } else { 2397 if (dma->dp_sglinfo.si_asp == &kas) { 2398 for (i = 0; i < pcnt; i++) { 2399 if (ddi_peek8(NULL, vaddr, &b) == 2400 DDI_FAILURE) 2401 return (DDI_FAILURE); 2402 vaddr += MMU_PAGESIZE; 2403 } 2404 } 2405 } 2406 break; 2407 2408 default: 2409 ASSERT(0); 2410 break; 2411 } 2412 2413 return (DDI_SUCCESS); 2414 } 2415 2416 2417 /* 2418 * rootnex_clean_dmahdl() 2419 * Clean the dma handle. This should be called on a handle alloc and an 2420 * unbind handle. Set the handle state to the default settings. 2421 */ 2422 static void 2423 rootnex_clean_dmahdl(ddi_dma_impl_t *hp) 2424 { 2425 rootnex_dma_t *dma; 2426 2427 2428 dma = (rootnex_dma_t *)hp->dmai_private; 2429 2430 hp->dmai_nwin = 0; 2431 dma->dp_current_cookie = 0; 2432 dma->dp_copybuf_size = 0; 2433 dma->dp_window = NULL; 2434 dma->dp_cbaddr = NULL; 2435 dma->dp_inuse = B_FALSE; 2436 dma->dp_need_to_free_cookie = B_FALSE; 2437 dma->dp_need_to_switch_cookies = B_FALSE; 2438 dma->dp_saved_cookies = NULL; 2439 dma->dp_sleep_flags = KM_PANIC; 2440 dma->dp_need_to_free_window = B_FALSE; 2441 dma->dp_partial_required = B_FALSE; 2442 dma->dp_trim_required = B_FALSE; 2443 dma->dp_sglinfo.si_copybuf_req = 0; 2444 #if !defined(__amd64) 2445 dma->dp_cb_remaping = B_FALSE; 2446 dma->dp_kva = NULL; 2447 #endif 2448 2449 /* FMA related initialization */ 2450 hp->dmai_fault = 0; 2451 hp->dmai_fault_check = NULL; 2452 hp->dmai_fault_notify = NULL; 2453 hp->dmai_error.err_ena = 0; 2454 hp->dmai_error.err_status = DDI_FM_OK; 2455 hp->dmai_error.err_expected = DDI_FM_ERR_UNEXPECTED; 2456 hp->dmai_error.err_ontrap = NULL; 2457 hp->dmai_error.err_fep = NULL; 2458 hp->dmai_error.err_cf = NULL; 2459 } 2460 2461 2462 /* 2463 * rootnex_valid_alloc_parms() 2464 * Called in ddi_dma_alloc_handle path to validate its parameters. 2465 */ 2466 static int 2467 rootnex_valid_alloc_parms(ddi_dma_attr_t *attr, uint_t maxsegmentsize) 2468 { 2469 if ((attr->dma_attr_seg < MMU_PAGEOFFSET) || 2470 (attr->dma_attr_count_max < MMU_PAGEOFFSET) || 2471 (attr->dma_attr_granular > MMU_PAGESIZE) || 2472 (attr->dma_attr_maxxfer < MMU_PAGESIZE)) { 2473 return (DDI_DMA_BADATTR); 2474 } 2475 2476 if (attr->dma_attr_addr_hi <= attr->dma_attr_addr_lo) { 2477 return (DDI_DMA_BADATTR); 2478 } 2479 2480 if ((attr->dma_attr_seg & MMU_PAGEOFFSET) != MMU_PAGEOFFSET || 2481 MMU_PAGESIZE & (attr->dma_attr_granular - 1) || 2482 attr->dma_attr_sgllen <= 0) { 2483 return (DDI_DMA_BADATTR); 2484 } 2485 2486 /* We should be able to DMA into every byte offset in a page */ 2487 if (maxsegmentsize < MMU_PAGESIZE) { 2488 return (DDI_DMA_BADATTR); 2489 } 2490 2491 return (DDI_SUCCESS); 2492 } 2493 2494 2495 /* 2496 * rootnex_valid_bind_parms() 2497 * Called in ddi_dma_*_bind_handle path to validate its parameters. 2498 */ 2499 /* ARGSUSED */ 2500 static int 2501 rootnex_valid_bind_parms(ddi_dma_req_t *dmareq, ddi_dma_attr_t *attr) 2502 { 2503 #if !defined(__amd64) 2504 /* 2505 * we only support up to a 2G-1 transfer size on 32-bit kernels so 2506 * we can track the offset for the obsoleted interfaces. 2507 */ 2508 if (dmareq->dmar_object.dmao_size > 0x7FFFFFFF) { 2509 return (DDI_DMA_TOOBIG); 2510 } 2511 #endif 2512 2513 return (DDI_SUCCESS); 2514 } 2515 2516 2517 /* 2518 * rootnex_get_sgl() 2519 * Called in bind fastpath to get the sgl. Most of this will be replaced 2520 * with a call to the vm layer when vm2.0 comes around... 2521 */ 2522 static void 2523 rootnex_get_sgl(ddi_dma_obj_t *dmar_object, ddi_dma_cookie_t *sgl, 2524 rootnex_sglinfo_t *sglinfo) 2525 { 2526 ddi_dma_atyp_t buftype; 2527 rootnex_addr_t raddr; 2528 uint64_t last_page; 2529 uint64_t offset; 2530 uint64_t addrhi; 2531 uint64_t addrlo; 2532 uint64_t maxseg; 2533 page_t **pplist; 2534 uint64_t paddr; 2535 uint32_t psize; 2536 uint32_t size; 2537 caddr_t vaddr; 2538 uint_t pcnt; 2539 page_t *pp; 2540 uint_t cnt; 2541 2542 2543 /* shortcuts */ 2544 pplist = dmar_object->dmao_obj.virt_obj.v_priv; 2545 vaddr = dmar_object->dmao_obj.virt_obj.v_addr; 2546 maxseg = sglinfo->si_max_cookie_size; 2547 buftype = dmar_object->dmao_type; 2548 addrhi = sglinfo->si_max_addr; 2549 addrlo = sglinfo->si_min_addr; 2550 size = dmar_object->dmao_size; 2551 2552 pcnt = 0; 2553 cnt = 0; 2554 2555 /* 2556 * if we were passed down a linked list of pages, i.e. pointer to 2557 * page_t, use this to get our physical address and buf offset. 2558 */ 2559 if (buftype == DMA_OTYP_PAGES) { 2560 pp = dmar_object->dmao_obj.pp_obj.pp_pp; 2561 ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2562 offset = dmar_object->dmao_obj.pp_obj.pp_offset & 2563 MMU_PAGEOFFSET; 2564 paddr = pfn_to_pa(pp->p_pagenum) + offset; 2565 psize = MIN(size, (MMU_PAGESIZE - offset)); 2566 pp = pp->p_next; 2567 sglinfo->si_asp = NULL; 2568 2569 /* 2570 * We weren't passed down a linked list of pages, but if we were passed 2571 * down an array of pages, use this to get our physical address and buf 2572 * offset. 2573 */ 2574 } else if (pplist != NULL) { 2575 ASSERT((buftype == DMA_OTYP_VADDR) || 2576 (buftype == DMA_OTYP_BUFVADDR)); 2577 2578 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2579 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2580 if (sglinfo->si_asp == NULL) { 2581 sglinfo->si_asp = &kas; 2582 } 2583 2584 ASSERT(!PP_ISFREE(pplist[pcnt])); 2585 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2586 paddr += offset; 2587 psize = MIN(size, (MMU_PAGESIZE - offset)); 2588 pcnt++; 2589 2590 /* 2591 * All we have is a virtual address, we'll need to call into the VM 2592 * to get the physical address. 2593 */ 2594 } else { 2595 ASSERT((buftype == DMA_OTYP_VADDR) || 2596 (buftype == DMA_OTYP_BUFVADDR)); 2597 2598 offset = (uintptr_t)vaddr & MMU_PAGEOFFSET; 2599 sglinfo->si_asp = dmar_object->dmao_obj.virt_obj.v_as; 2600 if (sglinfo->si_asp == NULL) { 2601 sglinfo->si_asp = &kas; 2602 } 2603 2604 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, vaddr)); 2605 paddr += offset; 2606 psize = MIN(size, (MMU_PAGESIZE - offset)); 2607 vaddr += psize; 2608 } 2609 2610 #ifdef __xpv 2611 /* 2612 * If we're dom0, we're using a real device so we need to load 2613 * the cookies with MFNs instead of PFNs. 2614 */ 2615 raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 2616 #else 2617 raddr = paddr; 2618 #endif 2619 2620 /* 2621 * Setup the first cookie with the physical address of the page and the 2622 * size of the page (which takes into account the initial offset into 2623 * the page. 2624 */ 2625 sgl[cnt].dmac_laddress = raddr; 2626 sgl[cnt].dmac_size = psize; 2627 sgl[cnt].dmac_type = 0; 2628 2629 /* 2630 * Save away the buffer offset into the page. We'll need this later in 2631 * the copy buffer code to help figure out the page index within the 2632 * buffer and the offset into the current page. 2633 */ 2634 sglinfo->si_buf_offset = offset; 2635 2636 /* 2637 * If the DMA engine can't reach the physical address, increase how 2638 * much copy buffer we need. We always increase by pagesize so we don't 2639 * have to worry about converting offsets. Set a flag in the cookies 2640 * dmac_type to indicate that it uses the copy buffer. If this isn't the 2641 * last cookie, go to the next cookie (since we separate each page which 2642 * uses the copy buffer in case the copy buffer is not physically 2643 * contiguous. 2644 */ 2645 if ((raddr < addrlo) || ((raddr + psize) > addrhi)) { 2646 sglinfo->si_copybuf_req += MMU_PAGESIZE; 2647 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2648 if ((cnt + 1) < sglinfo->si_max_pages) { 2649 cnt++; 2650 sgl[cnt].dmac_laddress = 0; 2651 sgl[cnt].dmac_size = 0; 2652 sgl[cnt].dmac_type = 0; 2653 } 2654 } 2655 2656 /* 2657 * save this page's physical address so we can figure out if the next 2658 * page is physically contiguous. Keep decrementing size until we are 2659 * done with the buffer. 2660 */ 2661 last_page = raddr & MMU_PAGEMASK; 2662 size -= psize; 2663 2664 while (size > 0) { 2665 /* Get the size for this page (i.e. partial or full page) */ 2666 psize = MIN(size, MMU_PAGESIZE); 2667 2668 if (buftype == DMA_OTYP_PAGES) { 2669 /* get the paddr from the page_t */ 2670 ASSERT(!PP_ISFREE(pp) && PAGE_LOCKED(pp)); 2671 paddr = pfn_to_pa(pp->p_pagenum); 2672 pp = pp->p_next; 2673 } else if (pplist != NULL) { 2674 /* index into the array of page_t's to get the paddr */ 2675 ASSERT(!PP_ISFREE(pplist[pcnt])); 2676 paddr = pfn_to_pa(pplist[pcnt]->p_pagenum); 2677 pcnt++; 2678 } else { 2679 /* call into the VM to get the paddr */ 2680 paddr = pfn_to_pa(hat_getpfnum(sglinfo->si_asp->a_hat, 2681 vaddr)); 2682 vaddr += psize; 2683 } 2684 2685 #ifdef __xpv 2686 /* 2687 * If we're dom0, we're using a real device so we need to load 2688 * the cookies with MFNs instead of PFNs. 2689 */ 2690 raddr = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 2691 #else 2692 raddr = paddr; 2693 #endif 2694 /* check to see if this page needs the copy buffer */ 2695 if ((raddr < addrlo) || ((raddr + psize) > addrhi)) { 2696 sglinfo->si_copybuf_req += MMU_PAGESIZE; 2697 2698 /* 2699 * if there is something in the current cookie, go to 2700 * the next one. We only want one page in a cookie which 2701 * uses the copybuf since the copybuf doesn't have to 2702 * be physically contiguous. 2703 */ 2704 if (sgl[cnt].dmac_size != 0) { 2705 cnt++; 2706 } 2707 sgl[cnt].dmac_laddress = raddr; 2708 sgl[cnt].dmac_size = psize; 2709 #if defined(__amd64) 2710 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF; 2711 #else 2712 /* 2713 * save the buf offset for 32-bit kernel. used in the 2714 * obsoleted interfaces. 2715 */ 2716 sgl[cnt].dmac_type = ROOTNEX_USES_COPYBUF | 2717 (dmar_object->dmao_size - size); 2718 #endif 2719 /* if this isn't the last cookie, go to the next one */ 2720 if ((cnt + 1) < sglinfo->si_max_pages) { 2721 cnt++; 2722 sgl[cnt].dmac_laddress = 0; 2723 sgl[cnt].dmac_size = 0; 2724 sgl[cnt].dmac_type = 0; 2725 } 2726 2727 /* 2728 * this page didn't need the copy buffer, if it's not physically 2729 * contiguous, or it would put us over a segment boundary, or it 2730 * puts us over the max cookie size, or the current sgl doesn't 2731 * have anything in it. 2732 */ 2733 } else if (((last_page + MMU_PAGESIZE) != raddr) || 2734 !(raddr & sglinfo->si_segmask) || 2735 ((sgl[cnt].dmac_size + psize) > maxseg) || 2736 (sgl[cnt].dmac_size == 0)) { 2737 /* 2738 * if we're not already in a new cookie, go to the next 2739 * cookie. 2740 */ 2741 if (sgl[cnt].dmac_size != 0) { 2742 cnt++; 2743 } 2744 2745 /* save the cookie information */ 2746 sgl[cnt].dmac_laddress = raddr; 2747 sgl[cnt].dmac_size = psize; 2748 #if defined(__amd64) 2749 sgl[cnt].dmac_type = 0; 2750 #else 2751 /* 2752 * save the buf offset for 32-bit kernel. used in the 2753 * obsoleted interfaces. 2754 */ 2755 sgl[cnt].dmac_type = dmar_object->dmao_size - size; 2756 #endif 2757 2758 /* 2759 * this page didn't need the copy buffer, it is physically 2760 * contiguous with the last page, and it's <= the max cookie 2761 * size. 2762 */ 2763 } else { 2764 sgl[cnt].dmac_size += psize; 2765 2766 /* 2767 * if this exactly == the maximum cookie size, and 2768 * it isn't the last cookie, go to the next cookie. 2769 */ 2770 if (((sgl[cnt].dmac_size + psize) == maxseg) && 2771 ((cnt + 1) < sglinfo->si_max_pages)) { 2772 cnt++; 2773 sgl[cnt].dmac_laddress = 0; 2774 sgl[cnt].dmac_size = 0; 2775 sgl[cnt].dmac_type = 0; 2776 } 2777 } 2778 2779 /* 2780 * save this page's physical address so we can figure out if the 2781 * next page is physically contiguous. Keep decrementing size 2782 * until we are done with the buffer. 2783 */ 2784 last_page = raddr; 2785 size -= psize; 2786 } 2787 2788 /* we're done, save away how many cookies the sgl has */ 2789 if (sgl[cnt].dmac_size == 0) { 2790 ASSERT(cnt < sglinfo->si_max_pages); 2791 sglinfo->si_sgl_size = cnt; 2792 } else { 2793 sglinfo->si_sgl_size = cnt + 1; 2794 } 2795 } 2796 2797 2798 /* 2799 * rootnex_bind_slowpath() 2800 * Call in the bind path if the calling driver can't use the sgl without 2801 * modifying it. We either need to use the copy buffer and/or we will end up 2802 * with a partial bind. 2803 */ 2804 static int 2805 rootnex_bind_slowpath(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 2806 rootnex_dma_t *dma, ddi_dma_attr_t *attr, int kmflag) 2807 { 2808 rootnex_sglinfo_t *sinfo; 2809 rootnex_window_t *window; 2810 ddi_dma_cookie_t *cookie; 2811 size_t copybuf_used; 2812 size_t dmac_size; 2813 boolean_t partial; 2814 off_t cur_offset; 2815 page_t *cur_pp; 2816 major_t mnum; 2817 int e; 2818 int i; 2819 2820 2821 sinfo = &dma->dp_sglinfo; 2822 copybuf_used = 0; 2823 partial = B_FALSE; 2824 2825 /* 2826 * If we're using the copybuf, set the copybuf state in dma struct. 2827 * Needs to be first since it sets the copy buffer size. 2828 */ 2829 if (sinfo->si_copybuf_req != 0) { 2830 e = rootnex_setup_copybuf(hp, dmareq, dma, attr); 2831 if (e != DDI_SUCCESS) { 2832 return (e); 2833 } 2834 } else { 2835 dma->dp_copybuf_size = 0; 2836 } 2837 2838 /* 2839 * Figure out if we need to do a partial mapping. If so, figure out 2840 * if we need to trim the buffers when we munge the sgl. 2841 */ 2842 if ((dma->dp_copybuf_size < sinfo->si_copybuf_req) || 2843 (dma->dp_dma.dmao_size > dma->dp_maxxfer) || 2844 (attr->dma_attr_sgllen < sinfo->si_sgl_size)) { 2845 dma->dp_partial_required = B_TRUE; 2846 if (attr->dma_attr_granular != 1) { 2847 dma->dp_trim_required = B_TRUE; 2848 } 2849 } else { 2850 dma->dp_partial_required = B_FALSE; 2851 dma->dp_trim_required = B_FALSE; 2852 } 2853 2854 /* If we need to do a partial bind, make sure the driver supports it */ 2855 if (dma->dp_partial_required && 2856 !(dmareq->dmar_flags & DDI_DMA_PARTIAL)) { 2857 2858 mnum = ddi_driver_major(dma->dp_dip); 2859 /* 2860 * patchable which allows us to print one warning per major 2861 * number. 2862 */ 2863 if ((rootnex_bind_warn) && 2864 ((rootnex_warn_list[mnum] & ROOTNEX_BIND_WARNING) == 0)) { 2865 rootnex_warn_list[mnum] |= ROOTNEX_BIND_WARNING; 2866 cmn_err(CE_WARN, "!%s: coding error detected, the " 2867 "driver is using ddi_dma_attr(9S) incorrectly. " 2868 "There is a small risk of data corruption in " 2869 "particular with large I/Os. The driver should be " 2870 "replaced with a corrected version for proper " 2871 "system operation. To disable this warning, add " 2872 "'set rootnex:rootnex_bind_warn=0' to " 2873 "/etc/system(4).", ddi_driver_name(dma->dp_dip)); 2874 } 2875 return (DDI_DMA_TOOBIG); 2876 } 2877 2878 /* 2879 * we might need multiple windows, setup state to handle them. In this 2880 * code path, we will have at least one window. 2881 */ 2882 e = rootnex_setup_windows(hp, dma, attr, kmflag); 2883 if (e != DDI_SUCCESS) { 2884 rootnex_teardown_copybuf(dma); 2885 return (e); 2886 } 2887 2888 window = &dma->dp_window[0]; 2889 cookie = &dma->dp_cookies[0]; 2890 cur_offset = 0; 2891 rootnex_init_win(hp, dma, window, cookie, cur_offset); 2892 if (dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) { 2893 cur_pp = dmareq->dmar_object.dmao_obj.pp_obj.pp_pp; 2894 } 2895 2896 /* loop though all the cookies we got back from get_sgl() */ 2897 for (i = 0; i < sinfo->si_sgl_size; i++) { 2898 /* 2899 * If we're using the copy buffer, check this cookie and setup 2900 * its associated copy buffer state. If this cookie uses the 2901 * copy buffer, make sure we sync this window during dma_sync. 2902 */ 2903 if (dma->dp_copybuf_size > 0) { 2904 rootnex_setup_cookie(&dmareq->dmar_object, dma, cookie, 2905 cur_offset, ©buf_used, &cur_pp); 2906 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2907 window->wd_dosync = B_TRUE; 2908 } 2909 } 2910 2911 /* 2912 * save away the cookie size, since it could be modified in 2913 * the windowing code. 2914 */ 2915 dmac_size = cookie->dmac_size; 2916 2917 /* if we went over max copybuf size */ 2918 if (dma->dp_copybuf_size && 2919 (copybuf_used > dma->dp_copybuf_size)) { 2920 partial = B_TRUE; 2921 e = rootnex_copybuf_window_boundary(hp, dma, &window, 2922 cookie, cur_offset, ©buf_used); 2923 if (e != DDI_SUCCESS) { 2924 rootnex_teardown_copybuf(dma); 2925 rootnex_teardown_windows(dma); 2926 return (e); 2927 } 2928 2929 /* 2930 * if the coookie uses the copy buffer, make sure the 2931 * new window we just moved to is set to sync. 2932 */ 2933 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2934 window->wd_dosync = B_TRUE; 2935 } 2936 DTRACE_PROBE1(rootnex__copybuf__window, dev_info_t *, 2937 dma->dp_dip); 2938 2939 /* if the cookie cnt == max sgllen, move to the next window */ 2940 } else if (window->wd_cookie_cnt >= attr->dma_attr_sgllen) { 2941 partial = B_TRUE; 2942 ASSERT(window->wd_cookie_cnt == attr->dma_attr_sgllen); 2943 e = rootnex_sgllen_window_boundary(hp, dma, &window, 2944 cookie, attr, cur_offset); 2945 if (e != DDI_SUCCESS) { 2946 rootnex_teardown_copybuf(dma); 2947 rootnex_teardown_windows(dma); 2948 return (e); 2949 } 2950 2951 /* 2952 * if the coookie uses the copy buffer, make sure the 2953 * new window we just moved to is set to sync. 2954 */ 2955 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2956 window->wd_dosync = B_TRUE; 2957 } 2958 DTRACE_PROBE1(rootnex__sgllen__window, dev_info_t *, 2959 dma->dp_dip); 2960 2961 /* else if we will be over maxxfer */ 2962 } else if ((window->wd_size + dmac_size) > 2963 dma->dp_maxxfer) { 2964 partial = B_TRUE; 2965 e = rootnex_maxxfer_window_boundary(hp, dma, &window, 2966 cookie); 2967 if (e != DDI_SUCCESS) { 2968 rootnex_teardown_copybuf(dma); 2969 rootnex_teardown_windows(dma); 2970 return (e); 2971 } 2972 2973 /* 2974 * if the coookie uses the copy buffer, make sure the 2975 * new window we just moved to is set to sync. 2976 */ 2977 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 2978 window->wd_dosync = B_TRUE; 2979 } 2980 DTRACE_PROBE1(rootnex__maxxfer__window, dev_info_t *, 2981 dma->dp_dip); 2982 2983 /* else this cookie fits in the current window */ 2984 } else { 2985 window->wd_cookie_cnt++; 2986 window->wd_size += dmac_size; 2987 } 2988 2989 /* track our offset into the buffer, go to the next cookie */ 2990 ASSERT(dmac_size <= dma->dp_dma.dmao_size); 2991 ASSERT(cookie->dmac_size <= dmac_size); 2992 cur_offset += dmac_size; 2993 cookie++; 2994 } 2995 2996 /* if we ended up with a zero sized window in the end, clean it up */ 2997 if (window->wd_size == 0) { 2998 hp->dmai_nwin--; 2999 window--; 3000 } 3001 3002 ASSERT(window->wd_trim.tr_trim_last == B_FALSE); 3003 3004 if (!partial) { 3005 return (DDI_DMA_MAPPED); 3006 } 3007 3008 ASSERT(dma->dp_partial_required); 3009 return (DDI_DMA_PARTIAL_MAP); 3010 } 3011 3012 3013 /* 3014 * rootnex_setup_copybuf() 3015 * Called in bind slowpath. Figures out if we're going to use the copy 3016 * buffer, and if we do, sets up the basic state to handle it. 3017 */ 3018 static int 3019 rootnex_setup_copybuf(ddi_dma_impl_t *hp, struct ddi_dma_req *dmareq, 3020 rootnex_dma_t *dma, ddi_dma_attr_t *attr) 3021 { 3022 rootnex_sglinfo_t *sinfo; 3023 ddi_dma_attr_t lattr; 3024 size_t max_copybuf; 3025 int cansleep; 3026 int e; 3027 #if !defined(__amd64) 3028 int vmflag; 3029 #endif 3030 3031 3032 sinfo = &dma->dp_sglinfo; 3033 3034 /* read this first so it's consistent through the routine */ 3035 max_copybuf = i_ddi_copybuf_size() & MMU_PAGEMASK; 3036 3037 /* We need to call into the rootnex on ddi_dma_sync() */ 3038 hp->dmai_rflags &= ~DMP_NOSYNC; 3039 3040 /* make sure the copybuf size <= the max size */ 3041 dma->dp_copybuf_size = MIN(sinfo->si_copybuf_req, max_copybuf); 3042 ASSERT((dma->dp_copybuf_size & MMU_PAGEOFFSET) == 0); 3043 3044 #if !defined(__amd64) 3045 /* 3046 * if we don't have kva space to copy to/from, allocate the KVA space 3047 * now. We only do this for the 32-bit kernel. We use seg kpm space for 3048 * the 64-bit kernel. 3049 */ 3050 if ((dmareq->dmar_object.dmao_type == DMA_OTYP_PAGES) || 3051 (dmareq->dmar_object.dmao_obj.virt_obj.v_as != NULL)) { 3052 3053 /* convert the sleep flags */ 3054 if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 3055 vmflag = VM_SLEEP; 3056 } else { 3057 vmflag = VM_NOSLEEP; 3058 } 3059 3060 /* allocate Kernel VA space that we can bcopy to/from */ 3061 dma->dp_kva = vmem_alloc(heap_arena, dma->dp_copybuf_size, 3062 vmflag); 3063 if (dma->dp_kva == NULL) { 3064 return (DDI_DMA_NORESOURCES); 3065 } 3066 } 3067 #endif 3068 3069 /* convert the sleep flags */ 3070 if (dmareq->dmar_fp == DDI_DMA_SLEEP) { 3071 cansleep = 1; 3072 } else { 3073 cansleep = 0; 3074 } 3075 3076 /* 3077 * Allocate the actual copy buffer. This needs to fit within the DMA 3078 * engine limits, so we can't use kmem_alloc... We don't need 3079 * contiguous memory (sgllen) since we will be forcing windows on 3080 * sgllen anyway. 3081 */ 3082 lattr = *attr; 3083 lattr.dma_attr_align = MMU_PAGESIZE; 3084 /* 3085 * this should be < 0 to indicate no limit, but due to a bug in 3086 * the rootnex, we'll set it to the maximum positive int. 3087 */ 3088 lattr.dma_attr_sgllen = 0x7fffffff; 3089 e = i_ddi_mem_alloc(dma->dp_dip, &lattr, dma->dp_copybuf_size, cansleep, 3090 0, NULL, &dma->dp_cbaddr, &dma->dp_cbsize, NULL); 3091 if (e != DDI_SUCCESS) { 3092 #if !defined(__amd64) 3093 if (dma->dp_kva != NULL) { 3094 vmem_free(heap_arena, dma->dp_kva, 3095 dma->dp_copybuf_size); 3096 } 3097 #endif 3098 return (DDI_DMA_NORESOURCES); 3099 } 3100 3101 DTRACE_PROBE2(rootnex__alloc__copybuf, dev_info_t *, dma->dp_dip, 3102 size_t, dma->dp_copybuf_size); 3103 3104 return (DDI_SUCCESS); 3105 } 3106 3107 3108 /* 3109 * rootnex_setup_windows() 3110 * Called in bind slowpath to setup the window state. We always have windows 3111 * in the slowpath. Even if the window count = 1. 3112 */ 3113 static int 3114 rootnex_setup_windows(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3115 ddi_dma_attr_t *attr, int kmflag) 3116 { 3117 rootnex_window_t *windowp; 3118 rootnex_sglinfo_t *sinfo; 3119 size_t copy_state_size; 3120 size_t win_state_size; 3121 size_t state_available; 3122 size_t space_needed; 3123 uint_t copybuf_win; 3124 uint_t maxxfer_win; 3125 size_t space_used; 3126 uint_t sglwin; 3127 3128 3129 sinfo = &dma->dp_sglinfo; 3130 3131 dma->dp_current_win = 0; 3132 hp->dmai_nwin = 0; 3133 3134 /* If we don't need to do a partial, we only have one window */ 3135 if (!dma->dp_partial_required) { 3136 dma->dp_max_win = 1; 3137 3138 /* 3139 * we need multiple windows, need to figure out the worse case number 3140 * of windows. 3141 */ 3142 } else { 3143 /* 3144 * if we need windows because we need more copy buffer that 3145 * we allow, the worse case number of windows we could need 3146 * here would be (copybuf space required / copybuf space that 3147 * we have) plus one for remainder, and plus 2 to handle the 3148 * extra pages on the trim for the first and last pages of the 3149 * buffer (a page is the minimum window size so under the right 3150 * attr settings, you could have a window for each page). 3151 * The last page will only be hit here if the size is not a 3152 * multiple of the granularity (which theoretically shouldn't 3153 * be the case but never has been enforced, so we could have 3154 * broken things without it). 3155 */ 3156 if (sinfo->si_copybuf_req > dma->dp_copybuf_size) { 3157 ASSERT(dma->dp_copybuf_size > 0); 3158 copybuf_win = (sinfo->si_copybuf_req / 3159 dma->dp_copybuf_size) + 1 + 2; 3160 } else { 3161 copybuf_win = 0; 3162 } 3163 3164 /* 3165 * if we need windows because we have more cookies than the H/W 3166 * can handle, the number of windows we would need here would 3167 * be (cookie count / cookies count H/W supports) plus one for 3168 * remainder, and plus 2 to handle the extra pages on the trim 3169 * (see above comment about trim) 3170 */ 3171 if (attr->dma_attr_sgllen < sinfo->si_sgl_size) { 3172 sglwin = ((sinfo->si_sgl_size / attr->dma_attr_sgllen) 3173 + 1) + 2; 3174 } else { 3175 sglwin = 0; 3176 } 3177 3178 /* 3179 * if we need windows because we're binding more memory than the 3180 * H/W can transfer at once, the number of windows we would need 3181 * here would be (xfer count / max xfer H/W supports) plus one 3182 * for remainder, and plus 2 to handle the extra pages on the 3183 * trim (see above comment about trim) 3184 */ 3185 if (dma->dp_dma.dmao_size > dma->dp_maxxfer) { 3186 maxxfer_win = (dma->dp_dma.dmao_size / 3187 dma->dp_maxxfer) + 1 + 2; 3188 } else { 3189 maxxfer_win = 0; 3190 } 3191 dma->dp_max_win = copybuf_win + sglwin + maxxfer_win; 3192 ASSERT(dma->dp_max_win > 0); 3193 } 3194 win_state_size = dma->dp_max_win * sizeof (rootnex_window_t); 3195 3196 /* 3197 * Get space for window and potential copy buffer state. Before we 3198 * go and allocate memory, see if we can get away with using what's 3199 * left in the pre-allocted state or the dynamically allocated sgl. 3200 */ 3201 space_used = (uintptr_t)(sinfo->si_sgl_size * 3202 sizeof (ddi_dma_cookie_t)); 3203 3204 /* if we dynamically allocated space for the cookies */ 3205 if (dma->dp_need_to_free_cookie) { 3206 /* if we have more space in the pre-allocted buffer, use it */ 3207 ASSERT(space_used <= dma->dp_cookie_size); 3208 if ((dma->dp_cookie_size - space_used) <= 3209 rootnex_state->r_prealloc_size) { 3210 state_available = rootnex_state->r_prealloc_size; 3211 windowp = (rootnex_window_t *)dma->dp_prealloc_buffer; 3212 3213 /* 3214 * else, we have more free space in the dynamically allocated 3215 * buffer, i.e. the buffer wasn't worse case fragmented so we 3216 * didn't need a lot of cookies. 3217 */ 3218 } else { 3219 state_available = dma->dp_cookie_size - space_used; 3220 windowp = (rootnex_window_t *) 3221 &dma->dp_cookies[sinfo->si_sgl_size]; 3222 } 3223 3224 /* we used the pre-alloced buffer */ 3225 } else { 3226 ASSERT(space_used <= rootnex_state->r_prealloc_size); 3227 state_available = rootnex_state->r_prealloc_size - space_used; 3228 windowp = (rootnex_window_t *) 3229 &dma->dp_cookies[sinfo->si_sgl_size]; 3230 } 3231 3232 /* 3233 * figure out how much state we need to track the copy buffer. Add an 3234 * addition 8 bytes for pointer alignemnt later. 3235 */ 3236 if (dma->dp_copybuf_size > 0) { 3237 copy_state_size = sinfo->si_max_pages * 3238 sizeof (rootnex_pgmap_t); 3239 } else { 3240 copy_state_size = 0; 3241 } 3242 /* add an additional 8 bytes for pointer alignment */ 3243 space_needed = win_state_size + copy_state_size + 0x8; 3244 3245 /* if we have enough space already, use it */ 3246 if (state_available >= space_needed) { 3247 dma->dp_window = windowp; 3248 dma->dp_need_to_free_window = B_FALSE; 3249 3250 /* not enough space, need to allocate more. */ 3251 } else { 3252 dma->dp_window = kmem_alloc(space_needed, kmflag); 3253 if (dma->dp_window == NULL) { 3254 return (DDI_DMA_NORESOURCES); 3255 } 3256 dma->dp_need_to_free_window = B_TRUE; 3257 dma->dp_window_size = space_needed; 3258 DTRACE_PROBE2(rootnex__bind__sp__alloc, dev_info_t *, 3259 dma->dp_dip, size_t, space_needed); 3260 } 3261 3262 /* 3263 * we allocate copy buffer state and window state at the same time. 3264 * setup our copy buffer state pointers. Make sure it's aligned. 3265 */ 3266 if (dma->dp_copybuf_size > 0) { 3267 dma->dp_pgmap = (rootnex_pgmap_t *)(((uintptr_t) 3268 &dma->dp_window[dma->dp_max_win] + 0x7) & ~0x7); 3269 3270 #if !defined(__amd64) 3271 /* 3272 * make sure all pm_mapped, pm_vaddr, and pm_pp are set to 3273 * false/NULL. Should be quicker to bzero vs loop and set. 3274 */ 3275 bzero(dma->dp_pgmap, copy_state_size); 3276 #endif 3277 } else { 3278 dma->dp_pgmap = NULL; 3279 } 3280 3281 return (DDI_SUCCESS); 3282 } 3283 3284 3285 /* 3286 * rootnex_teardown_copybuf() 3287 * cleans up after rootnex_setup_copybuf() 3288 */ 3289 static void 3290 rootnex_teardown_copybuf(rootnex_dma_t *dma) 3291 { 3292 #if !defined(__amd64) 3293 int i; 3294 3295 /* 3296 * if we allocated kernel heap VMEM space, go through all the pages and 3297 * map out any of the ones that we're mapped into the kernel heap VMEM 3298 * arena. Then free the VMEM space. 3299 */ 3300 if (dma->dp_kva != NULL) { 3301 for (i = 0; i < dma->dp_sglinfo.si_max_pages; i++) { 3302 if (dma->dp_pgmap[i].pm_mapped) { 3303 hat_unload(kas.a_hat, dma->dp_pgmap[i].pm_kaddr, 3304 MMU_PAGESIZE, HAT_UNLOAD); 3305 dma->dp_pgmap[i].pm_mapped = B_FALSE; 3306 } 3307 } 3308 3309 vmem_free(heap_arena, dma->dp_kva, dma->dp_copybuf_size); 3310 } 3311 3312 #endif 3313 3314 /* if we allocated a copy buffer, free it */ 3315 if (dma->dp_cbaddr != NULL) { 3316 i_ddi_mem_free(dma->dp_cbaddr, NULL); 3317 } 3318 } 3319 3320 3321 /* 3322 * rootnex_teardown_windows() 3323 * cleans up after rootnex_setup_windows() 3324 */ 3325 static void 3326 rootnex_teardown_windows(rootnex_dma_t *dma) 3327 { 3328 /* 3329 * if we had to allocate window state on the last bind (because we 3330 * didn't have enough pre-allocated space in the handle), free it. 3331 */ 3332 if (dma->dp_need_to_free_window) { 3333 kmem_free(dma->dp_window, dma->dp_window_size); 3334 } 3335 } 3336 3337 3338 /* 3339 * rootnex_init_win() 3340 * Called in bind slow path during creation of a new window. Initializes 3341 * window state to default values. 3342 */ 3343 /*ARGSUSED*/ 3344 static void 3345 rootnex_init_win(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3346 rootnex_window_t *window, ddi_dma_cookie_t *cookie, off_t cur_offset) 3347 { 3348 hp->dmai_nwin++; 3349 window->wd_dosync = B_FALSE; 3350 window->wd_offset = cur_offset; 3351 window->wd_size = 0; 3352 window->wd_first_cookie = cookie; 3353 window->wd_cookie_cnt = 0; 3354 window->wd_trim.tr_trim_first = B_FALSE; 3355 window->wd_trim.tr_trim_last = B_FALSE; 3356 window->wd_trim.tr_first_copybuf_win = B_FALSE; 3357 window->wd_trim.tr_last_copybuf_win = B_FALSE; 3358 #if !defined(__amd64) 3359 window->wd_remap_copybuf = dma->dp_cb_remaping; 3360 #endif 3361 } 3362 3363 3364 /* 3365 * rootnex_setup_cookie() 3366 * Called in the bind slow path when the sgl uses the copy buffer. If any of 3367 * the sgl uses the copy buffer, we need to go through each cookie, figure 3368 * out if it uses the copy buffer, and if it does, save away everything we'll 3369 * need during sync. 3370 */ 3371 static void 3372 rootnex_setup_cookie(ddi_dma_obj_t *dmar_object, rootnex_dma_t *dma, 3373 ddi_dma_cookie_t *cookie, off_t cur_offset, size_t *copybuf_used, 3374 page_t **cur_pp) 3375 { 3376 boolean_t copybuf_sz_power_2; 3377 rootnex_sglinfo_t *sinfo; 3378 paddr_t paddr; 3379 uint_t pidx; 3380 uint_t pcnt; 3381 off_t poff; 3382 #if defined(__amd64) 3383 pfn_t pfn; 3384 #else 3385 page_t **pplist; 3386 #endif 3387 3388 sinfo = &dma->dp_sglinfo; 3389 3390 /* 3391 * Calculate the page index relative to the start of the buffer. The 3392 * index to the current page for our buffer is the offset into the 3393 * first page of the buffer plus our current offset into the buffer 3394 * itself, shifted of course... 3395 */ 3396 pidx = (sinfo->si_buf_offset + cur_offset) >> MMU_PAGESHIFT; 3397 ASSERT(pidx < sinfo->si_max_pages); 3398 3399 /* if this cookie uses the copy buffer */ 3400 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3401 /* 3402 * NOTE: we know that since this cookie uses the copy buffer, it 3403 * is <= MMU_PAGESIZE. 3404 */ 3405 3406 /* 3407 * get the offset into the page. For the 64-bit kernel, get the 3408 * pfn which we'll use with seg kpm. 3409 */ 3410 poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 3411 #if defined(__amd64) 3412 /* mfn_to_pfn() is a NOP on i86pc */ 3413 pfn = mfn_to_pfn(cookie->dmac_laddress >> MMU_PAGESHIFT); 3414 #endif /* __amd64 */ 3415 3416 /* figure out if the copybuf size is a power of 2 */ 3417 if (dma->dp_copybuf_size & (dma->dp_copybuf_size - 1)) { 3418 copybuf_sz_power_2 = B_FALSE; 3419 } else { 3420 copybuf_sz_power_2 = B_TRUE; 3421 } 3422 3423 /* This page uses the copy buffer */ 3424 dma->dp_pgmap[pidx].pm_uses_copybuf = B_TRUE; 3425 3426 /* 3427 * save the copy buffer KVA that we'll use with this page. 3428 * if we still fit within the copybuf, it's a simple add. 3429 * otherwise, we need to wrap over using & or % accordingly. 3430 */ 3431 if ((*copybuf_used + MMU_PAGESIZE) <= dma->dp_copybuf_size) { 3432 dma->dp_pgmap[pidx].pm_cbaddr = dma->dp_cbaddr + 3433 *copybuf_used; 3434 } else { 3435 if (copybuf_sz_power_2) { 3436 dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3437 (uintptr_t)dma->dp_cbaddr + 3438 (*copybuf_used & 3439 (dma->dp_copybuf_size - 1))); 3440 } else { 3441 dma->dp_pgmap[pidx].pm_cbaddr = (caddr_t)( 3442 (uintptr_t)dma->dp_cbaddr + 3443 (*copybuf_used % dma->dp_copybuf_size)); 3444 } 3445 } 3446 3447 /* 3448 * over write the cookie physical address with the address of 3449 * the physical address of the copy buffer page that we will 3450 * use. 3451 */ 3452 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 3453 dma->dp_pgmap[pidx].pm_cbaddr)) + poff; 3454 3455 #ifdef __xpv 3456 /* 3457 * If we're dom0, we're using a real device so we need to load 3458 * the cookies with MAs instead of PAs. 3459 */ 3460 cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 3461 #else 3462 cookie->dmac_laddress = paddr; 3463 #endif 3464 3465 /* if we have a kernel VA, it's easy, just save that address */ 3466 if ((dmar_object->dmao_type != DMA_OTYP_PAGES) && 3467 (sinfo->si_asp == &kas)) { 3468 /* 3469 * save away the page aligned virtual address of the 3470 * driver buffer. Offsets are handled in the sync code. 3471 */ 3472 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t)(((uintptr_t) 3473 dmar_object->dmao_obj.virt_obj.v_addr + cur_offset) 3474 & MMU_PAGEMASK); 3475 #if !defined(__amd64) 3476 /* 3477 * we didn't need to, and will never need to map this 3478 * page. 3479 */ 3480 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3481 #endif 3482 3483 /* we don't have a kernel VA. We need one for the bcopy. */ 3484 } else { 3485 #if defined(__amd64) 3486 /* 3487 * for the 64-bit kernel, it's easy. We use seg kpm to 3488 * get a Kernel VA for the corresponding pfn. 3489 */ 3490 dma->dp_pgmap[pidx].pm_kaddr = hat_kpm_pfn2va(pfn); 3491 #else 3492 /* 3493 * for the 32-bit kernel, this is a pain. First we'll 3494 * save away the page_t or user VA for this page. This 3495 * is needed in rootnex_dma_win() when we switch to a 3496 * new window which requires us to re-map the copy 3497 * buffer. 3498 */ 3499 pplist = dmar_object->dmao_obj.virt_obj.v_priv; 3500 if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3501 dma->dp_pgmap[pidx].pm_pp = *cur_pp; 3502 dma->dp_pgmap[pidx].pm_vaddr = NULL; 3503 } else if (pplist != NULL) { 3504 dma->dp_pgmap[pidx].pm_pp = pplist[pidx]; 3505 dma->dp_pgmap[pidx].pm_vaddr = NULL; 3506 } else { 3507 dma->dp_pgmap[pidx].pm_pp = NULL; 3508 dma->dp_pgmap[pidx].pm_vaddr = (caddr_t) 3509 (((uintptr_t) 3510 dmar_object->dmao_obj.virt_obj.v_addr + 3511 cur_offset) & MMU_PAGEMASK); 3512 } 3513 3514 /* 3515 * save away the page aligned virtual address which was 3516 * allocated from the kernel heap arena (taking into 3517 * account if we need more copy buffer than we alloced 3518 * and use multiple windows to handle this, i.e. &,%). 3519 * NOTE: there isn't and physical memory backing up this 3520 * virtual address space currently. 3521 */ 3522 if ((*copybuf_used + MMU_PAGESIZE) <= 3523 dma->dp_copybuf_size) { 3524 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3525 (((uintptr_t)dma->dp_kva + *copybuf_used) & 3526 MMU_PAGEMASK); 3527 } else { 3528 if (copybuf_sz_power_2) { 3529 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3530 (((uintptr_t)dma->dp_kva + 3531 (*copybuf_used & 3532 (dma->dp_copybuf_size - 1))) & 3533 MMU_PAGEMASK); 3534 } else { 3535 dma->dp_pgmap[pidx].pm_kaddr = (caddr_t) 3536 (((uintptr_t)dma->dp_kva + 3537 (*copybuf_used % 3538 dma->dp_copybuf_size)) & 3539 MMU_PAGEMASK); 3540 } 3541 } 3542 3543 /* 3544 * if we haven't used up the available copy buffer yet, 3545 * map the kva to the physical page. 3546 */ 3547 if (!dma->dp_cb_remaping && ((*copybuf_used + 3548 MMU_PAGESIZE) <= dma->dp_copybuf_size)) { 3549 dma->dp_pgmap[pidx].pm_mapped = B_TRUE; 3550 if (dma->dp_pgmap[pidx].pm_pp != NULL) { 3551 i86_pp_map(dma->dp_pgmap[pidx].pm_pp, 3552 dma->dp_pgmap[pidx].pm_kaddr); 3553 } else { 3554 i86_va_map(dma->dp_pgmap[pidx].pm_vaddr, 3555 sinfo->si_asp, 3556 dma->dp_pgmap[pidx].pm_kaddr); 3557 } 3558 3559 /* 3560 * we've used up the available copy buffer, this page 3561 * will have to be mapped during rootnex_dma_win() when 3562 * we switch to a new window which requires a re-map 3563 * the copy buffer. (32-bit kernel only) 3564 */ 3565 } else { 3566 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3567 } 3568 #endif 3569 /* go to the next page_t */ 3570 if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3571 *cur_pp = (*cur_pp)->p_next; 3572 } 3573 } 3574 3575 /* add to the copy buffer count */ 3576 *copybuf_used += MMU_PAGESIZE; 3577 3578 /* 3579 * This cookie doesn't use the copy buffer. Walk through the pages this 3580 * cookie occupies to reflect this. 3581 */ 3582 } else { 3583 /* 3584 * figure out how many pages the cookie occupies. We need to 3585 * use the original page offset of the buffer and the cookies 3586 * offset in the buffer to do this. 3587 */ 3588 poff = (sinfo->si_buf_offset + cur_offset) & MMU_PAGEOFFSET; 3589 pcnt = mmu_btopr(cookie->dmac_size + poff); 3590 3591 while (pcnt > 0) { 3592 #if !defined(__amd64) 3593 /* 3594 * the 32-bit kernel doesn't have seg kpm, so we need 3595 * to map in the driver buffer (if it didn't come down 3596 * with a kernel VA) on the fly. Since this page doesn't 3597 * use the copy buffer, it's not, or will it ever, have 3598 * to be mapped in. 3599 */ 3600 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 3601 #endif 3602 dma->dp_pgmap[pidx].pm_uses_copybuf = B_FALSE; 3603 3604 /* 3605 * we need to update pidx and cur_pp or we'll loose 3606 * track of where we are. 3607 */ 3608 if (dmar_object->dmao_type == DMA_OTYP_PAGES) { 3609 *cur_pp = (*cur_pp)->p_next; 3610 } 3611 pidx++; 3612 pcnt--; 3613 } 3614 } 3615 } 3616 3617 3618 /* 3619 * rootnex_sgllen_window_boundary() 3620 * Called in the bind slow path when the next cookie causes us to exceed (in 3621 * this case == since we start at 0 and sgllen starts at 1) the maximum sgl 3622 * length supported by the DMA H/W. 3623 */ 3624 static int 3625 rootnex_sgllen_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3626 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, ddi_dma_attr_t *attr, 3627 off_t cur_offset) 3628 { 3629 off_t new_offset; 3630 size_t trim_sz; 3631 off_t coffset; 3632 3633 3634 /* 3635 * if we know we'll never have to trim, it's pretty easy. Just move to 3636 * the next window and init it. We're done. 3637 */ 3638 if (!dma->dp_trim_required) { 3639 (*windowp)++; 3640 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3641 (*windowp)->wd_cookie_cnt++; 3642 (*windowp)->wd_size = cookie->dmac_size; 3643 return (DDI_SUCCESS); 3644 } 3645 3646 /* figure out how much we need to trim from the window */ 3647 ASSERT(attr->dma_attr_granular != 0); 3648 if (dma->dp_granularity_power_2) { 3649 trim_sz = (*windowp)->wd_size & (attr->dma_attr_granular - 1); 3650 } else { 3651 trim_sz = (*windowp)->wd_size % attr->dma_attr_granular; 3652 } 3653 3654 /* The window's a whole multiple of granularity. We're done */ 3655 if (trim_sz == 0) { 3656 (*windowp)++; 3657 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3658 (*windowp)->wd_cookie_cnt++; 3659 (*windowp)->wd_size = cookie->dmac_size; 3660 return (DDI_SUCCESS); 3661 } 3662 3663 /* 3664 * The window's not a whole multiple of granularity, since we know this 3665 * is due to the sgllen, we need to go back to the last cookie and trim 3666 * that one, add the left over part of the old cookie into the new 3667 * window, and then add in the new cookie into the new window. 3668 */ 3669 3670 /* 3671 * make sure the driver isn't making us do something bad... Trimming and 3672 * sgllen == 1 don't go together. 3673 */ 3674 if (attr->dma_attr_sgllen == 1) { 3675 return (DDI_DMA_NOMAPPING); 3676 } 3677 3678 /* 3679 * first, setup the current window to account for the trim. Need to go 3680 * back to the last cookie for this. 3681 */ 3682 cookie--; 3683 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3684 (*windowp)->wd_trim.tr_last_cookie = cookie; 3685 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3686 ASSERT(cookie->dmac_size > trim_sz); 3687 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3688 (*windowp)->wd_size -= trim_sz; 3689 3690 /* save the buffer offsets for the next window */ 3691 coffset = cookie->dmac_size - trim_sz; 3692 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3693 3694 /* 3695 * set this now in case this is the first window. all other cases are 3696 * set in dma_win() 3697 */ 3698 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3699 3700 /* 3701 * initialize the next window using what's left over in the previous 3702 * cookie. 3703 */ 3704 (*windowp)++; 3705 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3706 (*windowp)->wd_cookie_cnt++; 3707 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3708 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 3709 (*windowp)->wd_trim.tr_first_size = trim_sz; 3710 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3711 (*windowp)->wd_dosync = B_TRUE; 3712 } 3713 3714 /* 3715 * now go back to the current cookie and add it to the new window. set 3716 * the new window size to the what was left over from the previous 3717 * cookie and what's in the current cookie. 3718 */ 3719 cookie++; 3720 (*windowp)->wd_cookie_cnt++; 3721 (*windowp)->wd_size = trim_sz + cookie->dmac_size; 3722 3723 /* 3724 * trim plus the next cookie could put us over maxxfer (a cookie can be 3725 * a max size of maxxfer). Handle that case. 3726 */ 3727 if ((*windowp)->wd_size > dma->dp_maxxfer) { 3728 /* 3729 * maxxfer is already a whole multiple of granularity, and this 3730 * trim will be <= the previous trim (since a cookie can't be 3731 * larger than maxxfer). Make things simple here. 3732 */ 3733 trim_sz = (*windowp)->wd_size - dma->dp_maxxfer; 3734 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3735 (*windowp)->wd_trim.tr_last_cookie = cookie; 3736 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3737 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3738 (*windowp)->wd_size -= trim_sz; 3739 ASSERT((*windowp)->wd_size == dma->dp_maxxfer); 3740 3741 /* save the buffer offsets for the next window */ 3742 coffset = cookie->dmac_size - trim_sz; 3743 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3744 3745 /* setup the next window */ 3746 (*windowp)++; 3747 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3748 (*windowp)->wd_cookie_cnt++; 3749 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3750 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 3751 coffset; 3752 (*windowp)->wd_trim.tr_first_size = trim_sz; 3753 } 3754 3755 return (DDI_SUCCESS); 3756 } 3757 3758 3759 /* 3760 * rootnex_copybuf_window_boundary() 3761 * Called in bind slowpath when we get to a window boundary because we used 3762 * up all the copy buffer that we have. 3763 */ 3764 static int 3765 rootnex_copybuf_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 3766 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie, off_t cur_offset, 3767 size_t *copybuf_used) 3768 { 3769 rootnex_sglinfo_t *sinfo; 3770 off_t new_offset; 3771 size_t trim_sz; 3772 paddr_t paddr; 3773 off_t coffset; 3774 uint_t pidx; 3775 off_t poff; 3776 3777 3778 sinfo = &dma->dp_sglinfo; 3779 3780 /* 3781 * the copy buffer should be a whole multiple of page size. We know that 3782 * this cookie is <= MMU_PAGESIZE. 3783 */ 3784 ASSERT(cookie->dmac_size <= MMU_PAGESIZE); 3785 3786 /* 3787 * from now on, all new windows in this bind need to be re-mapped during 3788 * ddi_dma_getwin() (32-bit kernel only). i.e. we ran out out copybuf 3789 * space... 3790 */ 3791 #if !defined(__amd64) 3792 dma->dp_cb_remaping = B_TRUE; 3793 #endif 3794 3795 /* reset copybuf used */ 3796 *copybuf_used = 0; 3797 3798 /* 3799 * if we don't have to trim (since granularity is set to 1), go to the 3800 * next window and add the current cookie to it. We know the current 3801 * cookie uses the copy buffer since we're in this code path. 3802 */ 3803 if (!dma->dp_trim_required) { 3804 (*windowp)++; 3805 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3806 3807 /* Add this cookie to the new window */ 3808 (*windowp)->wd_cookie_cnt++; 3809 (*windowp)->wd_size += cookie->dmac_size; 3810 *copybuf_used += MMU_PAGESIZE; 3811 return (DDI_SUCCESS); 3812 } 3813 3814 /* 3815 * *** may need to trim, figure it out. 3816 */ 3817 3818 /* figure out how much we need to trim from the window */ 3819 if (dma->dp_granularity_power_2) { 3820 trim_sz = (*windowp)->wd_size & 3821 (hp->dmai_attr.dma_attr_granular - 1); 3822 } else { 3823 trim_sz = (*windowp)->wd_size % hp->dmai_attr.dma_attr_granular; 3824 } 3825 3826 /* 3827 * if the window's a whole multiple of granularity, go to the next 3828 * window, init it, then add in the current cookie. We know the current 3829 * cookie uses the copy buffer since we're in this code path. 3830 */ 3831 if (trim_sz == 0) { 3832 (*windowp)++; 3833 rootnex_init_win(hp, dma, *windowp, cookie, cur_offset); 3834 3835 /* Add this cookie to the new window */ 3836 (*windowp)->wd_cookie_cnt++; 3837 (*windowp)->wd_size += cookie->dmac_size; 3838 *copybuf_used += MMU_PAGESIZE; 3839 return (DDI_SUCCESS); 3840 } 3841 3842 /* 3843 * *** We figured it out, we definitly need to trim 3844 */ 3845 3846 /* 3847 * make sure the driver isn't making us do something bad... 3848 * Trimming and sgllen == 1 don't go together. 3849 */ 3850 if (hp->dmai_attr.dma_attr_sgllen == 1) { 3851 return (DDI_DMA_NOMAPPING); 3852 } 3853 3854 /* 3855 * first, setup the current window to account for the trim. Need to go 3856 * back to the last cookie for this. Some of the last cookie will be in 3857 * the current window, and some of the last cookie will be in the new 3858 * window. All of the current cookie will be in the new window. 3859 */ 3860 cookie--; 3861 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 3862 (*windowp)->wd_trim.tr_last_cookie = cookie; 3863 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 3864 ASSERT(cookie->dmac_size > trim_sz); 3865 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 3866 (*windowp)->wd_size -= trim_sz; 3867 3868 /* 3869 * we're trimming the last cookie (not the current cookie). So that 3870 * last cookie may have or may not have been using the copy buffer ( 3871 * we know the cookie passed in uses the copy buffer since we're in 3872 * this code path). 3873 * 3874 * If the last cookie doesn't use the copy buffer, nothing special to 3875 * do. However, if it does uses the copy buffer, it will be both the 3876 * last page in the current window and the first page in the next 3877 * window. Since we are reusing the copy buffer (and KVA space on the 3878 * 32-bit kernel), this page will use the end of the copy buffer in the 3879 * current window, and the start of the copy buffer in the next window. 3880 * Track that info... The cookie physical address was already set to 3881 * the copy buffer physical address in setup_cookie.. 3882 */ 3883 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3884 pidx = (sinfo->si_buf_offset + (*windowp)->wd_offset + 3885 (*windowp)->wd_size) >> MMU_PAGESHIFT; 3886 (*windowp)->wd_trim.tr_last_copybuf_win = B_TRUE; 3887 (*windowp)->wd_trim.tr_last_pidx = pidx; 3888 (*windowp)->wd_trim.tr_last_cbaddr = 3889 dma->dp_pgmap[pidx].pm_cbaddr; 3890 #if !defined(__amd64) 3891 (*windowp)->wd_trim.tr_last_kaddr = 3892 dma->dp_pgmap[pidx].pm_kaddr; 3893 #endif 3894 } 3895 3896 /* save the buffer offsets for the next window */ 3897 coffset = cookie->dmac_size - trim_sz; 3898 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 3899 3900 /* 3901 * set this now in case this is the first window. all other cases are 3902 * set in dma_win() 3903 */ 3904 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 3905 3906 /* 3907 * initialize the next window using what's left over in the previous 3908 * cookie. 3909 */ 3910 (*windowp)++; 3911 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 3912 (*windowp)->wd_cookie_cnt++; 3913 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 3914 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + coffset; 3915 (*windowp)->wd_trim.tr_first_size = trim_sz; 3916 3917 /* 3918 * again, we're tracking if the last cookie uses the copy buffer. 3919 * read the comment above for more info on why we need to track 3920 * additional state. 3921 * 3922 * For the first cookie in the new window, we need reset the physical 3923 * address to DMA into to the start of the copy buffer plus any 3924 * initial page offset which may be present. 3925 */ 3926 if (cookie->dmac_type & ROOTNEX_USES_COPYBUF) { 3927 (*windowp)->wd_dosync = B_TRUE; 3928 (*windowp)->wd_trim.tr_first_copybuf_win = B_TRUE; 3929 (*windowp)->wd_trim.tr_first_pidx = pidx; 3930 (*windowp)->wd_trim.tr_first_cbaddr = dma->dp_cbaddr; 3931 poff = (*windowp)->wd_trim.tr_first_paddr & MMU_PAGEOFFSET; 3932 3933 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, dma->dp_cbaddr)) + 3934 poff; 3935 #ifdef __xpv 3936 /* 3937 * If we're dom0, we're using a real device so we need to load 3938 * the cookies with MAs instead of PAs. 3939 */ 3940 (*windowp)->wd_trim.tr_first_paddr = 3941 ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 3942 #else 3943 (*windowp)->wd_trim.tr_first_paddr = paddr; 3944 #endif 3945 3946 #if !defined(__amd64) 3947 (*windowp)->wd_trim.tr_first_kaddr = dma->dp_kva; 3948 #endif 3949 /* account for the cookie copybuf usage in the new window */ 3950 *copybuf_used += MMU_PAGESIZE; 3951 3952 /* 3953 * every piece of code has to have a hack, and here is this 3954 * ones :-) 3955 * 3956 * There is a complex interaction between setup_cookie and the 3957 * copybuf window boundary. The complexity had to be in either 3958 * the maxxfer window, or the copybuf window, and I chose the 3959 * copybuf code. 3960 * 3961 * So in this code path, we have taken the last cookie, 3962 * virtually broken it in half due to the trim, and it happens 3963 * to use the copybuf which further complicates life. At the 3964 * same time, we have already setup the current cookie, which 3965 * is now wrong. More background info: the current cookie uses 3966 * the copybuf, so it is only a page long max. So we need to 3967 * fix the current cookies copy buffer address, physical 3968 * address, and kva for the 32-bit kernel. We due this by 3969 * bumping them by page size (of course, we can't due this on 3970 * the physical address since the copy buffer may not be 3971 * physically contiguous). 3972 */ 3973 cookie++; 3974 dma->dp_pgmap[pidx + 1].pm_cbaddr += MMU_PAGESIZE; 3975 poff = cookie->dmac_laddress & MMU_PAGEOFFSET; 3976 3977 paddr = pfn_to_pa(hat_getpfnum(kas.a_hat, 3978 dma->dp_pgmap[pidx + 1].pm_cbaddr)) + poff; 3979 #ifdef __xpv 3980 /* 3981 * If we're dom0, we're using a real device so we need to load 3982 * the cookies with MAs instead of PAs. 3983 */ 3984 cookie->dmac_laddress = ROOTNEX_PADDR_TO_RBASE(xen_info, paddr); 3985 #else 3986 cookie->dmac_laddress = paddr; 3987 #endif 3988 3989 #if !defined(__amd64) 3990 ASSERT(dma->dp_pgmap[pidx + 1].pm_mapped == B_FALSE); 3991 dma->dp_pgmap[pidx + 1].pm_kaddr += MMU_PAGESIZE; 3992 #endif 3993 } else { 3994 /* go back to the current cookie */ 3995 cookie++; 3996 } 3997 3998 /* 3999 * add the current cookie to the new window. set the new window size to 4000 * the what was left over from the previous cookie and what's in the 4001 * current cookie. 4002 */ 4003 (*windowp)->wd_cookie_cnt++; 4004 (*windowp)->wd_size = trim_sz + cookie->dmac_size; 4005 ASSERT((*windowp)->wd_size < dma->dp_maxxfer); 4006 4007 /* 4008 * we know that the cookie passed in always uses the copy buffer. We 4009 * wouldn't be here if it didn't. 4010 */ 4011 *copybuf_used += MMU_PAGESIZE; 4012 4013 return (DDI_SUCCESS); 4014 } 4015 4016 4017 /* 4018 * rootnex_maxxfer_window_boundary() 4019 * Called in bind slowpath when we get to a window boundary because we will 4020 * go over maxxfer. 4021 */ 4022 static int 4023 rootnex_maxxfer_window_boundary(ddi_dma_impl_t *hp, rootnex_dma_t *dma, 4024 rootnex_window_t **windowp, ddi_dma_cookie_t *cookie) 4025 { 4026 size_t dmac_size; 4027 off_t new_offset; 4028 size_t trim_sz; 4029 off_t coffset; 4030 4031 4032 /* 4033 * calculate how much we have to trim off of the current cookie to equal 4034 * maxxfer. We don't have to account for granularity here since our 4035 * maxxfer already takes that into account. 4036 */ 4037 trim_sz = ((*windowp)->wd_size + cookie->dmac_size) - dma->dp_maxxfer; 4038 ASSERT(trim_sz <= cookie->dmac_size); 4039 ASSERT(trim_sz <= dma->dp_maxxfer); 4040 4041 /* save cookie size since we need it later and we might change it */ 4042 dmac_size = cookie->dmac_size; 4043 4044 /* 4045 * if we're not trimming the entire cookie, setup the current window to 4046 * account for the trim. 4047 */ 4048 if (trim_sz < cookie->dmac_size) { 4049 (*windowp)->wd_cookie_cnt++; 4050 (*windowp)->wd_trim.tr_trim_last = B_TRUE; 4051 (*windowp)->wd_trim.tr_last_cookie = cookie; 4052 (*windowp)->wd_trim.tr_last_paddr = cookie->dmac_laddress; 4053 (*windowp)->wd_trim.tr_last_size = cookie->dmac_size - trim_sz; 4054 (*windowp)->wd_size = dma->dp_maxxfer; 4055 4056 /* 4057 * set the adjusted cookie size now in case this is the first 4058 * window. All other windows are taken care of in get win 4059 */ 4060 cookie->dmac_size = (*windowp)->wd_trim.tr_last_size; 4061 } 4062 4063 /* 4064 * coffset is the current offset within the cookie, new_offset is the 4065 * current offset with the entire buffer. 4066 */ 4067 coffset = dmac_size - trim_sz; 4068 new_offset = (*windowp)->wd_offset + (*windowp)->wd_size; 4069 4070 /* initialize the next window */ 4071 (*windowp)++; 4072 rootnex_init_win(hp, dma, *windowp, cookie, new_offset); 4073 (*windowp)->wd_cookie_cnt++; 4074 (*windowp)->wd_size = trim_sz; 4075 if (trim_sz < dmac_size) { 4076 (*windowp)->wd_trim.tr_trim_first = B_TRUE; 4077 (*windowp)->wd_trim.tr_first_paddr = cookie->dmac_laddress + 4078 coffset; 4079 (*windowp)->wd_trim.tr_first_size = trim_sz; 4080 } 4081 4082 return (DDI_SUCCESS); 4083 } 4084 4085 4086 /*ARGSUSED*/ 4087 static int 4088 rootnex_coredma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4089 off_t off, size_t len, uint_t cache_flags) 4090 { 4091 rootnex_sglinfo_t *sinfo; 4092 rootnex_pgmap_t *cbpage; 4093 rootnex_window_t *win; 4094 ddi_dma_impl_t *hp; 4095 rootnex_dma_t *dma; 4096 caddr_t fromaddr; 4097 caddr_t toaddr; 4098 uint_t psize; 4099 off_t offset; 4100 uint_t pidx; 4101 size_t size; 4102 off_t poff; 4103 int e; 4104 4105 4106 hp = (ddi_dma_impl_t *)handle; 4107 dma = (rootnex_dma_t *)hp->dmai_private; 4108 sinfo = &dma->dp_sglinfo; 4109 4110 /* 4111 * if we don't have any windows, we don't need to sync. A copybuf 4112 * will cause us to have at least one window. 4113 */ 4114 if (dma->dp_window == NULL) { 4115 return (DDI_SUCCESS); 4116 } 4117 4118 /* This window may not need to be sync'd */ 4119 win = &dma->dp_window[dma->dp_current_win]; 4120 if (!win->wd_dosync) { 4121 return (DDI_SUCCESS); 4122 } 4123 4124 /* handle off and len special cases */ 4125 if ((off == 0) || (rootnex_sync_ignore_params)) { 4126 offset = win->wd_offset; 4127 } else { 4128 offset = off; 4129 } 4130 if ((len == 0) || (rootnex_sync_ignore_params)) { 4131 size = win->wd_size; 4132 } else { 4133 size = len; 4134 } 4135 4136 /* check the sync args to make sure they make a little sense */ 4137 if (rootnex_sync_check_parms) { 4138 e = rootnex_valid_sync_parms(hp, win, offset, size, 4139 cache_flags); 4140 if (e != DDI_SUCCESS) { 4141 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_SYNC_FAIL]); 4142 return (DDI_FAILURE); 4143 } 4144 } 4145 4146 /* 4147 * special case the first page to handle the offset into the page. The 4148 * offset to the current page for our buffer is the offset into the 4149 * first page of the buffer plus our current offset into the buffer 4150 * itself, masked of course. 4151 */ 4152 poff = (sinfo->si_buf_offset + offset) & MMU_PAGEOFFSET; 4153 psize = MIN((MMU_PAGESIZE - poff), size); 4154 4155 /* go through all the pages that we want to sync */ 4156 while (size > 0) { 4157 /* 4158 * Calculate the page index relative to the start of the buffer. 4159 * The index to the current page for our buffer is the offset 4160 * into the first page of the buffer plus our current offset 4161 * into the buffer itself, shifted of course... 4162 */ 4163 pidx = (sinfo->si_buf_offset + offset) >> MMU_PAGESHIFT; 4164 ASSERT(pidx < sinfo->si_max_pages); 4165 4166 /* 4167 * if this page uses the copy buffer, we need to sync it, 4168 * otherwise, go on to the next page. 4169 */ 4170 cbpage = &dma->dp_pgmap[pidx]; 4171 ASSERT((cbpage->pm_uses_copybuf == B_TRUE) || 4172 (cbpage->pm_uses_copybuf == B_FALSE)); 4173 if (cbpage->pm_uses_copybuf) { 4174 /* cbaddr and kaddr should be page aligned */ 4175 ASSERT(((uintptr_t)cbpage->pm_cbaddr & 4176 MMU_PAGEOFFSET) == 0); 4177 ASSERT(((uintptr_t)cbpage->pm_kaddr & 4178 MMU_PAGEOFFSET) == 0); 4179 4180 /* 4181 * if we're copying for the device, we are going to 4182 * copy from the drivers buffer and to the rootnex 4183 * allocated copy buffer. 4184 */ 4185 if (cache_flags == DDI_DMA_SYNC_FORDEV) { 4186 fromaddr = cbpage->pm_kaddr + poff; 4187 toaddr = cbpage->pm_cbaddr + poff; 4188 DTRACE_PROBE2(rootnex__sync__dev, 4189 dev_info_t *, dma->dp_dip, size_t, psize); 4190 4191 /* 4192 * if we're copying for the cpu/kernel, we are going to 4193 * copy from the rootnex allocated copy buffer to the 4194 * drivers buffer. 4195 */ 4196 } else { 4197 fromaddr = cbpage->pm_cbaddr + poff; 4198 toaddr = cbpage->pm_kaddr + poff; 4199 DTRACE_PROBE2(rootnex__sync__cpu, 4200 dev_info_t *, dma->dp_dip, size_t, psize); 4201 } 4202 4203 bcopy(fromaddr, toaddr, psize); 4204 } 4205 4206 /* 4207 * decrement size until we're done, update our offset into the 4208 * buffer, and get the next page size. 4209 */ 4210 size -= psize; 4211 offset += psize; 4212 psize = MIN(MMU_PAGESIZE, size); 4213 4214 /* page offset is zero for the rest of this loop */ 4215 poff = 0; 4216 } 4217 4218 return (DDI_SUCCESS); 4219 } 4220 4221 /* 4222 * rootnex_dma_sync() 4223 * called from ddi_dma_sync() if DMP_NOSYNC is not set in hp->dmai_rflags. 4224 * We set DMP_NOSYNC if we're not using the copy buffer. If DMP_NOSYNC 4225 * is set, ddi_dma_sync() returns immediately passing back success. 4226 */ 4227 /*ARGSUSED*/ 4228 static int 4229 rootnex_dma_sync(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4230 off_t off, size_t len, uint_t cache_flags) 4231 { 4232 #if !defined(__xpv) 4233 if (IOMMU_USED(rdip)) { 4234 return (iommulib_nexdma_sync(dip, rdip, handle, off, len, 4235 cache_flags)); 4236 } 4237 #endif 4238 return (rootnex_coredma_sync(dip, rdip, handle, off, len, 4239 cache_flags)); 4240 } 4241 4242 /* 4243 * rootnex_valid_sync_parms() 4244 * checks the parameters passed to sync to verify they are correct. 4245 */ 4246 static int 4247 rootnex_valid_sync_parms(ddi_dma_impl_t *hp, rootnex_window_t *win, 4248 off_t offset, size_t size, uint_t cache_flags) 4249 { 4250 off_t woffset; 4251 4252 4253 /* 4254 * the first part of the test to make sure the offset passed in is 4255 * within the window. 4256 */ 4257 if (offset < win->wd_offset) { 4258 return (DDI_FAILURE); 4259 } 4260 4261 /* 4262 * second and last part of the test to make sure the offset and length 4263 * passed in is within the window. 4264 */ 4265 woffset = offset - win->wd_offset; 4266 if ((woffset + size) > win->wd_size) { 4267 return (DDI_FAILURE); 4268 } 4269 4270 /* 4271 * if we are sync'ing for the device, the DDI_DMA_WRITE flag should 4272 * be set too. 4273 */ 4274 if ((cache_flags == DDI_DMA_SYNC_FORDEV) && 4275 (hp->dmai_rflags & DDI_DMA_WRITE)) { 4276 return (DDI_SUCCESS); 4277 } 4278 4279 /* 4280 * at this point, either DDI_DMA_SYNC_FORCPU or DDI_DMA_SYNC_FORKERNEL 4281 * should be set. Also DDI_DMA_READ should be set in the flags. 4282 */ 4283 if (((cache_flags == DDI_DMA_SYNC_FORCPU) || 4284 (cache_flags == DDI_DMA_SYNC_FORKERNEL)) && 4285 (hp->dmai_rflags & DDI_DMA_READ)) { 4286 return (DDI_SUCCESS); 4287 } 4288 4289 return (DDI_FAILURE); 4290 } 4291 4292 4293 /*ARGSUSED*/ 4294 static int 4295 rootnex_coredma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4296 uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 4297 uint_t *ccountp) 4298 { 4299 rootnex_window_t *window; 4300 rootnex_trim_t *trim; 4301 ddi_dma_impl_t *hp; 4302 rootnex_dma_t *dma; 4303 #if !defined(__amd64) 4304 rootnex_sglinfo_t *sinfo; 4305 rootnex_pgmap_t *pmap; 4306 uint_t pidx; 4307 uint_t pcnt; 4308 off_t poff; 4309 int i; 4310 #endif 4311 4312 4313 hp = (ddi_dma_impl_t *)handle; 4314 dma = (rootnex_dma_t *)hp->dmai_private; 4315 #if !defined(__amd64) 4316 sinfo = &dma->dp_sglinfo; 4317 #endif 4318 4319 /* If we try and get a window which doesn't exist, return failure */ 4320 if (win >= hp->dmai_nwin) { 4321 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 4322 return (DDI_FAILURE); 4323 } 4324 4325 /* 4326 * if we don't have any windows, and they're asking for the first 4327 * window, setup the cookie pointer to the first cookie in the bind. 4328 * setup our return values, then increment the cookie since we return 4329 * the first cookie on the stack. 4330 */ 4331 if (dma->dp_window == NULL) { 4332 if (win != 0) { 4333 ROOTNEX_PROF_INC(&rootnex_cnt[ROOTNEX_CNT_GETWIN_FAIL]); 4334 return (DDI_FAILURE); 4335 } 4336 hp->dmai_cookie = dma->dp_cookies; 4337 *offp = 0; 4338 *lenp = dma->dp_dma.dmao_size; 4339 *ccountp = dma->dp_sglinfo.si_sgl_size; 4340 *cookiep = hp->dmai_cookie[0]; 4341 hp->dmai_cookie++; 4342 return (DDI_SUCCESS); 4343 } 4344 4345 /* sync the old window before moving on to the new one */ 4346 window = &dma->dp_window[dma->dp_current_win]; 4347 if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_READ)) { 4348 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 4349 DDI_DMA_SYNC_FORCPU); 4350 } 4351 4352 #if !defined(__amd64) 4353 /* 4354 * before we move to the next window, if we need to re-map, unmap all 4355 * the pages in this window. 4356 */ 4357 if (dma->dp_cb_remaping) { 4358 /* 4359 * If we switch to this window again, we'll need to map in 4360 * on the fly next time. 4361 */ 4362 window->wd_remap_copybuf = B_TRUE; 4363 4364 /* 4365 * calculate the page index into the buffer where this window 4366 * starts, and the number of pages this window takes up. 4367 */ 4368 pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4369 MMU_PAGESHIFT; 4370 poff = (sinfo->si_buf_offset + window->wd_offset) & 4371 MMU_PAGEOFFSET; 4372 pcnt = mmu_btopr(window->wd_size + poff); 4373 ASSERT((pidx + pcnt) <= sinfo->si_max_pages); 4374 4375 /* unmap pages which are currently mapped in this window */ 4376 for (i = 0; i < pcnt; i++) { 4377 if (dma->dp_pgmap[pidx].pm_mapped) { 4378 hat_unload(kas.a_hat, 4379 dma->dp_pgmap[pidx].pm_kaddr, MMU_PAGESIZE, 4380 HAT_UNLOAD); 4381 dma->dp_pgmap[pidx].pm_mapped = B_FALSE; 4382 } 4383 pidx++; 4384 } 4385 } 4386 #endif 4387 4388 /* 4389 * Move to the new window. 4390 * NOTE: current_win must be set for sync to work right 4391 */ 4392 dma->dp_current_win = win; 4393 window = &dma->dp_window[win]; 4394 4395 /* if needed, adjust the first and/or last cookies for trim */ 4396 trim = &window->wd_trim; 4397 if (trim->tr_trim_first) { 4398 window->wd_first_cookie->dmac_laddress = trim->tr_first_paddr; 4399 window->wd_first_cookie->dmac_size = trim->tr_first_size; 4400 #if !defined(__amd64) 4401 window->wd_first_cookie->dmac_type = 4402 (window->wd_first_cookie->dmac_type & 4403 ROOTNEX_USES_COPYBUF) + window->wd_offset; 4404 #endif 4405 if (trim->tr_first_copybuf_win) { 4406 dma->dp_pgmap[trim->tr_first_pidx].pm_cbaddr = 4407 trim->tr_first_cbaddr; 4408 #if !defined(__amd64) 4409 dma->dp_pgmap[trim->tr_first_pidx].pm_kaddr = 4410 trim->tr_first_kaddr; 4411 #endif 4412 } 4413 } 4414 if (trim->tr_trim_last) { 4415 trim->tr_last_cookie->dmac_laddress = trim->tr_last_paddr; 4416 trim->tr_last_cookie->dmac_size = trim->tr_last_size; 4417 if (trim->tr_last_copybuf_win) { 4418 dma->dp_pgmap[trim->tr_last_pidx].pm_cbaddr = 4419 trim->tr_last_cbaddr; 4420 #if !defined(__amd64) 4421 dma->dp_pgmap[trim->tr_last_pidx].pm_kaddr = 4422 trim->tr_last_kaddr; 4423 #endif 4424 } 4425 } 4426 4427 /* 4428 * setup the cookie pointer to the first cookie in the window. setup 4429 * our return values, then increment the cookie since we return the 4430 * first cookie on the stack. 4431 */ 4432 hp->dmai_cookie = window->wd_first_cookie; 4433 *offp = window->wd_offset; 4434 *lenp = window->wd_size; 4435 *ccountp = window->wd_cookie_cnt; 4436 *cookiep = hp->dmai_cookie[0]; 4437 hp->dmai_cookie++; 4438 4439 #if !defined(__amd64) 4440 /* re-map copybuf if required for this window */ 4441 if (dma->dp_cb_remaping) { 4442 /* 4443 * calculate the page index into the buffer where this 4444 * window starts. 4445 */ 4446 pidx = (sinfo->si_buf_offset + window->wd_offset) >> 4447 MMU_PAGESHIFT; 4448 ASSERT(pidx < sinfo->si_max_pages); 4449 4450 /* 4451 * the first page can get unmapped if it's shared with the 4452 * previous window. Even if the rest of this window is already 4453 * mapped in, we need to still check this one. 4454 */ 4455 pmap = &dma->dp_pgmap[pidx]; 4456 if ((pmap->pm_uses_copybuf) && (pmap->pm_mapped == B_FALSE)) { 4457 if (pmap->pm_pp != NULL) { 4458 pmap->pm_mapped = B_TRUE; 4459 i86_pp_map(pmap->pm_pp, pmap->pm_kaddr); 4460 } else if (pmap->pm_vaddr != NULL) { 4461 pmap->pm_mapped = B_TRUE; 4462 i86_va_map(pmap->pm_vaddr, sinfo->si_asp, 4463 pmap->pm_kaddr); 4464 } 4465 } 4466 pidx++; 4467 4468 /* map in the rest of the pages if required */ 4469 if (window->wd_remap_copybuf) { 4470 window->wd_remap_copybuf = B_FALSE; 4471 4472 /* figure out many pages this window takes up */ 4473 poff = (sinfo->si_buf_offset + window->wd_offset) & 4474 MMU_PAGEOFFSET; 4475 pcnt = mmu_btopr(window->wd_size + poff); 4476 ASSERT(((pidx - 1) + pcnt) <= sinfo->si_max_pages); 4477 4478 /* map pages which require it */ 4479 for (i = 1; i < pcnt; i++) { 4480 pmap = &dma->dp_pgmap[pidx]; 4481 if (pmap->pm_uses_copybuf) { 4482 ASSERT(pmap->pm_mapped == B_FALSE); 4483 if (pmap->pm_pp != NULL) { 4484 pmap->pm_mapped = B_TRUE; 4485 i86_pp_map(pmap->pm_pp, 4486 pmap->pm_kaddr); 4487 } else if (pmap->pm_vaddr != NULL) { 4488 pmap->pm_mapped = B_TRUE; 4489 i86_va_map(pmap->pm_vaddr, 4490 sinfo->si_asp, 4491 pmap->pm_kaddr); 4492 } 4493 } 4494 pidx++; 4495 } 4496 } 4497 } 4498 #endif 4499 4500 /* if the new window uses the copy buffer, sync it for the device */ 4501 if ((window->wd_dosync) && (hp->dmai_rflags & DDI_DMA_WRITE)) { 4502 (void) rootnex_coredma_sync(dip, rdip, handle, 0, 0, 4503 DDI_DMA_SYNC_FORDEV); 4504 } 4505 4506 return (DDI_SUCCESS); 4507 } 4508 4509 /* 4510 * rootnex_dma_win() 4511 * called from ddi_dma_getwin() 4512 */ 4513 /*ARGSUSED*/ 4514 static int 4515 rootnex_dma_win(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4516 uint_t win, off_t *offp, size_t *lenp, ddi_dma_cookie_t *cookiep, 4517 uint_t *ccountp) 4518 { 4519 #if !defined(__xpv) 4520 if (IOMMU_USED(rdip)) { 4521 return (iommulib_nexdma_win(dip, rdip, handle, win, offp, lenp, 4522 cookiep, ccountp)); 4523 } 4524 #endif 4525 4526 return (rootnex_coredma_win(dip, rdip, handle, win, offp, lenp, 4527 cookiep, ccountp)); 4528 } 4529 4530 /* 4531 * ************************ 4532 * obsoleted dma routines 4533 * ************************ 4534 */ 4535 4536 /* 4537 * rootnex_dma_map() 4538 * called from ddi_dma_setup() 4539 * NO IOMMU in 32 bit mode. The below routines doesn't work in 64 bit mode. 4540 */ 4541 /* ARGSUSED */ 4542 static int 4543 rootnex_dma_map(dev_info_t *dip, dev_info_t *rdip, 4544 struct ddi_dma_req *dmareq, ddi_dma_handle_t *handlep) 4545 { 4546 #if defined(__amd64) 4547 /* 4548 * this interface is not supported in 64-bit x86 kernel. See comment in 4549 * rootnex_dma_mctl() 4550 */ 4551 return (DDI_DMA_NORESOURCES); 4552 4553 #else /* 32-bit x86 kernel */ 4554 ddi_dma_handle_t *lhandlep; 4555 ddi_dma_handle_t lhandle; 4556 ddi_dma_cookie_t cookie; 4557 ddi_dma_attr_t dma_attr; 4558 ddi_dma_lim_t *dma_lim; 4559 uint_t ccnt; 4560 int e; 4561 4562 4563 /* 4564 * if the driver is just testing to see if it's possible to do the bind, 4565 * we'll use local state. Otherwise, use the handle pointer passed in. 4566 */ 4567 if (handlep == NULL) { 4568 lhandlep = &lhandle; 4569 } else { 4570 lhandlep = handlep; 4571 } 4572 4573 /* convert the limit structure to a dma_attr one */ 4574 dma_lim = dmareq->dmar_limits; 4575 dma_attr.dma_attr_version = DMA_ATTR_V0; 4576 dma_attr.dma_attr_addr_lo = dma_lim->dlim_addr_lo; 4577 dma_attr.dma_attr_addr_hi = dma_lim->dlim_addr_hi; 4578 dma_attr.dma_attr_minxfer = dma_lim->dlim_minxfer; 4579 dma_attr.dma_attr_seg = dma_lim->dlim_adreg_max; 4580 dma_attr.dma_attr_count_max = dma_lim->dlim_ctreg_max; 4581 dma_attr.dma_attr_granular = dma_lim->dlim_granular; 4582 dma_attr.dma_attr_sgllen = dma_lim->dlim_sgllen; 4583 dma_attr.dma_attr_maxxfer = dma_lim->dlim_reqsize; 4584 dma_attr.dma_attr_burstsizes = dma_lim->dlim_burstsizes; 4585 dma_attr.dma_attr_align = MMU_PAGESIZE; 4586 dma_attr.dma_attr_flags = 0; 4587 4588 e = rootnex_dma_allochdl(dip, rdip, &dma_attr, dmareq->dmar_fp, 4589 dmareq->dmar_arg, lhandlep); 4590 if (e != DDI_SUCCESS) { 4591 return (e); 4592 } 4593 4594 e = rootnex_dma_bindhdl(dip, rdip, *lhandlep, dmareq, &cookie, &ccnt); 4595 if ((e != DDI_DMA_MAPPED) && (e != DDI_DMA_PARTIAL_MAP)) { 4596 (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4597 return (e); 4598 } 4599 4600 /* 4601 * if the driver is just testing to see if it's possible to do the bind, 4602 * free up the local state and return the result. 4603 */ 4604 if (handlep == NULL) { 4605 (void) rootnex_dma_unbindhdl(dip, rdip, *lhandlep); 4606 (void) rootnex_dma_freehdl(dip, rdip, *lhandlep); 4607 if (e == DDI_DMA_MAPPED) { 4608 return (DDI_DMA_MAPOK); 4609 } else { 4610 return (DDI_DMA_NOMAPPING); 4611 } 4612 } 4613 4614 return (e); 4615 #endif /* defined(__amd64) */ 4616 } 4617 4618 /* 4619 * rootnex_dma_mctl() 4620 * 4621 * No IOMMU in 32 bit mode. The below routine doesn't work in 64 bit mode. 4622 */ 4623 /* ARGSUSED */ 4624 static int 4625 rootnex_dma_mctl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, 4626 enum ddi_dma_ctlops request, off_t *offp, size_t *lenp, caddr_t *objpp, 4627 uint_t cache_flags) 4628 { 4629 #if defined(__amd64) 4630 /* 4631 * DDI_DMA_SMEM_ALLOC & DDI_DMA_IOPB_ALLOC we're changed to have a 4632 * common implementation in genunix, so they no longer have x86 4633 * specific functionality which called into dma_ctl. 4634 * 4635 * The rest of the obsoleted interfaces were never supported in the 4636 * 64-bit x86 kernel. For s10, the obsoleted DDI_DMA_SEGTOC interface 4637 * was not ported to the x86 64-bit kernel do to serious x86 rootnex 4638 * implementation issues. 4639 * 4640 * If you can't use DDI_DMA_SEGTOC; DDI_DMA_NEXTSEG, DDI_DMA_FREE, and 4641 * DDI_DMA_NEXTWIN are useless since you can get to the cookie, so we 4642 * reflect that now too... 4643 * 4644 * Even though we fixed the pointer problem in DDI_DMA_SEGTOC, we are 4645 * not going to put this functionality into the 64-bit x86 kernel now. 4646 * It wasn't ported to the 64-bit kernel for s10, no reason to change 4647 * that in a future release. 4648 */ 4649 return (DDI_FAILURE); 4650 4651 #else /* 32-bit x86 kernel */ 4652 ddi_dma_cookie_t lcookie; 4653 ddi_dma_cookie_t *cookie; 4654 rootnex_window_t *window; 4655 ddi_dma_impl_t *hp; 4656 rootnex_dma_t *dma; 4657 uint_t nwin; 4658 uint_t ccnt; 4659 size_t len; 4660 off_t off; 4661 int e; 4662 4663 4664 /* 4665 * DDI_DMA_SEGTOC, DDI_DMA_NEXTSEG, and DDI_DMA_NEXTWIN are a little 4666 * hacky since were optimizing for the current interfaces and so we can 4667 * cleanup the mess in genunix. Hopefully we will remove the this 4668 * obsoleted routines someday soon. 4669 */ 4670 4671 switch (request) { 4672 4673 case DDI_DMA_SEGTOC: /* ddi_dma_segtocookie() */ 4674 hp = (ddi_dma_impl_t *)handle; 4675 cookie = (ddi_dma_cookie_t *)objpp; 4676 4677 /* 4678 * convert segment to cookie. We don't distinguish between the 4679 * two :-) 4680 */ 4681 *cookie = *hp->dmai_cookie; 4682 *lenp = cookie->dmac_size; 4683 *offp = cookie->dmac_type & ~ROOTNEX_USES_COPYBUF; 4684 return (DDI_SUCCESS); 4685 4686 case DDI_DMA_NEXTSEG: /* ddi_dma_nextseg() */ 4687 hp = (ddi_dma_impl_t *)handle; 4688 dma = (rootnex_dma_t *)hp->dmai_private; 4689 4690 if ((*lenp != NULL) && ((uintptr_t)*lenp != (uintptr_t)hp)) { 4691 return (DDI_DMA_STALE); 4692 } 4693 4694 /* handle the case where we don't have any windows */ 4695 if (dma->dp_window == NULL) { 4696 /* 4697 * if seg == NULL, and we don't have any windows, 4698 * return the first cookie in the sgl. 4699 */ 4700 if (*lenp == NULL) { 4701 dma->dp_current_cookie = 0; 4702 hp->dmai_cookie = dma->dp_cookies; 4703 *objpp = (caddr_t)handle; 4704 return (DDI_SUCCESS); 4705 4706 /* if we have more cookies, go to the next cookie */ 4707 } else { 4708 if ((dma->dp_current_cookie + 1) >= 4709 dma->dp_sglinfo.si_sgl_size) { 4710 return (DDI_DMA_DONE); 4711 } 4712 dma->dp_current_cookie++; 4713 hp->dmai_cookie++; 4714 return (DDI_SUCCESS); 4715 } 4716 } 4717 4718 /* We have one or more windows */ 4719 window = &dma->dp_window[dma->dp_current_win]; 4720 4721 /* 4722 * if seg == NULL, return the first cookie in the current 4723 * window 4724 */ 4725 if (*lenp == NULL) { 4726 dma->dp_current_cookie = 0; 4727 hp->dmai_cookie = window->wd_first_cookie; 4728 4729 /* 4730 * go to the next cookie in the window then see if we done with 4731 * this window. 4732 */ 4733 } else { 4734 if ((dma->dp_current_cookie + 1) >= 4735 window->wd_cookie_cnt) { 4736 return (DDI_DMA_DONE); 4737 } 4738 dma->dp_current_cookie++; 4739 hp->dmai_cookie++; 4740 } 4741 *objpp = (caddr_t)handle; 4742 return (DDI_SUCCESS); 4743 4744 case DDI_DMA_NEXTWIN: /* ddi_dma_nextwin() */ 4745 hp = (ddi_dma_impl_t *)handle; 4746 dma = (rootnex_dma_t *)hp->dmai_private; 4747 4748 if ((*offp != NULL) && ((uintptr_t)*offp != (uintptr_t)hp)) { 4749 return (DDI_DMA_STALE); 4750 } 4751 4752 /* if win == NULL, return the first window in the bind */ 4753 if (*offp == NULL) { 4754 nwin = 0; 4755 4756 /* 4757 * else, go to the next window then see if we're done with all 4758 * the windows. 4759 */ 4760 } else { 4761 nwin = dma->dp_current_win + 1; 4762 if (nwin >= hp->dmai_nwin) { 4763 return (DDI_DMA_DONE); 4764 } 4765 } 4766 4767 /* switch to the next window */ 4768 e = rootnex_dma_win(dip, rdip, handle, nwin, &off, &len, 4769 &lcookie, &ccnt); 4770 ASSERT(e == DDI_SUCCESS); 4771 if (e != DDI_SUCCESS) { 4772 return (DDI_DMA_STALE); 4773 } 4774 4775 /* reset the cookie back to the first cookie in the window */ 4776 if (dma->dp_window != NULL) { 4777 window = &dma->dp_window[dma->dp_current_win]; 4778 hp->dmai_cookie = window->wd_first_cookie; 4779 } else { 4780 hp->dmai_cookie = dma->dp_cookies; 4781 } 4782 4783 *objpp = (caddr_t)handle; 4784 return (DDI_SUCCESS); 4785 4786 case DDI_DMA_FREE: /* ddi_dma_free() */ 4787 (void) rootnex_dma_unbindhdl(dip, rdip, handle); 4788 (void) rootnex_dma_freehdl(dip, rdip, handle); 4789 if (rootnex_state->r_dvma_call_list_id) { 4790 ddi_run_callback(&rootnex_state->r_dvma_call_list_id); 4791 } 4792 return (DDI_SUCCESS); 4793 4794 case DDI_DMA_IOPB_ALLOC: /* get contiguous DMA-able memory */ 4795 case DDI_DMA_SMEM_ALLOC: /* get contiguous DMA-able memory */ 4796 /* should never get here, handled in genunix */ 4797 ASSERT(0); 4798 return (DDI_FAILURE); 4799 4800 case DDI_DMA_KVADDR: 4801 case DDI_DMA_GETERR: 4802 case DDI_DMA_COFF: 4803 return (DDI_FAILURE); 4804 } 4805 4806 return (DDI_FAILURE); 4807 #endif /* defined(__amd64) */ 4808 } 4809 4810 /* 4811 * ********* 4812 * FMA Code 4813 * ********* 4814 */ 4815 4816 /* 4817 * rootnex_fm_init() 4818 * FMA init busop 4819 */ 4820 /* ARGSUSED */ 4821 static int 4822 rootnex_fm_init(dev_info_t *dip, dev_info_t *tdip, int tcap, 4823 ddi_iblock_cookie_t *ibc) 4824 { 4825 *ibc = rootnex_state->r_err_ibc; 4826 4827 return (ddi_system_fmcap); 4828 } 4829 4830 /* 4831 * rootnex_dma_check() 4832 * Function called after a dma fault occurred to find out whether the 4833 * fault address is associated with a driver that is able to handle faults 4834 * and recover from faults. 4835 */ 4836 /* ARGSUSED */ 4837 static int 4838 rootnex_dma_check(dev_info_t *dip, const void *handle, const void *addr, 4839 const void *not_used) 4840 { 4841 rootnex_window_t *window; 4842 uint64_t start_addr; 4843 uint64_t fault_addr; 4844 ddi_dma_impl_t *hp; 4845 rootnex_dma_t *dma; 4846 uint64_t end_addr; 4847 size_t csize; 4848 int i; 4849 int j; 4850 4851 4852 /* The driver has to set DDI_DMA_FLAGERR to recover from dma faults */ 4853 hp = (ddi_dma_impl_t *)handle; 4854 ASSERT(hp); 4855 4856 dma = (rootnex_dma_t *)hp->dmai_private; 4857 4858 /* Get the address that we need to search for */ 4859 fault_addr = *(uint64_t *)addr; 4860 4861 /* 4862 * if we don't have any windows, we can just walk through all the 4863 * cookies. 4864 */ 4865 if (dma->dp_window == NULL) { 4866 /* for each cookie */ 4867 for (i = 0; i < dma->dp_sglinfo.si_sgl_size; i++) { 4868 /* 4869 * if the faulted address is within the physical address 4870 * range of the cookie, return DDI_FM_NONFATAL. 4871 */ 4872 if ((fault_addr >= dma->dp_cookies[i].dmac_laddress) && 4873 (fault_addr <= (dma->dp_cookies[i].dmac_laddress + 4874 dma->dp_cookies[i].dmac_size))) { 4875 return (DDI_FM_NONFATAL); 4876 } 4877 } 4878 4879 /* fault_addr not within this DMA handle */ 4880 return (DDI_FM_UNKNOWN); 4881 } 4882 4883 /* we have mutiple windows, walk through each window */ 4884 for (i = 0; i < hp->dmai_nwin; i++) { 4885 window = &dma->dp_window[i]; 4886 4887 /* Go through all the cookies in the window */ 4888 for (j = 0; j < window->wd_cookie_cnt; j++) { 4889 4890 start_addr = window->wd_first_cookie[j].dmac_laddress; 4891 csize = window->wd_first_cookie[j].dmac_size; 4892 4893 /* 4894 * if we are trimming the first cookie in the window, 4895 * and this is the first cookie, adjust the start 4896 * address and size of the cookie to account for the 4897 * trim. 4898 */ 4899 if (window->wd_trim.tr_trim_first && (j == 0)) { 4900 start_addr = window->wd_trim.tr_first_paddr; 4901 csize = window->wd_trim.tr_first_size; 4902 } 4903 4904 /* 4905 * if we are trimming the last cookie in the window, 4906 * and this is the last cookie, adjust the start 4907 * address and size of the cookie to account for the 4908 * trim. 4909 */ 4910 if (window->wd_trim.tr_trim_last && 4911 (j == (window->wd_cookie_cnt - 1))) { 4912 start_addr = window->wd_trim.tr_last_paddr; 4913 csize = window->wd_trim.tr_last_size; 4914 } 4915 4916 end_addr = start_addr + csize; 4917 4918 /* 4919 * if the faulted address is within the physical address 4920 * range of the cookie, return DDI_FM_NONFATAL. 4921 */ 4922 if ((fault_addr >= start_addr) && 4923 (fault_addr <= end_addr)) { 4924 return (DDI_FM_NONFATAL); 4925 } 4926 } 4927 } 4928 4929 /* fault_addr not within this DMA handle */ 4930 return (DDI_FM_UNKNOWN); 4931 } 4932