xref: /illumos-gate/usr/src/uts/i86pc/sys/psm_types.h (revision 7c478bd9)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef	_SYS_PSM_TYPES_H
28 #define	_SYS_PSM_TYPES_H
29 
30 #pragma ident	"%Z%%M%	%I%	%E% SMI"
31 
32 /*
33  * Platform Specific Module Types
34  */
35 
36 #include <sys/types.h>
37 #include <sys/cpuvar.h>
38 #include <sys/time.h>
39 
40 #ifdef	__cplusplus
41 extern "C" {
42 #endif
43 
44 /*
45  * PSM_OPS definitions
46  */
47 typedef enum psm_intr_op_e {
48 	PSM_INTR_OP_ALLOC_VECTORS = 0,	/* 0.  Allocate vectors */
49 	PSM_INTR_OP_FREE_VECTORS,	/* 1.  Free vectors */
50 	PSM_INTR_OP_NAVAIL_VECTORS,	/* 2.  Get # of available vectors */
51 	PSM_INTR_OP_XLATE_VECTOR,	/* 3.  Translate vector */
52 	PSM_INTR_OP_GET_PENDING,	/* 4.  Get pending information */
53 	PSM_INTR_OP_CLEAR_MASK,		/* 5.  Clear interrupt mask */
54 	PSM_INTR_OP_SET_MASK,		/* 6.  Set interrupt mask */
55 	PSM_INTR_OP_GET_CAP,		/* 7.  Get devices's capabilities */
56 	PSM_INTR_OP_SET_CAP,		/* 8.  Set devices's capabilities */
57 	PSM_INTR_OP_SET_PRI,		/* 9.  Set the interrupt priority */
58 	PSM_INTR_OP_GET_SHARED,		/* 10. Get the shared intr info */
59 	PSM_INTR_OP_CHECK_MSI		/* 11. Chk if device supports MSI */
60 } psm_intr_op_t;
61 
62 struct 	psm_ops {
63 	int	(*psm_probe)(void);
64 
65 	void	(*psm_softinit)(void);
66 	void	(*psm_picinit)(void);
67 	int	(*psm_intr_enter)(int ipl, int *vectorp);
68 	void	(*psm_intr_exit)(int ipl, int irqno);
69 	void	(*psm_setspl)(int ipl);
70 	int	(*psm_addspl)(int irqno, int ipl, int min_ipl, int max_ipl);
71 	int	(*psm_delspl)(int irqno, int ipl, int min_ipl, int max_ipl);
72 	int	(*psm_disable_intr)(processorid_t cpun);
73 	void	(*psm_enable_intr)(processorid_t cpun);
74 	int	(*psm_softlvl_to_irq)(int ipl);
75 	void	(*psm_set_softintr)(int ipl);
76 	void	(*psm_set_idlecpu)(processorid_t cpun);
77 	void	(*psm_unset_idlecpu)(processorid_t cpun);
78 
79 #if defined(PSMI_1_3) || defined(PSMI_1_4) || defined(PSMI_1_5)
80 	int	(*psm_clkinit)(int hertz);
81 #else
82 	void	(*psm_clkinit)(int hertz);
83 #endif
84 
85 	int	(*psm_get_clockirq)(int ipl);
86 	void	(*psm_hrtimeinit)(void);
87 	hrtime_t (*psm_gethrtime)(void);
88 
89 	processorid_t (*psm_get_next_processorid)(processorid_t cpu_id);
90 	void	(*psm_cpu_start)(processorid_t cpun, caddr_t rm_code);
91 	int	(*psm_post_cpu_start)(void);
92 #if defined(PSMI_1_2) || defined(PSMI_1_3) || defined(PSMI_1_4) || \
93     defined(PSMI_1_5)
94 	void	(*psm_shutdown)(int cmd, int fcn);
95 #else
96 	void	(*psm_shutdown)(void);
97 #endif
98 	int	(*psm_get_ipivect)(int ipl, int type);
99 	void	(*psm_send_ipi)(processorid_t cpun, int ipl);
100 
101 	int	(*psm_translate_irq)(dev_info_t *dip, int irqno);
102 
103 	int	(*psm_tod_get)(todinfo_t *tod);
104 	int	(*psm_tod_set)(todinfo_t *tod);
105 
106 	void	(*psm_notify_error)(int level, char *errmsg);
107 #if defined(PSMI_1_2) || defined(PSMI_1_3) || defined(PSMI_1_4) || \
108     defined(PSMI_1_5)
109 	void	(*psm_notify_func)(int msg);
110 #endif
111 #if defined(PSMI_1_3) || defined(PSMI_1_4) || defined(PSMI_1_5)
112 	void 	(*psm_timer_reprogram)(hrtime_t time);
113 	void	(*psm_timer_enable)(void);
114 	void 	(*psm_timer_disable)(void);
115 	void 	(*psm_post_cyclic_setup)(void *arg);
116 #endif
117 #if defined(PSMI_1_4) || defined(PSMI_1_5)
118 	void	(*psm_preshutdown)(int cmd, int fcn);
119 #endif
120 #if defined(PSMI_1_5)
121 	int	(*psm_intr_ops)(dev_info_t *dip, ddi_intr_handle_impl_t *handle,
122 		    psm_intr_op_t op, int *result);
123 #endif
124 };
125 
126 
127 struct 	psm_info {
128 	ushort_t p_version;
129 	ushort_t p_owner;
130 	struct 	psm_ops	*p_ops;
131 	char	*p_mach_idstring;	/* machine identification string */
132 	char	*p_mach_desc;		/* machine descriptions		 */
133 };
134 
135 /*
136  * version
137  * 0x86vm where v = (version no. - 1) and m = (minor no. + 1)
138  * i.e. psmi 1.0 has v=0 and m=1, psmi 1.1 has v=0 and m=2
139  * also, 0x86 in the high byte is the signature of the psmi
140  */
141 #define	PSM_INFO_VER01		0x8601
142 #define	PSM_INFO_VER01_1	0x8602
143 #define	PSM_INFO_VER01_2	0x8603
144 #define	PSM_INFO_VER01_3	0x8604
145 #define	PSM_INFO_VER01_4	0x8605
146 #define	PSM_INFO_VER01_5	0x8606
147 #define	PSM_INFO_VER01_X	(PSM_INFO_VER01_1 & 0xFFF0)	/* ver 1.X */
148 
149 /*
150  *	owner field definitions
151  */
152 #define	PSM_OWN_SYS_DEFAULT	0x0001
153 #define	PSM_OWN_EXCLUSIVE	0x0002
154 #define	PSM_OWN_OVERRIDE	0x0003
155 
156 #define	PSM_NULL_INFO		-1
157 
158 /*
159  *	Arg to psm_notify_func
160  */
161 #define	PSM_DEBUG_ENTER		1
162 #define	PSM_DEBUG_EXIT		2
163 #define	PSM_PANIC_ENTER		3
164 
165 /*
166  *	Soft-level to interrupt vector
167  */
168 #define	PSM_SV_SOFTWARE		-1
169 #define	PSM_SV_MIXED		-2
170 
171 /*
172  *	Inter-processor interrupt type
173  */
174 #define	PSM_INTR_IPI_HI		0x01
175 #define	PSM_INTR_IPI_LO		0x02
176 #define	PSM_INTR_POKE		0x03
177 
178 /*
179  *	return code
180  */
181 #define	PSM_SUCCESS		DDI_SUCCESS
182 #define	PSM_FAILURE		DDI_FAILURE
183 
184 #define	PSM_INVALID_IPL		0
185 #define	PSM_INVALID_CPU		-1
186 
187 
188 struct 	psm_ops_ver01 {
189 	int	(*psm_probe)(void);
190 
191 	void	(*psm_softinit)(void);
192 	void	(*psm_picinit)(void);
193 	int	(*psm_intr_enter)(int ipl, int *vectorp);
194 	void	(*psm_intr_exit)(int ipl, int irqno);
195 	void	(*psm_setspl)(int ipl);
196 	int	(*psm_addspl)(int irqno, int ipl, int min_ipl, int max_ipl);
197 	int	(*psm_delspl)(int irqno, int ipl, int min_ipl, int max_ipl);
198 	int	(*psm_disable_intr)(processorid_t cpun);
199 	void	(*psm_enable_intr)(processorid_t cpun);
200 	int	(*psm_softlvl_to_irq)(int ipl);
201 	void	(*psm_set_softintr)(int ipl);
202 	void	(*psm_set_idlecpu)(processorid_t cpun);
203 	void	(*psm_unset_idlecpu)(processorid_t cpun);
204 
205 	void	(*psm_clkinit)(int hertz);
206 	int	(*psm_get_clockirq)(int ipl);
207 	void	(*psm_hrtimeinit)(void);
208 	hrtime_t (*psm_gethrtime)(void);
209 
210 	processorid_t (*psm_get_next_processorid)(processorid_t cpu_id);
211 	void	(*psm_cpu_start)(processorid_t cpun, caddr_t rm_code);
212 	int	(*psm_post_cpu_start)(void);
213 	void	(*psm_shutdown)(void);
214 	int	(*psm_get_ipivect)(int ipl, int type);
215 	void	(*psm_send_ipi)(processorid_t cpun, int ipl);
216 };
217 
218 #ifdef	__cplusplus
219 }
220 #endif
221 
222 #endif	/* _SYS_PSM_TYPES_H */
223