1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #pragma ident "%Z%%M% %I% %E% SMI" 28 29 #include <sys/types.h> 30 #include <sys/dkio.h> 31 #include <sys/cdio.h> 32 #include <sys/file.h> 33 34 #include "ata_common.h" 35 #include "ata_disk.h" 36 37 /* 38 * this typedef really should be in dktp/cmpkt.h 39 */ 40 typedef struct cmpkt cmpkt_t; 41 42 43 /* 44 * DADA entry points 45 */ 46 47 static int ata_disk_abort(opaque_t ctl_data, cmpkt_t *pktp); 48 static int ata_disk_reset(opaque_t ctl_data, int level); 49 static int ata_disk_ioctl(opaque_t ctl_data, int cmd, intptr_t a, int flag); 50 static cmpkt_t *ata_disk_pktalloc(opaque_t ctl_data, int (*callback)(caddr_t), 51 caddr_t arg); 52 static void ata_disk_pktfree(opaque_t ctl_data, cmpkt_t *pktp); 53 static cmpkt_t *ata_disk_memsetup(opaque_t ctl_data, cmpkt_t *pktp, 54 struct buf *bp, int (*callback)(caddr_t), caddr_t arg); 55 static void ata_disk_memfree(opaque_t ctl_data, cmpkt_t *pktp); 56 static cmpkt_t *ata_disk_iosetup(opaque_t ctl_data, cmpkt_t *pktp); 57 static int ata_disk_transport(opaque_t ctl_data, cmpkt_t *pktp); 58 59 /* 60 * DADA packet callbacks 61 */ 62 63 static void ata_disk_complete(ata_drv_t *ata_drvp, ata_pkt_t *ata_pktp, 64 int do_callback); 65 static int ata_disk_intr(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 66 ata_pkt_t *ata_pktp); 67 static int ata_disk_intr_dma(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 68 ata_pkt_t *ata_pktp); 69 static int ata_disk_intr_pio_in(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 70 ata_pkt_t *ata_pktp); 71 static int ata_disk_intr_pio_out(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 72 ata_pkt_t *ata_pktp); 73 static int ata_disk_start(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 74 ata_pkt_t *ata_pktp); 75 static int ata_disk_start_dma_in(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 76 ata_pkt_t *ata_pktp); 77 static int ata_disk_start_dma_out(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 78 ata_pkt_t *ata_pktp); 79 static int ata_disk_start_pio_in(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 80 ata_pkt_t *ata_pktp); 81 static int ata_disk_start_pio_out(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 82 ata_pkt_t *ata_pktp); 83 84 /* 85 * Local Function prototypes 86 */ 87 88 static int ata_disk_eject(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 89 ata_pkt_t *ata_pktp); 90 static void ata_disk_fake_inquiry(ata_drv_t *ata_drvp); 91 static void ata_disk_get_resid(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 92 ata_pkt_t *ata_pktp); 93 static int ata_disk_initialize_device_parameters(ata_ctl_t *ata_ctlp, 94 ata_drv_t *ata_drvp); 95 static int ata_disk_lock(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 96 ata_pkt_t *ata_pktp); 97 static int ata_disk_set_multiple(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp); 98 static void ata_disk_pio_xfer_data_in(ata_ctl_t *ata_ctlp, ata_pkt_t *ata_pktp); 99 static void ata_disk_pio_xfer_data_out(ata_ctl_t *ata_ctlp, 100 ata_pkt_t *ata_pktp); 101 static void ata_disk_set_standby_timer(ata_ctl_t *ata_ctlp, 102 ata_drv_t *ata_drvp); 103 static int ata_disk_recalibrate(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 104 ata_pkt_t *ata_pktp); 105 static int ata_disk_standby(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 106 ata_pkt_t *ata_pktp); 107 static int ata_disk_start_common(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 108 ata_pkt_t *ata_pktp); 109 static int ata_disk_state(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 110 ata_pkt_t *ata_pktp); 111 static int ata_disk_unlock(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 112 ata_pkt_t *ata_pktp); 113 static int ata_get_capacity(ata_drv_t *ata_drvp, uint64_t *capacity); 114 static void ata_fix_large_disk_geometry(ata_drv_t *ata_drvp); 115 static uint64_t ata_calculate_28bits_capacity(ata_drv_t *ata_drvp); 116 static uint64_t ata_calculate_48bits_capacity(ata_drv_t *ata_drvp); 117 static int ata_copy_dk_ioc_string(intptr_t arg, char *source, int length, 118 int flag); 119 static void ata_set_write_cache(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp); 120 121 122 /* 123 * Local static data 124 */ 125 126 uint_t ata_disk_init_dev_parm_wait = 4 * 1000000; 127 uint_t ata_disk_set_mult_wait = 4 * 1000000; 128 int ata_disk_do_standby_timer = TRUE; 129 130 /* 131 * ata_write_cache == 1 force write cache on. 132 * ata_write_cache == 0 do not modify write cache. firmware defaults kept. 133 * ata_write_cache == -1 force write cache off. 134 */ 135 int ata_write_cache = 1; 136 137 138 static struct ctl_objops ata_disk_objops = { 139 ata_disk_pktalloc, 140 ata_disk_pktfree, 141 ata_disk_memsetup, 142 ata_disk_memfree, 143 ata_disk_iosetup, 144 ata_disk_transport, 145 ata_disk_reset, 146 ata_disk_abort, 147 nulldev, 148 nulldev, 149 ata_disk_ioctl, 150 0, 0 151 }; 152 153 154 155 /* 156 * 157 * initialize the ata_disk sub-system 158 * 159 */ 160 161 /*ARGSUSED*/ 162 int 163 ata_disk_attach( 164 ata_ctl_t *ata_ctlp) 165 { 166 ADBG_TRACE(("ata_disk_init entered\n")); 167 return (TRUE); 168 } 169 170 171 172 /* 173 * 174 * destroy the ata_disk sub-system 175 * 176 */ 177 178 /*ARGSUSED*/ 179 void 180 ata_disk_detach( 181 ata_ctl_t *ata_ctlp) 182 { 183 ADBG_TRACE(("ata_disk_destroy entered\n")); 184 } 185 186 187 /* 188 * Test whether the disk can support Logical Block Addressing 189 */ 190 191 int 192 ata_test_lba_support(struct ata_id *aidp) 193 { 194 #ifdef __old_version__ 195 /* 196 * determine if the drive supports LBA mode 197 */ 198 if (aidp->ai_cap & ATAC_LBA_SUPPORT) 199 return (TRUE); 200 #else 201 /* 202 * Determine if the drive supports LBA mode 203 * LBA mode is mandatory on ATA-3 (or newer) drives but is 204 * optional on ATA-2 (or older) drives. On ATA-2 drives 205 * the ai_majorversion word should be 0xffff or 0x0000 206 * (version not reported). 207 */ 208 if (aidp->ai_majorversion != 0xffff && 209 aidp->ai_majorversion >= (1 << 3)) { 210 /* ATA-3 or better */ 211 return (TRUE); 212 } else if (aidp->ai_cap & ATAC_LBA_SUPPORT) { 213 /* ATA-2 LBA capability bit set */ 214 return (TRUE); 215 } else { 216 return (FALSE); 217 } 218 #endif 219 } 220 221 /* 222 * ATA-6 drives do not provide geometry information, so words 223 * ai_heads, ai_sectors and ai_fixcyls may not be valid 224 */ 225 static void 226 ata_fixup_ata6_geometry(struct ata_id *aidp) 227 { 228 /* check cylinders, heads, and sectors for valid values */ 229 if (aidp->ai_heads != 0 && aidp->ai_heads != 0xffff && 230 aidp->ai_sectors != 0 && aidp->ai_sectors != 0xffff && 231 aidp->ai_fixcyls != 0) 232 return; /* assume valid geometry - do nothing */ 233 234 /* 235 * Pre-set standard geometry values - they are not necessarily 236 * optimal for a given capacity 237 */ 238 aidp->ai_heads = 0x10; 239 aidp->ai_sectors = 0x3f; 240 aidp->ai_fixcyls = 1; 241 /* 242 * The fixcyls value will get fixed up later in 243 * ata_fix_large_disk_geometry. 244 */ 245 } 246 247 /* 248 * 249 * initialize the soft-structure for an ATA (non-PACKET) drive and 250 * then configure the drive with the correct modes and options. 251 * 252 */ 253 254 int 255 ata_disk_init_drive( 256 ata_drv_t *ata_drvp) 257 { 258 ata_ctl_t *ata_ctlp = ata_drvp->ad_ctlp; 259 struct ata_id *aidp = &ata_drvp->ad_id; 260 struct ctl_obj *ctlobjp; 261 struct scsi_device *devp; 262 int len; 263 int val; 264 int mode; 265 short *chs; 266 char buf[80]; 267 268 ADBG_TRACE(("ata_disk_init_drive entered\n")); 269 270 /* ATA disks don't support LUNs */ 271 272 if (ata_drvp->ad_lun != 0) 273 return (FALSE); 274 275 /* 276 * set up drive structure 277 * ATA-6 drives do not provide geometry information, so words 278 * ai_heads, ai_sectors and ai_fixcyls may not be valid - they 279 * will be fixed later 280 */ 281 282 ata_drvp->ad_phhd = aidp->ai_heads; 283 ata_drvp->ad_phsec = aidp->ai_sectors; 284 ata_drvp->ad_drvrhd = aidp->ai_heads; 285 ata_drvp->ad_drvrsec = aidp->ai_sectors; 286 ata_drvp->ad_drvrcyl = aidp->ai_fixcyls; 287 ata_drvp->ad_acyl = 0; 288 289 if (ata_test_lba_support(&ata_drvp->ad_id)) 290 ata_drvp->ad_drive_bits |= ATDH_LBA; 291 292 /* Get capacity and check for 48-bit mode */ 293 mode = ata_get_capacity(ata_drvp, &ata_drvp->ad_capacity); 294 if (mode == AD_EXT48) { 295 ata_drvp->ad_flags |= AD_EXT48; 296 } 297 298 /* straighten out the geometry */ 299 (void) sprintf(buf, "SUNW-ata-%p-d%d-chs", (void *) ata_ctlp->ac_data, 300 ata_drvp->ad_targ+1); 301 if (ddi_getlongprop(DDI_DEV_T_ANY, ddi_root_node(), 0, 302 buf, (caddr_t)&chs, &len) == DDI_PROP_SUCCESS) { 303 /* 304 * if the number of sectors and heads in bios matches the 305 * physical geometry, then so should the number of cylinders 306 * this is to prevent the 1023 limit in the older bios's 307 * causing loss of space. 308 */ 309 if (chs[1] == (ata_drvp->ad_drvrhd - 1) && 310 chs[2] == ata_drvp->ad_drvrsec) 311 /* Set chs[0] to zero-based number of cylinders. */ 312 chs[0] = aidp->ai_fixcyls - 1; 313 else if (!(ata_drvp->ad_drive_bits & ATDH_LBA)) { 314 /* 315 * if the the sector/heads do not match that of the 316 * bios and the drive does not support LBA. We go ahead 317 * and advertise the bios geometry but use the physical 318 * geometry for sector translation. 319 */ 320 cmn_err(CE_WARN, "!Disk 0x%p,%d: BIOS geometry " 321 "different from physical, and no LBA support.", 322 (void *)ata_ctlp->ac_data, ata_drvp->ad_targ); 323 } 324 325 /* 326 * chs[0,1] are zero-based; make them one-based. 327 */ 328 ata_drvp->ad_drvrcyl = chs[0] + 1; 329 ata_drvp->ad_drvrhd = chs[1] + 1; 330 ata_drvp->ad_drvrsec = chs[2]; 331 kmem_free(chs, len); 332 } else { 333 /* 334 * Property not present; this means that boot.bin has 335 * determined that the drive supports Int13 LBA. Note 336 * this, but just return a geometry with a large 337 * cylinder count; this will be the signal for dadk to 338 * fail DKIOCG_VIRTGEOM. 339 * ad_drvr* are already set; just recalculate ad_drvrcyl 340 * from capacity. 341 */ 342 343 ata_drvp->ad_flags |= AD_INT13LBA; 344 if (ata_drvp->ad_capacity != 0) { 345 ata_drvp->ad_drvrcyl = ata_drvp->ad_capacity / 346 (ata_drvp->ad_drvrhd * ata_drvp->ad_drvrsec); 347 } else { 348 /* 349 * Something's wrong; return something sure to 350 * fail the "cyls < 1024" test. This will 351 * never make it out of the DKIOCG_VIRTGEOM 352 * call, so its total bogosity won't matter. 353 */ 354 ata_drvp->ad_drvrcyl = 1025; 355 ata_drvp->ad_drvrhd = 1; 356 ata_drvp->ad_drvrsec = 1; 357 } 358 } 359 360 /* fix geometry for disks > 31GB, if needed */ 361 ata_fix_large_disk_geometry(ata_drvp); 362 363 /* 364 * set up the scsi_device and ctl_obj structures 365 */ 366 devp = &ata_drvp->ad_device; 367 ctlobjp = &ata_drvp->ad_ctl_obj; 368 369 devp->sd_inq = &ata_drvp->ad_inquiry; 370 devp->sd_address.a_hba_tran = (scsi_hba_tran_t *)ctlobjp; 371 devp->sd_address.a_target = (ushort_t)ata_drvp->ad_targ; 372 devp->sd_address.a_lun = (uchar_t)ata_drvp->ad_lun; 373 mutex_init(&devp->sd_mutex, NULL, MUTEX_DRIVER, NULL); 374 ata_drvp->ad_flags |= AD_MUTEX_INIT; 375 376 /* 377 * DADA ops vectors and cookie 378 */ 379 ctlobjp->c_ops = (struct ctl_objops *)&ata_disk_objops; 380 381 /* 382 * this is filled in with gtgtp by ata_disk_bus_ctl(INITCHILD) 383 */ 384 ctlobjp->c_data = NULL; 385 386 ctlobjp->c_ext = &(ctlobjp->c_extblk); 387 ctlobjp->c_extblk.c_ctldip = ata_ctlp->ac_dip; 388 ctlobjp->c_extblk.c_targ = ata_drvp->ad_targ; 389 ctlobjp->c_extblk.c_blksz = NBPSCTR; 390 391 /* 392 * Get highest block factor supported by the drive. 393 * Some drives report 0 if read/write multiple not supported, 394 * adjust their blocking factor to 1. 395 */ 396 ata_drvp->ad_block_factor = aidp->ai_mult1 & 0xff; 397 398 /* 399 * If a block factor property exists, use the smaller of the 400 * property value and the highest value the drive can support. 401 */ 402 (void) sprintf(buf, "drive%d_block_factor", ata_drvp->ad_targ); 403 val = ddi_prop_get_int(DDI_DEV_T_ANY, ata_ctlp->ac_dip, 0, buf, 404 ata_drvp->ad_block_factor); 405 406 ata_drvp->ad_block_factor = (short)min(val, ata_drvp->ad_block_factor); 407 408 if (ata_drvp->ad_block_factor == 0) 409 ata_drvp->ad_block_factor = 1; 410 411 if (!ata_disk_setup_parms(ata_ctlp, ata_drvp)) 412 return (FALSE); 413 414 ata_disk_fake_inquiry(ata_drvp); 415 416 return (TRUE); 417 } 418 419 /* 420 * Test if a disk supports 48-bit (extended mode) addressing and 421 * get disk capacity. 422 * Return value: 423 * AD_EXT48 if 48-bit mode is available, 0 otherwise, 424 * capacity in sectors. 425 * There are several indicators for 48-bit addressing. If any of 426 * them is missing, assume 28-bit (non-extended) addressing. 427 */ 428 429 static int 430 ata_get_capacity(ata_drv_t *ata_drvp, uint64_t *capacity) 431 { 432 struct ata_id *aidp = &ata_drvp->ad_id; 433 uint64_t cap28; /* capacity in 28-bit mode */ 434 uint64_t cap48; /* capacity in 48-bit mode */ 435 436 /* 437 * First compute capacity in 28-bit mode, using 28-bit capacity 438 * words in IDENTIFY DEVICE response words 439 */ 440 cap28 = ata_calculate_28bits_capacity(ata_drvp); 441 *capacity = cap28; 442 443 /* No 48-bit mode before ATA 6 */ 444 if (!IS_ATA_VERSION_SUPPORTED(aidp, 6)) 445 return (0); 446 447 /* Check that 48 bit addressing is supported & enabled */ 448 /* words 83 and 86 */ 449 if (!(aidp->ai_cmdset83 & ATACS_EXT48)) 450 return (0); 451 if (!(aidp->ai_features86 & ATACS_EXT48)) 452 return (0); 453 454 /* 455 * Drive supports ATA-6. Since ATA-6 drives may not provide 456 * geometry info, pre-set standard geometry values 457 */ 458 ata_fixup_ata6_geometry(aidp); 459 460 /* Compute 48-bit capacity */ 461 cap48 = ata_calculate_48bits_capacity(ata_drvp); 462 463 /* 464 * If capacity is smaller then the maximum capacity addressable 465 * in 28-bit mode, just use 28-bit capacity value. 466 * We will use 28-bit addressing read/write commands. 467 */ 468 if (cap48 <= MAX_28BIT_CAPACITY) 469 return (0); 470 471 /* 472 * Capacity is too big for 28-bits addressing. But, to make 473 * sure that the drive implements ATA-6 correctly, the 474 * final check: cap28 should be MAX for 28-bit addressing. 475 * If it's not, we shouldn't use 48-bit mode, so return 476 * the capacity reported in 28-bit capacity words. 477 */ 478 if (cap28 != MAX_28BIT_CAPACITY) 479 return (0); /* not max, use 28-bit value */ 480 481 /* 482 * All is well so return 48-bit capacity indicator 483 */ 484 ADBG_INIT(("ATA: using 48-bit mode for capacity %llx blocks\n", 485 (unsigned long long)cap48)); 486 487 *capacity = cap48; 488 return (AD_EXT48); 489 } 490 491 /* 492 * With the advent of disks that hold more than 31 GB, we run into a 493 * limitation in the sizes of the fields that describe the geometry. 494 * The cylinders, heads, and sectors-per-track are each described by a 495 * 16-bit number -- both in the structure returned from IDENTIFY 496 * DEVICE and in the structure returned from the DIOCTL_GETGEOM or 497 * DIOCTL_GETPHYGEOM ioctl. 498 * 499 * The typical disk has 32 heads per cylinder and 63 sectors per 500 * track. A 16 bit field can contain up to 65535. So the largest 501 * disk that can be described in these fields is 65535 * 32 * 63 * 512 502 * (bytes/sector), or about 31.5 GB. The cylinder count gets truncated 503 * when stored in a narrow field, so a 40GB disk appears to have only 504 * 8 GB! 505 * 506 * The solution (for the time being at least) is to lie about the 507 * geometry. If the number of cylinders is too large to fit in 16 508 * bits, we will halve the cylinders and double the heads, repeating 509 * until we can fit the geometry into 3 shorts. 510 * FUTURE ENHANCEMENT: If this ever isn't enough, we could 511 * add another step to double sectors/track as well. 512 */ 513 514 static void 515 ata_fix_large_disk_geometry( 516 ata_drv_t *ata_drvp) 517 { 518 struct ata_id *aidp = &ata_drvp->ad_id; 519 520 /* no hope for large disks if LBA not supported */ 521 if (!(ata_drvp->ad_drive_bits & ATDH_LBA)) 522 return; 523 524 /* 525 * Fix up the geometry to be returned by DIOCTL_GETGEOM. 526 * If number of cylinders > USHRT_MAX, double heads and 527 * halve cylinders until everything fits. 528 */ 529 while (ata_drvp->ad_drvrcyl > USHRT_MAX) { 530 int tempheads; 531 532 /* is there room in 16 bits to double the heads? */ 533 tempheads = 2 * ata_drvp->ad_drvrhd; 534 if (tempheads > USHRT_MAX) { 535 /* 536 * No room to double the heads. 537 * I give up, there's no way to represent this. 538 * Limit disk size. 539 */ 540 cmn_err(CE_WARN, 541 "Disk is too large: " 542 "Model %s, Serial# %s " 543 "Approximating...\n", 544 aidp->ai_model, aidp->ai_drvser); 545 ata_drvp->ad_drvrcyl = USHRT_MAX; 546 break; 547 } 548 549 /* OK, so double the heads and halve the cylinders */ 550 ata_drvp->ad_drvrcyl /= 2; 551 ata_drvp->ad_drvrhd *= 2; 552 } 553 } 554 555 /* 556 * Calculate capacity using 28-bit capacity words from IDENTIFY DEVICE 557 * return words 558 */ 559 uint64_t 560 ata_calculate_28bits_capacity(ata_drv_t *ata_drvp) 561 { 562 /* 563 * Asked x3t13 for advice; this implements Hale Landis' 564 * response, minus the "use ATA_INIT_DEVPARMS". 565 * See "capacity.notes". 566 */ 567 568 /* some local shorthand/renaming to clarify the meaning */ 569 570 ushort_t curcyls_w54, curhds_w55, cursect_w56; 571 uint32_t curcap_w57_58; 572 573 if ((ata_drvp->ad_drive_bits & ATDH_LBA) != 0) { 574 return ((uint64_t)(ata_drvp->ad_id.ai_addrsec[0] + 575 ata_drvp->ad_id.ai_addrsec[1] * 0x10000)); 576 } 577 578 /* 579 * If we're not LBA, then first try to validate "current" values. 580 */ 581 582 curcyls_w54 = ata_drvp->ad_id.ai_curcyls; 583 curhds_w55 = ata_drvp->ad_id.ai_curheads; 584 cursect_w56 = ata_drvp->ad_id.ai_cursectrk; 585 curcap_w57_58 = ata_drvp->ad_id.ai_cursccp[0] + 586 ata_drvp->ad_id.ai_cursccp[1] * 0x10000; 587 588 if (((ata_drvp->ad_id.ai_validinfo & 1) == 1) && 589 (curhds_w55 >= 1) && (curhds_w55 <= 16) && 590 (cursect_w56 >= 1) && (cursect_w56 <= 63) && 591 (curcap_w57_58 == curcyls_w54 * curhds_w55 * cursect_w56)) { 592 return ((uint64_t)curcap_w57_58); 593 } 594 595 /* 596 * At this point, Hale recommends ATA_INIT_DEVPARMS. 597 * I don't want to do that, so simply use 1/3/6 as 598 * a final fallback, and continue to assume the BIOS 599 * has done whatever INIT_DEVPARMS are necessary. 600 */ 601 602 return ((uint64_t)(ata_drvp->ad_id.ai_fixcyls * 603 ata_drvp->ad_id.ai_heads * ata_drvp->ad_id.ai_sectors)); 604 } 605 606 /* 607 * Calculate capacity using 48-bits capacity words from IDENTIFY DEVICE 608 * return words 609 */ 610 uint64_t 611 ata_calculate_48bits_capacity(ata_drv_t *ata_drvp) 612 { 613 uint64_t cap48 = 0; 614 int i; 615 616 for (i = 3; i >= 0; --i) { 617 cap48 <<= 16; 618 cap48 += ata_drvp->ad_id.ai_addrsecxt[i]; 619 } 620 return (cap48); 621 } 622 623 624 /* 625 * 626 * Setup the drives Read/Write Multiple Blocking factor and the 627 * current translation geometry. Necessary during attach and after 628 * Software Resets. 629 * 630 */ 631 632 int 633 ata_disk_setup_parms( 634 ata_ctl_t *ata_ctlp, 635 ata_drv_t *ata_drvp) 636 { 637 638 /* 639 * program geometry info back to the drive 640 */ 641 if (!ata_disk_initialize_device_parameters(ata_ctlp, ata_drvp)) { 642 return (FALSE); 643 } 644 645 /* 646 * Determine the blocking factor 647 */ 648 if (ata_drvp->ad_block_factor > 1) { 649 /* 650 * Program the block factor into the drive. If this 651 * fails, then go back to using a block size of 1. 652 */ 653 if (!ata_disk_set_multiple(ata_ctlp, ata_drvp)) 654 ata_drvp->ad_block_factor = 1; 655 } 656 657 658 if (ata_drvp->ad_block_factor > 1) { 659 ata_drvp->ad_rd_cmd = ATC_RDMULT; 660 ata_drvp->ad_wr_cmd = ATC_WRMULT; 661 } else { 662 ata_drvp->ad_rd_cmd = ATC_RDSEC; 663 ata_drvp->ad_wr_cmd = ATC_WRSEC; 664 } 665 666 ata_drvp->ad_bytes_per_block = ata_drvp->ad_block_factor << SCTRSHFT; 667 668 ADBG_INIT(("set block factor for drive %d to %d\n", 669 ata_drvp->ad_targ, ata_drvp->ad_block_factor)); 670 671 if (ata_disk_do_standby_timer) 672 ata_disk_set_standby_timer(ata_ctlp, ata_drvp); 673 674 ata_set_write_cache(ata_ctlp, ata_drvp); 675 676 return (TRUE); 677 } 678 679 680 /* 681 * Take the timeout value specified in the "standby" property 682 * and convert from seconds to the magic parm expected by the 683 * the drive. Then issue the IDLE command to set the drive's 684 * internal standby timer. 685 */ 686 687 static void 688 ata_disk_set_standby_timer( 689 ata_ctl_t *ata_ctlp, 690 ata_drv_t *ata_drvp) 691 { 692 uchar_t parm; 693 int timeout = ata_ctlp->ac_standby_time; 694 695 /* 696 * take the timeout value, specificed in seconds, and 697 * encode it into the proper command parm 698 */ 699 700 /* 701 * don't change it if no property specified or if 702 * the specified value is out of range 703 */ 704 if (timeout < 0 || timeout > (12 * 60 * 60)) 705 return; 706 707 /* 1 to 1200 seconds (20 minutes) == N * 5 seconds */ 708 if (timeout <= (240 * 5)) 709 parm = (timeout + 4) / 5; 710 711 /* 20 to 21 minutes == 21 minutes */ 712 else if (timeout <= (21 * 60)) 713 parm = 252; 714 715 /* 21 minutes to 21 minutes 15 seconds == 21:15 */ 716 else if (timeout <= ((21 * 60) + 15)) 717 parm = 255; 718 719 /* 21:15 to 330 minutes == N * 30 minutes */ 720 else if (timeout <= (11 * 30 * 60)) 721 parm = 240 + ((timeout + (30 * 60) - 1)/ (30 * 60)); 722 723 /* > 330 minutes == 8 to 12 hours */ 724 else 725 parm = 253; 726 727 (void) ata_command(ata_ctlp, ata_drvp, TRUE, FALSE, 5 * 1000000, 728 ATC_IDLE, 0, parm, 0, 0, 0, 0); 729 } 730 731 732 733 /* 734 * 735 * destroy an ata disk drive 736 * 737 */ 738 739 void 740 ata_disk_uninit_drive( 741 ata_drv_t *ata_drvp) 742 { 743 struct scsi_device *devp = &ata_drvp->ad_device; 744 745 ADBG_TRACE(("ata_disk_uninit_drive entered\n")); 746 747 if (ata_drvp->ad_flags & AD_MUTEX_INIT) 748 mutex_destroy(&devp->sd_mutex); 749 } 750 751 752 753 754 /* 755 * 756 * DADA compliant bus_ctl entry point 757 * 758 */ 759 760 /*ARGSUSED*/ 761 int 762 ata_disk_bus_ctl( 763 dev_info_t *d, 764 dev_info_t *r, 765 ddi_ctl_enum_t o, 766 void *a, 767 void *v) 768 { 769 ADBG_TRACE(("ata_disk_bus_ctl entered\n")); 770 771 switch (o) { 772 773 case DDI_CTLOPS_REPORTDEV: 774 { 775 int targ; 776 777 targ = ddi_prop_get_int(DDI_DEV_T_ANY, r, DDI_PROP_DONTPASS, 778 "target", 0); 779 cmn_err(CE_CONT, "?%s%d at %s%d target %d lun %d\n", 780 ddi_driver_name(r), ddi_get_instance(r), 781 ddi_driver_name(d), ddi_get_instance(d), targ, 0); 782 return (DDI_SUCCESS); 783 } 784 case DDI_CTLOPS_INITCHILD: 785 { 786 dev_info_t *cdip = (dev_info_t *)a; 787 ata_drv_t *ata_drvp; 788 ata_ctl_t *ata_ctlp; 789 ata_tgt_t *ata_tgtp; 790 struct scsi_device *devp; 791 struct ctl_obj *ctlobjp; 792 gtgt_t *gtgtp; 793 char name[MAXNAMELEN]; 794 795 /* 796 * save time by picking up ptr to drive struct left 797 * by ata_bus_ctl - isn't that convenient. 798 */ 799 ata_drvp = ddi_get_driver_private(cdip); 800 ata_ctlp = ata_drvp->ad_ctlp; 801 802 /* set up pointers to child dip */ 803 804 devp = &ata_drvp->ad_device; 805 /* 806 * If sd_dev is set, it means that the target has already 807 * being initialized. The cdip is a duplicate node from 808 * reexpansion of driver.conf. Fail INITCHILD here. 809 */ 810 if (devp->sd_dev != NULL) { 811 return (DDI_FAILURE); 812 } 813 devp->sd_dev = cdip; 814 815 ctlobjp = &ata_drvp->ad_ctl_obj; 816 ctlobjp->c_extblk.c_devdip = cdip; 817 818 /* 819 * Create the "ata" property for use by the target driver 820 */ 821 if (!ata_prop_create(cdip, ata_drvp, "ata")) { 822 return (DDI_FAILURE); 823 } 824 825 gtgtp = ghd_target_init(d, cdip, &ata_ctlp->ac_ccc, 826 sizeof (ata_tgt_t), ata_ctlp, 827 ata_drvp->ad_targ, 828 ata_drvp->ad_lun); 829 830 /* gt_tgt_private points to ata_tgt_t */ 831 ata_tgtp = GTGTP2ATATGTP(gtgtp); 832 ata_tgtp->at_drvp = ata_drvp; 833 ata_tgtp->at_dma_attr = ata_pciide_dma_attr; 834 ata_tgtp->at_dma_attr.dma_attr_maxxfer = 835 ata_ctlp->ac_max_transfer << SCTRSHFT; 836 837 /* gtgtp is the opaque arg to all my entry points */ 838 ctlobjp->c_data = gtgtp; 839 840 /* create device name */ 841 842 (void) sprintf(name, "%x,%x", ata_drvp->ad_targ, 843 ata_drvp->ad_lun); 844 ddi_set_name_addr(cdip, name); 845 ddi_set_driver_private(cdip, devp); 846 847 return (DDI_SUCCESS); 848 } 849 850 case DDI_CTLOPS_UNINITCHILD: 851 { 852 dev_info_t *cdip = (dev_info_t *)a; 853 struct scsi_device *devp; 854 struct ctl_obj *ctlobjp; 855 gtgt_t *gtgtp; 856 857 devp = ddi_get_driver_private(cdip); 858 ctlobjp = (struct ctl_obj *)devp->sd_address.a_hba_tran; 859 gtgtp = ctlobjp->c_data; 860 861 ghd_target_free(d, cdip, >GTP2ATAP(gtgtp)->ac_ccc, gtgtp); 862 863 ddi_set_driver_private(cdip, NULL); 864 ddi_set_name_addr(cdip, NULL); 865 return (DDI_SUCCESS); 866 } 867 868 default: 869 return (DDI_FAILURE); 870 } 871 } 872 873 874 /* 875 * 876 * DADA abort entry point - not currently used by dadk 877 * 878 */ 879 880 /* ARGSUSED */ 881 static int 882 ata_disk_abort(opaque_t ctl_data, cmpkt_t *pktp) 883 { 884 ADBG_TRACE(("ata_disk_abort entered\n")); 885 886 /* XXX - Note that this interface is currently not used by dadk */ 887 888 /* 889 * GHD abort functions take a pointer to a scsi_address 890 * and so they're unusable here. The ata driver used to 891 * return DDI_SUCCESS here without doing anything. Its 892 * seems that DDI_FAILURE is more appropriate. 893 */ 894 895 return (DDI_FAILURE); 896 } 897 898 899 900 /* 901 * 902 * DADA reset entry point - not currently used by dadk 903 * (except in debug versions of driver) 904 * 905 */ 906 907 /* ARGSUSED */ 908 static int 909 ata_disk_reset(opaque_t ctl_data, int level) 910 { 911 gtgt_t *gtgtp = (gtgt_t *)ctl_data; 912 ata_drv_t *ata_drvp = GTGTP2ATADRVP(gtgtp); 913 int rc; 914 915 ADBG_TRACE(("ata_disk_reset entered\n")); 916 917 /* XXX - Note that this interface is currently not used by dadk */ 918 919 if (level == RESET_TARGET) { 920 rc = ghd_tran_reset_target(&ata_drvp->ad_ctlp->ac_ccc, gtgtp, 921 NULL); 922 } else if (level == RESET_ALL) { 923 rc = ghd_tran_reset_bus(&ata_drvp->ad_ctlp->ac_ccc, gtgtp, 924 NULL); 925 } 926 927 return (rc ? DDI_SUCCESS : DDI_FAILURE); 928 } 929 930 931 932 /* 933 * 934 * DADA ioctl entry point 935 * 936 */ 937 938 /* ARGSUSED */ 939 static int 940 ata_disk_ioctl(opaque_t ctl_data, int cmd, intptr_t arg, int flag) 941 { 942 gtgt_t *gtgtp = (gtgt_t *)ctl_data; 943 ata_ctl_t *ata_ctlp = GTGTP2ATAP(gtgtp); 944 ata_drv_t *ata_drvp = GTGTP2ATADRVP(gtgtp); 945 int rc; 946 struct tgdk_geom tgdk; 947 int wce; 948 struct ata_id *aidp = &ata_drvp->ad_id; 949 950 ADBG_TRACE(("ata_disk_ioctl entered, cmd = %d\n", cmd)); 951 952 switch (cmd) { 953 954 case DIOCTL_GETGEOM: 955 case DIOCTL_GETPHYGEOM: 956 tgdk.g_cyl = ata_drvp->ad_drvrcyl; 957 tgdk.g_head = ata_drvp->ad_drvrhd; 958 tgdk.g_sec = ata_drvp->ad_drvrsec; 959 tgdk.g_acyl = ata_drvp->ad_acyl; 960 tgdk.g_secsiz = 512; 961 tgdk.g_cap = tgdk.g_cyl * tgdk.g_head * tgdk.g_sec; 962 if (ddi_copyout(&tgdk, (caddr_t)arg, sizeof (tgdk), flag)) 963 return (EFAULT); 964 return (0); 965 966 case DCMD_UPDATE_GEOM: 967 /* ??? fix this to issue IDENTIFY DEVICE ??? */ 968 /* might not be necessary since I don't know of any ATA/IDE that */ 969 /* can change its geometry. On the other hand, ATAPI devices like the */ 970 /* LS-120 or PD/CD can change their geometry when new media is inserted */ 971 return (0); 972 973 /* copy the model number into the caller's buffer */ 974 case DIOCTL_GETMODEL: 975 rc = ata_copy_dk_ioc_string(arg, aidp->ai_model, 976 sizeof (aidp->ai_model), flag); 977 return (rc); 978 979 /* copy the model number into the caller's buffer */ 980 case DIOCTL_GETSERIAL: 981 rc = ata_copy_dk_ioc_string(arg, aidp->ai_drvser, 982 sizeof (aidp->ai_drvser), 983 flag); 984 return (rc); 985 986 case DIOCTL_GETWCE: 987 /* 988 * WCE is only supported in ATAPI-4 or higher, for 989 * lower rev devices, must assume write cache is 990 * enabled. 991 * NOTE: Since there is currently no Solaris mechanism 992 * to change the state of the Write Cache Enable feature, 993 * this code just checks the value of the WCE bit 994 * obtained at device init time. If a mechanism 995 * is added to the driver to change WCE, this code 996 * must be updated appropriately. 997 */ 998 wce = (aidp->ai_majorversion == 0xffff) || 999 ((aidp->ai_majorversion & ATAC_MAJVER_4) == 0) || 1000 (aidp->ai_features85 & ATAC_FEATURES85_WCE) != 0; 1001 1002 if (ddi_copyout(&wce, (caddr_t)arg, sizeof (wce), flag) != 0) 1003 return (EFAULT); 1004 1005 return (0); 1006 1007 case DCMD_GET_STATE: 1008 rc = ata_queue_cmd(ata_disk_state, NULL, ata_ctlp, ata_drvp, 1009 gtgtp); 1010 break; 1011 1012 case DCMD_LOCK: 1013 case DKIOCLOCK: 1014 rc = ata_queue_cmd(ata_disk_lock, NULL, ata_ctlp, ata_drvp, 1015 gtgtp); 1016 break; 1017 1018 case DCMD_UNLOCK: 1019 case DKIOCUNLOCK: 1020 rc = ata_queue_cmd(ata_disk_unlock, NULL, ata_ctlp, ata_drvp, 1021 gtgtp); 1022 break; 1023 1024 case DCMD_START_MOTOR: 1025 case CDROMSTART: 1026 rc = ata_queue_cmd(ata_disk_recalibrate, NULL, ata_ctlp, 1027 ata_drvp, gtgtp); 1028 break; 1029 1030 case DCMD_STOP_MOTOR: 1031 case CDROMSTOP: 1032 rc = ata_queue_cmd(ata_disk_standby, NULL, ata_ctlp, ata_drvp, 1033 gtgtp); 1034 break; 1035 1036 case DKIOCEJECT: 1037 case CDROMEJECT: 1038 rc = ata_queue_cmd(ata_disk_eject, NULL, ata_ctlp, ata_drvp, 1039 gtgtp); 1040 break; 1041 1042 default: 1043 ADBG_WARN(("ata_disk_ioctl: unsupported cmd 0x%x\n", cmd)); 1044 return (ENOTTY); 1045 } 1046 1047 if (rc) 1048 return (0); 1049 return (ENXIO); 1050 1051 } 1052 1053 1054 #ifdef ___not___used___ 1055 /* 1056 * Issue an ATA command to the drive using the packet already 1057 * allocated by the target driver 1058 */ 1059 1060 int 1061 ata_disk_do_ioctl( 1062 int (*func)(ata_ctl_t *, ata_drv_t *, ata_pkt_t *), 1063 void *arg, 1064 ata_ctl_t *ata_ctlp, 1065 gtgt_t *gtgtp, 1066 cmpkt_t *pktp) 1067 { 1068 gcmd_t *gcmdp = CPKT2GCMD(pktp); 1069 ata_pkt_t *ata_pktp = GCMD2APKT(gcmdp); 1070 int rc; 1071 1072 ata_pktp->ap_start = func; 1073 ata_pktp->ap_intr = NULL; 1074 ata_pktp->ap_complete = NULL; 1075 ata_pktp->ap_v_addr = (caddr_t)arg; 1076 1077 /* 1078 * add it to the queue, when it gets to the front the 1079 * ap_start function is called. 1080 */ 1081 rc = ghd_transport(&ata_ctlp->ac_ccc, gcmdp, gcmdp->cmd_gtgtp, 1082 0, TRUE, NULL); 1083 1084 if (rc != TRAN_ACCEPT) { 1085 /* this should never, ever happen */ 1086 return (ENXIO); 1087 } 1088 1089 if (ata_pktp->ap_flags & AP_ERROR) 1090 return (ENXIO); 1091 return (0); 1092 } 1093 #endif 1094 1095 1096 1097 /* 1098 * 1099 * DADA pktalloc entry point 1100 * 1101 */ 1102 1103 /* ARGSUSED */ 1104 static cmpkt_t * 1105 ata_disk_pktalloc(opaque_t ctl_data, int (*callback)(caddr_t), caddr_t arg) 1106 { 1107 gtgt_t *gtgtp = (gtgt_t *)ctl_data; 1108 ata_drv_t *ata_drvp = GTGTP2ATADRVP(gtgtp); 1109 cmpkt_t *pktp; 1110 ata_pkt_t *ata_pktp; 1111 gcmd_t *gcmdp; 1112 1113 ADBG_TRACE(("ata_disk_pktalloc entered\n")); 1114 1115 /* 1116 * Allocate and init the GHD gcmd_t structure and the 1117 * DADA cmpkt and the ata_pkt 1118 */ 1119 if ((gcmdp = ghd_gcmd_alloc(gtgtp, 1120 (sizeof (cmpkt_t) + sizeof (ata_pkt_t)), 1121 (callback == DDI_DMA_SLEEP))) == NULL) { 1122 return ((cmpkt_t *)NULL); 1123 } 1124 ASSERT(gcmdp != NULL); 1125 1126 ata_pktp = GCMD2APKT(gcmdp); 1127 ASSERT(ata_pktp != NULL); 1128 1129 pktp = (cmpkt_t *)(ata_pktp + 1); 1130 1131 pktp->cp_ctl_private = (void *)gcmdp; 1132 ata_pktp->ap_gcmdp = gcmdp; 1133 gcmdp->cmd_pktp = (void *)pktp; 1134 1135 /* 1136 * At this point the structures are linked like this: 1137 * 1138 * (struct cmpkt) <--> (struct gcmd) <--> (struct ata_pkt) 1139 */ 1140 1141 /* callback functions */ 1142 1143 ata_pktp->ap_start = ata_disk_start; 1144 ata_pktp->ap_intr = ata_disk_intr; 1145 ata_pktp->ap_complete = ata_disk_complete; 1146 1147 /* other ata_pkt setup */ 1148 1149 ata_pktp->ap_bytes_per_block = ata_drvp->ad_bytes_per_block; 1150 1151 /* cmpkt setup */ 1152 1153 pktp->cp_cdblen = 1; 1154 pktp->cp_cdbp = (opaque_t)&ata_pktp->ap_cdb; 1155 pktp->cp_scbp = (opaque_t)&ata_pktp->ap_scb; 1156 pktp->cp_scblen = 1; 1157 1158 return (pktp); 1159 } 1160 1161 1162 1163 /* 1164 * 1165 * DADA pktfree entry point 1166 * 1167 */ 1168 1169 /* ARGSUSED */ 1170 static void 1171 ata_disk_pktfree(opaque_t ctl_data, cmpkt_t *pktp) 1172 { 1173 ata_pkt_t *ata_pktp = CPKT2APKT(pktp); 1174 1175 ADBG_TRACE(("ata_disk_pktfree entered\n")); 1176 1177 /* check not free already */ 1178 1179 ASSERT(!(ata_pktp->ap_flags & AP_FREE)); 1180 ata_pktp->ap_flags = AP_FREE; 1181 1182 ghd_gcmd_free(CPKT2GCMD(pktp)); 1183 } 1184 1185 1186 /* 1187 * 1188 * DADA memsetup entry point 1189 * 1190 */ 1191 1192 /* ARGSUSED */ 1193 static cmpkt_t * 1194 ata_disk_memsetup( 1195 opaque_t ctl_data, 1196 cmpkt_t *pktp, 1197 struct buf *bp, 1198 int (*callback)(caddr_t), 1199 caddr_t arg) 1200 { 1201 gtgt_t *gtgtp = (gtgt_t *)ctl_data; 1202 ata_pkt_t *ata_pktp = CPKT2APKT(pktp); 1203 gcmd_t *gcmdp = APKT2GCMD(ata_pktp); 1204 int flags; 1205 1206 ADBG_TRACE(("ata_disk_memsetup entered\n")); 1207 1208 ata_pktp->ap_sg_cnt = 0; 1209 1210 if (bp->b_bcount == 0) { 1211 ata_pktp->ap_v_addr = NULL; 1212 return (pktp); 1213 } 1214 1215 if (GTGTP2ATADRVP(gtgtp)->ad_pciide_dma != ATA_DMA_ON) 1216 goto skip_dma_setup; 1217 1218 if (ata_dma_disabled) 1219 goto skip_dma_setup; 1220 1221 /* 1222 * The PCI-IDE DMA engine is brain-damaged and can't 1223 * DMA non-aligned buffers. 1224 */ 1225 if (!(bp->b_flags & B_PAGEIO) && 1226 ((uintptr_t)bp->b_un.b_addr) & PCIIDE_PRDE_ADDR_MASK) { 1227 goto skip_dma_setup; 1228 } 1229 1230 /* 1231 * It also insists that the byte count must be even. 1232 */ 1233 if (bp->b_bcount & 1) 1234 goto skip_dma_setup; 1235 1236 /* check direction for data transfer */ 1237 if (bp->b_flags & B_READ) { 1238 flags = DDI_DMA_READ | DDI_DMA_PARTIAL; 1239 } else { 1240 flags = DDI_DMA_WRITE | DDI_DMA_PARTIAL; 1241 } 1242 1243 /* 1244 * Bind the DMA handle to the buf 1245 */ 1246 if (ghd_dma_buf_bind_attr(>GTP2ATAP(gtgtp)->ac_ccc, gcmdp, bp, flags, 1247 callback, arg, >GTP2ATATGTP(gtgtp)->at_dma_attr)) { 1248 ata_pktp->ap_v_addr = 0; 1249 return (pktp); 1250 } 1251 1252 skip_dma_setup: 1253 bp_mapin(bp); 1254 ata_pktp->ap_v_addr = bp->b_un.b_addr; 1255 return (pktp); 1256 } 1257 1258 1259 1260 /* 1261 * 1262 * DADA memfree entry point 1263 * 1264 */ 1265 1266 /* 1267 * 1157317 sez that drivers shouldn't call bp_mapout(), as either 1268 * biodone() or biowait() will end up doing it, but after they 1269 * call bp->b_iodone(), which is a necessary sequence for 1270 * Online Disk Suite. However, the DDI group wants to rethink 1271 * bp_mapin()/bp_mapout() and how they should behave in the 1272 * presence of layered drivers, etc. For the moment, fix 1273 * the OLDS problem by removing the bp_mapout() call. 1274 */ 1275 1276 #define BUG_1157317 1277 1278 /* ARGSUSED */ 1279 static void 1280 ata_disk_memfree(opaque_t ctl_data, cmpkt_t *pktp) 1281 { 1282 gcmd_t *gcmdp = CPKT2GCMD(pktp); 1283 1284 ADBG_TRACE(("ata_disk_memfree entered\n")); 1285 1286 if (gcmdp->cmd_dma_handle) 1287 ghd_dmafree_attr(gcmdp); 1288 #if !defined(BUG_1157317) 1289 else 1290 bp_mapout(pktp->cp_bp); 1291 #endif 1292 } 1293 1294 1295 1296 /* 1297 * 1298 * DADA iosetup entry point 1299 * 1300 */ 1301 1302 static cmpkt_t * 1303 ata_disk_iosetup(opaque_t ctl_data, cmpkt_t *pktp) 1304 { 1305 gtgt_t *gtgtp = (gtgt_t *)ctl_data; 1306 ata_drv_t *ata_drvp = GTGTP2ATADRVP(gtgtp); 1307 ata_pkt_t *ata_pktp = CPKT2APKT(pktp); 1308 gcmd_t *gcmdp = APKT2GCMD(ata_pktp); 1309 uint_t sec_count; 1310 daddr_t start_sec; 1311 uint_t byte_count; 1312 1313 ADBG_TRACE(("ata_disk_iosetup entered\n")); 1314 1315 /* 1316 * Check for DCMD_FLUSH_CACHE (which does no I/O) and 1317 * just do basic setup. 1318 */ 1319 if (pktp->cp_passthru == NULL && 1320 ata_pktp->ap_cdb == DCMD_FLUSH_CACHE) { 1321 ata_pktp->ap_cmd = ATC_FLUSH_CACHE; 1322 ata_pktp->ap_flags = 0; 1323 ata_pktp->ap_count = 0; 1324 ata_pktp->ap_startsec = 0; 1325 ata_pktp->ap_sg_cnt = 0; 1326 ata_pktp->ap_pciide_dma = FALSE; 1327 return (pktp); 1328 } 1329 1330 /* check for error retry */ 1331 if (ata_pktp->ap_flags & AP_ERROR) { 1332 /* 1333 * this is a temporary work-around for dadk calling 1334 * iosetup for retry. The correct 1335 * solution is changing dadk to not to call iosetup 1336 * for a retry. 1337 * We do not apply the work-around for pio mode since 1338 * that does not involve moving dma windows and reducing the 1339 * sector count would work for pio mode on a retry 1340 * for now. 1341 */ 1342 if (gcmdp->cmd_dma_handle != NULL) { 1343 ata_pktp->ap_flags = 0; 1344 return (NULL); 1345 } 1346 1347 ata_pktp->ap_bytes_per_block = NBPSCTR; 1348 sec_count = 1; 1349 1350 /* 1351 * Since we are retrying the last read or write operation, 1352 * restore the old values of the ap_v_addr and ap_resid. 1353 * This assumes CTL_IOSETUP is called again on retry; if not, 1354 * this needs to be done in CTL_TRANSPORT. 1355 */ 1356 if (ata_pktp->ap_flags & (AP_READ | AP_WRITE)) { 1357 ata_pktp->ap_v_addr = ata_pktp->ap_v_addr_sav; 1358 ata_pktp->ap_resid = ata_pktp->ap_resid_sav; 1359 } 1360 } else { 1361 /* 1362 * Limit request to ac_max_transfer sectors. 1363 * The value is specified by the user in the 1364 * max_transfer property. It must be in the range 1 to 256. 1365 * When max_transfer is 0x100 it is bigger than 8 bits. 1366 * The spec says 0 represents 256 so it should be OK. 1367 */ 1368 sec_count = min((pktp->cp_bytexfer >> SCTRSHFT), 1369 ata_drvp->ad_ctlp->ac_max_transfer); 1370 /* 1371 * Save the current values of ap_v_addr and ap_resid 1372 * in case a retry operation happens. During a retry 1373 * operation we need to restore these values. 1374 */ 1375 ata_pktp->ap_v_addr_sav = ata_pktp->ap_v_addr; 1376 ata_pktp->ap_resid_sav = ata_pktp->ap_resid; 1377 } 1378 1379 /* reset flags */ 1380 ata_pktp->ap_flags = 0; 1381 1382 #ifdef DADKIO_RWCMD_READ 1383 start_sec = pktp->cp_passthru ? RWCMDP(pktp)->blkaddr : pktp->cp_srtsec; 1384 #else 1385 start_sec = pktp->cp_srtsec; 1386 #endif 1387 1388 /* 1389 * Setup the PCIDE Bus Master Scatter/Gather list 1390 */ 1391 ata_pktp->ap_sg_cnt = 0; 1392 ata_pktp->ap_pciide_dma = FALSE; 1393 if (gcmdp->cmd_dma_handle != NULL && sec_count != 0) { 1394 byte_count = sec_count << SCTRSHFT; 1395 if ((ghd_dmaget_attr(>GTP2ATAP(gtgtp)->ac_ccc, gcmdp, 1396 byte_count, ATA_DMA_NSEGS, &byte_count) == FALSE) || 1397 (byte_count == 0)) { 1398 ADBG_ERROR(("ata_disk_iosetup: byte count zero\n")); 1399 return (NULL); 1400 } 1401 sec_count = byte_count >> SCTRSHFT; 1402 } 1403 1404 /* 1405 * In the non-48-bit mode addressing (CHS and LBA28) the sector 1406 * count is a 8-bit value and the sector count 0 represents 256 1407 * sectors. 1408 * In the extended addressing (LBA48) the sector count is a 16-bit 1409 * value, so max_transfer 0x100 cannot be truncated to 8-bits 1410 * because this would represent a zero sector count. 1411 */ 1412 ata_pktp->ap_count = sec_count; 1413 if (!(ata_drvp->ad_flags & AD_EXT48)) { 1414 ata_pktp->ap_count &= 0xff; 1415 } 1416 ata_pktp->ap_startsec = start_sec; 1417 1418 #ifdef DADKIO_RWCMD_READ 1419 if (pktp->cp_passthru) { 1420 switch (RWCMDP(pktp)->cmd) { 1421 case DADKIO_RWCMD_READ: 1422 if (ata_pktp->ap_sg_cnt) { 1423 ata_pktp->ap_cmd = ATC_READ_DMA; 1424 ata_pktp->ap_pciide_dma = TRUE; 1425 ata_pktp->ap_start = ata_disk_start_dma_in; 1426 ata_pktp->ap_intr = ata_disk_intr_dma; 1427 } else { 1428 ata_pktp->ap_cmd = ATC_RDSEC; 1429 ata_pktp->ap_start = ata_disk_start_pio_in; 1430 ata_pktp->ap_intr = ata_disk_intr_pio_in; 1431 } 1432 ata_pktp->ap_flags |= AP_READ; 1433 break; 1434 case DADKIO_RWCMD_WRITE: 1435 if (ata_pktp->ap_sg_cnt) { 1436 ata_pktp->ap_cmd = ATC_WRITE_DMA; 1437 ata_pktp->ap_pciide_dma = TRUE; 1438 ata_pktp->ap_start = ata_disk_start_dma_out; 1439 ata_pktp->ap_intr = ata_disk_intr_dma; 1440 } else { 1441 ata_pktp->ap_cmd = ATC_WRSEC; 1442 ata_pktp->ap_start = ata_disk_start_pio_out; 1443 ata_pktp->ap_intr = ata_disk_intr_pio_out; 1444 } 1445 ata_pktp->ap_flags |= AP_WRITE; 1446 break; 1447 } 1448 1449 byte_count = RWCMDP(pktp)->buflen; 1450 pktp->cp_bytexfer = byte_count; 1451 pktp->cp_resid = byte_count; 1452 ata_pktp->ap_resid = byte_count; 1453 1454 /* 1455 * since we're not using READ/WRITE MULTIPLE, we 1456 * should set bytes_per_block to one sector 1457 * XXX- why wasn't this in the old driver?? 1458 */ 1459 ata_pktp->ap_bytes_per_block = NBPSCTR; 1460 } else 1461 #endif 1462 { 1463 byte_count = sec_count << SCTRSHFT; 1464 pktp->cp_bytexfer = byte_count; 1465 pktp->cp_resid = byte_count; 1466 ata_pktp->ap_resid = byte_count; 1467 1468 /* setup the task file registers */ 1469 1470 switch (ata_pktp->ap_cdb) { 1471 case DCMD_READ: 1472 if (ata_pktp->ap_sg_cnt) { 1473 ata_pktp->ap_cmd = ATC_READ_DMA; 1474 ata_pktp->ap_pciide_dma = TRUE; 1475 ata_pktp->ap_start = ata_disk_start_dma_in; 1476 ata_pktp->ap_intr = ata_disk_intr_dma; 1477 } else { 1478 ata_pktp->ap_cmd = ata_drvp->ad_rd_cmd; 1479 ata_pktp->ap_start = ata_disk_start_pio_in; 1480 ata_pktp->ap_intr = ata_disk_intr_pio_in; 1481 } 1482 ata_pktp->ap_flags |= AP_READ; 1483 break; 1484 1485 case DCMD_WRITE: 1486 if (ata_pktp->ap_sg_cnt) { 1487 ata_pktp->ap_cmd = ATC_WRITE_DMA; 1488 ata_pktp->ap_pciide_dma = TRUE; 1489 ata_pktp->ap_start = ata_disk_start_dma_out; 1490 ata_pktp->ap_intr = ata_disk_intr_dma; 1491 } else { 1492 ata_pktp->ap_cmd = ata_drvp->ad_wr_cmd; 1493 ata_pktp->ap_start = ata_disk_start_pio_out; 1494 ata_pktp->ap_intr = ata_disk_intr_pio_out; 1495 } 1496 ata_pktp->ap_flags |= AP_WRITE; 1497 break; 1498 1499 default: 1500 ADBG_WARN(("ata_disk_iosetup: unknown command 0x%x\n", 1501 ata_pktp->ap_cdb)); 1502 pktp = NULL; 1503 break; 1504 } 1505 } 1506 1507 /* If 48-bit mode is used, convert command to 48-bit mode cmd */ 1508 if (pktp != NULL && ata_drvp->ad_flags & AD_EXT48) { 1509 switch (ata_pktp->ap_cmd) { 1510 case ATC_RDSEC: 1511 ata_pktp->ap_cmd = ATC_RDSEC_EXT; 1512 break; 1513 case ATC_WRSEC: 1514 ata_pktp->ap_cmd = ATC_WRSEC_EXT; 1515 break; 1516 case ATC_RDMULT: 1517 ata_pktp->ap_cmd = ATC_RDMULT_EXT; 1518 break; 1519 case ATC_WRMULT: 1520 ata_pktp->ap_cmd = ATC_WRMULT_EXT; 1521 break; 1522 case ATC_READ_DMA: 1523 ata_pktp->ap_cmd = ATC_RDDMA_EXT; 1524 break; 1525 case ATC_WRITE_DMA: 1526 ata_pktp->ap_cmd = ATC_WRDMA_EXT; 1527 break; 1528 } 1529 } 1530 1531 return (pktp); 1532 } 1533 1534 1535 1536 /* 1537 * 1538 * DADA transport entry point 1539 * 1540 */ 1541 1542 static int 1543 ata_disk_transport(opaque_t ctl_data, cmpkt_t *pktp) 1544 { 1545 gtgt_t *gtgtp = (gtgt_t *)ctl_data; 1546 ata_drv_t *ata_drvp = GTGTP2ATADRVP(gtgtp); 1547 ata_ctl_t *ata_ctlp = ata_drvp->ad_ctlp; 1548 ata_pkt_t *ata_pktp = CPKT2APKT(pktp); 1549 int rc; 1550 int polled = FALSE; 1551 1552 ADBG_TRACE(("ata_disk_transport entered\n")); 1553 1554 /* check for polling pkt */ 1555 1556 if (pktp->cp_flags & CPF_NOINTR) { 1557 polled = TRUE; 1558 } 1559 1560 /* call ghd transport routine */ 1561 1562 rc = ghd_transport(&ata_ctlp->ac_ccc, APKT2GCMD(ata_pktp), 1563 gtgtp, pktp->cp_time, polled, NULL); 1564 1565 /* see if pkt was not accepted */ 1566 1567 if (rc == TRAN_BUSY) 1568 return (CTL_SEND_BUSY); 1569 1570 if (rc == TRAN_ACCEPT) 1571 return (CTL_SEND_SUCCESS); 1572 1573 return (CTL_SEND_FAILURE); 1574 } 1575 1576 1577 /* 1578 * 1579 * routines to load the cylinder/head/sector/count 1580 * task file registers. 1581 * 1582 */ 1583 static void 1584 ata_disk_load_regs_lba28(ata_pkt_t *ata_pktp, ata_drv_t *ata_drvp) 1585 { 1586 ata_ctl_t *ata_ctlp = ata_drvp->ad_ctlp; 1587 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 1588 uint_t lba; /* LBA of first sector */ 1589 1590 lba = ata_pktp->ap_startsec; 1591 1592 ddi_put8(io_hdl1, ata_ctlp->ac_count, 1593 ata_pktp->ap_count); 1594 ddi_put8(io_hdl1, ata_ctlp->ac_sect, lba); 1595 lba >>= 8; 1596 ddi_put8(io_hdl1, ata_ctlp->ac_lcyl, lba); 1597 lba >>= 8; 1598 ddi_put8(io_hdl1, ata_ctlp->ac_hcyl, lba); 1599 lba >>= 8; 1600 /* 1601 * dev/head register can use only 4 bits 1602 * must also include drive selector. 1603 */ 1604 lba = (lba & 0xf) | ata_drvp->ad_drive_bits; 1605 ddi_put8(io_hdl1, ata_ctlp->ac_drvhd, lba); 1606 } 1607 1608 /* 1609 * In 48-bit extended mode, the sector count is 16 bits wide, and the 1610 * LBA is 48 bits wide, as follows: 1611 * register most recent previous 1612 * name value value 1613 * -------- ---------- --------- 1614 * sector cnt count(7:0) count(15:8) 1615 * sector num lba(7:0) lba(31:24) 1616 * cyl low lba(15:8) lba(39:32) 1617 * cyl hi lba(23:16) lba(47:40) 1618 * device/head 111D0000 N/A 1619 * ^ ^ 1620 * | | 1621 * | +-- drive number 1622 * | 1623 * +-- indicates LBA 1624 * The other two 1 bits are historical and are not used in 48bit 1625 * extended mode. 1626 */ 1627 /* 1628 * WARNING: 1629 * dada framework passes starting sector as daddr_t type, thus 1630 * limiting reachable disk space in 32-bit x86 architecture to 1 terabyte. 1631 * Therefore high 16 bits of the 48-bits address can be and 1632 * are currently ignored. 1633 */ 1634 static void 1635 ata_disk_load_regs_lba48(ata_pkt_t *ata_pktp, ata_drv_t *ata_drvp) 1636 { 1637 ata_ctl_t *ata_ctlp = ata_drvp->ad_ctlp; 1638 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 1639 uint16_t seccnt; /* 16-bit sector count */ 1640 uint_t lbalow; /* low-order 24 bits of LBA */ 1641 uint_t lbahi; /* high-order 24 bits of LBA */ 1642 1643 seccnt = ata_pktp->ap_count; 1644 /* high-order 8 bits of lbalow never get used */ 1645 lbalow = ata_pktp->ap_startsec; 1646 lbahi = ata_pktp->ap_startsec >> 24; 1647 1648 ddi_put8(io_hdl1, ata_ctlp->ac_count, seccnt >> 8); 1649 ddi_put8(io_hdl1, ata_ctlp->ac_count, seccnt); 1650 /* Send the high-order half first */ 1651 ddi_put8(io_hdl1, ata_ctlp->ac_sect, lbahi); 1652 lbahi >>= 8; 1653 ddi_put8(io_hdl1, ata_ctlp->ac_lcyl, lbahi); 1654 lbahi >>= 8; 1655 ddi_put8(io_hdl1, ata_ctlp->ac_hcyl, lbahi); 1656 /* Send the low-order half */ 1657 ddi_put8(io_hdl1, ata_ctlp->ac_sect, lbalow); 1658 lbalow >>= 8; 1659 ddi_put8(io_hdl1, ata_ctlp->ac_lcyl, lbalow); 1660 lbalow >>= 8; 1661 ddi_put8(io_hdl1, ata_ctlp->ac_hcyl, lbalow); 1662 ddi_put8(io_hdl1, ata_ctlp->ac_drvhd, 1663 ata_drvp->ad_drive_bits); 1664 } 1665 1666 static void 1667 ata_disk_load_regs_chs(ata_pkt_t *ata_pktp, ata_drv_t *ata_drvp) 1668 { 1669 ata_ctl_t *ata_ctlp = ata_drvp->ad_ctlp; 1670 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 1671 uint_t resid; 1672 uint_t cyl; 1673 uchar_t head; 1674 uchar_t drvheads; 1675 uchar_t drvsectors; 1676 1677 drvheads = ata_drvp->ad_phhd; 1678 drvsectors = ata_drvp->ad_phsec; 1679 1680 resid = ata_pktp->ap_startsec / drvsectors; 1681 head = (resid % drvheads) & 0xf; 1682 cyl = resid / drvheads; 1683 /* automatically truncate to char */ 1684 ddi_put8(io_hdl1, ata_ctlp->ac_sect, 1685 (ata_pktp->ap_startsec % drvsectors) + 1); 1686 ddi_put8(io_hdl1, ata_ctlp->ac_count, ata_pktp->ap_count); 1687 ddi_put8(io_hdl1, ata_ctlp->ac_hcyl, (cyl >> 8)); 1688 /* lcyl gets truncated to 8 bits */ 1689 ddi_put8(io_hdl1, ata_ctlp->ac_lcyl, cyl); 1690 ddi_put8(io_hdl1, ata_ctlp->ac_drvhd, 1691 ata_drvp->ad_drive_bits | head); 1692 } 1693 1694 1695 /* 1696 * 1697 * packet start callback routines 1698 * 1699 */ 1700 1701 /* ARGSUSED */ 1702 static int 1703 ata_disk_start_common( 1704 ata_ctl_t *ata_ctlp, 1705 ata_drv_t *ata_drvp, 1706 ata_pkt_t *ata_pktp) 1707 { 1708 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 1709 ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2; 1710 1711 ADBG_TRACE(("ata_disk_start_common entered\n")); 1712 1713 ADBG_TRANSPORT(("ata_disk_start:\tpkt = 0x%p, pkt flags = 0x%x\n", 1714 ata_pktp, ata_pktp->ap_flags)); 1715 ADBG_TRANSPORT(("\tcommand=0x%x, sect=0x%lx\n", 1716 ata_pktp->ap_cmd, ata_pktp->ap_startsec)); 1717 ADBG_TRANSPORT(("\tcount=0x%x, drvhd = 0x%x\n", 1718 ata_pktp->ap_count, ata_drvp->ad_drive_bits)); 1719 1720 /* 1721 * If AC_BSY_WAIT is set, wait for controller to not be busy, 1722 * before issuing a command. If AC_BSY_WAIT is not set, 1723 * skip the wait. This is important for laptops that do 1724 * suspend/resume but do not correctly wait for the busy bit to 1725 * drop after a resume. 1726 * 1727 * NOTE: this test for ATS_BSY is also needed if/when we 1728 * implement the overlapped/queued command protocols. Currently, 1729 * the overlap/queued feature is not supported so the test is 1730 * conditional. 1731 */ 1732 if (ata_ctlp->ac_timing_flags & AC_BSY_WAIT) { 1733 if (!ata_wait(io_hdl2, ata_ctlp->ac_ioaddr2, 1734 0, ATS_BSY, 5000000)) { 1735 ADBG_ERROR(("ata_disk_start: BUSY\n")); 1736 return (FALSE); 1737 } 1738 } 1739 1740 ddi_put8(io_hdl1, ata_ctlp->ac_drvhd, ata_drvp->ad_drive_bits); 1741 ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2); 1742 1743 /* 1744 * make certain the drive selected 1745 */ 1746 if (!ata_wait(io_hdl2, ata_ctlp->ac_ioaddr2, 1747 ATS_DRDY, ATS_BSY, 5 * 1000000)) { 1748 ADBG_ERROR(("ata_disk_start: select failed\n")); 1749 return (FALSE); 1750 } 1751 1752 /* 1753 * We use different methods for loading the task file 1754 * registers, depending on whether the disk 1755 * uses LBA or CHS addressing and whether 48-bit 1756 * extended addressing is to be used. 1757 */ 1758 if (!(ata_drvp->ad_drive_bits & ATDH_LBA)) 1759 ata_disk_load_regs_chs(ata_pktp, ata_drvp); 1760 else if (ata_drvp->ad_flags & AD_EXT48) 1761 ata_disk_load_regs_lba48(ata_pktp, ata_drvp); 1762 else 1763 ata_disk_load_regs_lba28(ata_pktp, ata_drvp); 1764 ddi_put8(io_hdl1, ata_ctlp->ac_feature, 0); 1765 1766 /* 1767 * Always make certain interrupts are enabled. It's been reported 1768 * (but not confirmed) that some notebook computers don't 1769 * clear the interrupt disable bit after being resumed. The 1770 * easiest way to fix this is to always clear the disable bit 1771 * before every command. 1772 */ 1773 ddi_put8(io_hdl2, ata_ctlp->ac_devctl, ATDC_D3); 1774 return (TRUE); 1775 } 1776 1777 1778 /* 1779 * 1780 * Start a non-data ATA command (not DMA and not PIO): 1781 * 1782 */ 1783 1784 static int 1785 ata_disk_start( 1786 ata_ctl_t *ata_ctlp, 1787 ata_drv_t *ata_drvp, 1788 ata_pkt_t *ata_pktp) 1789 { 1790 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 1791 ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2; 1792 int rc; 1793 1794 rc = ata_disk_start_common(ata_ctlp, ata_drvp, ata_pktp); 1795 1796 if (!rc) 1797 return (ATA_FSM_RC_BUSY); 1798 1799 /* 1800 * This next one sets the controller in motion 1801 */ 1802 ddi_put8(io_hdl1, ata_ctlp->ac_cmd, ata_pktp->ap_cmd); 1803 1804 /* wait for the busy bit to settle */ 1805 ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2); 1806 1807 return (ATA_FSM_RC_OKAY); 1808 } 1809 1810 1811 1812 static int 1813 ata_disk_start_dma_in( 1814 ata_ctl_t *ata_ctlp, 1815 ata_drv_t *ata_drvp, 1816 ata_pkt_t *ata_pktp) 1817 { 1818 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 1819 ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2; 1820 int rc; 1821 1822 rc = ata_disk_start_common(ata_ctlp, ata_drvp, ata_pktp); 1823 1824 if (!rc) 1825 return (ATA_FSM_RC_BUSY); 1826 1827 /* 1828 * Copy the Scatter/Gather list to the controller's 1829 * Physical Region Descriptor Table 1830 */ 1831 ata_pciide_dma_setup(ata_ctlp, ata_pktp->ap_sg_list, 1832 ata_pktp->ap_sg_cnt); 1833 1834 /* 1835 * reset the PCIIDE Controller's interrupt and error status bits 1836 */ 1837 (void) ata_pciide_status_clear(ata_ctlp); 1838 1839 /* 1840 * This next one sets the drive in motion 1841 */ 1842 ddi_put8(io_hdl1, ata_ctlp->ac_cmd, ata_pktp->ap_cmd); 1843 1844 /* wait for the drive's busy bit to settle */ 1845 ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2); 1846 1847 ata_pciide_dma_start(ata_ctlp, PCIIDE_BMICX_RWCON_WRITE_TO_MEMORY); 1848 1849 return (ATA_FSM_RC_OKAY); 1850 } 1851 1852 1853 1854 static int 1855 ata_disk_start_dma_out( 1856 ata_ctl_t *ata_ctlp, 1857 ata_drv_t *ata_drvp, 1858 ata_pkt_t *ata_pktp) 1859 { 1860 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 1861 ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2; 1862 int rc; 1863 1864 rc = ata_disk_start_common(ata_ctlp, ata_drvp, ata_pktp); 1865 1866 if (!rc) 1867 return (ATA_FSM_RC_BUSY); 1868 1869 /* 1870 * Copy the Scatter/Gather list to the controller's 1871 * Physical Region Descriptor Table 1872 */ 1873 ata_pciide_dma_setup(ata_ctlp, ata_pktp->ap_sg_list, 1874 ata_pktp->ap_sg_cnt); 1875 1876 /* 1877 * reset the PCIIDE Controller's interrupt and error status bits 1878 */ 1879 (void) ata_pciide_status_clear(ata_ctlp); 1880 1881 /* 1882 * This next one sets the drive in motion 1883 */ 1884 ddi_put8(io_hdl1, ata_ctlp->ac_cmd, ata_pktp->ap_cmd); 1885 1886 /* wait for the drive's busy bit to settle */ 1887 ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2); 1888 1889 ata_pciide_dma_start(ata_ctlp, PCIIDE_BMICX_RWCON_READ_FROM_MEMORY); 1890 1891 return (ATA_FSM_RC_OKAY); 1892 } 1893 1894 1895 1896 1897 1898 /* 1899 * 1900 * Start a PIO data-in ATA command: 1901 * 1902 */ 1903 1904 static int 1905 ata_disk_start_pio_in( 1906 ata_ctl_t *ata_ctlp, 1907 ata_drv_t *ata_drvp, 1908 ata_pkt_t *ata_pktp) 1909 { 1910 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 1911 ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2; 1912 int rc; 1913 1914 rc = ata_disk_start_common(ata_ctlp, ata_drvp, ata_pktp); 1915 1916 if (!rc) 1917 return (ATA_FSM_RC_BUSY); 1918 /* 1919 * This next one sets the controller in motion 1920 */ 1921 ddi_put8(io_hdl1, ata_ctlp->ac_cmd, ata_pktp->ap_cmd); 1922 1923 /* wait for the busy bit to settle */ 1924 ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2); 1925 1926 return (ATA_FSM_RC_OKAY); 1927 } 1928 1929 1930 1931 1932 /* 1933 * 1934 * Start a PIO data-out ATA command: 1935 * 1936 */ 1937 1938 static int 1939 ata_disk_start_pio_out( 1940 ata_ctl_t *ata_ctlp, 1941 ata_drv_t *ata_drvp, 1942 ata_pkt_t *ata_pktp) 1943 { 1944 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 1945 ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2; 1946 int rc; 1947 1948 ata_pktp->ap_wrt_count = 0; 1949 1950 rc = ata_disk_start_common(ata_ctlp, ata_drvp, ata_pktp); 1951 1952 if (!rc) 1953 return (ATA_FSM_RC_BUSY); 1954 /* 1955 * This next one sets the controller in motion 1956 */ 1957 ddi_put8(io_hdl1, ata_ctlp->ac_cmd, ata_pktp->ap_cmd); 1958 1959 /* wait for the busy bit to settle */ 1960 ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2); 1961 1962 /* 1963 * Wait for the drive to assert DRQ to send the first chunk 1964 * of data. Have to busy wait because there's no interrupt for 1965 * the first chunk. This sucks (a lot of cycles) if the 1966 * drive responds too slowly or if the wait loop granularity 1967 * is too large. It's really bad if the drive is defective and 1968 * the loop times out. 1969 */ 1970 1971 if (!ata_wait3(io_hdl2, ata_ctlp->ac_ioaddr2, 1972 ATS_DRQ, ATS_BSY, /* okay */ 1973 ATS_ERR, ATS_BSY, /* cmd failed */ 1974 ATS_DF, ATS_BSY, /* drive failed */ 1975 4000000)) { 1976 ADBG_WARN(("ata_disk_start_pio_out: no DRQ\n")); 1977 ata_pktp->ap_flags |= AP_ERROR; 1978 return (ATA_FSM_RC_INTR); 1979 } 1980 1981 /* 1982 * Tell the upper layer to fake a hardware interrupt which 1983 * actually causes the first segment to be written to the drive. 1984 */ 1985 return (ATA_FSM_RC_INTR); 1986 } 1987 1988 1989 1990 /* 1991 * 1992 * packet complete callback routine 1993 * 1994 */ 1995 1996 static void 1997 ata_disk_complete( 1998 ata_drv_t *ata_drvp, 1999 ata_pkt_t *ata_pktp, 2000 int do_callback) 2001 { 2002 struct ata_id *aidp = &ata_drvp->ad_id; 2003 cmpkt_t *pktp; 2004 2005 ADBG_TRACE(("ata_disk_complete entered\n")); 2006 ADBG_TRANSPORT(("ata_disk_complete: pkt = 0x%p\n", ata_pktp)); 2007 2008 pktp = APKT2CPKT(ata_pktp); 2009 2010 /* update resid */ 2011 2012 pktp->cp_resid = ata_pktp->ap_resid; 2013 2014 if (ata_pktp->ap_flags & AP_ERROR) { 2015 2016 pktp->cp_reason = CPS_CHKERR; 2017 2018 if (ata_pktp->ap_error & ATE_BBK_ICRC) { 2019 if (IS_ATA_VERSION_GE(aidp, 4)) 2020 ata_pktp->ap_scb = DERR_ICRC; 2021 else 2022 ata_pktp->ap_scb = DERR_BBK; 2023 } else if (ata_pktp->ap_error & ATE_UNC) 2024 ata_pktp->ap_scb = DERR_UNC; 2025 else if (ata_pktp->ap_error & ATE_IDNF) 2026 ata_pktp->ap_scb = DERR_IDNF; 2027 else if (ata_pktp->ap_error & ATE_TKONF) 2028 ata_pktp->ap_scb = DERR_TKONF; 2029 else if (ata_pktp->ap_error & ATE_AMNF) 2030 ata_pktp->ap_scb = DERR_AMNF; 2031 else if (ata_pktp->ap_status & ATS_BSY) 2032 ata_pktp->ap_scb = DERR_BUSY; 2033 else if (ata_pktp->ap_status & ATS_DF) 2034 ata_pktp->ap_scb = DERR_DWF; 2035 else /* any unknown error */ 2036 ata_pktp->ap_scb = DERR_ABORT; 2037 } else if (ata_pktp->ap_flags & 2038 (AP_ABORT|AP_TIMEOUT|AP_BUS_RESET)) { 2039 2040 pktp->cp_reason = CPS_CHKERR; 2041 ata_pktp->ap_scb = DERR_ABORT; 2042 } else { 2043 pktp->cp_reason = CPS_SUCCESS; 2044 ata_pktp->ap_scb = DERR_SUCCESS; 2045 } 2046 2047 /* callback */ 2048 if (do_callback) 2049 (*pktp->cp_callback)(pktp); 2050 } 2051 2052 2053 /* 2054 * 2055 * Interrupt callbacks 2056 * 2057 */ 2058 2059 2060 /* 2061 * 2062 * ATA command, no data 2063 * 2064 */ 2065 2066 /* ARGSUSED */ 2067 static int 2068 ata_disk_intr( 2069 ata_ctl_t *ata_ctlp, 2070 ata_drv_t *ata_drvp, 2071 ata_pkt_t *ata_pktp) 2072 { 2073 uchar_t status; 2074 2075 ADBG_TRACE(("ata_disk_intr entered\n")); 2076 ADBG_TRANSPORT(("ata_disk_intr: pkt = 0x%p\n", ata_pktp)); 2077 2078 status = ata_get_status_clear_intr(ata_ctlp, ata_pktp); 2079 2080 ASSERT((status & (ATS_BSY | ATS_DRQ)) == 0); 2081 2082 /* 2083 * check for errors 2084 */ 2085 2086 if (status & (ATS_DF | ATS_ERR)) { 2087 ADBG_WARN(("ata_disk_intr: status 0x%x error 0x%x\n", status, 2088 ddi_get8(ata_ctlp->ac_iohandle1, ata_ctlp->ac_error))); 2089 ata_pktp->ap_flags |= AP_ERROR; 2090 } 2091 2092 if (ata_pktp->ap_flags & AP_ERROR) { 2093 ata_pktp->ap_status = ddi_get8(ata_ctlp->ac_iohandle2, 2094 ata_ctlp->ac_altstatus); 2095 ata_pktp->ap_error = ddi_get8(ata_ctlp->ac_iohandle1, 2096 ata_ctlp->ac_error); 2097 } 2098 2099 /* tell the upper layer this request is complete */ 2100 return (ATA_FSM_RC_FINI); 2101 } 2102 2103 2104 /* 2105 * 2106 * ATA command, PIO data in 2107 * 2108 */ 2109 2110 /* ARGSUSED */ 2111 static int 2112 ata_disk_intr_pio_in( 2113 ata_ctl_t *ata_ctlp, 2114 ata_drv_t *ata_drvp, 2115 ata_pkt_t *ata_pktp) 2116 { 2117 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 2118 ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2; 2119 uchar_t status; 2120 2121 ADBG_TRACE(("ata_disk_pio_in entered\n")); 2122 ADBG_TRANSPORT(("ata_disk_pio_in: pkt = 0x%p\n", ata_pktp)); 2123 2124 /* 2125 * first make certain DRQ is asserted (and no errors) 2126 */ 2127 (void) ata_wait3(io_hdl2, ata_ctlp->ac_ioaddr2, 2128 ATS_DRQ, ATS_BSY, ATS_ERR, ATS_BSY, ATS_DF, ATS_BSY, 2129 4000000); 2130 2131 status = ata_get_status_clear_intr(ata_ctlp, ata_pktp); 2132 2133 if (status & ATS_BSY) { 2134 ADBG_WARN(("ata_disk_pio_in: BUSY\n")); 2135 ata_pktp->ap_flags |= AP_ERROR; 2136 ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus); 2137 ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error); 2138 return (ATA_FSM_RC_BUSY); 2139 } 2140 2141 /* 2142 * record any errors 2143 */ 2144 if ((status & (ATS_DRQ | ATS_DF | ATS_ERR)) != ATS_DRQ) { 2145 ADBG_WARN(("ata_disk_pio_in: status 0x%x error 0x%x\n", 2146 status, ddi_get8(io_hdl1, ata_ctlp->ac_error))); 2147 ata_pktp->ap_flags |= AP_ERROR; 2148 ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus); 2149 ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error); 2150 } 2151 2152 /* 2153 * read the next chunk of data (if any) 2154 */ 2155 if (status & ATS_DRQ) { 2156 ata_disk_pio_xfer_data_in(ata_ctlp, ata_pktp); 2157 } 2158 2159 /* 2160 * If that was the last chunk, wait for the device to clear DRQ 2161 */ 2162 if (ata_pktp->ap_resid == 0) { 2163 if (ata_wait(io_hdl2, ata_ctlp->ac_ioaddr2, 2164 0, (ATS_DRQ | ATS_BSY), 4000000)) { 2165 /* tell the upper layer this request is complete */ 2166 return (ATA_FSM_RC_FINI); 2167 } 2168 2169 ADBG_WARN(("ata_disk_pio_in: DRQ stuck\n")); 2170 ata_pktp->ap_flags |= AP_ERROR; 2171 ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus); 2172 ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error); 2173 } 2174 2175 /* 2176 * check for errors 2177 */ 2178 if (ata_pktp->ap_flags & AP_ERROR) { 2179 return (ATA_FSM_RC_FINI); 2180 } 2181 2182 /* 2183 * If the read command isn't done yet, 2184 * wait for the next interrupt. 2185 */ 2186 ADBG_TRACE(("ata_disk_pio_in: partial\n")); 2187 return (ATA_FSM_RC_OKAY); 2188 } 2189 2190 2191 2192 /* 2193 * 2194 * ATA command, PIO data out 2195 * 2196 */ 2197 2198 /* ARGSUSED */ 2199 static int 2200 ata_disk_intr_pio_out( 2201 ata_ctl_t *ata_ctlp, 2202 ata_drv_t *ata_drvp, 2203 ata_pkt_t *ata_pktp) 2204 { 2205 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 2206 ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2; 2207 int tmp_count = ata_pktp->ap_wrt_count; 2208 uchar_t status; 2209 2210 /* 2211 * clear the IRQ 2212 */ 2213 status = ata_get_status_clear_intr(ata_ctlp, ata_pktp); 2214 2215 ADBG_TRACE(("ata_disk_intr_pio_out entered\n")); 2216 ADBG_TRANSPORT(("ata_disk_intr_pio_out: pkt = 0x%p\n", ata_pktp)); 2217 2218 ASSERT(!(status & ATS_BSY)); 2219 2220 2221 /* 2222 * check for errors 2223 */ 2224 2225 if (status & (ATS_DF | ATS_ERR)) { 2226 ADBG_WARN(("ata_disk_intr_pio_out: status 0x%x error 0x%x\n", 2227 status, ddi_get8(io_hdl1, ata_ctlp->ac_error))); 2228 ata_pktp->ap_flags |= AP_ERROR; 2229 ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus); 2230 ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error); 2231 /* tell the upper layer this request is complete */ 2232 return (ATA_FSM_RC_FINI); 2233 } 2234 2235 2236 /* 2237 * last write was okay, bump the ptr and 2238 * decr the resid count 2239 */ 2240 ata_pktp->ap_v_addr += tmp_count; 2241 ata_pktp->ap_resid -= tmp_count; 2242 2243 /* 2244 * check for final interrupt on write command 2245 */ 2246 if (ata_pktp->ap_resid <= 0) { 2247 /* tell the upper layer this request is complete */ 2248 return (ATA_FSM_RC_FINI); 2249 } 2250 2251 /* 2252 * Perform the next data transfer 2253 * 2254 * First make certain DRQ is asserted and no error status. 2255 * (I'm not certain but I think some drives might deassert BSY 2256 * before asserting DRQ. This extra ata_wait3() will 2257 * compensate for such drives). 2258 * 2259 */ 2260 (void) ata_wait3(io_hdl2, ata_ctlp->ac_ioaddr2, 2261 ATS_DRQ, ATS_BSY, ATS_ERR, ATS_BSY, ATS_DF, ATS_BSY, 4000000); 2262 2263 status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus); 2264 2265 if (status & ATS_BSY) { 2266 /* this should never happen */ 2267 ADBG_WARN(("ata_disk_intr_pio_out: BUSY\n")); 2268 ata_pktp->ap_flags |= AP_ERROR; 2269 ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus); 2270 ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error); 2271 return (ATA_FSM_RC_BUSY); 2272 } 2273 2274 /* 2275 * bailout if any errors 2276 */ 2277 if ((status & (ATS_DRQ | ATS_DF | ATS_ERR)) != ATS_DRQ) { 2278 ADBG_WARN(("ata_disk_pio_out: status 0x%x error 0x%x\n", 2279 status, ddi_get8(io_hdl1, ata_ctlp->ac_error))); 2280 ata_pktp->ap_flags |= AP_ERROR; 2281 ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus); 2282 ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error); 2283 return (ATA_FSM_RC_FINI); 2284 } 2285 2286 /* 2287 * write the next chunk of data 2288 */ 2289 ADBG_TRACE(("ata_disk_intr_pio_out: write xfer\n")); 2290 ata_disk_pio_xfer_data_out(ata_ctlp, ata_pktp); 2291 2292 /* 2293 * Wait for the next interrupt before checking the transfer 2294 * status and adjusting the transfer count. 2295 * 2296 */ 2297 return (ATA_FSM_RC_OKAY); 2298 } 2299 2300 2301 /* 2302 * 2303 * ATA command, DMA data in/out 2304 * 2305 */ 2306 2307 static int 2308 ata_disk_intr_dma( 2309 ata_ctl_t *ata_ctlp, 2310 ata_drv_t *ata_drvp, 2311 ata_pkt_t *ata_pktp) 2312 { 2313 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 2314 ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2; 2315 uchar_t status; 2316 2317 ADBG_TRACE(("ata_disk_intr_dma entered\n")); 2318 ADBG_TRANSPORT(("ata_disk_intr_dma: pkt = 0x%p\n", ata_pktp)); 2319 2320 /* 2321 * halt the DMA engine 2322 */ 2323 ata_pciide_dma_stop(ata_ctlp); 2324 2325 /* 2326 * wait for the device to clear DRQ 2327 */ 2328 if (!ata_wait(io_hdl2, ata_ctlp->ac_ioaddr2, 2329 0, (ATS_DRQ | ATS_BSY), 4000000)) { 2330 ADBG_WARN(("ata_disk_intr_dma: DRQ stuck\n")); 2331 ata_pktp->ap_flags |= AP_ERROR; 2332 ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus); 2333 ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error); 2334 return (ATA_FSM_RC_BUSY); 2335 } 2336 2337 /* 2338 * get the status and clear the IRQ, and check for DMA error 2339 */ 2340 status = ata_get_status_clear_intr(ata_ctlp, ata_pktp); 2341 2342 /* 2343 * check for drive errors 2344 */ 2345 2346 if (status & (ATS_DF | ATS_ERR)) { 2347 ADBG_WARN(("ata_disk_intr_dma: status 0x%x error 0x%x\n", 2348 status, ddi_get8(io_hdl1, ata_ctlp->ac_error))); 2349 ata_pktp->ap_flags |= AP_ERROR; 2350 ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus); 2351 ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error); 2352 } 2353 2354 /* 2355 * If there was a drive or DMA error, compute a resid count 2356 */ 2357 if (ata_pktp->ap_flags & AP_ERROR) { 2358 /* 2359 * grab the last sector address from the drive regs 2360 * and use that to compute the resid 2361 */ 2362 ata_disk_get_resid(ata_ctlp, ata_drvp, ata_pktp); 2363 } else { 2364 ata_pktp->ap_resid = 0; 2365 } 2366 2367 /* tell the upper layer this request is complete */ 2368 return (ATA_FSM_RC_FINI); 2369 } 2370 2371 2372 /* 2373 * 2374 * Low level PIO routine that transfers data from the drive 2375 * 2376 */ 2377 2378 static void 2379 ata_disk_pio_xfer_data_in( 2380 ata_ctl_t *ata_ctlp, 2381 ata_pkt_t *ata_pktp) 2382 { 2383 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 2384 ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2; 2385 int count; 2386 2387 count = min(ata_pktp->ap_resid, 2388 ata_pktp->ap_bytes_per_block); 2389 2390 ADBG_TRANSPORT(("ata_disk_pio_xfer_data_in: 0x%x bytes, addr = 0x%p\n", 2391 count, ata_pktp->ap_v_addr)); 2392 2393 /* 2394 * read count bytes 2395 */ 2396 2397 ASSERT(count != 0); 2398 2399 ddi_rep_get16(io_hdl1, (ushort_t *)ata_pktp->ap_v_addr, 2400 ata_ctlp->ac_data, (count >> 1), DDI_DEV_NO_AUTOINCR); 2401 2402 /* wait for the busy bit to settle */ 2403 ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2); 2404 2405 /* 2406 * this read command completed okay, bump the ptr and 2407 * decr the resid count now. 2408 */ 2409 ata_pktp->ap_v_addr += count; 2410 ata_pktp->ap_resid -= count; 2411 } 2412 2413 2414 /* 2415 * 2416 * Low level PIO routine that transfers data to the drive 2417 * 2418 */ 2419 2420 static void 2421 ata_disk_pio_xfer_data_out( 2422 ata_ctl_t *ata_ctlp, 2423 ata_pkt_t *ata_pktp) 2424 { 2425 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 2426 ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2; 2427 int count; 2428 2429 count = min(ata_pktp->ap_resid, 2430 ata_pktp->ap_bytes_per_block); 2431 2432 ADBG_TRANSPORT(("ata_disk_pio_xfer_data_out: 0x%x bytes, addr = 0x%p\n", 2433 count, ata_pktp->ap_v_addr)); 2434 2435 /* 2436 * read or write count bytes 2437 */ 2438 2439 ASSERT(count != 0); 2440 2441 ddi_rep_put16(io_hdl1, (ushort_t *)ata_pktp->ap_v_addr, 2442 ata_ctlp->ac_data, (count >> 1), DDI_DEV_NO_AUTOINCR); 2443 2444 /* wait for the busy bit to settle */ 2445 ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2); 2446 2447 /* 2448 * save the count here so I can correctly adjust 2449 * the ap_v_addr and ap_resid values at the next 2450 * interrupt. 2451 */ 2452 ata_pktp->ap_wrt_count = count; 2453 } 2454 2455 2456 /* 2457 * 2458 * ATA Initialize Device Parameters (aka Set Params) command 2459 * 2460 * If the drive was put in some sort of CHS extended/logical geometry 2461 * mode by the BIOS, this function will reset it to its "native" 2462 * CHS geometry. This ensures that we don't run into any sort of 2463 * 1024 cylinder (or 65535 cylinder) limitation that may have been 2464 * created by a BIOS (or users) that chooses a bogus translated geometry. 2465 */ 2466 2467 static int 2468 ata_disk_initialize_device_parameters( 2469 ata_ctl_t *ata_ctlp, 2470 ata_drv_t *ata_drvp) 2471 { 2472 int rc; 2473 2474 #ifdef _SIMULATOR_SUPPORT 2475 extern int simulator_run; /* running under simulator ? */ 2476 #endif /* _SIMULATOR_SUPPORT */ 2477 2478 rc = ata_command(ata_ctlp, ata_drvp, FALSE, FALSE, 2479 ata_disk_init_dev_parm_wait, 2480 ATC_SETPARAM, 2481 0, /* feature n/a */ 2482 ata_drvp->ad_phsec, /* max sector (1-based) */ 2483 0, /* sector n/a */ 2484 (ata_drvp->ad_phhd -1), /* max head (0-based) */ 2485 0, /* cyl_low n/a */ 2486 0); /* cyl_hi n/a */ 2487 2488 #ifdef _SIMULATOR_SUPPORT 2489 if (rc || simulator_run) { 2490 return (TRUE); 2491 } 2492 #else 2493 if (rc) { 2494 return (TRUE); 2495 } 2496 #endif /* _SIMULATOR_SUPPORT */ 2497 2498 ADBG_ERROR(("ata_init_dev_parms: failed\n")); 2499 return (FALSE); 2500 } 2501 2502 2503 2504 /* 2505 * 2506 * create fake inquiry data for DADA interface 2507 * 2508 */ 2509 2510 static void 2511 ata_disk_fake_inquiry( 2512 ata_drv_t *ata_drvp) 2513 { 2514 struct ata_id *ata_idp = &ata_drvp->ad_id; 2515 struct scsi_inquiry *inqp = &ata_drvp->ad_inquiry; 2516 2517 ADBG_TRACE(("ata_disk_fake_inquiry entered\n")); 2518 2519 if (ata_idp->ai_config & ATA_ID_REM_DRV) /* ide removable bit */ 2520 inqp->inq_rmb = 1; /* scsi removable bit */ 2521 2522 (void) strncpy(inqp->inq_vid, "Gen-ATA ", sizeof (inqp->inq_vid)); 2523 inqp->inq_dtype = DTYPE_DIRECT; 2524 inqp->inq_qual = DPQ_POSSIBLE; 2525 2526 (void) strncpy(inqp->inq_pid, ata_idp->ai_model, 2527 sizeof (inqp->inq_pid)); 2528 (void) strncpy(inqp->inq_revision, ata_idp->ai_fw, 2529 sizeof (inqp->inq_revision)); 2530 } 2531 2532 #define LOOP_COUNT 10000 2533 2534 2535 /* 2536 * 2537 * ATA Set Multiple Mode 2538 * 2539 */ 2540 2541 static int 2542 ata_disk_set_multiple( 2543 ata_ctl_t *ata_ctlp, 2544 ata_drv_t *ata_drvp) 2545 { 2546 int rc; 2547 2548 rc = ata_command(ata_ctlp, ata_drvp, TRUE, FALSE, 2549 ata_disk_set_mult_wait, 2550 ATC_SETMULT, 2551 0, /* feature n/a */ 2552 ata_drvp->ad_block_factor, /* count */ 2553 0, /* sector n/a */ 2554 0, /* head n/a */ 2555 0, /* cyl_low n/a */ 2556 0); /* cyl_hi n/a */ 2557 2558 if (rc) { 2559 return (TRUE); 2560 } 2561 2562 ADBG_ERROR(("ata_disk_set_multiple: failed\n")); 2563 return (FALSE); 2564 } 2565 2566 2567 /* 2568 * 2569 * ATA Identify Device command 2570 * 2571 */ 2572 2573 int 2574 ata_disk_id( 2575 ddi_acc_handle_t io_hdl1, 2576 caddr_t ioaddr1, 2577 ddi_acc_handle_t io_hdl2, 2578 caddr_t ioaddr2, 2579 struct ata_id *ata_idp) 2580 { 2581 int rc; 2582 2583 ADBG_TRACE(("ata_disk_id entered\n")); 2584 2585 rc = ata_id_common(ATC_ID_DEVICE, TRUE, io_hdl1, ioaddr1, io_hdl2, 2586 ioaddr2, ata_idp); 2587 2588 if (!rc) 2589 return (FALSE); 2590 2591 /* 2592 * If the disk is a CF/Microdrive that works under ATA mode 2593 * through CF<->ATA adapters, identify it as an ATA device 2594 * and a non removable media. 2595 */ 2596 if (ata_idp->ai_config == ATA_ID_COMPACT_FLASH) { 2597 ata_idp->ai_config = ATA_ID_CF_TO_ATA; 2598 } 2599 2600 if ((ata_idp->ai_config & ATAC_ATA_TYPE_MASK) != ATAC_ATA_TYPE) 2601 return (FALSE); 2602 2603 if (ata_idp->ai_heads == 0 || ata_idp->ai_sectors == 0) { 2604 return (FALSE); 2605 } 2606 2607 return (TRUE); 2608 } 2609 2610 static daddr_t 2611 ata_last_block_xferred_chs(ata_drv_t *ata_drvp) 2612 { 2613 ata_ctl_t *ata_ctlp = ata_drvp->ad_ctlp; 2614 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 2615 uchar_t drvheads = ata_drvp->ad_phhd; 2616 uchar_t drvsectors = ata_drvp->ad_phsec; 2617 uchar_t sector; 2618 uchar_t head; 2619 uchar_t low_cyl; 2620 uchar_t hi_cyl; 2621 daddr_t lbastop; 2622 2623 sector = ddi_get8(io_hdl1, ata_ctlp->ac_sect); 2624 head = ddi_get8(io_hdl1, ata_ctlp->ac_drvhd) & 0xf; 2625 low_cyl = ddi_get8(io_hdl1, ata_ctlp->ac_lcyl); 2626 hi_cyl = ddi_get8(io_hdl1, ata_ctlp->ac_hcyl); 2627 2628 lbastop = low_cyl; 2629 lbastop |= (uint_t)hi_cyl << 8; 2630 lbastop *= (uint_t)drvheads; 2631 lbastop += (uint_t)head; 2632 lbastop *= (uint_t)drvsectors; 2633 lbastop += (uint_t)sector - 1; 2634 return (lbastop); 2635 } 2636 2637 static daddr_t 2638 ata_last_block_xferred_lba28(ata_ctl_t *ata_ctlp) 2639 { 2640 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 2641 daddr_t lbastop; 2642 2643 lbastop = ddi_get8(io_hdl1, ata_ctlp->ac_drvhd) & 0xf; 2644 lbastop <<= 8; 2645 lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_hcyl); 2646 lbastop <<= 8; 2647 lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_lcyl); 2648 lbastop <<= 8; 2649 lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_sect); 2650 return (lbastop); 2651 } 2652 2653 static daddr_t 2654 ata_last_block_xferred_lba48(ata_ctl_t *ata_ctlp) 2655 { 2656 ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1; 2657 ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2; 2658 daddr_t lbastop; 2659 2660 /* turn on HOB and read the high-order 24 bits */ 2661 ddi_put8(io_hdl2, ata_ctlp->ac_devctl, (ATDC_D3 | ATDC_HOB)); 2662 lbastop = ddi_get8(io_hdl1, ata_ctlp->ac_hcyl); 2663 lbastop <<= 8; 2664 lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_lcyl); 2665 lbastop <<= 8; 2666 lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_sect); 2667 lbastop <<= 8; 2668 2669 /* Turn off HOB and read the low-order 24-bits */ 2670 ddi_put8(io_hdl2, ata_ctlp->ac_devctl, (ATDC_D3)); 2671 lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_hcyl); 2672 lbastop <<= 8; 2673 lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_lcyl); 2674 lbastop <<= 8; 2675 lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_sect); 2676 return (lbastop); 2677 } 2678 2679 2680 /* 2681 * 2682 * Need to compute a value for ap_resid so that cp_resid can 2683 * be set by ata_disk_complete(). The cp_resid var is actually 2684 * misnamed. It's actually the offset to the block in which the 2685 * error occurred not the number of bytes transferred to the device. 2686 * At least that's how dadk actually uses the cp_resid when reporting 2687 * an error. In other words the sector that had the error and the 2688 * number of bytes transferred don't always indicate the same offset. 2689 * On top of that, when doing DMA transfers there's actually no 2690 * way to determine how many bytes have been transferred by the DMA 2691 * engine. On the other hand, the drive will report which sector 2692 * it faulted on. Using that address this routine computes the 2693 * number of residual bytes beyond that point which probably weren't 2694 * written to the drive (the drive is allowed to re-order sector 2695 * writes but on an ATA disk there's no way to deal with that 2696 * complication; in other words, the resid value calculated by 2697 * this routine is as good as we can manage). 2698 */ 2699 2700 static void 2701 ata_disk_get_resid( 2702 ata_ctl_t *ata_ctlp, 2703 ata_drv_t *ata_drvp, 2704 ata_pkt_t *ata_pktp) 2705 { 2706 uint_t lba_start; 2707 uint_t lba_stop; 2708 uint_t resid_bytes; 2709 uint_t resid_sectors; 2710 2711 lba_start = ata_pktp->ap_startsec; 2712 2713 if (ata_drvp->ad_flags & AD_EXT48) 2714 lba_stop = ata_last_block_xferred_lba48(ata_ctlp); 2715 else if (ata_drvp->ad_drive_bits & ATDH_LBA) 2716 lba_stop = ata_last_block_xferred_lba28(ata_ctlp); 2717 else /* CHS mode */ 2718 lba_stop = ata_last_block_xferred_chs(ata_drvp); 2719 2720 resid_sectors = lba_start + ata_pktp->ap_count - lba_stop; 2721 resid_bytes = resid_sectors << SCTRSHFT; 2722 2723 ADBG_TRACE(("ata_disk_get_resid start 0x%x cnt 0x%x stop 0x%x\n", 2724 lba_start, ata_pktp->ap_count, lba_stop)); 2725 ata_pktp->ap_resid = resid_bytes; 2726 } 2727 2728 2729 2730 /* 2731 * Removable media commands * 2732 */ 2733 2734 2735 2736 /* 2737 * get the media status 2738 * 2739 * NOTE: the error handling case probably isn't correct but it 2740 * will have to do until someone gives me a drive to test this on. 2741 */ 2742 static int 2743 ata_disk_state( 2744 ata_ctl_t *ata_ctlp, 2745 ata_drv_t *ata_drvp, 2746 ata_pkt_t *ata_pktp) 2747 { 2748 int *statep = (int *)ata_pktp->ap_v_addr; 2749 uchar_t err; 2750 2751 ADBG_TRACE(("ata_disk_state\n")); 2752 if (ata_command(ata_ctlp, ata_drvp, TRUE, TRUE, 5 * 1000000, 2753 ATC_DOOR_LOCK, 0, 0, 0, 0, 0, 0)) { 2754 *statep = DKIO_INSERTED; 2755 return (ATA_FSM_RC_FINI); 2756 } 2757 2758 err = ddi_get8(ata_ctlp->ac_iohandle1, ata_ctlp->ac_error); 2759 if (err & ATE_NM) 2760 *statep = DKIO_EJECTED; 2761 else 2762 *statep = DKIO_NONE; 2763 2764 return (ATA_FSM_RC_FINI); 2765 } 2766 2767 /* 2768 * eject the media 2769 */ 2770 2771 static int 2772 ata_disk_eject( 2773 ata_ctl_t *ata_ctlp, 2774 ata_drv_t *ata_drvp, 2775 ata_pkt_t *ata_pktp) 2776 { 2777 ADBG_TRACE(("ata_disk_eject\n")); 2778 if (ata_command(ata_ctlp, ata_drvp, TRUE, TRUE, 5 * 1000000, 2779 ATC_EJECT, 0, 0, 0, 0, 0, 0)) { 2780 return (ATA_FSM_RC_FINI); 2781 } 2782 ata_pktp->ap_flags |= AP_ERROR; 2783 return (ATA_FSM_RC_FINI); 2784 } 2785 2786 /* 2787 * lock the drive 2788 * 2789 */ 2790 static int 2791 ata_disk_lock( 2792 ata_ctl_t *ata_ctlp, 2793 ata_drv_t *ata_drvp, 2794 ata_pkt_t *ata_pktp) 2795 { 2796 ADBG_TRACE(("ata_disk_lock\n")); 2797 if (ata_command(ata_ctlp, ata_drvp, TRUE, TRUE, 5 * 1000000, 2798 ATC_DOOR_LOCK, 0, 0, 0, 0, 0, 0)) { 2799 return (ATA_FSM_RC_FINI); 2800 } 2801 ata_pktp->ap_flags |= AP_ERROR; 2802 return (ATA_FSM_RC_FINI); 2803 } 2804 2805 2806 /* 2807 * unlock the drive 2808 * 2809 */ 2810 static int 2811 ata_disk_unlock( 2812 ata_ctl_t *ata_ctlp, 2813 ata_drv_t *ata_drvp, 2814 ata_pkt_t *ata_pktp) 2815 { 2816 ADBG_TRACE(("ata_disk_unlock\n")); 2817 if (ata_command(ata_ctlp, ata_drvp, TRUE, TRUE, 5 * 1000000, 2818 ATC_DOOR_UNLOCK, 0, 0, 0, 0, 0, 0)) { 2819 return (ATA_FSM_RC_FINI); 2820 } 2821 ata_pktp->ap_flags |= AP_ERROR; 2822 return (ATA_FSM_RC_FINI); 2823 } 2824 2825 2826 /* 2827 * put the drive into standby mode 2828 */ 2829 static int 2830 ata_disk_standby( 2831 ata_ctl_t *ata_ctlp, 2832 ata_drv_t *ata_drvp, 2833 ata_pkt_t *ata_pktp) 2834 { 2835 ADBG_TRACE(("ata_disk_standby\n")); 2836 if (ata_command(ata_ctlp, ata_drvp, TRUE, TRUE, 5 * 1000000, 2837 ATC_STANDBY_IM, 0, 0, 0, 0, 0, 0)) { 2838 return (ATA_FSM_RC_FINI); 2839 } 2840 ata_pktp->ap_flags |= AP_ERROR; 2841 return (ATA_FSM_RC_FINI); 2842 } 2843 2844 2845 /* 2846 * Recalibrate 2847 * 2848 * Note the extra long timeout value. This is necessary in case 2849 * the drive was in standby mode and needs to spin up the media. 2850 * 2851 */ 2852 static int 2853 ata_disk_recalibrate( 2854 ata_ctl_t *ata_ctlp, 2855 ata_drv_t *ata_drvp, 2856 ata_pkt_t *ata_pktp) 2857 { 2858 ADBG_TRACE(("ata_disk_recalibrate\n")); 2859 if (ata_command(ata_ctlp, ata_drvp, TRUE, TRUE, 31 * 1000000, 2860 ATC_RECAL, 0, 0, 0, 0, 0, 0)) { 2861 return (ATA_FSM_RC_FINI); 2862 } 2863 ata_pktp->ap_flags |= AP_ERROR; 2864 return (ATA_FSM_RC_FINI); 2865 } 2866 2867 /* 2868 * Copy a string of bytes that were obtained by Identify Device into a 2869 * string buffer provided by the caller. 2870 * 2871 * 1. Determine the amount to copy. This is the lesser of the 2872 * length of the source string or the space available in the user's 2873 * buffer. 2874 * 2. The true length of the source string is always returned to the 2875 * caller in the size field of the argument. 2876 * 3. Copy the string, add a terminating NUL character at the end. 2877 */ 2878 2879 static int 2880 ata_copy_dk_ioc_string(intptr_t arg, char *source, int length, int flag) 2881 { 2882 STRUCT_DECL(dadk_ioc_string, ds_arg); 2883 int destsize; 2884 char nulchar; 2885 caddr_t outp; 2886 2887 /* 2888 * The ioctls that use this routine are only available to 2889 * the kernel. 2890 */ 2891 if ((flag & FKIOCTL) == 0) 2892 return (EFAULT); 2893 2894 STRUCT_INIT(ds_arg, flag & FMODELS); 2895 2896 /* 1. determine size of user's buffer */ 2897 if (ddi_copyin((caddr_t)arg, STRUCT_BUF(ds_arg), STRUCT_SIZE(ds_arg), 2898 flag)) 2899 return (EFAULT); 2900 destsize = STRUCT_FGET(ds_arg, is_size); 2901 if (destsize > length + 1) 2902 destsize = length + 1; 2903 2904 /* 2905 * 2. Return the copied length to the caller. Note: for 2906 * convenience, we actually copy the entire structure back out, not 2907 * just the length. We don't change the is_buf field, so this 2908 * shouldn't break anything. 2909 */ 2910 STRUCT_FSET(ds_arg, is_size, length); 2911 if (ddi_copyout(STRUCT_BUF(ds_arg), (caddr_t)arg, STRUCT_SIZE(ds_arg), 2912 flag)) 2913 return (EFAULT); 2914 2915 /* 3. copy the string and add a NULL terminator */ 2916 outp = STRUCT_FGETP(ds_arg, is_buf); 2917 if (ddi_copyout(source, outp, destsize - 1, flag)) 2918 return (EFAULT); 2919 nulchar = '\0'; 2920 if (ddi_copyout(&nulchar, outp + (destsize - 1), 1, flag)) 2921 return (EFAULT); 2922 return (0); 2923 } 2924 2925 /* 2926 * Sun branded drives are shipped write cache disabled. The default is to 2927 * force write write caching on. 2928 */ 2929 static void 2930 ata_set_write_cache(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp) 2931 { 2932 char *path; 2933 2934 if (ata_write_cache == 1) { 2935 if (ata_set_feature(ata_ctlp, ata_drvp, FC_WRITE_CACHE_ON, 0) 2936 == FALSE) { 2937 path = kmem_alloc(MAXPATHLEN + 1, KM_NOSLEEP); 2938 if (path != NULL) { 2939 cmn_err(CE_WARN, 2940 "%s unable to enable write cache targ=%d", 2941 ddi_pathname(ata_ctlp->ac_dip, path), 2942 ata_drvp->ad_targ); 2943 kmem_free(path, MAXPATHLEN + 1); 2944 } 2945 } 2946 } else if (ata_write_cache == -1) { 2947 if (ata_set_feature(ata_ctlp, ata_drvp, FC_WRITE_CACHE_OFF, 0) 2948 == FALSE) { 2949 path = kmem_alloc(MAXPATHLEN + 1, KM_NOSLEEP); 2950 if (path != NULL) { 2951 cmn_err(CE_WARN, 2952 "%s unable to disable write cache targ=%d", 2953 ddi_pathname(ata_ctlp->ac_dip, path), 2954 ata_drvp->ad_targ); 2955 kmem_free(path, MAXPATHLEN + 1); 2956 } 2957 } 2958 } 2959 } 2960