1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #pragma ident	"%Z%%M%	%I%	%E% SMI"
28 
29 #include <sys/types.h>
30 #include <sys/dkio.h>
31 #include <sys/cdio.h>
32 #include <sys/file.h>
33 
34 #include "ata_common.h"
35 #include "ata_disk.h"
36 
37 /*
38  * this typedef really should be in dktp/cmpkt.h
39  */
40 typedef struct cmpkt cmpkt_t;
41 
42 
43 /*
44  * DADA entry points
45  */
46 
47 static int ata_disk_abort(opaque_t ctl_data, cmpkt_t *pktp);
48 static int ata_disk_reset(opaque_t ctl_data, int level);
49 static int ata_disk_ioctl(opaque_t ctl_data, int cmd, intptr_t a, int flag);
50 static cmpkt_t *ata_disk_pktalloc(opaque_t ctl_data, int (*callback)(caddr_t),
51     caddr_t arg);
52 static void ata_disk_pktfree(opaque_t ctl_data, cmpkt_t *pktp);
53 static cmpkt_t	*ata_disk_memsetup(opaque_t ctl_data, cmpkt_t *pktp,
54     struct buf *bp, int (*callback)(caddr_t), caddr_t arg);
55 static void ata_disk_memfree(opaque_t ctl_data, cmpkt_t *pktp);
56 static cmpkt_t	*ata_disk_iosetup(opaque_t ctl_data, cmpkt_t *pktp);
57 static int ata_disk_transport(opaque_t ctl_data, cmpkt_t *pktp);
58 
59 /*
60  * DADA packet callbacks
61  */
62 
63 static void ata_disk_complete(ata_drv_t *ata_drvp, ata_pkt_t *ata_pktp,
64     int do_callback);
65 static int ata_disk_intr(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
66     ata_pkt_t *ata_pktp);
67 static int ata_disk_intr_dma(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
68     ata_pkt_t *ata_pktp);
69 static int ata_disk_intr_pio_in(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
70     ata_pkt_t *ata_pktp);
71 static int ata_disk_intr_pio_out(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
72     ata_pkt_t *ata_pktp);
73 static int ata_disk_start(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
74     ata_pkt_t *ata_pktp);
75 static int ata_disk_start_dma_in(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
76     ata_pkt_t *ata_pktp);
77 static int ata_disk_start_dma_out(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
78     ata_pkt_t *ata_pktp);
79 static int ata_disk_start_pio_in(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
80     ata_pkt_t *ata_pktp);
81 static int ata_disk_start_pio_out(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
82     ata_pkt_t *ata_pktp);
83 
84 /*
85  * Local Function prototypes
86  */
87 
88 static int ata_disk_eject(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
89     ata_pkt_t *ata_pktp);
90 static void ata_disk_fake_inquiry(ata_drv_t *ata_drvp);
91 static void ata_disk_get_resid(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
92     ata_pkt_t *ata_pktp);
93 static int ata_disk_initialize_device_parameters(ata_ctl_t *ata_ctlp,
94     ata_drv_t *ata_drvp);
95 static int ata_disk_lock(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
96     ata_pkt_t *ata_pktp);
97 static int ata_disk_set_multiple(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp);
98 static void ata_disk_pio_xfer_data_in(ata_ctl_t *ata_ctlp, ata_pkt_t *ata_pktp);
99 static void ata_disk_pio_xfer_data_out(ata_ctl_t *ata_ctlp,
100     ata_pkt_t *ata_pktp);
101 static void ata_disk_set_standby_timer(ata_ctl_t *ata_ctlp,
102     ata_drv_t *ata_drvp);
103 static int ata_disk_recalibrate(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
104     ata_pkt_t *ata_pktp);
105 static int ata_disk_standby(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
106     ata_pkt_t *ata_pktp);
107 static int ata_disk_start_common(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
108     ata_pkt_t *ata_pktp);
109 static int ata_disk_state(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
110     ata_pkt_t *ata_pktp);
111 static int ata_disk_unlock(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp,
112     ata_pkt_t *ata_pktp);
113 static int ata_get_capacity(ata_drv_t *ata_drvp, uint64_t *capacity);
114 static void ata_fix_large_disk_geometry(ata_drv_t *ata_drvp);
115 static uint64_t	ata_calculate_28bits_capacity(ata_drv_t *ata_drvp);
116 static uint64_t	ata_calculate_48bits_capacity(ata_drv_t *ata_drvp);
117 static int ata_copy_dk_ioc_string(intptr_t arg, char *source, int length,
118     int flag);
119 static void ata_set_write_cache(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp);
120 
121 
122 /*
123  * Local static data
124  */
125 
126 uint_t	ata_disk_init_dev_parm_wait = 4 * 1000000;
127 uint_t	ata_disk_set_mult_wait = 4 * 1000000;
128 int	ata_disk_do_standby_timer = TRUE;
129 
130 /*
131  * ata_write_cache == 1  force write cache on.
132  * ata_write_cache == 0  do not modify write cache.  firmware defaults kept.
133  * ata_write_cache == -1 force write cache off.
134  */
135 int	ata_write_cache = 1;
136 
137 
138 static struct ctl_objops ata_disk_objops = {
139 	ata_disk_pktalloc,
140 	ata_disk_pktfree,
141 	ata_disk_memsetup,
142 	ata_disk_memfree,
143 	ata_disk_iosetup,
144 	ata_disk_transport,
145 	ata_disk_reset,
146 	ata_disk_abort,
147 	nulldev,
148 	nulldev,
149 	ata_disk_ioctl,
150 	0, 0
151 };
152 
153 
154 
155 /*
156  *
157  * initialize the ata_disk sub-system
158  *
159  */
160 
161 /*ARGSUSED*/
162 int
163 ata_disk_attach(
164 	ata_ctl_t *ata_ctlp)
165 {
166 	ADBG_TRACE(("ata_disk_init entered\n"));
167 	return (TRUE);
168 }
169 
170 
171 
172 /*
173  *
174  * destroy the ata_disk sub-system
175  *
176  */
177 
178 /*ARGSUSED*/
179 void
180 ata_disk_detach(
181 	ata_ctl_t *ata_ctlp)
182 {
183 	ADBG_TRACE(("ata_disk_destroy entered\n"));
184 }
185 
186 
187 /*
188  * Test whether the disk can support Logical Block Addressing
189  */
190 
191 int
192 ata_test_lba_support(struct ata_id *aidp)
193 {
194 #ifdef __old_version__
195 	/*
196 	 * determine if the drive supports LBA mode
197 	 */
198 	if (aidp->ai_cap & ATAC_LBA_SUPPORT)
199 		return (TRUE);
200 #else
201 	/*
202 	 * Determine if the drive supports LBA mode
203 	 * LBA mode is mandatory on ATA-3 (or newer) drives but is
204 	 * optional on ATA-2 (or older) drives. On ATA-2 drives
205 	 * the ai_majorversion word should be 0xffff or 0x0000
206 	 * (version not reported).
207 	 */
208 	if (aidp->ai_majorversion != 0xffff &&
209 	    aidp->ai_majorversion >= (1 << 3)) {
210 		/* ATA-3 or better */
211 		return (TRUE);
212 	} else if (aidp->ai_cap & ATAC_LBA_SUPPORT) {
213 		/* ATA-2 LBA capability bit set */
214 		return (TRUE);
215 	} else {
216 		return (FALSE);
217 	}
218 #endif
219 }
220 
221 /*
222  * ATA-6 drives do not provide geometry information, so words
223  * ai_heads, ai_sectors and ai_fixcyls may not be valid
224  */
225 static void
226 ata_fixup_ata6_geometry(struct ata_id *aidp)
227 {
228 	/* check cylinders, heads, and sectors for valid values */
229 	if (aidp->ai_heads != 0 && aidp->ai_heads != 0xffff &&
230 	    aidp->ai_sectors != 0 && aidp->ai_sectors != 0xffff &&
231 	    aidp->ai_fixcyls != 0)
232 		return;		/* assume valid geometry - do nothing */
233 
234 	/*
235 	 * Pre-set standard geometry values - they are not necessarily
236 	 * optimal for a given capacity
237 	 */
238 	aidp->ai_heads = 0x10;
239 	aidp->ai_sectors = 0x3f;
240 	aidp->ai_fixcyls = 1;
241 	/*
242 	 * The fixcyls value will get fixed up later in
243 	 * ata_fix_large_disk_geometry.
244 	 */
245 }
246 
247 /*
248  *
249  * initialize the soft-structure for an ATA (non-PACKET) drive and
250  * then configure the drive with the correct modes and options.
251  *
252  */
253 
254 int
255 ata_disk_init_drive(
256 	ata_drv_t *ata_drvp)
257 {
258 	ata_ctl_t *ata_ctlp = ata_drvp->ad_ctlp;
259 	struct ata_id	*aidp = &ata_drvp->ad_id;
260 	struct ctl_obj	*ctlobjp;
261 	struct scsi_device	*devp;
262 	int 		len;
263 	int		val;
264 	int		mode;
265 	short		*chs;
266 	char 		buf[80];
267 
268 	ADBG_TRACE(("ata_disk_init_drive entered\n"));
269 
270 	/* ATA disks don't support LUNs */
271 
272 	if (ata_drvp->ad_lun != 0)
273 		return (FALSE);
274 
275 	/*
276 	 * set up drive structure
277 	 * ATA-6 drives do not provide geometry information, so words
278 	 * ai_heads, ai_sectors and ai_fixcyls may not be valid - they
279 	 * will be fixed later
280 	 */
281 
282 	ata_drvp->ad_phhd = aidp->ai_heads;
283 	ata_drvp->ad_phsec = aidp->ai_sectors;
284 	ata_drvp->ad_drvrhd   = aidp->ai_heads;
285 	ata_drvp->ad_drvrsec  = aidp->ai_sectors;
286 	ata_drvp->ad_drvrcyl  = aidp->ai_fixcyls;
287 	ata_drvp->ad_acyl = 0;
288 
289 	if (ata_test_lba_support(&ata_drvp->ad_id))
290 		ata_drvp->ad_drive_bits |= ATDH_LBA;
291 
292 	/* Get capacity and check for 48-bit mode */
293 	mode = ata_get_capacity(ata_drvp, &ata_drvp->ad_capacity);
294 	if (mode == AD_EXT48) {
295 		ata_drvp->ad_flags |= AD_EXT48;
296 	}
297 
298 	/* straighten out the geometry */
299 	(void) sprintf(buf, "SUNW-ata-%p-d%d-chs", (void *) ata_ctlp->ac_data,
300 		ata_drvp->ad_targ+1);
301 	if (ddi_getlongprop(DDI_DEV_T_ANY, ddi_root_node(), 0,
302 			buf, (caddr_t)&chs, &len) == DDI_PROP_SUCCESS) {
303 		/*
304 		 * if the number of sectors and heads in bios matches the
305 		 * physical geometry, then so should the number of cylinders
306 		 * this is to prevent the 1023 limit in the older bios's
307 		 * causing loss of space.
308 		 */
309 		if (chs[1] == (ata_drvp->ad_drvrhd - 1) &&
310 				chs[2] == ata_drvp->ad_drvrsec)
311 			/* Set chs[0] to zero-based number of cylinders. */
312 			chs[0] = aidp->ai_fixcyls - 1;
313 		else if (!(ata_drvp->ad_drive_bits & ATDH_LBA)) {
314 			/*
315 			 * if the the sector/heads do not match that of the
316 			 * bios and the drive does not support LBA. We go ahead
317 			 * and advertise the bios geometry but use the physical
318 			 * geometry for sector translation.
319 			 */
320 			cmn_err(CE_WARN, "!Disk 0x%p,%d: BIOS geometry "
321 				"different from physical, and no LBA support.",
322 				(void *)ata_ctlp->ac_data, ata_drvp->ad_targ);
323 		}
324 
325 		/*
326 		 * chs[0,1] are zero-based; make them one-based.
327 		 */
328 		ata_drvp->ad_drvrcyl = chs[0] + 1;
329 		ata_drvp->ad_drvrhd = chs[1] + 1;
330 		ata_drvp->ad_drvrsec = chs[2];
331 		kmem_free(chs, len);
332 	} else {
333 		/*
334 		 * Property not present; this means that boot.bin has
335 		 * determined that the drive supports Int13 LBA.  Note
336 		 * this, but just return a geometry with a large
337 		 * cylinder count; this will be the signal for dadk to
338 		 * fail DKIOCG_VIRTGEOM.
339 		 * ad_drvr* are already set; just recalculate ad_drvrcyl
340 		 * from capacity.
341 		 */
342 
343 		ata_drvp->ad_flags |= AD_INT13LBA;
344 		if (ata_drvp->ad_capacity != 0) {
345 			ata_drvp->ad_drvrcyl = ata_drvp->ad_capacity /
346 				(ata_drvp->ad_drvrhd * ata_drvp->ad_drvrsec);
347 		} else {
348 			/*
349 			 * Something's wrong; return something sure to
350 			 * fail the "cyls < 1024" test.  This will
351 			 * never make it out of the DKIOCG_VIRTGEOM
352 			 * call, so its total bogosity won't matter.
353 			 */
354 			ata_drvp->ad_drvrcyl = 1025;
355 			ata_drvp->ad_drvrhd = 1;
356 			ata_drvp->ad_drvrsec = 1;
357 		}
358 	}
359 
360 	/* fix geometry for disks > 31GB, if needed */
361 	ata_fix_large_disk_geometry(ata_drvp);
362 
363 	/*
364 	 * set up the scsi_device and ctl_obj structures
365 	 */
366 	devp = &ata_drvp->ad_device;
367 	ctlobjp = &ata_drvp->ad_ctl_obj;
368 
369 	devp->sd_inq = &ata_drvp->ad_inquiry;
370 	devp->sd_address.a_hba_tran = (scsi_hba_tran_t *)ctlobjp;
371 	devp->sd_address.a_target = (ushort_t)ata_drvp->ad_targ;
372 	devp->sd_address.a_lun = (uchar_t)ata_drvp->ad_lun;
373 	mutex_init(&devp->sd_mutex, NULL, MUTEX_DRIVER, NULL);
374 	ata_drvp->ad_flags |= AD_MUTEX_INIT;
375 
376 	/*
377 	 * DADA ops vectors and cookie
378 	 */
379 	ctlobjp->c_ops  = (struct ctl_objops *)&ata_disk_objops;
380 
381 	/*
382 	 * this is filled in with gtgtp by ata_disk_bus_ctl(INITCHILD)
383 	 */
384 	ctlobjp->c_data = NULL;
385 
386 	ctlobjp->c_ext  = &(ctlobjp->c_extblk);
387 	ctlobjp->c_extblk.c_ctldip = ata_ctlp->ac_dip;
388 	ctlobjp->c_extblk.c_targ   = ata_drvp->ad_targ;
389 	ctlobjp->c_extblk.c_blksz  = NBPSCTR;
390 
391 	/*
392 	 * Get highest block factor supported by the drive.
393 	 * Some drives report 0 if read/write multiple not supported,
394 	 * adjust their blocking factor to 1.
395 	 */
396 	ata_drvp->ad_block_factor = aidp->ai_mult1 & 0xff;
397 
398 	/*
399 	 * If a block factor property exists, use the smaller of the
400 	 * property value and the highest value the drive can support.
401 	 */
402 	(void) sprintf(buf, "drive%d_block_factor", ata_drvp->ad_targ);
403 	val = ddi_prop_get_int(DDI_DEV_T_ANY, ata_ctlp->ac_dip, 0, buf,
404 		ata_drvp->ad_block_factor);
405 
406 	ata_drvp->ad_block_factor = (short)min(val, ata_drvp->ad_block_factor);
407 
408 	if (ata_drvp->ad_block_factor == 0)
409 		ata_drvp->ad_block_factor = 1;
410 
411 	if (!ata_disk_setup_parms(ata_ctlp, ata_drvp))
412 		return (FALSE);
413 
414 	ata_disk_fake_inquiry(ata_drvp);
415 
416 	return (TRUE);
417 }
418 
419 /*
420  * Test if a disk supports 48-bit (extended mode) addressing and
421  * get disk capacity.
422  * Return value:
423  *	AD_EXT48 if 48-bit mode is available, 0 otherwise,
424  *	capacity in sectors.
425  * There are several indicators for 48-bit addressing.  If any of
426  * them is missing, assume 28-bit (non-extended) addressing.
427  */
428 
429 static int
430 ata_get_capacity(ata_drv_t *ata_drvp, uint64_t *capacity)
431 {
432 	struct ata_id	*aidp = &ata_drvp->ad_id;
433 	uint64_t	cap28;	/* capacity in 28-bit mode */
434 	uint64_t	cap48;	/* capacity in 48-bit mode */
435 
436 	/*
437 	 * First compute capacity in 28-bit mode, using 28-bit capacity
438 	 * words in IDENTIFY DEVICE response words
439 	 */
440 	cap28 = ata_calculate_28bits_capacity(ata_drvp);
441 	*capacity = cap28;
442 
443 	/* No 48-bit mode before ATA 6 */
444 	if (!IS_ATA_VERSION_SUPPORTED(aidp, 6))
445 		return (0);
446 
447 	/* Check that 48 bit addressing is supported & enabled */
448 	/* words 83 and 86 */
449 	if (!(aidp->ai_cmdset83 & ATACS_EXT48))
450 		return (0);
451 	if (!(aidp->ai_features86 & ATACS_EXT48))
452 		return (0);
453 
454 	/*
455 	 * Drive supports ATA-6.  Since ATA-6 drives may not provide
456 	 * geometry info, pre-set standard geometry values
457 	 */
458 	ata_fixup_ata6_geometry(aidp);
459 
460 	/* Compute 48-bit capacity */
461 	cap48 = ata_calculate_48bits_capacity(ata_drvp);
462 
463 	/*
464 	 * If capacity is smaller then the maximum capacity addressable
465 	 * in 28-bit mode, just use 28-bit capacity value.
466 	 * We will use 28-bit addressing read/write commands.
467 	 */
468 	if (cap48 <= MAX_28BIT_CAPACITY)
469 		return (0);
470 
471 	/*
472 	 * Capacity is too big for 28-bits addressing. But, to make
473 	 * sure that the drive implements ATA-6 correctly, the
474 	 * final check: cap28 should be MAX for 28-bit addressing.
475 	 * If it's not, we shouldn't use 48-bit mode, so return
476 	 * the capacity reported in 28-bit capacity words.
477 	 */
478 	if (cap28 != MAX_28BIT_CAPACITY)
479 		return (0);		/* not max, use 28-bit value */
480 
481 	/*
482 	 * All is well so return 48-bit capacity indicator
483 	 */
484 	ADBG_INIT(("ATA: using 48-bit mode for capacity %llx blocks\n",
485 		(unsigned long long)cap48));
486 
487 	*capacity = cap48;
488 	return (AD_EXT48);
489 }
490 
491 /*
492  * With the advent of disks that hold more than 31 GB, we run into a
493  * limitation in the sizes of the fields that describe the geometry.
494  * The cylinders, heads, and sectors-per-track are each described by a
495  * 16-bit number -- both in the structure returned from IDENTIFY
496  * DEVICE and in the structure returned from the DIOCTL_GETGEOM or
497  * DIOCTL_GETPHYGEOM ioctl.
498  *
499  * The typical disk has 32 heads per cylinder and 63 sectors per
500  * track.  A 16 bit field can contain up to 65535.  So the largest
501  * disk that can be described in these fields is 65535 * 32 * 63 * 512
502  * (bytes/sector), or about 31.5 GB.  The cylinder count gets truncated
503  * when stored in a narrow field, so a 40GB disk appears to have only
504  * 8 GB!
505  *
506  * The solution (for the time being at least) is to lie about the
507  * geometry.  If the number of cylinders is too large to fit in 16
508  * bits, we will halve the cylinders and double the heads, repeating
509  * until we can fit the geometry into 3 shorts.
510  * FUTURE ENHANCEMENT: If this ever isn't enough, we could
511  * add another step to double sectors/track as well.
512  */
513 
514 static void
515 ata_fix_large_disk_geometry(
516 	ata_drv_t *ata_drvp)
517 {
518 	struct ata_id	*aidp = &ata_drvp->ad_id;
519 
520 	/* no hope for large disks if LBA not supported */
521 	if (!(ata_drvp->ad_drive_bits & ATDH_LBA))
522 		return;
523 
524 	/*
525 	 * Fix up the geometry to be returned by DIOCTL_GETGEOM.
526 	 * If number of cylinders > USHRT_MAX, double heads and
527 	 * halve cylinders until everything fits.
528 	 */
529 	while (ata_drvp->ad_drvrcyl > USHRT_MAX) {
530 		int tempheads;
531 
532 		/* is there room in 16 bits to double the heads? */
533 		tempheads = 2 * ata_drvp->ad_drvrhd;
534 		if (tempheads > USHRT_MAX) {
535 			/*
536 			 * No room to double the heads.
537 			 * I give up, there's no way to represent this.
538 			 * Limit disk size.
539 			 */
540 			cmn_err(CE_WARN,
541 				"Disk is too large: "
542 					"Model %s, Serial# %s "
543 					"Approximating...\n",
544 				aidp->ai_model, aidp->ai_drvser);
545 			ata_drvp->ad_drvrcyl = USHRT_MAX;
546 			break;
547 		}
548 
549 		/* OK, so double the heads and halve the cylinders */
550 		ata_drvp->ad_drvrcyl /= 2;
551 		ata_drvp->ad_drvrhd *= 2;
552 	}
553 }
554 
555 /*
556  * Calculate capacity using 28-bit capacity words from IDENTIFY DEVICE
557  * return words
558  */
559 uint64_t
560 ata_calculate_28bits_capacity(ata_drv_t *ata_drvp)
561 {
562 	/*
563 	 * Asked x3t13 for advice; this implements Hale Landis'
564 	 * response, minus the "use ATA_INIT_DEVPARMS".
565 	 * See "capacity.notes".
566 	 */
567 
568 	/* some local shorthand/renaming to clarify the meaning */
569 
570 	ushort_t curcyls_w54, curhds_w55, cursect_w56;
571 	uint32_t curcap_w57_58;
572 
573 	if ((ata_drvp->ad_drive_bits & ATDH_LBA) != 0) {
574 		return ((uint64_t)(ata_drvp->ad_id.ai_addrsec[0] +
575 		    ata_drvp->ad_id.ai_addrsec[1] * 0x10000));
576 	}
577 
578 	/*
579 	 * If we're not LBA, then first try to validate "current" values.
580 	 */
581 
582 	curcyls_w54 = ata_drvp->ad_id.ai_curcyls;
583 	curhds_w55 = ata_drvp->ad_id.ai_curheads;
584 	cursect_w56 = ata_drvp->ad_id.ai_cursectrk;
585 	curcap_w57_58 = ata_drvp->ad_id.ai_cursccp[0] +
586 	    ata_drvp->ad_id.ai_cursccp[1] * 0x10000;
587 
588 	if (((ata_drvp->ad_id.ai_validinfo & 1) == 1) &&
589 	    (curhds_w55 >= 1) && (curhds_w55 <= 16) &&
590 	    (cursect_w56 >= 1) && (cursect_w56 <= 63) &&
591 	    (curcap_w57_58 == curcyls_w54 * curhds_w55 * cursect_w56)) {
592 		return ((uint64_t)curcap_w57_58);
593 	}
594 
595 	/*
596 	 * At this point, Hale recommends ATA_INIT_DEVPARMS.
597 	 * I don't want to do that, so simply use 1/3/6 as
598 	 * a final fallback, and continue to assume the BIOS
599 	 * has done whatever INIT_DEVPARMS are necessary.
600 	 */
601 
602 	return ((uint64_t)(ata_drvp->ad_id.ai_fixcyls *
603 		ata_drvp->ad_id.ai_heads * ata_drvp->ad_id.ai_sectors));
604 }
605 
606 /*
607  * Calculate capacity using 48-bits capacity words from IDENTIFY DEVICE
608  * return words
609  */
610 uint64_t
611 ata_calculate_48bits_capacity(ata_drv_t *ata_drvp)
612 {
613 	uint64_t cap48 = 0;
614 	int i;
615 
616 	for (i = 3;  i >= 0;  --i) {
617 		cap48 <<= 16;
618 		cap48 += ata_drvp->ad_id.ai_addrsecxt[i];
619 	}
620 	return (cap48);
621 }
622 
623 
624 /*
625  *
626  * Setup the drives Read/Write Multiple Blocking factor and the
627  * current translation geometry. Necessary during attach and after
628  * Software Resets.
629  *
630  */
631 
632 int
633 ata_disk_setup_parms(
634 	ata_ctl_t *ata_ctlp,
635 	ata_drv_t *ata_drvp)
636 {
637 
638 	/*
639 	 * program geometry info back to the drive
640 	 */
641 	if (!ata_disk_initialize_device_parameters(ata_ctlp, ata_drvp)) {
642 		return (FALSE);
643 	}
644 
645 	/*
646 	 * Determine the blocking factor
647 	 */
648 	if (ata_drvp->ad_block_factor > 1) {
649 		/*
650 		 * Program the block factor into the drive. If this
651 		 * fails, then go back to using a block size of 1.
652 		 */
653 		if (!ata_disk_set_multiple(ata_ctlp, ata_drvp))
654 			ata_drvp->ad_block_factor = 1;
655 	}
656 
657 
658 	if (ata_drvp->ad_block_factor > 1) {
659 		ata_drvp->ad_rd_cmd = ATC_RDMULT;
660 		ata_drvp->ad_wr_cmd = ATC_WRMULT;
661 	} else {
662 		ata_drvp->ad_rd_cmd = ATC_RDSEC;
663 		ata_drvp->ad_wr_cmd = ATC_WRSEC;
664 	}
665 
666 	ata_drvp->ad_bytes_per_block = ata_drvp->ad_block_factor << SCTRSHFT;
667 
668 	ADBG_INIT(("set block factor for drive %d to %d\n",
669 			ata_drvp->ad_targ, ata_drvp->ad_block_factor));
670 
671 	if (ata_disk_do_standby_timer)
672 		ata_disk_set_standby_timer(ata_ctlp, ata_drvp);
673 
674 	ata_set_write_cache(ata_ctlp, ata_drvp);
675 
676 	return (TRUE);
677 }
678 
679 
680 /*
681  * Take the timeout value specified in the "standby" property
682  * and convert from seconds to the magic parm expected by the
683  * the drive. Then issue the IDLE command to set the drive's
684  * internal standby timer.
685  */
686 
687 static void
688 ata_disk_set_standby_timer(
689 	ata_ctl_t *ata_ctlp,
690 	ata_drv_t *ata_drvp)
691 {
692 	uchar_t	parm;
693 	int	timeout = ata_ctlp->ac_standby_time;
694 
695 	/*
696 	 * take the timeout value, specificed in seconds, and
697 	 * encode it into the proper command parm
698 	 */
699 
700 	/*
701 	 * don't change it if no property specified or if
702 	 * the specified value is out of range
703 	 */
704 	if (timeout < 0 || timeout > (12 * 60 * 60))
705 		return;
706 
707 	/* 1 to 1200 seconds (20 minutes) == N * 5 seconds */
708 	if (timeout <= (240 * 5))
709 		parm = (timeout + 4) / 5;
710 
711 	/* 20 to 21 minutes == 21 minutes */
712 	else if (timeout <= (21 * 60))
713 		parm = 252;
714 
715 	/* 21 minutes to 21 minutes 15 seconds == 21:15 */
716 	else if (timeout <= ((21 * 60) + 15))
717 		parm = 255;
718 
719 	/* 21:15 to 330 minutes == N * 30 minutes */
720 	else if (timeout <= (11 * 30 * 60))
721 		parm = 240 + ((timeout + (30 * 60) - 1)/ (30 * 60));
722 
723 	/* > 330 minutes == 8 to 12 hours */
724 	else
725 		parm = 253;
726 
727 	(void) ata_command(ata_ctlp, ata_drvp, TRUE, FALSE, 5 * 1000000,
728 		    ATC_IDLE, 0, parm, 0, 0, 0, 0);
729 }
730 
731 
732 
733 /*
734  *
735  * destroy an ata disk drive
736  *
737  */
738 
739 void
740 ata_disk_uninit_drive(
741 	ata_drv_t *ata_drvp)
742 {
743 	struct scsi_device *devp = &ata_drvp->ad_device;
744 
745 	ADBG_TRACE(("ata_disk_uninit_drive entered\n"));
746 
747 	if (ata_drvp->ad_flags & AD_MUTEX_INIT)
748 		mutex_destroy(&devp->sd_mutex);
749 }
750 
751 
752 
753 
754 /*
755  *
756  * DADA compliant bus_ctl entry point
757  *
758  */
759 
760 /*ARGSUSED*/
761 int
762 ata_disk_bus_ctl(
763 	dev_info_t	*d,
764 	dev_info_t	*r,
765 	ddi_ctl_enum_t	 o,
766 	void		*a,
767 	void		*v)
768 {
769 	ADBG_TRACE(("ata_disk_bus_ctl entered\n"));
770 
771 	switch (o) {
772 
773 	case DDI_CTLOPS_REPORTDEV:
774 	{
775 		int	targ;
776 
777 		targ = ddi_prop_get_int(DDI_DEV_T_ANY, r, DDI_PROP_DONTPASS,
778 					"target", 0);
779 		cmn_err(CE_CONT, "?%s%d at %s%d target %d lun %d\n",
780 			ddi_driver_name(r), ddi_get_instance(r),
781 			ddi_driver_name(d), ddi_get_instance(d), targ, 0);
782 		return (DDI_SUCCESS);
783 	}
784 	case DDI_CTLOPS_INITCHILD:
785 	{
786 		dev_info_t	*cdip = (dev_info_t *)a;
787 		ata_drv_t	*ata_drvp;
788 		ata_ctl_t	*ata_ctlp;
789 		ata_tgt_t	*ata_tgtp;
790 		struct scsi_device *devp;
791 		struct ctl_obj	*ctlobjp;
792 		gtgt_t		*gtgtp;
793 		char		 name[MAXNAMELEN];
794 
795 		/*
796 		 * save time by picking up ptr to drive struct left
797 		 * by ata_bus_ctl - isn't that convenient.
798 		 */
799 		ata_drvp = ddi_get_driver_private(cdip);
800 		ata_ctlp = ata_drvp->ad_ctlp;
801 
802 		/* set up pointers to child dip */
803 
804 		devp = &ata_drvp->ad_device;
805 		/*
806 		 * If sd_dev is set, it means that the target has already
807 		 * being initialized. The cdip is a duplicate node from
808 		 * reexpansion of driver.conf. Fail INITCHILD here.
809 		 */
810 		if (devp->sd_dev != NULL) {
811 			return (DDI_FAILURE);
812 		}
813 		devp->sd_dev = cdip;
814 
815 		ctlobjp = &ata_drvp->ad_ctl_obj;
816 		ctlobjp->c_extblk.c_devdip = cdip;
817 
818 		/*
819 		 * Create the "ata" property for use by the target driver
820 		 */
821 		if (!ata_prop_create(cdip, ata_drvp, "ata")) {
822 			return (DDI_FAILURE);
823 		}
824 
825 		gtgtp = ghd_target_init(d, cdip, &ata_ctlp->ac_ccc,
826 					sizeof (ata_tgt_t), ata_ctlp,
827 					ata_drvp->ad_targ,
828 					ata_drvp->ad_lun);
829 
830 		/* gt_tgt_private points to ata_tgt_t */
831 		ata_tgtp = GTGTP2ATATGTP(gtgtp);
832 		ata_tgtp->at_drvp = ata_drvp;
833 		ata_tgtp->at_dma_attr = ata_pciide_dma_attr;
834 		ata_tgtp->at_dma_attr.dma_attr_maxxfer =
835 				ata_ctlp->ac_max_transfer << SCTRSHFT;
836 
837 		/* gtgtp is the opaque arg to all my entry points */
838 		ctlobjp->c_data = gtgtp;
839 
840 		/* create device name */
841 
842 		(void) sprintf(name, "%x,%x", ata_drvp->ad_targ,
843 			ata_drvp->ad_lun);
844 		ddi_set_name_addr(cdip, name);
845 		ddi_set_driver_private(cdip, devp);
846 
847 		return (DDI_SUCCESS);
848 	}
849 
850 	case DDI_CTLOPS_UNINITCHILD:
851 	{
852 		dev_info_t *cdip = (dev_info_t *)a;
853 		struct 	scsi_device *devp;
854 		struct	ctl_obj *ctlobjp;
855 		gtgt_t	*gtgtp;
856 
857 		devp = ddi_get_driver_private(cdip);
858 		ctlobjp = (struct ctl_obj *)devp->sd_address.a_hba_tran;
859 		gtgtp = ctlobjp->c_data;
860 
861 		ghd_target_free(d, cdip, &GTGTP2ATAP(gtgtp)->ac_ccc, gtgtp);
862 
863 		ddi_set_driver_private(cdip, NULL);
864 		ddi_set_name_addr(cdip, NULL);
865 		return (DDI_SUCCESS);
866 	}
867 
868 	default:
869 		return (DDI_FAILURE);
870 	}
871 }
872 
873 
874 /*
875  *
876  * DADA abort entry point - not currently used by dadk
877  *
878  */
879 
880 /* ARGSUSED */
881 static int
882 ata_disk_abort(opaque_t ctl_data, cmpkt_t *pktp)
883 {
884 	ADBG_TRACE(("ata_disk_abort entered\n"));
885 
886 	/* XXX - Note that this interface is currently not used by dadk */
887 
888 	/*
889 	 *  GHD abort functions take a pointer to a scsi_address
890 	 *  and so they're unusable here.  The ata driver used to
891 	 *  return DDI_SUCCESS here without doing anything.  Its
892 	 *  seems that DDI_FAILURE is more appropriate.
893 	 */
894 
895 	return (DDI_FAILURE);
896 }
897 
898 
899 
900 /*
901  *
902  * DADA reset entry point - not currently used by dadk
903  * (except in debug versions of driver)
904  *
905  */
906 
907 /* ARGSUSED */
908 static int
909 ata_disk_reset(opaque_t ctl_data, int level)
910 {
911 	gtgt_t		*gtgtp = (gtgt_t *)ctl_data;
912 	ata_drv_t	*ata_drvp = GTGTP2ATADRVP(gtgtp);
913 	int		rc;
914 
915 	ADBG_TRACE(("ata_disk_reset entered\n"));
916 
917 	/* XXX - Note that this interface is currently not used by dadk */
918 
919 	if (level == RESET_TARGET) {
920 		rc = ghd_tran_reset_target(&ata_drvp->ad_ctlp->ac_ccc, gtgtp,
921 			NULL);
922 	} else if (level == RESET_ALL) {
923 		rc = ghd_tran_reset_bus(&ata_drvp->ad_ctlp->ac_ccc, gtgtp,
924 					NULL);
925 	}
926 
927 	return (rc ? DDI_SUCCESS : DDI_FAILURE);
928 }
929 
930 
931 
932 /*
933  *
934  * DADA ioctl entry point
935  *
936  */
937 
938 /* ARGSUSED */
939 static int
940 ata_disk_ioctl(opaque_t ctl_data, int cmd, intptr_t arg, int flag)
941 {
942 	gtgt_t		*gtgtp = (gtgt_t *)ctl_data;
943 	ata_ctl_t	*ata_ctlp = GTGTP2ATAP(gtgtp);
944 	ata_drv_t	*ata_drvp = GTGTP2ATADRVP(gtgtp);
945 	int		rc;
946 	struct tgdk_geom *tg;
947 	struct ata_id	*aidp = &ata_drvp->ad_id;
948 
949 	ADBG_TRACE(("ata_disk_ioctl entered, cmd = %d\n", cmd));
950 
951 	switch (cmd) {
952 
953 	case DIOCTL_GETGEOM:
954 	case DIOCTL_GETPHYGEOM:
955 		tg = (struct tgdk_geom *)arg;
956 		tg->g_cyl = ata_drvp->ad_drvrcyl;
957 		tg->g_head = ata_drvp->ad_drvrhd;
958 		tg->g_sec = ata_drvp->ad_drvrsec;
959 		tg->g_acyl = ata_drvp->ad_acyl;
960 		tg->g_secsiz = 512;
961 		tg->g_cap = tg->g_cyl * tg->g_head * tg->g_sec;
962 		return (0);
963 
964 	case DCMD_UPDATE_GEOM:
965 /* ??? fix this to issue IDENTIFY DEVICE ??? */
966 /* might not be necessary since I don't know of any ATA/IDE that */
967 /* can change its geometry. On the other hand, ATAPI devices like the  */
968 /* LS-120 or PD/CD can change their geometry when new media is inserted */
969 		return (0);
970 
971 	/* copy the model number into the caller's buffer */
972 	case DIOCTL_GETMODEL:
973 		rc = ata_copy_dk_ioc_string(arg, aidp->ai_model,
974 					sizeof (aidp->ai_model), flag);
975 		return (rc);
976 
977 	/* copy the model number into the caller's buffer */
978 	case DIOCTL_GETSERIAL:
979 		rc = ata_copy_dk_ioc_string(arg, aidp->ai_drvser,
980 					sizeof (aidp->ai_drvser),
981 					flag);
982 		return (rc);
983 
984 	case DIOCTL_GETWCE:
985 		/*
986 		 * WCE is only supported in ATAPI-4 or higher, for
987 		 * lower rev devices, must assume write cache is
988 		 * enabled.
989 		 * NOTE: Since there is currently no Solaris mechanism
990 		 * to change the state of the Write Cache Enable feature,
991 		 * this code just checks the value of the WCE bit
992 		 * obtained at device init time.  If a mechanism
993 		 * is added to the driver to change WCE, this code
994 		 * must be updated appropriately.
995 		 */
996 		*(int *)arg = (aidp->ai_majorversion == 0xffff) ||
997 			((aidp->ai_majorversion & ATAC_MAJVER_4) == 0) ||
998 			(aidp->ai_features85 & ATAC_FEATURES85_WCE) != 0;
999 		return (0);
1000 
1001 	case DCMD_GET_STATE:
1002 		rc = ata_queue_cmd(ata_disk_state, NULL, ata_ctlp, ata_drvp,
1003 			gtgtp);
1004 		break;
1005 
1006 	case DCMD_LOCK:
1007 	case DKIOCLOCK:
1008 		rc = ata_queue_cmd(ata_disk_lock, NULL, ata_ctlp, ata_drvp,
1009 			gtgtp);
1010 		break;
1011 
1012 	case DCMD_UNLOCK:
1013 	case DKIOCUNLOCK:
1014 		rc = ata_queue_cmd(ata_disk_unlock, NULL, ata_ctlp, ata_drvp,
1015 			gtgtp);
1016 		break;
1017 
1018 	case DCMD_START_MOTOR:
1019 	case CDROMSTART:
1020 		rc = ata_queue_cmd(ata_disk_recalibrate, NULL, ata_ctlp,
1021 			ata_drvp, gtgtp);
1022 		break;
1023 
1024 	case DCMD_STOP_MOTOR:
1025 	case CDROMSTOP:
1026 		rc = ata_queue_cmd(ata_disk_standby, NULL, ata_ctlp, ata_drvp,
1027 			gtgtp);
1028 		break;
1029 
1030 	case DKIOCEJECT:
1031 	case CDROMEJECT:
1032 		rc = ata_queue_cmd(ata_disk_eject, NULL, ata_ctlp, ata_drvp,
1033 			gtgtp);
1034 		break;
1035 
1036 	default:
1037 		ADBG_WARN(("ata_disk_ioctl: unsupported cmd 0x%x\n", cmd));
1038 		return (ENOTTY);
1039 	}
1040 
1041 	if (rc)
1042 		return (0);
1043 	return (ENXIO);
1044 
1045 }
1046 
1047 
1048 #ifdef ___not___used___
1049 /*
1050  * Issue an ATA command to the drive using the packet already
1051  * allocated by the target driver
1052  */
1053 
1054 int
1055 ata_disk_do_ioctl(
1056 	int	(*func)(ata_ctl_t *, ata_drv_t *, ata_pkt_t *),
1057 	void	  *arg,
1058 	ata_ctl_t *ata_ctlp,
1059 	gtgt_t	  *gtgtp,
1060 	cmpkt_t   *pktp)
1061 {
1062 	gcmd_t	  *gcmdp = CPKT2GCMD(pktp);
1063 	ata_pkt_t *ata_pktp = GCMD2APKT(gcmdp);
1064 	int	   rc;
1065 
1066 	ata_pktp->ap_start = func;
1067 	ata_pktp->ap_intr = NULL;
1068 	ata_pktp->ap_complete = NULL;
1069 	ata_pktp->ap_v_addr = (caddr_t)arg;
1070 
1071 	/*
1072 	 * add it to the queue, when it gets to the front the
1073 	 * ap_start function is called.
1074 	 */
1075 	rc = ghd_transport(&ata_ctlp->ac_ccc, gcmdp, gcmdp->cmd_gtgtp,
1076 		0, TRUE, NULL);
1077 
1078 	if (rc != TRAN_ACCEPT) {
1079 		/* this should never, ever happen */
1080 		return (ENXIO);
1081 	}
1082 
1083 	if (ata_pktp->ap_flags & AP_ERROR)
1084 		return (ENXIO);
1085 	return (0);
1086 }
1087 #endif
1088 
1089 
1090 
1091 /*
1092  *
1093  * DADA pktalloc entry point
1094  *
1095  */
1096 
1097 /* ARGSUSED */
1098 static cmpkt_t *
1099 ata_disk_pktalloc(opaque_t ctl_data, int (*callback)(caddr_t), caddr_t arg)
1100 {
1101 	gtgt_t		*gtgtp = (gtgt_t *)ctl_data;
1102 	ata_drv_t	*ata_drvp = GTGTP2ATADRVP(gtgtp);
1103 	cmpkt_t		*pktp;
1104 	ata_pkt_t	*ata_pktp;
1105 	gcmd_t		*gcmdp;
1106 
1107 	ADBG_TRACE(("ata_disk_pktalloc entered\n"));
1108 
1109 	/*
1110 	 * Allocate and  init the GHD gcmd_t structure and the
1111 	 * DADA cmpkt and the ata_pkt
1112 	 */
1113 	if ((gcmdp = ghd_gcmd_alloc(gtgtp,
1114 				    (sizeof (cmpkt_t) + sizeof (ata_pkt_t)),
1115 				    (callback == DDI_DMA_SLEEP))) == NULL) {
1116 		return ((cmpkt_t *)NULL);
1117 	}
1118 	ASSERT(gcmdp != NULL);
1119 
1120 	ata_pktp = GCMD2APKT(gcmdp);
1121 	ASSERT(ata_pktp != NULL);
1122 
1123 	pktp = (cmpkt_t *)(ata_pktp + 1);
1124 
1125 	pktp->cp_ctl_private = (void *)gcmdp;
1126 	ata_pktp->ap_gcmdp = gcmdp;
1127 	gcmdp->cmd_pktp = (void *)pktp;
1128 
1129 	/*
1130 	 * At this point the structures are linked like this:
1131 	 *
1132 	 *	(struct cmpkt) <--> (struct gcmd) <--> (struct ata_pkt)
1133 	 */
1134 
1135 	/* callback functions */
1136 
1137 	ata_pktp->ap_start = ata_disk_start;
1138 	ata_pktp->ap_intr = ata_disk_intr;
1139 	ata_pktp->ap_complete = ata_disk_complete;
1140 
1141 	/* other ata_pkt setup */
1142 
1143 	ata_pktp->ap_bytes_per_block = ata_drvp->ad_bytes_per_block;
1144 
1145 	/* cmpkt setup */
1146 
1147 	pktp->cp_cdblen = 1;
1148 	pktp->cp_cdbp   = (opaque_t)&ata_pktp->ap_cdb;
1149 	pktp->cp_scbp   = (opaque_t)&ata_pktp->ap_scb;
1150 	pktp->cp_scblen = 1;
1151 
1152 	return (pktp);
1153 }
1154 
1155 
1156 
1157 /*
1158  *
1159  * DADA pktfree entry point
1160  *
1161  */
1162 
1163 /* ARGSUSED */
1164 static void
1165 ata_disk_pktfree(opaque_t ctl_data, cmpkt_t *pktp)
1166 {
1167 	ata_pkt_t *ata_pktp = CPKT2APKT(pktp);
1168 
1169 	ADBG_TRACE(("ata_disk_pktfree entered\n"));
1170 
1171 	/* check not free already */
1172 
1173 	ASSERT(!(ata_pktp->ap_flags & AP_FREE));
1174 	ata_pktp->ap_flags = AP_FREE;
1175 
1176 	ghd_gcmd_free(CPKT2GCMD(pktp));
1177 }
1178 
1179 
1180 /*
1181  *
1182  * DADA memsetup entry point
1183  *
1184  */
1185 
1186 /* ARGSUSED */
1187 static cmpkt_t *
1188 ata_disk_memsetup(
1189 	opaque_t ctl_data,
1190 	cmpkt_t *pktp,
1191 	struct buf *bp,
1192 	int (*callback)(caddr_t),
1193 	caddr_t arg)
1194 {
1195 	gtgt_t		*gtgtp = (gtgt_t *)ctl_data;
1196 	ata_pkt_t	*ata_pktp = CPKT2APKT(pktp);
1197 	gcmd_t		*gcmdp = APKT2GCMD(ata_pktp);
1198 	int		flags;
1199 
1200 	ADBG_TRACE(("ata_disk_memsetup entered\n"));
1201 
1202 	ata_pktp->ap_sg_cnt = 0;
1203 
1204 	if (bp->b_bcount == 0) {
1205 		ata_pktp->ap_v_addr = NULL;
1206 		return (pktp);
1207 	}
1208 
1209 	if (GTGTP2ATADRVP(gtgtp)->ad_pciide_dma != ATA_DMA_ON)
1210 		goto skip_dma_setup;
1211 
1212 	if (ata_dma_disabled)
1213 		goto skip_dma_setup;
1214 
1215 	/*
1216 	 * The PCI-IDE DMA engine is brain-damaged and can't
1217 	 * DMA non-aligned buffers.
1218 	 */
1219 	if (!(bp->b_flags & B_PAGEIO) &&
1220 	    ((uintptr_t)bp->b_un.b_addr) & PCIIDE_PRDE_ADDR_MASK) {
1221 		goto skip_dma_setup;
1222 	}
1223 
1224 	/*
1225 	 * It also insists that the byte count must be even.
1226 	 */
1227 	if (bp->b_bcount & 1)
1228 		goto skip_dma_setup;
1229 
1230 	/* check direction for data transfer */
1231 	if (bp->b_flags & B_READ) {
1232 		flags = DDI_DMA_READ | DDI_DMA_PARTIAL;
1233 	} else {
1234 		flags = DDI_DMA_WRITE | DDI_DMA_PARTIAL;
1235 	}
1236 
1237 	/*
1238 	 * Bind the DMA handle to the buf
1239 	 */
1240 	if (ghd_dma_buf_bind_attr(&GTGTP2ATAP(gtgtp)->ac_ccc, gcmdp, bp, flags,
1241 			callback, arg, &GTGTP2ATATGTP(gtgtp)->at_dma_attr)) {
1242 		ata_pktp->ap_v_addr = 0;
1243 		return (pktp);
1244 	}
1245 
1246 skip_dma_setup:
1247 	bp_mapin(bp);
1248 	ata_pktp->ap_v_addr = bp->b_un.b_addr;
1249 	return (pktp);
1250 }
1251 
1252 
1253 
1254 /*
1255  *
1256  * DADA memfree entry point
1257  *
1258  */
1259 
1260 /*
1261  * 1157317 sez that drivers shouldn't call bp_mapout(), as either
1262  * biodone() or biowait() will end up doing it, but after they
1263  * call bp->b_iodone(), which is a necessary sequence for
1264  * Online Disk Suite.  However, the DDI group wants to rethink
1265  * bp_mapin()/bp_mapout() and how they should behave in the
1266  * presence of layered drivers, etc.  For the moment, fix
1267  * the OLDS problem by removing the bp_mapout() call.
1268  */
1269 
1270 #define	BUG_1157317
1271 
1272 /* ARGSUSED */
1273 static void
1274 ata_disk_memfree(opaque_t ctl_data, cmpkt_t *pktp)
1275 {
1276 	gcmd_t	*gcmdp = CPKT2GCMD(pktp);
1277 
1278 	ADBG_TRACE(("ata_disk_memfree entered\n"));
1279 
1280 	if (gcmdp->cmd_dma_handle)
1281 		ghd_dmafree_attr(gcmdp);
1282 #if !defined(BUG_1157317)
1283 	else
1284 		bp_mapout(pktp->cp_bp);
1285 #endif
1286 }
1287 
1288 
1289 
1290 /*
1291  *
1292  * DADA iosetup entry point
1293  *
1294  */
1295 
1296 static cmpkt_t *
1297 ata_disk_iosetup(opaque_t ctl_data, cmpkt_t *pktp)
1298 {
1299 	gtgt_t		*gtgtp = (gtgt_t *)ctl_data;
1300 	ata_drv_t	*ata_drvp = GTGTP2ATADRVP(gtgtp);
1301 	ata_pkt_t	*ata_pktp = CPKT2APKT(pktp);
1302 	gcmd_t		*gcmdp = APKT2GCMD(ata_pktp);
1303 	uint_t		sec_count;
1304 	daddr_t		start_sec;
1305 	uint_t		byte_count;
1306 
1307 	ADBG_TRACE(("ata_disk_iosetup entered\n"));
1308 
1309 	/*
1310 	 * Check for DCMD_FLUSH_CACHE (which does no I/O) and
1311 	 * just do basic setup.
1312 	 */
1313 	if (pktp->cp_passthru == NULL &&
1314 	    ata_pktp->ap_cdb == DCMD_FLUSH_CACHE) {
1315 		ata_pktp->ap_cmd = ATC_FLUSH_CACHE;
1316 		ata_pktp->ap_flags = 0;
1317 		ata_pktp->ap_count = 0;
1318 		ata_pktp->ap_startsec = 0;
1319 		ata_pktp->ap_sg_cnt = 0;
1320 		ata_pktp->ap_pciide_dma = FALSE;
1321 		return (pktp);
1322 	}
1323 
1324 	/* check for error retry */
1325 	if (ata_pktp->ap_flags & AP_ERROR) {
1326 		/*
1327 		 * this is a temporary work-around for dadk calling
1328 		 * iosetup for retry. The correct
1329 		 * solution is changing dadk to not to call iosetup
1330 		 * for a retry.
1331 		 * We do not apply the work-around for pio mode since
1332 		 * that does not involve moving dma windows and reducing the
1333 		 * sector count would work for pio mode on a retry
1334 		 * for now.
1335 		 */
1336 		if (gcmdp->cmd_dma_handle != NULL) {
1337 			ata_pktp->ap_flags = 0;
1338 			return (NULL);
1339 		}
1340 
1341 		ata_pktp->ap_bytes_per_block = NBPSCTR;
1342 		sec_count = 1;
1343 
1344 		/*
1345 		 * Since we are retrying the last read or write operation,
1346 		 * restore the old values of the ap_v_addr and ap_resid.
1347 		 * This assumes CTL_IOSETUP is called again on retry; if not,
1348 		 * this needs to be done in CTL_TRANSPORT.
1349 		 */
1350 		if (ata_pktp->ap_flags & (AP_READ | AP_WRITE)) {
1351 			ata_pktp->ap_v_addr = ata_pktp->ap_v_addr_sav;
1352 			ata_pktp->ap_resid = ata_pktp->ap_resid_sav;
1353 		}
1354 	} else {
1355 		/*
1356 		 * Limit request to ac_max_transfer sectors.
1357 		 * The value is specified by the user in the
1358 		 * max_transfer property. It must be in the range 1 to 256.
1359 		 * When max_transfer is 0x100 it is bigger than 8 bits.
1360 		 * The spec says 0 represents 256 so it should be OK.
1361 		 */
1362 		sec_count = min((pktp->cp_bytexfer >> SCTRSHFT),
1363 				ata_drvp->ad_ctlp->ac_max_transfer);
1364 		/*
1365 		 * Save the current values of ap_v_addr and ap_resid
1366 		 * in case a retry operation happens. During a retry
1367 		 * operation we need to restore these values.
1368 		 */
1369 		ata_pktp->ap_v_addr_sav = ata_pktp->ap_v_addr;
1370 		ata_pktp->ap_resid_sav = ata_pktp->ap_resid;
1371 	}
1372 
1373 	/* reset flags */
1374 	ata_pktp->ap_flags = 0;
1375 
1376 #ifdef	DADKIO_RWCMD_READ
1377 	start_sec = pktp->cp_passthru ? RWCMDP(pktp)->blkaddr : pktp->cp_srtsec;
1378 #else
1379 	start_sec = pktp->cp_srtsec;
1380 #endif
1381 
1382 	/*
1383 	 * Setup the PCIDE Bus Master Scatter/Gather list
1384 	 */
1385 	ata_pktp->ap_sg_cnt = 0;
1386 	ata_pktp->ap_pciide_dma = FALSE;
1387 	if (gcmdp->cmd_dma_handle != NULL && sec_count != 0) {
1388 		byte_count = sec_count << SCTRSHFT;
1389 		if ((ghd_dmaget_attr(&GTGTP2ATAP(gtgtp)->ac_ccc, gcmdp,
1390 			byte_count, ATA_DMA_NSEGS, &byte_count) == FALSE) ||
1391 			(byte_count == 0)) {
1392 			ADBG_ERROR(("ata_disk_iosetup: byte count zero\n"));
1393 			return (NULL);
1394 		}
1395 		sec_count = byte_count >> SCTRSHFT;
1396 	}
1397 
1398 	/*
1399 	 * In the non-48-bit mode addressing (CHS and LBA28) the sector
1400 	 * count is a 8-bit value and the sector count 0 represents 256
1401 	 * sectors.
1402 	 * In the extended addressing (LBA48) the sector count is a 16-bit
1403 	 * value, so max_transfer 0x100 cannot be truncated to 8-bits
1404 	 * because this would represent a zero sector count.
1405 	 */
1406 	ata_pktp->ap_count = sec_count;
1407 	if (!(ata_drvp->ad_flags & AD_EXT48)) {
1408 		ata_pktp->ap_count &= 0xff;
1409 	}
1410 	ata_pktp->ap_startsec = start_sec;
1411 
1412 #ifdef	DADKIO_RWCMD_READ
1413 	if (pktp->cp_passthru) {
1414 		switch (RWCMDP(pktp)->cmd) {
1415 		case DADKIO_RWCMD_READ:
1416 			if (ata_pktp->ap_sg_cnt) {
1417 				ata_pktp->ap_cmd = ATC_READ_DMA;
1418 				ata_pktp->ap_pciide_dma = TRUE;
1419 				ata_pktp->ap_start = ata_disk_start_dma_in;
1420 				ata_pktp->ap_intr = ata_disk_intr_dma;
1421 			} else {
1422 				ata_pktp->ap_cmd = ATC_RDSEC;
1423 				ata_pktp->ap_start = ata_disk_start_pio_in;
1424 				ata_pktp->ap_intr = ata_disk_intr_pio_in;
1425 			}
1426 			ata_pktp->ap_flags |= AP_READ;
1427 			break;
1428 		case DADKIO_RWCMD_WRITE:
1429 			if (ata_pktp->ap_sg_cnt) {
1430 				ata_pktp->ap_cmd = ATC_WRITE_DMA;
1431 				ata_pktp->ap_pciide_dma = TRUE;
1432 				ata_pktp->ap_start = ata_disk_start_dma_out;
1433 				ata_pktp->ap_intr = ata_disk_intr_dma;
1434 			} else {
1435 				ata_pktp->ap_cmd = ATC_WRSEC;
1436 				ata_pktp->ap_start = ata_disk_start_pio_out;
1437 				ata_pktp->ap_intr = ata_disk_intr_pio_out;
1438 			}
1439 			ata_pktp->ap_flags |= AP_WRITE;
1440 			break;
1441 		}
1442 
1443 		byte_count = RWCMDP(pktp)->buflen;
1444 		pktp->cp_bytexfer = byte_count;
1445 		pktp->cp_resid = byte_count;
1446 		ata_pktp->ap_resid = byte_count;
1447 
1448 		/*
1449 		 * since we're not using READ/WRITE MULTIPLE, we
1450 		 * should set bytes_per_block to one sector
1451 		 * XXX- why wasn't this in the old driver??
1452 		 */
1453 		ata_pktp->ap_bytes_per_block = NBPSCTR;
1454 	} else
1455 #endif
1456 	{
1457 		byte_count = sec_count << SCTRSHFT;
1458 		pktp->cp_bytexfer = byte_count;
1459 		pktp->cp_resid = byte_count;
1460 		ata_pktp->ap_resid = byte_count;
1461 
1462 		/* setup the task file registers */
1463 
1464 		switch (ata_pktp->ap_cdb) {
1465 		case DCMD_READ:
1466 			if (ata_pktp->ap_sg_cnt) {
1467 				ata_pktp->ap_cmd = ATC_READ_DMA;
1468 				ata_pktp->ap_pciide_dma = TRUE;
1469 				ata_pktp->ap_start = ata_disk_start_dma_in;
1470 				ata_pktp->ap_intr = ata_disk_intr_dma;
1471 			} else {
1472 				ata_pktp->ap_cmd = ata_drvp->ad_rd_cmd;
1473 				ata_pktp->ap_start = ata_disk_start_pio_in;
1474 				ata_pktp->ap_intr = ata_disk_intr_pio_in;
1475 			}
1476 			ata_pktp->ap_flags |= AP_READ;
1477 			break;
1478 
1479 		case DCMD_WRITE:
1480 			if (ata_pktp->ap_sg_cnt) {
1481 				ata_pktp->ap_cmd = ATC_WRITE_DMA;
1482 				ata_pktp->ap_pciide_dma = TRUE;
1483 				ata_pktp->ap_start = ata_disk_start_dma_out;
1484 				ata_pktp->ap_intr = ata_disk_intr_dma;
1485 			} else {
1486 				ata_pktp->ap_cmd = ata_drvp->ad_wr_cmd;
1487 				ata_pktp->ap_start = ata_disk_start_pio_out;
1488 				ata_pktp->ap_intr = ata_disk_intr_pio_out;
1489 			}
1490 			ata_pktp->ap_flags |= AP_WRITE;
1491 			break;
1492 
1493 		default:
1494 			ADBG_WARN(("ata_disk_iosetup: unknown command 0x%x\n",
1495 					ata_pktp->ap_cdb));
1496 			pktp = NULL;
1497 			break;
1498 		}
1499 	}
1500 
1501 	/* If 48-bit mode is used, convert command to 48-bit mode cmd */
1502 	if (pktp != NULL && ata_drvp->ad_flags & AD_EXT48) {
1503 		switch (ata_pktp->ap_cmd) {
1504 		case ATC_RDSEC:
1505 			ata_pktp->ap_cmd = ATC_RDSEC_EXT;
1506 			break;
1507 		case ATC_WRSEC:
1508 			ata_pktp->ap_cmd = ATC_WRSEC_EXT;
1509 			break;
1510 		case ATC_RDMULT:
1511 			ata_pktp->ap_cmd = ATC_RDMULT_EXT;
1512 			break;
1513 		case ATC_WRMULT:
1514 			ata_pktp->ap_cmd = ATC_WRMULT_EXT;
1515 			break;
1516 		case ATC_READ_DMA:
1517 			ata_pktp->ap_cmd = ATC_RDDMA_EXT;
1518 			break;
1519 		case ATC_WRITE_DMA:
1520 			ata_pktp->ap_cmd = ATC_WRDMA_EXT;
1521 			break;
1522 		}
1523 	}
1524 
1525 	return (pktp);
1526 }
1527 
1528 
1529 
1530 /*
1531  *
1532  * DADA transport entry point
1533  *
1534  */
1535 
1536 static int
1537 ata_disk_transport(opaque_t ctl_data, cmpkt_t *pktp)
1538 {
1539 	gtgt_t		*gtgtp = (gtgt_t *)ctl_data;
1540 	ata_drv_t	*ata_drvp = GTGTP2ATADRVP(gtgtp);
1541 	ata_ctl_t	*ata_ctlp = ata_drvp->ad_ctlp;
1542 	ata_pkt_t	*ata_pktp = CPKT2APKT(pktp);
1543 	int		rc;
1544 	int		polled = FALSE;
1545 
1546 	ADBG_TRACE(("ata_disk_transport entered\n"));
1547 
1548 	/* check for polling pkt */
1549 
1550 	if (pktp->cp_flags & CPF_NOINTR) {
1551 		polled = TRUE;
1552 	}
1553 
1554 	/* call ghd transport routine */
1555 
1556 	rc = ghd_transport(&ata_ctlp->ac_ccc, APKT2GCMD(ata_pktp),
1557 		gtgtp, pktp->cp_time, polled, NULL);
1558 
1559 	/* see if pkt was not accepted */
1560 
1561 	if (rc == TRAN_BUSY)
1562 		return (CTL_SEND_BUSY);
1563 
1564 	if (rc == TRAN_ACCEPT)
1565 		return (CTL_SEND_SUCCESS);
1566 
1567 	return (CTL_SEND_FAILURE);
1568 }
1569 
1570 
1571 /*
1572  *
1573  * routines to load the cylinder/head/sector/count
1574  * task file registers.
1575  *
1576  */
1577 static void
1578 ata_disk_load_regs_lba28(ata_pkt_t *ata_pktp, ata_drv_t *ata_drvp)
1579 {
1580 	ata_ctl_t	*ata_ctlp = ata_drvp->ad_ctlp;
1581 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
1582 	uint_t		lba;	/* LBA of first sector */
1583 
1584 	lba = ata_pktp->ap_startsec;
1585 
1586 	ddi_put8(io_hdl1, ata_ctlp->ac_count,
1587 		ata_pktp->ap_count);
1588 	ddi_put8(io_hdl1, ata_ctlp->ac_sect, lba);
1589 	lba >>= 8;
1590 	ddi_put8(io_hdl1, ata_ctlp->ac_lcyl, lba);
1591 	lba >>= 8;
1592 	ddi_put8(io_hdl1, ata_ctlp->ac_hcyl, lba);
1593 	lba >>= 8;
1594 	/*
1595 	 * dev/head register can use only 4 bits
1596 	 * must also include drive selector.
1597 	 */
1598 	lba = (lba & 0xf) | ata_drvp->ad_drive_bits;
1599 	ddi_put8(io_hdl1,  ata_ctlp->ac_drvhd, lba);
1600 }
1601 
1602 /*
1603  * In 48-bit extended mode, the sector count is 16 bits wide, and the
1604  * LBA is 48 bits wide, as follows:
1605  * register	most recent	previous
1606  * name		value		value
1607  * --------	----------	---------
1608  * sector cnt	count(7:0)	count(15:8)
1609  * sector num	lba(7:0)	lba(31:24)
1610  * cyl low	lba(15:8)	lba(39:32)
1611  * cyl hi	lba(23:16)	lba(47:40)
1612  * device/head	111D0000	N/A
1613  *               ^ ^
1614  *               | |
1615  *               | +-- drive number
1616  *               |
1617  *               +-- indicates LBA
1618  *	The other two 1 bits are historical and are not used in 48bit
1619  *	extended mode.
1620  */
1621 /*
1622  * WARNING:
1623  * dada framework passes starting sector as daddr_t type, thus
1624  * limiting reachable disk space in 32-bit x86 architecture to 1 terabyte.
1625  * Therefore high 16 bits of the 48-bits address can be and
1626  * are currently ignored.
1627  */
1628 static void
1629 ata_disk_load_regs_lba48(ata_pkt_t *ata_pktp, ata_drv_t *ata_drvp)
1630 {
1631 	ata_ctl_t	*ata_ctlp = ata_drvp->ad_ctlp;
1632 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
1633 	uint16_t	seccnt;		/* 16-bit sector count */
1634 	uint_t		lbalow;		/* low-order 24 bits of LBA */
1635 	uint_t		lbahi;		/* high-order 24 bits of LBA */
1636 
1637 	seccnt = ata_pktp->ap_count;
1638 	/* high-order 8 bits of lbalow never get used */
1639 	lbalow = ata_pktp->ap_startsec;
1640 	lbahi = ata_pktp->ap_startsec >> 24;
1641 
1642 	ddi_put8(io_hdl1, ata_ctlp->ac_count, seccnt >> 8);
1643 	ddi_put8(io_hdl1, ata_ctlp->ac_count, seccnt);
1644 	/* Send the high-order half first */
1645 	ddi_put8(io_hdl1, ata_ctlp->ac_sect, lbahi);
1646 	lbahi >>= 8;
1647 	ddi_put8(io_hdl1, ata_ctlp->ac_lcyl, lbahi);
1648 	lbahi >>= 8;
1649 	ddi_put8(io_hdl1, ata_ctlp->ac_hcyl, lbahi);
1650 	/* Send the low-order half */
1651 	ddi_put8(io_hdl1, ata_ctlp->ac_sect, lbalow);
1652 	lbalow >>= 8;
1653 	ddi_put8(io_hdl1, ata_ctlp->ac_lcyl, lbalow);
1654 	lbalow >>= 8;
1655 	ddi_put8(io_hdl1, ata_ctlp->ac_hcyl, lbalow);
1656 	ddi_put8(io_hdl1,  ata_ctlp->ac_drvhd,
1657 				ata_drvp->ad_drive_bits);
1658 }
1659 
1660 static void
1661 ata_disk_load_regs_chs(ata_pkt_t *ata_pktp, ata_drv_t *ata_drvp)
1662 {
1663 	ata_ctl_t		*ata_ctlp = ata_drvp->ad_ctlp;
1664 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
1665 	uint_t			resid;
1666 	uint_t			cyl;
1667 	uchar_t			head;
1668 	uchar_t			drvheads;
1669 	uchar_t			drvsectors;
1670 
1671 	drvheads = ata_drvp->ad_phhd;
1672 	drvsectors = ata_drvp->ad_phsec;
1673 
1674 	resid = ata_pktp->ap_startsec / drvsectors;
1675 	head = (resid % drvheads) & 0xf;
1676 	cyl = resid / drvheads;
1677 			/* automatically truncate to char */
1678 	ddi_put8(io_hdl1, ata_ctlp->ac_sect,
1679 			(ata_pktp->ap_startsec % drvsectors) + 1);
1680 	ddi_put8(io_hdl1, ata_ctlp->ac_count, ata_pktp->ap_count);
1681 	ddi_put8(io_hdl1, ata_ctlp->ac_hcyl, (cyl >> 8));
1682 		/* lcyl gets truncated to 8 bits */
1683 	ddi_put8(io_hdl1, ata_ctlp->ac_lcyl, cyl);
1684 	ddi_put8(io_hdl1,  ata_ctlp->ac_drvhd,
1685 			ata_drvp->ad_drive_bits | head);
1686 }
1687 
1688 
1689 /*
1690  *
1691  * packet start callback routines
1692  *
1693  */
1694 
1695 /* ARGSUSED */
1696 static int
1697 ata_disk_start_common(
1698 	ata_ctl_t	*ata_ctlp,
1699 	ata_drv_t	*ata_drvp,
1700 	ata_pkt_t	*ata_pktp)
1701 {
1702 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
1703 	ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2;
1704 
1705 	ADBG_TRACE(("ata_disk_start_common entered\n"));
1706 
1707 	ADBG_TRANSPORT(("ata_disk_start:\tpkt = 0x%p, pkt flags = 0x%x\n",
1708 		ata_pktp, ata_pktp->ap_flags));
1709 	ADBG_TRANSPORT(("\tcommand=0x%x, sect=0x%lx\n",
1710 		ata_pktp->ap_cmd, ata_pktp->ap_startsec));
1711 	ADBG_TRANSPORT(("\tcount=0x%x, drvhd = 0x%x\n",
1712 		ata_pktp->ap_count, ata_drvp->ad_drive_bits));
1713 
1714 	/*
1715 	 * If AC_BSY_WAIT is set, wait for controller to not be busy,
1716 	 * before issuing a command.  If AC_BSY_WAIT is not set,
1717 	 * skip the wait.  This is important for laptops that do
1718 	 * suspend/resume but do not correctly wait for the busy bit to
1719 	 * drop after a resume.
1720 	 *
1721 	 * NOTE: this test for ATS_BSY is also needed if/when we
1722 	 * implement the overlapped/queued command protocols. Currently,
1723 	 * the overlap/queued feature is not supported so the test is
1724 	 * conditional.
1725 	 */
1726 	if (ata_ctlp->ac_timing_flags & AC_BSY_WAIT) {
1727 		if (!ata_wait(io_hdl2,  ata_ctlp->ac_ioaddr2,
1728 				0, ATS_BSY, 5000000)) {
1729 			ADBG_ERROR(("ata_disk_start: BUSY\n"));
1730 			return (FALSE);
1731 		}
1732 	}
1733 
1734 	ddi_put8(io_hdl1, ata_ctlp->ac_drvhd, ata_drvp->ad_drive_bits);
1735 	ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2);
1736 
1737 	/*
1738 	 * make certain the drive selected
1739 	 */
1740 	if (!ata_wait(io_hdl2,  ata_ctlp->ac_ioaddr2,
1741 			ATS_DRDY, ATS_BSY, 5 * 1000000)) {
1742 		ADBG_ERROR(("ata_disk_start: select failed\n"));
1743 		return (FALSE);
1744 	}
1745 
1746 	/*
1747 	 * We use different methods for loading the task file
1748 	 * registers, depending on whether the disk
1749 	 * uses LBA or CHS addressing and whether 48-bit
1750 	 * extended addressing is to be used.
1751 	 */
1752 	if (!(ata_drvp->ad_drive_bits & ATDH_LBA))
1753 		ata_disk_load_regs_chs(ata_pktp, ata_drvp);
1754 	else if (ata_drvp->ad_flags & AD_EXT48)
1755 		ata_disk_load_regs_lba48(ata_pktp, ata_drvp);
1756 	else
1757 		ata_disk_load_regs_lba28(ata_pktp, ata_drvp);
1758 	ddi_put8(io_hdl1, ata_ctlp->ac_feature, 0);
1759 
1760 	/*
1761 	 * Always make certain interrupts are enabled. It's been reported
1762 	 * (but not confirmed) that some notebook computers don't
1763 	 * clear the interrupt disable bit after being resumed. The
1764 	 * easiest way to fix this is to always clear the disable bit
1765 	 * before every command.
1766 	 */
1767 	ddi_put8(io_hdl2, ata_ctlp->ac_devctl, ATDC_D3);
1768 	return (TRUE);
1769 }
1770 
1771 
1772 /*
1773  *
1774  * Start a non-data ATA command (not DMA and not PIO):
1775  *
1776  */
1777 
1778 static int
1779 ata_disk_start(
1780 	ata_ctl_t *ata_ctlp,
1781 	ata_drv_t *ata_drvp,
1782 	ata_pkt_t *ata_pktp)
1783 {
1784 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
1785 	ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2;
1786 	int		 rc;
1787 
1788 	rc = ata_disk_start_common(ata_ctlp, ata_drvp, ata_pktp);
1789 
1790 	if (!rc)
1791 		return (ATA_FSM_RC_BUSY);
1792 
1793 	/*
1794 	 * This next one sets the controller in motion
1795 	 */
1796 	ddi_put8(io_hdl1, ata_ctlp->ac_cmd, ata_pktp->ap_cmd);
1797 
1798 	/* wait for the busy bit to settle */
1799 	ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2);
1800 
1801 	return (ATA_FSM_RC_OKAY);
1802 }
1803 
1804 
1805 
1806 static int
1807 ata_disk_start_dma_in(
1808 	ata_ctl_t *ata_ctlp,
1809 	ata_drv_t *ata_drvp,
1810 	ata_pkt_t *ata_pktp)
1811 {
1812 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
1813 	ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2;
1814 	int		 rc;
1815 
1816 	rc = ata_disk_start_common(ata_ctlp, ata_drvp, ata_pktp);
1817 
1818 	if (!rc)
1819 		return (ATA_FSM_RC_BUSY);
1820 
1821 	/*
1822 	 * Copy the Scatter/Gather list to the controller's
1823 	 * Physical Region Descriptor Table
1824 	 */
1825 	ata_pciide_dma_setup(ata_ctlp, ata_pktp->ap_sg_list,
1826 		ata_pktp->ap_sg_cnt);
1827 
1828 	/*
1829 	 * reset the PCIIDE Controller's interrupt and error status bits
1830 	 */
1831 	(void) ata_pciide_status_clear(ata_ctlp);
1832 
1833 	/*
1834 	 * This next one sets the drive in motion
1835 	 */
1836 	ddi_put8(io_hdl1, ata_ctlp->ac_cmd, ata_pktp->ap_cmd);
1837 
1838 	/* wait for the drive's busy bit to settle */
1839 	ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2);
1840 
1841 	ata_pciide_dma_start(ata_ctlp, PCIIDE_BMICX_RWCON_WRITE_TO_MEMORY);
1842 
1843 	return (ATA_FSM_RC_OKAY);
1844 }
1845 
1846 
1847 
1848 static int
1849 ata_disk_start_dma_out(
1850 	ata_ctl_t *ata_ctlp,
1851 	ata_drv_t *ata_drvp,
1852 	ata_pkt_t *ata_pktp)
1853 {
1854 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
1855 	ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2;
1856 	int		 rc;
1857 
1858 	rc = ata_disk_start_common(ata_ctlp, ata_drvp, ata_pktp);
1859 
1860 	if (!rc)
1861 		return (ATA_FSM_RC_BUSY);
1862 
1863 	/*
1864 	 * Copy the Scatter/Gather list to the controller's
1865 	 * Physical Region Descriptor Table
1866 	 */
1867 	ata_pciide_dma_setup(ata_ctlp, ata_pktp->ap_sg_list,
1868 		ata_pktp->ap_sg_cnt);
1869 
1870 	/*
1871 	 * reset the PCIIDE Controller's interrupt and error status bits
1872 	 */
1873 	(void) ata_pciide_status_clear(ata_ctlp);
1874 
1875 	/*
1876 	 * This next one sets the drive in motion
1877 	 */
1878 	ddi_put8(io_hdl1, ata_ctlp->ac_cmd, ata_pktp->ap_cmd);
1879 
1880 	/* wait for the drive's busy bit to settle */
1881 	ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2);
1882 
1883 	ata_pciide_dma_start(ata_ctlp, PCIIDE_BMICX_RWCON_READ_FROM_MEMORY);
1884 
1885 	return (ATA_FSM_RC_OKAY);
1886 }
1887 
1888 
1889 
1890 
1891 
1892 /*
1893  *
1894  * Start a PIO data-in ATA command:
1895  *
1896  */
1897 
1898 static int
1899 ata_disk_start_pio_in(
1900 	ata_ctl_t *ata_ctlp,
1901 	ata_drv_t *ata_drvp,
1902 	ata_pkt_t *ata_pktp)
1903 {
1904 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
1905 	ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2;
1906 	int		 rc;
1907 
1908 	rc = ata_disk_start_common(ata_ctlp, ata_drvp, ata_pktp);
1909 
1910 	if (!rc)
1911 		return (ATA_FSM_RC_BUSY);
1912 	/*
1913 	 * This next one sets the controller in motion
1914 	 */
1915 	ddi_put8(io_hdl1, ata_ctlp->ac_cmd, ata_pktp->ap_cmd);
1916 
1917 	/* wait for the busy bit to settle */
1918 	ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2);
1919 
1920 	return (ATA_FSM_RC_OKAY);
1921 }
1922 
1923 
1924 
1925 
1926 /*
1927  *
1928  * Start a PIO data-out ATA command:
1929  *
1930  */
1931 
1932 static int
1933 ata_disk_start_pio_out(
1934 	ata_ctl_t *ata_ctlp,
1935 	ata_drv_t *ata_drvp,
1936 	ata_pkt_t *ata_pktp)
1937 {
1938 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
1939 	ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2;
1940 	int		 rc;
1941 
1942 	ata_pktp->ap_wrt_count = 0;
1943 
1944 	rc = ata_disk_start_common(ata_ctlp, ata_drvp, ata_pktp);
1945 
1946 	if (!rc)
1947 		return (ATA_FSM_RC_BUSY);
1948 	/*
1949 	 * This next one sets the controller in motion
1950 	 */
1951 	ddi_put8(io_hdl1, ata_ctlp->ac_cmd, ata_pktp->ap_cmd);
1952 
1953 	/* wait for the busy bit to settle */
1954 	ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2);
1955 
1956 	/*
1957 	 * Wait for the drive to assert DRQ to send the first chunk
1958 	 * of data. Have to busy wait because there's no interrupt for
1959 	 * the first chunk. This sucks (a lot of cycles) if the
1960 	 * drive responds too slowly or if the wait loop granularity
1961 	 * is too large. It's really bad if the drive is defective and
1962 	 * the loop times out.
1963 	 */
1964 
1965 	if (!ata_wait3(io_hdl2, ata_ctlp->ac_ioaddr2,
1966 			ATS_DRQ, ATS_BSY, /* okay */
1967 			ATS_ERR, ATS_BSY, /* cmd failed */
1968 			ATS_DF, ATS_BSY, /* drive failed */
1969 			4000000)) {
1970 		ADBG_WARN(("ata_disk_start_pio_out: no DRQ\n"));
1971 		ata_pktp->ap_flags |= AP_ERROR;
1972 		return (ATA_FSM_RC_INTR);
1973 	}
1974 
1975 	/*
1976 	 * Tell the upper layer to fake a hardware interrupt which
1977 	 * actually causes the first segment to be written to the drive.
1978 	 */
1979 	return (ATA_FSM_RC_INTR);
1980 }
1981 
1982 
1983 
1984 /*
1985  *
1986  * packet complete callback routine
1987  *
1988  */
1989 
1990 static void
1991 ata_disk_complete(
1992 	ata_drv_t *ata_drvp,
1993 	ata_pkt_t *ata_pktp,
1994 	int do_callback)
1995 {
1996 	struct ata_id   *aidp = &ata_drvp->ad_id;
1997 	cmpkt_t	*pktp;
1998 
1999 	ADBG_TRACE(("ata_disk_complete entered\n"));
2000 	ADBG_TRANSPORT(("ata_disk_complete: pkt = 0x%p\n", ata_pktp));
2001 
2002 	pktp = APKT2CPKT(ata_pktp);
2003 
2004 	/* update resid */
2005 
2006 	pktp->cp_resid = ata_pktp->ap_resid;
2007 
2008 	if (ata_pktp->ap_flags & AP_ERROR) {
2009 
2010 		pktp->cp_reason = CPS_CHKERR;
2011 
2012 		if (ata_pktp->ap_error & ATE_BBK_ICRC) {
2013 			if (IS_ATA_VERSION_GE(aidp, 4))
2014 				ata_pktp->ap_scb = DERR_ICRC;
2015 			else
2016 				ata_pktp->ap_scb = DERR_BBK;
2017 		} else if (ata_pktp->ap_error & ATE_UNC)
2018 			ata_pktp->ap_scb = DERR_UNC;
2019 		else if (ata_pktp->ap_error & ATE_IDNF)
2020 			ata_pktp->ap_scb = DERR_IDNF;
2021 		else if (ata_pktp->ap_error & ATE_TKONF)
2022 			ata_pktp->ap_scb = DERR_TKONF;
2023 		else if (ata_pktp->ap_error & ATE_AMNF)
2024 			ata_pktp->ap_scb = DERR_AMNF;
2025 		else if (ata_pktp->ap_status & ATS_BSY)
2026 			ata_pktp->ap_scb = DERR_BUSY;
2027 		else if (ata_pktp->ap_status & ATS_DF)
2028 			ata_pktp->ap_scb = DERR_DWF;
2029 		else /* any unknown error	*/
2030 			ata_pktp->ap_scb = DERR_ABORT;
2031 	} else if (ata_pktp->ap_flags &
2032 			(AP_ABORT|AP_TIMEOUT|AP_BUS_RESET)) {
2033 
2034 		pktp->cp_reason = CPS_CHKERR;
2035 		ata_pktp->ap_scb = DERR_ABORT;
2036 	} else {
2037 		pktp->cp_reason = CPS_SUCCESS;
2038 		ata_pktp->ap_scb = DERR_SUCCESS;
2039 	}
2040 
2041 	/* callback */
2042 	if (do_callback)
2043 		(*pktp->cp_callback)(pktp);
2044 }
2045 
2046 
2047 /*
2048  *
2049  * Interrupt callbacks
2050  *
2051  */
2052 
2053 
2054 /*
2055  *
2056  * ATA command, no data
2057  *
2058  */
2059 
2060 /* ARGSUSED */
2061 static int
2062 ata_disk_intr(
2063 	ata_ctl_t *ata_ctlp,
2064 	ata_drv_t *ata_drvp,
2065 	ata_pkt_t *ata_pktp)
2066 {
2067 	uchar_t		 status;
2068 
2069 	ADBG_TRACE(("ata_disk_intr entered\n"));
2070 	ADBG_TRANSPORT(("ata_disk_intr: pkt = 0x%p\n", ata_pktp));
2071 
2072 	status = ata_get_status_clear_intr(ata_ctlp, ata_pktp);
2073 
2074 	ASSERT((status & (ATS_BSY | ATS_DRQ)) == 0);
2075 
2076 	/*
2077 	 * check for errors
2078 	 */
2079 
2080 	if (status & (ATS_DF | ATS_ERR)) {
2081 		ADBG_WARN(("ata_disk_intr: status 0x%x error 0x%x\n", status,
2082 			ddi_get8(ata_ctlp->ac_iohandle1, ata_ctlp->ac_error)));
2083 		ata_pktp->ap_flags |= AP_ERROR;
2084 	}
2085 
2086 	if (ata_pktp->ap_flags & AP_ERROR) {
2087 		ata_pktp->ap_status = ddi_get8(ata_ctlp->ac_iohandle2,
2088 			ata_ctlp->ac_altstatus);
2089 		ata_pktp->ap_error = ddi_get8(ata_ctlp->ac_iohandle1,
2090 			ata_ctlp->ac_error);
2091 	}
2092 
2093 	/* tell the upper layer this request is complete */
2094 	return (ATA_FSM_RC_FINI);
2095 }
2096 
2097 
2098 /*
2099  *
2100  * ATA command, PIO data in
2101  *
2102  */
2103 
2104 /* ARGSUSED */
2105 static int
2106 ata_disk_intr_pio_in(
2107 	ata_ctl_t *ata_ctlp,
2108 	ata_drv_t *ata_drvp,
2109 	ata_pkt_t *ata_pktp)
2110 {
2111 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
2112 	ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2;
2113 	uchar_t		 status;
2114 
2115 	ADBG_TRACE(("ata_disk_pio_in entered\n"));
2116 	ADBG_TRANSPORT(("ata_disk_pio_in: pkt = 0x%p\n", ata_pktp));
2117 
2118 	/*
2119 	 * first make certain DRQ is asserted (and no errors)
2120 	 */
2121 	(void) ata_wait3(io_hdl2, ata_ctlp->ac_ioaddr2,
2122 			ATS_DRQ, ATS_BSY, ATS_ERR, ATS_BSY, ATS_DF, ATS_BSY,
2123 			4000000);
2124 
2125 	status = ata_get_status_clear_intr(ata_ctlp, ata_pktp);
2126 
2127 	if (status & ATS_BSY) {
2128 		ADBG_WARN(("ata_disk_pio_in: BUSY\n"));
2129 		ata_pktp->ap_flags |= AP_ERROR;
2130 		ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus);
2131 		ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error);
2132 		return (ATA_FSM_RC_BUSY);
2133 	}
2134 
2135 	/*
2136 	 * record any errors
2137 	 */
2138 	if ((status & (ATS_DRQ | ATS_DF | ATS_ERR)) != ATS_DRQ) {
2139 		ADBG_WARN(("ata_disk_pio_in: status 0x%x error 0x%x\n",
2140 			status, ddi_get8(io_hdl1, ata_ctlp->ac_error)));
2141 		ata_pktp->ap_flags |= AP_ERROR;
2142 		ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus);
2143 		ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error);
2144 	}
2145 
2146 	/*
2147 	 * read the next chunk of data (if any)
2148 	 */
2149 	if (status & ATS_DRQ) {
2150 		ata_disk_pio_xfer_data_in(ata_ctlp, ata_pktp);
2151 	}
2152 
2153 	/*
2154 	 * If that was the last chunk, wait for the device to clear DRQ
2155 	 */
2156 	if (ata_pktp->ap_resid == 0) {
2157 		if (ata_wait(io_hdl2, ata_ctlp->ac_ioaddr2,
2158 			0, (ATS_DRQ | ATS_BSY), 4000000)) {
2159 			/* tell the upper layer this request is complete */
2160 			return (ATA_FSM_RC_FINI);
2161 		}
2162 
2163 		ADBG_WARN(("ata_disk_pio_in: DRQ stuck\n"));
2164 		ata_pktp->ap_flags |= AP_ERROR;
2165 		ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus);
2166 		ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error);
2167 	}
2168 
2169 	/*
2170 	 * check for errors
2171 	 */
2172 	if (ata_pktp->ap_flags & AP_ERROR) {
2173 		return (ATA_FSM_RC_FINI);
2174 	}
2175 
2176 	/*
2177 	 * If the read command isn't done yet,
2178 	 * wait for the next interrupt.
2179 	 */
2180 	ADBG_TRACE(("ata_disk_pio_in: partial\n"));
2181 	return (ATA_FSM_RC_OKAY);
2182 }
2183 
2184 
2185 
2186 /*
2187  *
2188  * ATA command, PIO data out
2189  *
2190  */
2191 
2192 /* ARGSUSED */
2193 static int
2194 ata_disk_intr_pio_out(
2195 	ata_ctl_t *ata_ctlp,
2196 	ata_drv_t *ata_drvp,
2197 	ata_pkt_t *ata_pktp)
2198 {
2199 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
2200 	ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2;
2201 	int		 tmp_count = ata_pktp->ap_wrt_count;
2202 	uchar_t		 status;
2203 
2204 	/*
2205 	 * clear the IRQ
2206 	 */
2207 	status = ata_get_status_clear_intr(ata_ctlp, ata_pktp);
2208 
2209 	ADBG_TRACE(("ata_disk_intr_pio_out entered\n"));
2210 	ADBG_TRANSPORT(("ata_disk_intr_pio_out: pkt = 0x%p\n", ata_pktp));
2211 
2212 	ASSERT(!(status & ATS_BSY));
2213 
2214 
2215 	/*
2216 	 * check for errors
2217 	 */
2218 
2219 	if (status & (ATS_DF | ATS_ERR)) {
2220 		ADBG_WARN(("ata_disk_intr_pio_out: status 0x%x error 0x%x\n",
2221 		status, ddi_get8(io_hdl1, ata_ctlp->ac_error)));
2222 		ata_pktp->ap_flags |= AP_ERROR;
2223 		ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus);
2224 		ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error);
2225 		/* tell the upper layer this request is complete */
2226 		return (ATA_FSM_RC_FINI);
2227 	}
2228 
2229 
2230 	/*
2231 	 * last write was okay, bump the ptr and
2232 	 * decr the resid count
2233 	 */
2234 	ata_pktp->ap_v_addr += tmp_count;
2235 	ata_pktp->ap_resid -= tmp_count;
2236 
2237 	/*
2238 	 * check for final interrupt on write command
2239 	 */
2240 	if (ata_pktp->ap_resid <= 0) {
2241 		/* tell the upper layer this request is complete */
2242 		return (ATA_FSM_RC_FINI);
2243 	}
2244 
2245 	/*
2246 	 * Perform the next data transfer
2247 	 *
2248 	 * First make certain DRQ is asserted and no error status.
2249 	 * (I'm not certain but I think some drives might deassert BSY
2250 	 * before asserting DRQ. This extra ata_wait3() will
2251 	 * compensate for such drives).
2252 	 *
2253 	 */
2254 	(void) ata_wait3(io_hdl2, ata_ctlp->ac_ioaddr2,
2255 		ATS_DRQ, ATS_BSY, ATS_ERR, ATS_BSY, ATS_DF, ATS_BSY, 4000000);
2256 
2257 	status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus);
2258 
2259 	if (status & ATS_BSY) {
2260 		/* this should never happen */
2261 		ADBG_WARN(("ata_disk_intr_pio_out: BUSY\n"));
2262 		ata_pktp->ap_flags |= AP_ERROR;
2263 		ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus);
2264 		ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error);
2265 		return (ATA_FSM_RC_BUSY);
2266 	}
2267 
2268 	/*
2269 	 * bailout if any errors
2270 	 */
2271 	if ((status & (ATS_DRQ | ATS_DF | ATS_ERR)) != ATS_DRQ) {
2272 		ADBG_WARN(("ata_disk_pio_out: status 0x%x error 0x%x\n",
2273 			status, ddi_get8(io_hdl1, ata_ctlp->ac_error)));
2274 		ata_pktp->ap_flags |= AP_ERROR;
2275 		ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus);
2276 		ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error);
2277 		return (ATA_FSM_RC_FINI);
2278 	}
2279 
2280 	/*
2281 	 * write  the next chunk of data
2282 	 */
2283 	ADBG_TRACE(("ata_disk_intr_pio_out: write xfer\n"));
2284 	ata_disk_pio_xfer_data_out(ata_ctlp, ata_pktp);
2285 
2286 	/*
2287 	 * Wait for the next interrupt before checking the transfer
2288 	 * status and adjusting the transfer count.
2289 	 *
2290 	 */
2291 	return (ATA_FSM_RC_OKAY);
2292 }
2293 
2294 
2295 /*
2296  *
2297  * ATA command, DMA data in/out
2298  *
2299  */
2300 
2301 static int
2302 ata_disk_intr_dma(
2303 	ata_ctl_t *ata_ctlp,
2304 	ata_drv_t *ata_drvp,
2305 	ata_pkt_t *ata_pktp)
2306 {
2307 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
2308 	ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2;
2309 	uchar_t		 status;
2310 
2311 	ADBG_TRACE(("ata_disk_intr_dma entered\n"));
2312 	ADBG_TRANSPORT(("ata_disk_intr_dma: pkt = 0x%p\n", ata_pktp));
2313 
2314 	/*
2315 	 * halt the DMA engine
2316 	 */
2317 	ata_pciide_dma_stop(ata_ctlp);
2318 
2319 	/*
2320 	 * wait for the device to clear DRQ
2321 	 */
2322 	if (!ata_wait(io_hdl2, ata_ctlp->ac_ioaddr2,
2323 			0, (ATS_DRQ | ATS_BSY), 4000000)) {
2324 		ADBG_WARN(("ata_disk_intr_dma: DRQ stuck\n"));
2325 		ata_pktp->ap_flags |= AP_ERROR;
2326 		ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus);
2327 		ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error);
2328 		return (ATA_FSM_RC_BUSY);
2329 	}
2330 
2331 	/*
2332 	 * get the status and clear the IRQ, and check for DMA error
2333 	 */
2334 	status = ata_get_status_clear_intr(ata_ctlp, ata_pktp);
2335 
2336 	/*
2337 	 * check for drive errors
2338 	 */
2339 
2340 	if (status & (ATS_DF | ATS_ERR)) {
2341 		ADBG_WARN(("ata_disk_intr_dma: status 0x%x error 0x%x\n",
2342 			status, ddi_get8(io_hdl1, ata_ctlp->ac_error)));
2343 		ata_pktp->ap_flags |= AP_ERROR;
2344 		ata_pktp->ap_status = ddi_get8(io_hdl2, ata_ctlp->ac_altstatus);
2345 		ata_pktp->ap_error = ddi_get8(io_hdl1, ata_ctlp->ac_error);
2346 	}
2347 
2348 	/*
2349 	 * If there was a drive or DMA error, compute a resid count
2350 	 */
2351 	if (ata_pktp->ap_flags & AP_ERROR) {
2352 		/*
2353 		 * grab the last sector address from the drive regs
2354 		 * and use that to compute the resid
2355 		 */
2356 		ata_disk_get_resid(ata_ctlp, ata_drvp, ata_pktp);
2357 	} else {
2358 		ata_pktp->ap_resid = 0;
2359 	}
2360 
2361 	/* tell the upper layer this request is complete */
2362 	return (ATA_FSM_RC_FINI);
2363 }
2364 
2365 
2366 /*
2367  *
2368  * Low level PIO routine that transfers data from the drive
2369  *
2370  */
2371 
2372 static void
2373 ata_disk_pio_xfer_data_in(
2374 	ata_ctl_t *ata_ctlp,
2375 	ata_pkt_t *ata_pktp)
2376 {
2377 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
2378 	ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2;
2379 	int		 count;
2380 
2381 	count = min(ata_pktp->ap_resid,
2382 			ata_pktp->ap_bytes_per_block);
2383 
2384 	ADBG_TRANSPORT(("ata_disk_pio_xfer_data_in: 0x%x bytes, addr = 0x%p\n",
2385 			count, ata_pktp->ap_v_addr));
2386 
2387 	/*
2388 	 * read count bytes
2389 	 */
2390 
2391 	ASSERT(count != 0);
2392 
2393 	ddi_rep_get16(io_hdl1, (ushort_t *)ata_pktp->ap_v_addr,
2394 		ata_ctlp->ac_data, (count >> 1), DDI_DEV_NO_AUTOINCR);
2395 
2396 	/* wait for the busy bit to settle */
2397 	ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2);
2398 
2399 	/*
2400 	 * this read command completed okay, bump the ptr and
2401 	 * decr the resid count now.
2402 	 */
2403 	ata_pktp->ap_v_addr += count;
2404 	ata_pktp->ap_resid -= count;
2405 }
2406 
2407 
2408 /*
2409  *
2410  * Low level PIO routine that transfers data to the drive
2411  *
2412  */
2413 
2414 static void
2415 ata_disk_pio_xfer_data_out(
2416 	ata_ctl_t *ata_ctlp,
2417 	ata_pkt_t *ata_pktp)
2418 {
2419 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
2420 	ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2;
2421 	int		 count;
2422 
2423 	count = min(ata_pktp->ap_resid,
2424 			ata_pktp->ap_bytes_per_block);
2425 
2426 	ADBG_TRANSPORT(("ata_disk_pio_xfer_data_out: 0x%x bytes, addr = 0x%p\n",
2427 			count, ata_pktp->ap_v_addr));
2428 
2429 	/*
2430 	 * read or write count bytes
2431 	 */
2432 
2433 	ASSERT(count != 0);
2434 
2435 	ddi_rep_put16(io_hdl1, (ushort_t *)ata_pktp->ap_v_addr,
2436 		ata_ctlp->ac_data, (count >> 1), DDI_DEV_NO_AUTOINCR);
2437 
2438 	/* wait for the busy bit to settle */
2439 	ATA_DELAY_400NSEC(io_hdl2, ata_ctlp->ac_ioaddr2);
2440 
2441 	/*
2442 	 * save the count here so I can correctly adjust
2443 	 * the ap_v_addr and ap_resid values at the next
2444 	 * interrupt.
2445 	 */
2446 	ata_pktp->ap_wrt_count = count;
2447 }
2448 
2449 
2450 /*
2451  *
2452  * ATA Initialize Device Parameters (aka Set Params) command
2453  *
2454  * If the drive was put in some sort of CHS extended/logical geometry
2455  * mode by the BIOS, this function will reset it to its "native"
2456  * CHS geometry. This ensures that we don't run into any sort of
2457  * 1024 cylinder (or 65535 cylinder) limitation that may have been
2458  * created by a BIOS (or users) that chooses a bogus translated geometry.
2459  */
2460 
2461 static int
2462 ata_disk_initialize_device_parameters(
2463 	ata_ctl_t *ata_ctlp,
2464 	ata_drv_t *ata_drvp)
2465 {
2466 	int		 rc;
2467 
2468 #ifdef	_SIMULATOR_SUPPORT
2469 	extern int simulator_run;	/* running under simulator ? */
2470 #endif	/* _SIMULATOR_SUPPORT */
2471 
2472 	rc = ata_command(ata_ctlp, ata_drvp, FALSE, FALSE,
2473 			ata_disk_init_dev_parm_wait,
2474 			ATC_SETPARAM,
2475 			0, 			/* feature n/a */
2476 			ata_drvp->ad_phsec,	/* max sector (1-based) */
2477 			0,			/* sector n/a */
2478 			(ata_drvp->ad_phhd -1),	/* max head (0-based) */
2479 			0,			/* cyl_low n/a */
2480 			0);			/* cyl_hi n/a */
2481 
2482 #ifdef	_SIMULATOR_SUPPORT
2483 	if (rc || simulator_run) {
2484 		return (TRUE);
2485 	}
2486 #else
2487 	if (rc) {
2488 		return (TRUE);
2489 	}
2490 #endif	/* _SIMULATOR_SUPPORT */
2491 
2492 	ADBG_ERROR(("ata_init_dev_parms: failed\n"));
2493 	return (FALSE);
2494 }
2495 
2496 
2497 
2498 /*
2499  *
2500  * create fake inquiry data for DADA interface
2501  *
2502  */
2503 
2504 static void
2505 ata_disk_fake_inquiry(
2506 	ata_drv_t *ata_drvp)
2507 {
2508 	struct ata_id *ata_idp = &ata_drvp->ad_id;
2509 	struct scsi_inquiry *inqp = &ata_drvp->ad_inquiry;
2510 
2511 	ADBG_TRACE(("ata_disk_fake_inquiry entered\n"));
2512 
2513 	if (ata_idp->ai_config & ATA_ID_REM_DRV) /* ide removable bit */
2514 		inqp->inq_rmb = 1;		/* scsi removable bit */
2515 
2516 	(void) strncpy(inqp->inq_vid, "Gen-ATA ", sizeof (inqp->inq_vid));
2517 	inqp->inq_dtype = DTYPE_DIRECT;
2518 	inqp->inq_qual = DPQ_POSSIBLE;
2519 
2520 	(void) strncpy(inqp->inq_pid, ata_idp->ai_model,
2521 			sizeof (inqp->inq_pid));
2522 	(void) strncpy(inqp->inq_revision, ata_idp->ai_fw,
2523 			sizeof (inqp->inq_revision));
2524 }
2525 
2526 #define	LOOP_COUNT	10000
2527 
2528 
2529 /*
2530  *
2531  * ATA Set Multiple Mode
2532  *
2533  */
2534 
2535 static int
2536 ata_disk_set_multiple(
2537 	ata_ctl_t *ata_ctlp,
2538 	ata_drv_t *ata_drvp)
2539 {
2540 	int		 rc;
2541 
2542 	rc = ata_command(ata_ctlp, ata_drvp, TRUE, FALSE,
2543 			ata_disk_set_mult_wait,
2544 			ATC_SETMULT,
2545 			0, 			/* feature n/a */
2546 			ata_drvp->ad_block_factor, /* count */
2547 			0,			/* sector n/a */
2548 			0, 			/* head n/a */
2549 			0,			/* cyl_low n/a */
2550 			0);			/* cyl_hi n/a */
2551 
2552 	if (rc) {
2553 		return (TRUE);
2554 	}
2555 
2556 	ADBG_ERROR(("ata_disk_set_multiple: failed\n"));
2557 	return (FALSE);
2558 }
2559 
2560 
2561 /*
2562  *
2563  * ATA Identify Device command
2564  *
2565  */
2566 
2567 int
2568 ata_disk_id(
2569 	ddi_acc_handle_t io_hdl1,
2570 	caddr_t		 ioaddr1,
2571 	ddi_acc_handle_t io_hdl2,
2572 	caddr_t		 ioaddr2,
2573 	struct ata_id	*ata_idp)
2574 {
2575 	int	rc;
2576 
2577 	ADBG_TRACE(("ata_disk_id entered\n"));
2578 
2579 	rc = ata_id_common(ATC_ID_DEVICE, TRUE, io_hdl1, ioaddr1, io_hdl2,
2580 		ioaddr2, ata_idp);
2581 
2582 	if (!rc)
2583 		return (FALSE);
2584 
2585 	/*
2586 	 * If the disk is a CF/Microdrive that works under ATA mode
2587 	 * through CF<->ATA adapters, identify it as an ATA device
2588 	 * and a non removable media.
2589 	 */
2590 	if (ata_idp->ai_config == ATA_ID_COMPACT_FLASH) {
2591 		ata_idp->ai_config = ATA_ID_CF_TO_ATA;
2592 	}
2593 
2594 	if ((ata_idp->ai_config & ATAC_ATA_TYPE_MASK) != ATAC_ATA_TYPE)
2595 		return (FALSE);
2596 
2597 	if (ata_idp->ai_heads == 0 || ata_idp->ai_sectors == 0) {
2598 		return (FALSE);
2599 	}
2600 
2601 	return (TRUE);
2602 }
2603 
2604 static daddr_t
2605 ata_last_block_xferred_chs(ata_drv_t *ata_drvp)
2606 {
2607 	ata_ctl_t	*ata_ctlp = ata_drvp->ad_ctlp;
2608 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
2609 	uchar_t		 drvheads = ata_drvp->ad_phhd;
2610 	uchar_t		 drvsectors = ata_drvp->ad_phsec;
2611 	uchar_t		 sector;
2612 	uchar_t		 head;
2613 	uchar_t		 low_cyl;
2614 	uchar_t		 hi_cyl;
2615 	daddr_t		 lbastop;
2616 
2617 	sector = ddi_get8(io_hdl1, ata_ctlp->ac_sect);
2618 	head = ddi_get8(io_hdl1, ata_ctlp->ac_drvhd) & 0xf;
2619 	low_cyl = ddi_get8(io_hdl1, ata_ctlp->ac_lcyl);
2620 	hi_cyl = ddi_get8(io_hdl1, ata_ctlp->ac_hcyl);
2621 
2622 	lbastop = low_cyl;
2623 	lbastop |= (uint_t)hi_cyl << 8;
2624 	lbastop *= (uint_t)drvheads;
2625 	lbastop += (uint_t)head;
2626 	lbastop *= (uint_t)drvsectors;
2627 	lbastop += (uint_t)sector - 1;
2628 	return (lbastop);
2629 }
2630 
2631 static daddr_t
2632 ata_last_block_xferred_lba28(ata_ctl_t *ata_ctlp)
2633 {
2634 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
2635 	daddr_t		lbastop;
2636 
2637 	lbastop = ddi_get8(io_hdl1, ata_ctlp->ac_drvhd) & 0xf;
2638 	lbastop <<= 8;
2639 	lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_hcyl);
2640 	lbastop <<= 8;
2641 	lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_lcyl);
2642 	lbastop <<= 8;
2643 	lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_sect);
2644 	return (lbastop);
2645 }
2646 
2647 static daddr_t
2648 ata_last_block_xferred_lba48(ata_ctl_t *ata_ctlp)
2649 {
2650 	ddi_acc_handle_t io_hdl1 = ata_ctlp->ac_iohandle1;
2651 	ddi_acc_handle_t io_hdl2 = ata_ctlp->ac_iohandle2;
2652 	daddr_t		lbastop;
2653 
2654 	/* turn on HOB and read the high-order 24 bits */
2655 	ddi_put8(io_hdl2, ata_ctlp->ac_devctl, (ATDC_D3 | ATDC_HOB));
2656 	lbastop = ddi_get8(io_hdl1, ata_ctlp->ac_hcyl);
2657 	lbastop <<= 8;
2658 	lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_lcyl);
2659 	lbastop <<= 8;
2660 	lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_sect);
2661 	lbastop <<= 8;
2662 
2663 	/* Turn off HOB and read the low-order 24-bits */
2664 	ddi_put8(io_hdl2, ata_ctlp->ac_devctl, (ATDC_D3));
2665 	lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_hcyl);
2666 	lbastop <<= 8;
2667 	lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_lcyl);
2668 	lbastop <<= 8;
2669 	lbastop += ddi_get8(io_hdl1, ata_ctlp->ac_sect);
2670 	return (lbastop);
2671 }
2672 
2673 
2674 /*
2675  *
2676  * Need to compute a value for ap_resid so that cp_resid can
2677  * be set by ata_disk_complete(). The cp_resid var is actually
2678  * misnamed. It's actually the offset to the block in which the
2679  * error occurred not the number of bytes transferred to the device.
2680  * At least that's how dadk actually uses the cp_resid when reporting
2681  * an error. In other words the sector that had the error and the
2682  * number of bytes transferred don't always indicate the same offset.
2683  * On top of that, when doing DMA transfers there's actually no
2684  * way to determine how many bytes have been transferred by the DMA
2685  * engine. On the other hand, the drive will report which sector
2686  * it faulted on. Using that address this routine computes the
2687  * number of residual bytes beyond that point which probably weren't
2688  * written to the drive (the drive is allowed to re-order sector
2689  * writes but on an ATA disk there's no way to deal with that
2690  * complication; in other words, the resid value calculated by
2691  * this routine is as good as we can manage).
2692  */
2693 
2694 static void
2695 ata_disk_get_resid(
2696 	ata_ctl_t	*ata_ctlp,
2697 	ata_drv_t	*ata_drvp,
2698 	ata_pkt_t	*ata_pktp)
2699 {
2700 	uint_t		 lba_start;
2701 	uint_t		 lba_stop;
2702 	uint_t		 resid_bytes;
2703 	uint_t		 resid_sectors;
2704 
2705 	lba_start = ata_pktp->ap_startsec;
2706 
2707 	if (ata_drvp->ad_flags & AD_EXT48)
2708 		lba_stop = ata_last_block_xferred_lba48(ata_ctlp);
2709 	else if (ata_drvp->ad_drive_bits & ATDH_LBA)
2710 		lba_stop = ata_last_block_xferred_lba28(ata_ctlp);
2711 	else /* CHS mode */
2712 		lba_stop = ata_last_block_xferred_chs(ata_drvp);
2713 
2714 	resid_sectors = lba_start + ata_pktp->ap_count - lba_stop;
2715 	resid_bytes = resid_sectors << SCTRSHFT;
2716 
2717 	ADBG_TRACE(("ata_disk_get_resid start 0x%x cnt 0x%x stop 0x%x\n",
2718 		    lba_start, ata_pktp->ap_count, lba_stop));
2719 	ata_pktp->ap_resid = resid_bytes;
2720 }
2721 
2722 
2723 
2724 /*
2725  * Removable media commands *
2726  */
2727 
2728 
2729 
2730 /*
2731  * get the media status
2732  *
2733  * NOTE: the error handling case probably isn't correct but it
2734  * will have to do until someone gives me a drive to test this on.
2735  */
2736 static int
2737 ata_disk_state(
2738 	ata_ctl_t	*ata_ctlp,
2739 	ata_drv_t	*ata_drvp,
2740 	ata_pkt_t	*ata_pktp)
2741 {
2742 	int	*statep = (int *)ata_pktp->ap_v_addr;
2743 	uchar_t	 err;
2744 
2745 	ADBG_TRACE(("ata_disk_state\n"));
2746 	if (ata_command(ata_ctlp, ata_drvp, TRUE, TRUE, 5 * 1000000,
2747 		    ATC_DOOR_LOCK, 0, 0, 0, 0, 0, 0)) {
2748 		*statep = DKIO_INSERTED;
2749 		return (ATA_FSM_RC_FINI);
2750 	}
2751 
2752 	err = ddi_get8(ata_ctlp->ac_iohandle1, ata_ctlp->ac_error);
2753 	if (err & ATE_NM)
2754 		*statep = DKIO_EJECTED;
2755 	else
2756 		*statep = DKIO_NONE;
2757 
2758 	return (ATA_FSM_RC_FINI);
2759 }
2760 
2761 /*
2762  * eject the media
2763  */
2764 
2765 static int
2766 ata_disk_eject(
2767 	ata_ctl_t	*ata_ctlp,
2768 	ata_drv_t	*ata_drvp,
2769 	ata_pkt_t	*ata_pktp)
2770 {
2771 	ADBG_TRACE(("ata_disk_eject\n"));
2772 	if (ata_command(ata_ctlp, ata_drvp, TRUE, TRUE, 5 * 1000000,
2773 			ATC_EJECT, 0, 0, 0, 0, 0, 0)) {
2774 		return (ATA_FSM_RC_FINI);
2775 	}
2776 	ata_pktp->ap_flags |= AP_ERROR;
2777 	return (ATA_FSM_RC_FINI);
2778 }
2779 
2780 /*
2781  * lock the drive
2782  *
2783  */
2784 static int
2785 ata_disk_lock(
2786 	ata_ctl_t	*ata_ctlp,
2787 	ata_drv_t	*ata_drvp,
2788 	ata_pkt_t	*ata_pktp)
2789 {
2790 	ADBG_TRACE(("ata_disk_lock\n"));
2791 	if (ata_command(ata_ctlp, ata_drvp, TRUE, TRUE, 5 * 1000000,
2792 			ATC_DOOR_LOCK, 0, 0, 0, 0, 0, 0)) {
2793 		return (ATA_FSM_RC_FINI);
2794 	}
2795 	ata_pktp->ap_flags |= AP_ERROR;
2796 	return (ATA_FSM_RC_FINI);
2797 }
2798 
2799 
2800 /*
2801  * unlock the drive
2802  *
2803  */
2804 static int
2805 ata_disk_unlock(
2806 	ata_ctl_t	*ata_ctlp,
2807 	ata_drv_t	*ata_drvp,
2808 	ata_pkt_t	*ata_pktp)
2809 {
2810 	ADBG_TRACE(("ata_disk_unlock\n"));
2811 	if (ata_command(ata_ctlp, ata_drvp, TRUE, TRUE, 5 * 1000000,
2812 			ATC_DOOR_UNLOCK, 0, 0, 0, 0, 0, 0)) {
2813 		return (ATA_FSM_RC_FINI);
2814 	}
2815 	ata_pktp->ap_flags |= AP_ERROR;
2816 	return (ATA_FSM_RC_FINI);
2817 }
2818 
2819 
2820 /*
2821  * put the drive into standby mode
2822  */
2823 static int
2824 ata_disk_standby(
2825 	ata_ctl_t	*ata_ctlp,
2826 	ata_drv_t	*ata_drvp,
2827 	ata_pkt_t	*ata_pktp)
2828 {
2829 	ADBG_TRACE(("ata_disk_standby\n"));
2830 	if (ata_command(ata_ctlp, ata_drvp, TRUE, TRUE, 5 * 1000000,
2831 			ATC_STANDBY_IM, 0, 0, 0, 0, 0, 0)) {
2832 		return (ATA_FSM_RC_FINI);
2833 	}
2834 	ata_pktp->ap_flags |= AP_ERROR;
2835 	return (ATA_FSM_RC_FINI);
2836 }
2837 
2838 
2839 /*
2840  * Recalibrate
2841  *
2842  * Note the extra long timeout value. This is necessary in case
2843  * the drive was in standby mode and needs to spin up the media.
2844  *
2845  */
2846 static int
2847 ata_disk_recalibrate(
2848 	ata_ctl_t	*ata_ctlp,
2849 	ata_drv_t	*ata_drvp,
2850 	ata_pkt_t	*ata_pktp)
2851 {
2852 	ADBG_TRACE(("ata_disk_recalibrate\n"));
2853 	if (ata_command(ata_ctlp, ata_drvp, TRUE, TRUE, 31 * 1000000,
2854 			ATC_RECAL, 0, 0, 0, 0, 0, 0)) {
2855 		return (ATA_FSM_RC_FINI);
2856 	}
2857 	ata_pktp->ap_flags |= AP_ERROR;
2858 	return (ATA_FSM_RC_FINI);
2859 }
2860 
2861 /*
2862  * Copy a string of bytes that were obtained by Identify Device into a
2863  * string buffer provided by the caller.
2864  *
2865  * 1. Determine the amount to copy.  This is the lesser of the
2866  *    length of the source string or the space available in the user's
2867  *    buffer.
2868  * 2. The true length of the source string is always returned to the
2869  *    caller in the size field of the argument.
2870  * 3. Copy the string, add a terminating NUL character at the end.
2871  */
2872 
2873 static int
2874 ata_copy_dk_ioc_string(intptr_t arg, char *source, int length, int flag)
2875 {
2876 	STRUCT_DECL(dadk_ioc_string, ds_arg);
2877 	int			destsize;
2878 	char			nulchar;
2879 	caddr_t			outp;
2880 
2881 	/*
2882 	 * The ioctls that use this routine are only available to
2883 	 * the kernel.
2884 	 */
2885 	if ((flag & FKIOCTL) == 0)
2886 		return (EFAULT);
2887 
2888 	STRUCT_INIT(ds_arg, flag & FMODELS);
2889 
2890 	/* 1. determine size of user's buffer */
2891 	if (ddi_copyin((caddr_t)arg, STRUCT_BUF(ds_arg), STRUCT_SIZE(ds_arg),
2892 	    flag))
2893 		return (EFAULT);
2894 	destsize = STRUCT_FGET(ds_arg, is_size);
2895 	if (destsize > length + 1)
2896 		destsize = length + 1;
2897 
2898 	/*
2899 	 * 2. Return the copied length to the caller.  Note: for
2900 	 * convenience, we actually copy the entire structure back out, not
2901 	 * just the length.  We don't change the is_buf field, so this
2902 	 * shouldn't break anything.
2903 	 */
2904 	STRUCT_FSET(ds_arg, is_size, length);
2905 	if (ddi_copyout(STRUCT_BUF(ds_arg), (caddr_t)arg, STRUCT_SIZE(ds_arg),
2906 	    flag))
2907 		return (EFAULT);
2908 
2909 	/* 3. copy the string and add a NULL terminator */
2910 	outp = STRUCT_FGETP(ds_arg, is_buf);
2911 	if (ddi_copyout(source, outp, destsize - 1, flag))
2912 		return (EFAULT);
2913 	nulchar = '\0';
2914 	if (ddi_copyout(&nulchar, outp + (destsize - 1), 1, flag))
2915 		return (EFAULT);
2916 	return (0);
2917 }
2918 
2919 /*
2920  * Sun branded drives are shipped write cache disabled.  The default is to
2921  * force write write caching on.
2922  */
2923 static void
2924 ata_set_write_cache(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp)
2925 {
2926 	char *path;
2927 
2928 	if (ata_write_cache == 1) {
2929 		if (ata_set_feature(ata_ctlp, ata_drvp, FC_WRITE_CACHE_ON, 0)
2930 		    == FALSE) {
2931 			path = kmem_alloc(MAXPATHLEN + 1, KM_NOSLEEP);
2932 			if (path != NULL) {
2933 				cmn_err(CE_WARN,
2934 				    "%s unable to enable write cache targ=%d",
2935 				    ddi_pathname(ata_ctlp->ac_dip, path),
2936 				    ata_drvp->ad_targ);
2937 				kmem_free(path, MAXPATHLEN + 1);
2938 			}
2939 		}
2940 	} else if (ata_write_cache == -1) {
2941 		if (ata_set_feature(ata_ctlp, ata_drvp, FC_WRITE_CACHE_OFF, 0)
2942 		    == FALSE) {
2943 			path = kmem_alloc(MAXPATHLEN + 1, KM_NOSLEEP);
2944 			if (path != NULL) {
2945 				cmn_err(CE_WARN,
2946 				    "%s unable to disable write cache targ=%d",
2947 				    ddi_pathname(ata_ctlp->ac_dip, path),
2948 				    ata_drvp->ad_targ);
2949 				kmem_free(path, MAXPATHLEN + 1);
2950 			}
2951 		}
2952 	}
2953 }
2954