1*5d9d9091SRichard Lowe/* 2*5d9d9091SRichard Lowe * CDDL HEADER START 3*5d9d9091SRichard Lowe * 4*5d9d9091SRichard Lowe * The contents of this file are subject to the terms of the 5*5d9d9091SRichard Lowe * Common Development and Distribution License (the "License"). 6*5d9d9091SRichard Lowe * You may not use this file except in compliance with the License. 7*5d9d9091SRichard Lowe * 8*5d9d9091SRichard Lowe * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*5d9d9091SRichard Lowe * or http://www.opensolaris.org/os/licensing. 10*5d9d9091SRichard Lowe * See the License for the specific language governing permissions 11*5d9d9091SRichard Lowe * and limitations under the License. 12*5d9d9091SRichard Lowe * 13*5d9d9091SRichard Lowe * When distributing Covered Code, include this CDDL HEADER in each 14*5d9d9091SRichard Lowe * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*5d9d9091SRichard Lowe * If applicable, add the following below this CDDL HEADER, with the 16*5d9d9091SRichard Lowe * fields enclosed by brackets "[]" replaced with your own identifying 17*5d9d9091SRichard Lowe * information: Portions Copyright [yyyy] [name of copyright owner] 18*5d9d9091SRichard Lowe * 19*5d9d9091SRichard Lowe * CDDL HEADER END 20*5d9d9091SRichard Lowe */ 21*5d9d9091SRichard Lowe/* 22*5d9d9091SRichard Lowe * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23*5d9d9091SRichard Lowe * Use is subject to license terms. 24*5d9d9091SRichard Lowe */ 25*5d9d9091SRichard Lowe 26*5d9d9091SRichard Lowe#include "assym.h" 27*5d9d9091SRichard Lowe 28*5d9d9091SRichard Lowe#include <sys/asm_linkage.h> 29*5d9d9091SRichard Lowe#include <sys/machthread.h> 30*5d9d9091SRichard Lowe#include <sys/param.h> 31*5d9d9091SRichard Lowe#include <sys/vm_machparam.h> 32*5d9d9091SRichard Lowe#include <sys/privregs.h> 33*5d9d9091SRichard Lowe#include <sys/intreg.h> 34*5d9d9091SRichard Lowe#include <sys/vis.h> 35*5d9d9091SRichard Lowe#include <sys/clock.h> 36*5d9d9091SRichard Lowe#include <vm/hat_sfmmu.h> 37*5d9d9091SRichard Lowe 38*5d9d9091SRichard Lowe .weak cpu_feature_init 39*5d9d9091SRichard Lowe .type cpu_feature_init, #function 40*5d9d9091SRichard Lowe 41*5d9d9091SRichard Lowe .weak cpu_early_feature_init 42*5d9d9091SRichard Lowe .type cpu_early_feature_init, #function 43*5d9d9091SRichard Lowe 44*5d9d9091SRichard Lowe/* 45*5d9d9091SRichard Lowe * Processor initialization 46*5d9d9091SRichard Lowe * 47*5d9d9091SRichard Lowe * This is the kernel entry point for other cpus except the first one. 48*5d9d9091SRichard Lowe * When the prom jumps to this location we are still executing with the 49*5d9d9091SRichard Lowe * prom's trap table. It expects the cpuid as its first parameter. 50*5d9d9091SRichard Lowe */ 51*5d9d9091SRichard Lowe 52*5d9d9091SRichard Lowe ! allocate a temporary stack to run on while we figure who and 53*5d9d9091SRichard Lowe ! what we are. 54*5d9d9091SRichard Lowe .seg ".data" 55*5d9d9091SRichard Lowe .align 8 56*5d9d9091SRichard Loweetmpstk: 57*5d9d9091SRichard Lowe .skip 2048 58*5d9d9091SRichard Lowetmpstk: 59*5d9d9091SRichard Lowe .word 0 60*5d9d9091SRichard Lowe 61*5d9d9091SRichard Lowe ENTRY_NP(cpu_startup) 62*5d9d9091SRichard Lowe ! 63*5d9d9091SRichard Lowe ! Initialize CPU state registers 64*5d9d9091SRichard Lowe ! 65*5d9d9091SRichard Lowe ! The boot cpu and other cpus are different. The boot cpu has gone 66*5d9d9091SRichard Lowe ! through boot, and its state might be affected as a result. The 67*5d9d9091SRichard Lowe ! other cpus' states come directly from the prom. 68*5d9d9091SRichard Lowe ! 69*5d9d9091SRichard Lowe wrpr %g0, PSTATE_KERN, %pstate 70*5d9d9091SRichard Lowe wr %g0, %g0, %fprs ! clear fprs 71*5d9d9091SRichard Lowe CLEARTICKNPT ! allow user rdtick 72*5d9d9091SRichard Lowe 73*5d9d9091SRichard Lowe ! 74*5d9d9091SRichard Lowe ! Set up temporary stack 75*5d9d9091SRichard Lowe ! 76*5d9d9091SRichard Lowe set tmpstk, %g1 77*5d9d9091SRichard Lowe sub %g1, SA(KFPUSIZE+GSR_SIZE), %g2 78*5d9d9091SRichard Lowe and %g2, 0x3F, %g3 79*5d9d9091SRichard Lowe sub %g2, %g3, %o2 80*5d9d9091SRichard Lowe sub %o2, SA(MINFRAME) + STACK_BIAS, %sp 81*5d9d9091SRichard Lowe 82*5d9d9091SRichard Lowe mov %o0, %l1 ! save cpuid 83*5d9d9091SRichard Lowe 84*5d9d9091SRichard Lowe call sfmmu_mp_startup 85*5d9d9091SRichard Lowe sub %g0, 1, THREAD_REG ! catch any curthread acceses 86*5d9d9091SRichard Lowe 87*5d9d9091SRichard Lowe ! On OPL platforms, context page size TLB programming must be enabled in 88*5d9d9091SRichard Lowe ! ASI_MEMCNTL. To avoid Olympus-C and Jupiter sTLB errata (strands with 89*5d9d9091SRichard Lowe ! different TLB page size settings), this must be done here before any 90*5d9d9091SRichard Lowe ! reference to non-nucleus memory. An early hook is added to perform 91*5d9d9091SRichard Lowe ! cpu specific initialization. 92*5d9d9091SRichard Lowe ! 93*5d9d9091SRichard Lowe sethi %hi(cpu_early_feature_init), %o0 94*5d9d9091SRichard Lowe or %o0, %lo(cpu_early_feature_init), %o0 95*5d9d9091SRichard Lowe brz %o0, 0f 96*5d9d9091SRichard Lowe nop 97*5d9d9091SRichard Lowe call %o0 98*5d9d9091SRichard Lowe nop 99*5d9d9091SRichard Lowe 100*5d9d9091SRichard Lowe0: 101*5d9d9091SRichard Lowe ! SET_KCONTEXTREG(reg0, reg1, reg2, reg3, reg4, label1, label2, label3) 102*5d9d9091SRichard Lowe SET_KCONTEXTREG(%o0, %g1, %g2, %g3, %l3, l1, l2, l3) 103*5d9d9091SRichard Lowe 104*5d9d9091SRichard Lowe ! We are now running on the kernel's trap table. 105*5d9d9091SRichard Lowe ! 106*5d9d9091SRichard Lowe ! It is very important to have a thread pointer and a cpu struct 107*5d9d9091SRichard Lowe ! *before* calling into C routines . 108*5d9d9091SRichard Lowe ! Otherwise, overflow/underflow handlers, etc. can get very upset! 109*5d9d9091SRichard Lowe ! 110*5d9d9091SRichard Lowe ! 111*5d9d9091SRichard Lowe ! We don't want to simply increment 112*5d9d9091SRichard Lowe ! ncpus right now because it is in the cache, and 113*5d9d9091SRichard Lowe ! we don't have the cache on yet for this CPU. 114*5d9d9091SRichard Lowe ! 115*5d9d9091SRichard Lowe set cpu, %l3 116*5d9d9091SRichard Lowe sll %l1, CPTRSHIFT, %l2 ! offset into CPU vector. 117*5d9d9091SRichard Lowe ldn [%l3 + %l2], %l3 ! pointer to CPU struct 118*5d9d9091SRichard Lowe ldn [%l3 + CPU_THREAD], THREAD_REG ! set thread pointer (%g7) 119*5d9d9091SRichard Lowe 120*5d9d9091SRichard Lowe ! 121*5d9d9091SRichard Lowe ! Set up any required cpu feature 122*5d9d9091SRichard Lowe ! 123*5d9d9091SRichard Lowe sethi %hi(cpu_feature_init), %o0 124*5d9d9091SRichard Lowe or %o0, %lo(cpu_feature_init), %o0 125*5d9d9091SRichard Lowe brz %o0, 1f 126*5d9d9091SRichard Lowe nop 127*5d9d9091SRichard Lowe call %o0 128*5d9d9091SRichard Lowe nop 129*5d9d9091SRichard Lowe 130*5d9d9091SRichard Lowe1: 131*5d9d9091SRichard Lowe ! 132*5d9d9091SRichard Lowe ! Resume the thread allocated for the CPU. 133*5d9d9091SRichard Lowe ! 134*5d9d9091SRichard Lowe ldn [THREAD_REG + T_PC], %i7 135*5d9d9091SRichard Lowe ldn [THREAD_REG + T_SP], %fp 136*5d9d9091SRichard Lowe ret ! "return" into the thread 137*5d9d9091SRichard Lowe restore ! WILL cause underflow 138*5d9d9091SRichard Lowe SET_SIZE(cpu_startup) 139*5d9d9091SRichard Lowe 140