1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 /* 22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26 #pragma ident "%Z%%M% %I% %E% SMI" 27 28 #include <sys/types.h> 29 #include <sys/systm.h> 30 #include <sys/archsystm.h> 31 #include <sys/t_lock.h> 32 #include <sys/uadmin.h> 33 #include <sys/panic.h> 34 #include <sys/reboot.h> 35 #include <sys/autoconf.h> 36 #include <sys/machsystm.h> 37 #include <sys/promif.h> 38 #include <sys/membar.h> 39 #include <vm/hat_sfmmu.h> 40 #include <sys/cpu_module.h> 41 #include <sys/cpu_sgnblk_defs.h> 42 #include <sys/intreg.h> 43 #include <sys/consdev.h> 44 #include <sys/kdi_impl.h> 45 #include <sys/traptrace.h> 46 #include <sys/hypervisor_api.h> 47 #include <sys/vmsystm.h> 48 #include <sys/dtrace.h> 49 #include <sys/xc_impl.h> 50 #include <sys/callb.h> 51 #include <sys/mdesc.h> 52 #include <sys/mach_descrip.h> 53 #include <sys/wdt.h> 54 #include <sys/soft_state.h> 55 #include <sys/promimpl.h> 56 #include <sys/hsvc.h> 57 #include <sys/ldoms.h> 58 59 /* 60 * hvdump_buf_va is a pointer to the currently-configured hvdump_buf. 61 * A value of NULL indicates that this area is not configured. 62 * hvdump_buf_sz is tunable but will be clamped to HVDUMP_SIZE_MAX. 63 */ 64 65 caddr_t hvdump_buf_va; 66 uint64_t hvdump_buf_sz = HVDUMP_SIZE_DEFAULT; 67 static uint64_t hvdump_buf_pa; 68 69 u_longlong_t panic_tick; 70 71 extern u_longlong_t gettick(); 72 static void reboot_machine(char *); 73 static void update_hvdump_buffer(void); 74 75 /* 76 * For xt_sync synchronization. 77 */ 78 extern uint64_t xc_tick_limit; 79 extern uint64_t xc_tick_jump_limit; 80 extern uint64_t xc_sync_tick_limit; 81 82 /* 83 * We keep our own copies, used for cache flushing, because we can be called 84 * before cpu_fiximpl(). 85 */ 86 static int kdi_dcache_size; 87 static int kdi_dcache_linesize; 88 static int kdi_icache_size; 89 static int kdi_icache_linesize; 90 91 /* 92 * Assembly support for generic modules in sun4v/ml/mach_xc.s 93 */ 94 extern void init_mondo_nocheck(xcfunc_t *func, uint64_t arg1, uint64_t arg2); 95 extern void kdi_flush_idcache(int, int, int, int); 96 extern uint64_t get_cpuaddr(uint64_t, uint64_t); 97 98 99 #define BOOT_CMD_MAX_LEN 256 100 #define BOOT_CMD_BASE "boot " 101 102 /* 103 * In an LDoms system we do not save the user's boot args in NVRAM 104 * as is done on legacy systems. Instead, we format and send a 105 * 'reboot-command' variable to the variable service. The contents 106 * of the variable are retrieved by OBP and used verbatim for 107 * the next boot. 108 */ 109 static void 110 store_boot_cmd(char *args, boolean_t add_boot_str) 111 { 112 static char cmd_buf[BOOT_CMD_MAX_LEN]; 113 size_t len = 1; 114 pnode_t node; 115 size_t base_len = 0; 116 size_t args_len; 117 size_t args_max; 118 119 if (add_boot_str) { 120 (void) strcpy(cmd_buf, BOOT_CMD_BASE); 121 122 base_len = strlen(BOOT_CMD_BASE); 123 len = base_len + 1; 124 } 125 126 if (args != NULL) { 127 args_len = strlen(args); 128 args_max = BOOT_CMD_MAX_LEN - len; 129 130 if (args_len > args_max) { 131 cmn_err(CE_WARN, "Reboot command too long (%ld), " 132 "truncating command arguments", len + args_len); 133 134 args_len = args_max; 135 } 136 137 len += args_len; 138 (void) strncpy(&cmd_buf[base_len], args, args_len); 139 } 140 141 node = prom_optionsnode(); 142 if ((node == OBP_NONODE) || (node == OBP_BADNODE) || 143 prom_setprop(node, "reboot-command", cmd_buf, len) == -1) 144 cmn_err(CE_WARN, "Unable to store boot command for " 145 "use on reboot"); 146 } 147 148 149 /* 150 * Machine dependent code to reboot. 151 * 152 * "bootstr", when non-null, points to a string to be used as the 153 * argument string when rebooting. 154 * 155 * "invoke_cb" is a boolean. It is set to true when mdboot() can safely 156 * invoke CB_CL_MDBOOT callbacks before shutting the system down, i.e. when 157 * we are in a normal shutdown sequence (interrupts are not blocked, the 158 * system is not panic'ing or being suspended). 159 */ 160 /*ARGSUSED*/ 161 void 162 mdboot(int cmd, int fcn, char *bootstr, boolean_t invoke_cb) 163 { 164 extern void pm_cfb_check_and_powerup(void); 165 166 /* 167 * XXX - rconsvp is set to NULL to ensure that output messages 168 * are sent to the underlying "hardware" device using the 169 * monitor's printf routine since we are in the process of 170 * either rebooting or halting the machine. 171 */ 172 rconsvp = NULL; 173 174 switch (fcn) { 175 case AD_HALT: 176 /* 177 * LDoms: By storing a no-op command 178 * in the 'reboot-command' variable we cause OBP 179 * to ignore the setting of 'auto-boot?' after 180 * it completes the reset. This causes the system 181 * to stop at the ok prompt. 182 */ 183 if (domaining_enabled() && invoke_cb) 184 store_boot_cmd("noop", B_FALSE); 185 break; 186 187 case AD_POWEROFF: 188 break; 189 190 default: 191 if (bootstr == NULL) { 192 switch (fcn) { 193 194 case AD_BOOT: 195 bootstr = ""; 196 break; 197 198 case AD_IBOOT: 199 bootstr = "-a"; 200 break; 201 202 case AD_SBOOT: 203 bootstr = "-s"; 204 break; 205 206 case AD_SIBOOT: 207 bootstr = "-sa"; 208 break; 209 default: 210 cmn_err(CE_WARN, 211 "mdboot: invalid function %d", fcn); 212 bootstr = ""; 213 break; 214 } 215 } 216 217 /* 218 * If LDoms is running, we must save the boot string 219 * before we enter restricted mode. This is possible 220 * only if we are not being called from panic. 221 */ 222 if (domaining_enabled() && invoke_cb) 223 store_boot_cmd(bootstr, B_TRUE); 224 } 225 226 /* 227 * At a high interrupt level we can't: 228 * 1) bring up the console 229 * or 230 * 2) wait for pending interrupts prior to redistribution 231 * to the current CPU 232 * 233 * so we do them now. 234 */ 235 pm_cfb_check_and_powerup(); 236 237 /* make sure there are no more changes to the device tree */ 238 devtree_freeze(); 239 240 if (invoke_cb) 241 (void) callb_execute_class(CB_CL_MDBOOT, NULL); 242 243 /* 244 * Clear any unresolved UEs from memory. 245 */ 246 page_retire_mdboot(); 247 248 /* 249 * stop other cpus which also raise our priority. since there is only 250 * one active cpu after this, and our priority will be too high 251 * for us to be preempted, we're essentially single threaded 252 * from here on out. 253 */ 254 stop_other_cpus(); 255 256 /* 257 * try and reset leaf devices. reset_leaves() should only 258 * be called when there are no other threads that could be 259 * accessing devices 260 */ 261 reset_leaves(); 262 263 watchdog_clear(); 264 265 if (fcn == AD_HALT) { 266 mach_set_soft_state(SIS_TRANSITION, 267 &SOLARIS_SOFT_STATE_HALT_MSG); 268 halt((char *)NULL); 269 } else if (fcn == AD_POWEROFF) { 270 mach_set_soft_state(SIS_TRANSITION, 271 &SOLARIS_SOFT_STATE_POWER_MSG); 272 power_down(NULL); 273 } else { 274 mach_set_soft_state(SIS_TRANSITION, 275 &SOLARIS_SOFT_STATE_REBOOT_MSG); 276 reboot_machine(bootstr); 277 } 278 /* MAYBE REACHED */ 279 } 280 281 /* mdpreboot - may be called prior to mdboot while root fs still mounted */ 282 /*ARGSUSED*/ 283 void 284 mdpreboot(int cmd, int fcn, char *bootstr) 285 { 286 } 287 288 /* 289 * Halt the machine and then reboot with the device 290 * and arguments specified in bootstr. 291 */ 292 static void 293 reboot_machine(char *bootstr) 294 { 295 flush_windows(); 296 stop_other_cpus(); /* send stop signal to other CPUs */ 297 prom_printf("rebooting...\n"); 298 /* 299 * For platforms that use CPU signatures, we 300 * need to set the signature block to OS and 301 * the state to exiting for all the processors. 302 */ 303 CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_REBOOT, -1); 304 prom_reboot(bootstr); 305 /*NOTREACHED*/ 306 } 307 308 /* 309 * We use the x-trap mechanism and idle_stop_xcall() to stop the other CPUs. 310 * Once in panic_idle() they raise spl, record their location, and spin. 311 */ 312 static void 313 panic_idle(void) 314 { 315 (void) spl7(); 316 317 debug_flush_windows(); 318 (void) setjmp(&curthread->t_pcb); 319 320 CPU->cpu_m.in_prom = 1; 321 membar_stld(); 322 323 for (;;) 324 ; 325 } 326 327 /* 328 * Force the other CPUs to trap into panic_idle(), and then remove them 329 * from the cpu_ready_set so they will no longer receive cross-calls. 330 */ 331 /*ARGSUSED*/ 332 void 333 panic_stopcpus(cpu_t *cp, kthread_t *t, int spl) 334 { 335 cpuset_t cps; 336 int i; 337 338 (void) splzs(); 339 CPUSET_ALL_BUT(cps, cp->cpu_id); 340 xt_some(cps, (xcfunc_t *)idle_stop_xcall, (uint64_t)&panic_idle, NULL); 341 342 for (i = 0; i < NCPU; i++) { 343 if (i != cp->cpu_id && CPU_XCALL_READY(i)) { 344 int ntries = 0x10000; 345 346 while (!cpu[i]->cpu_m.in_prom && ntries) { 347 DELAY(50); 348 ntries--; 349 } 350 351 if (!cpu[i]->cpu_m.in_prom) 352 printf("panic: failed to stop cpu%d\n", i); 353 354 cpu[i]->cpu_flags &= ~CPU_READY; 355 cpu[i]->cpu_flags |= CPU_QUIESCED; 356 CPUSET_DEL(cpu_ready_set, cpu[i]->cpu_id); 357 } 358 } 359 } 360 361 /* 362 * Platform callback following each entry to panicsys(). If we've panicked at 363 * level 14, we examine t_panic_trap to see if a fatal trap occurred. If so, 364 * we disable further %tick_cmpr interrupts. If not, an explicit call to panic 365 * was made and so we re-enqueue an interrupt request structure to allow 366 * further level 14 interrupts to be processed once we lower PIL. This allows 367 * us to handle panics from the deadman() CY_HIGH_LEVEL cyclic. 368 */ 369 void 370 panic_enter_hw(int spl) 371 { 372 if (!panic_tick) { 373 panic_tick = gettick(); 374 if (mach_htraptrace_enable) { 375 uint64_t prev_freeze; 376 377 /* there are no possible error codes for this hcall */ 378 (void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL, 379 &prev_freeze); 380 } 381 #ifdef TRAPTRACE 382 TRAPTRACE_FREEZE; 383 #endif 384 } 385 386 mach_set_soft_state(SIS_TRANSITION, &SOLARIS_SOFT_STATE_PANIC_MSG); 387 388 if (spl == ipltospl(PIL_14)) { 389 uint_t opstate = disable_vec_intr(); 390 391 if (curthread->t_panic_trap != NULL) { 392 tickcmpr_disable(); 393 intr_dequeue_req(PIL_14, cbe_level14_inum); 394 } else { 395 if (!tickcmpr_disabled()) 396 intr_enqueue_req(PIL_14, cbe_level14_inum); 397 /* 398 * Clear SOFTINT<14>, SOFTINT<0> (TICK_INT) 399 * and SOFTINT<16> (STICK_INT) to indicate 400 * that the current level 14 has been serviced. 401 */ 402 wr_clr_softint((1 << PIL_14) | 403 TICK_INT_MASK | STICK_INT_MASK); 404 } 405 406 enable_vec_intr(opstate); 407 } 408 } 409 410 /* 411 * Miscellaneous hardware-specific code to execute after panicstr is set 412 * by the panic code: we also print and record PTL1 panic information here. 413 */ 414 /*ARGSUSED*/ 415 void 416 panic_quiesce_hw(panic_data_t *pdp) 417 { 418 extern uint_t getpstate(void); 419 extern void setpstate(uint_t); 420 421 /* 422 * Turn off TRAPTRACE and save the current %tick value in panic_tick. 423 */ 424 if (!panic_tick) { 425 panic_tick = gettick(); 426 if (mach_htraptrace_enable) { 427 uint64_t prev_freeze; 428 429 /* there are no possible error codes for this hcall */ 430 (void) hv_ttrace_freeze((uint64_t)TRAP_TFREEZE_ALL, 431 &prev_freeze); 432 } 433 #ifdef TRAPTRACE 434 TRAPTRACE_FREEZE; 435 #endif 436 } 437 /* 438 * For Platforms that use CPU signatures, we 439 * need to set the signature block to OS, the state to 440 * exiting, and the substate to panic for all the processors. 441 */ 442 CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_PANIC, -1); 443 444 update_hvdump_buffer(); 445 446 /* 447 * Disable further ECC errors from the bus nexus. 448 */ 449 (void) bus_func_invoke(BF_TYPE_ERRDIS); 450 451 /* 452 * Redirect all interrupts to the current CPU. 453 */ 454 intr_redist_all_cpus_shutdown(); 455 456 /* 457 * This call exists solely to support dumps to network 458 * devices after sync from OBP. 459 * 460 * If we came here via the sync callback, then on some 461 * platforms, interrupts may have arrived while we were 462 * stopped in OBP. OBP will arrange for those interrupts to 463 * be redelivered if you say "go", but not if you invoke a 464 * client callback like 'sync'. For some dump devices 465 * (network swap devices), we need interrupts to be 466 * delivered in order to dump, so we have to call the bus 467 * nexus driver to reset the interrupt state machines. 468 */ 469 (void) bus_func_invoke(BF_TYPE_RESINTR); 470 471 setpstate(getpstate() | PSTATE_IE); 472 } 473 474 /* 475 * Platforms that use CPU signatures need to set the signature block to OS and 476 * the state to exiting for all CPUs. PANIC_CONT indicates that we're about to 477 * write the crash dump, which tells the SSP/SMS to begin a timeout routine to 478 * reboot the machine if the dump never completes. 479 */ 480 /*ARGSUSED*/ 481 void 482 panic_dump_hw(int spl) 483 { 484 CPU_SIGNATURE(OS_SIG, SIGST_EXIT, SIGSUBST_DUMP, -1); 485 } 486 487 /* 488 * for ptl1_panic 489 */ 490 void 491 ptl1_init_cpu(struct cpu *cpu) 492 { 493 ptl1_state_t *pstate = &cpu->cpu_m.ptl1_state; 494 495 /*CONSTCOND*/ 496 if (sizeof (struct cpu) + PTL1_SSIZE > CPU_ALLOC_SIZE) { 497 panic("ptl1_init_cpu: not enough space left for ptl1_panic " 498 "stack, sizeof (struct cpu) = %lu", 499 (unsigned long)sizeof (struct cpu)); 500 } 501 502 pstate->ptl1_stktop = (uintptr_t)cpu + CPU_ALLOC_SIZE; 503 cpu_pa[cpu->cpu_id] = va_to_pa(cpu); 504 } 505 506 void 507 ptl1_panic_handler(ptl1_state_t *pstate) 508 { 509 static const char *ptl1_reasons[] = { 510 #ifdef PTL1_PANIC_DEBUG 511 "trap for debug purpose", /* PTL1_BAD_DEBUG */ 512 #else 513 "unknown trap", /* PTL1_BAD_DEBUG */ 514 #endif 515 "register window trap", /* PTL1_BAD_WTRAP */ 516 "kernel MMU miss", /* PTL1_BAD_KMISS */ 517 "kernel protection fault", /* PTL1_BAD_KPROT_FAULT */ 518 "ISM MMU miss", /* PTL1_BAD_ISM */ 519 "kernel MMU trap", /* PTL1_BAD_MMUTRAP */ 520 "kernel trap handler state", /* PTL1_BAD_TRAP */ 521 "floating point trap", /* PTL1_BAD_FPTRAP */ 522 #ifdef DEBUG 523 "pointer to intr_vec", /* PTL1_BAD_INTR_VEC */ 524 #else 525 "unknown trap", /* PTL1_BAD_INTR_VEC */ 526 #endif 527 #ifdef TRAPTRACE 528 "TRACE_PTR state", /* PTL1_BAD_TRACE_PTR */ 529 #else 530 "unknown trap", /* PTL1_BAD_TRACE_PTR */ 531 #endif 532 "stack overflow", /* PTL1_BAD_STACK */ 533 "DTrace flags", /* PTL1_BAD_DTRACE_FLAGS */ 534 "attempt to steal locked ctx", /* PTL1_BAD_CTX_STEAL */ 535 "CPU ECC error loop", /* PTL1_BAD_ECC */ 536 "unexpected error from hypervisor call", /* PTL1_BAD_HCALL */ 537 "unexpected global level(%gl)", /* PTL1_BAD_GL */ 538 "Watchdog Reset", /* PTL1_BAD_WATCHDOG */ 539 "unexpected RED mode trap", /* PTL1_BAD_RED */ 540 "return value EINVAL from hcall: "\ 541 "UNMAP_PERM_ADDR", /* PTL1_BAD_HCALL_UNMAP_PERM_EINVAL */ 542 "return value ENOMAP from hcall: "\ 543 "UNMAP_PERM_ADDR", /* PTL1_BAD_HCALL_UNMAP_PERM_ENOMAP */ 544 "error raising a TSB exception", /* PTL1_BAD_RAISE_TSBEXCP */ 545 "missing shared TSB" /* PTL1_NO_SCDTSB8K */ 546 }; 547 548 uint_t reason = pstate->ptl1_regs.ptl1_gregs[0].ptl1_g1; 549 uint_t tl = pstate->ptl1_regs.ptl1_trap_regs[0].ptl1_tl; 550 struct panic_trap_info ti = { 0 }; 551 552 /* 553 * Use trap_info for a place holder to call panic_savetrap() and 554 * panic_showtrap() to save and print out ptl1_panic information. 555 */ 556 if (curthread->t_panic_trap == NULL) 557 curthread->t_panic_trap = &ti; 558 559 if (reason < sizeof (ptl1_reasons) / sizeof (ptl1_reasons[0])) 560 panic("bad %s at TL %u", ptl1_reasons[reason], tl); 561 else 562 panic("ptl1_panic reason 0x%x at TL %u", reason, tl); 563 } 564 565 void 566 clear_watchdog_on_exit(void) 567 { 568 if (watchdog_enabled && watchdog_activated) { 569 prom_printf("Debugging requested; hardware watchdog " 570 "suspended.\n"); 571 (void) watchdog_suspend(); 572 } 573 } 574 575 /* 576 * Restore the watchdog timer when returning from a debugger 577 * after a panic or L1-A and resume watchdog pat. 578 */ 579 void 580 restore_watchdog_on_entry() 581 { 582 watchdog_resume(); 583 } 584 585 int 586 kdi_watchdog_disable(void) 587 { 588 watchdog_suspend(); 589 590 return (0); 591 } 592 593 void 594 kdi_watchdog_restore(void) 595 { 596 watchdog_resume(); 597 } 598 599 void 600 mach_dump_buffer_init(void) 601 { 602 uint64_t ret, minsize = 0; 603 604 if (hvdump_buf_sz > HVDUMP_SIZE_MAX) 605 hvdump_buf_sz = HVDUMP_SIZE_MAX; 606 607 hvdump_buf_va = contig_mem_alloc_align(hvdump_buf_sz, PAGESIZE); 608 if (hvdump_buf_va == NULL) 609 return; 610 611 hvdump_buf_pa = va_to_pa(hvdump_buf_va); 612 613 ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz, 614 &minsize); 615 616 if (ret != H_EOK) { 617 contig_mem_free(hvdump_buf_va, hvdump_buf_sz); 618 hvdump_buf_va = NULL; 619 cmn_err(CE_NOTE, "!Error in setting up hvstate" 620 "dump buffer. Error = 0x%lx, size = 0x%lx," 621 "buf_pa = 0x%lx", ret, hvdump_buf_sz, 622 hvdump_buf_pa); 623 624 if (ret == H_EINVAL) { 625 cmn_err(CE_NOTE, "!Buffer size too small." 626 "Available buffer size = 0x%lx," 627 "Minimum buffer size required = 0x%lx", 628 hvdump_buf_sz, minsize); 629 } 630 } 631 } 632 633 634 static void 635 update_hvdump_buffer(void) 636 { 637 uint64_t ret, dummy_val; 638 639 if (hvdump_buf_va == NULL) 640 return; 641 642 ret = hv_dump_buf_update(hvdump_buf_pa, hvdump_buf_sz, 643 &dummy_val); 644 if (ret != H_EOK) { 645 cmn_err(CE_NOTE, "!Cannot update hvstate dump" 646 "buffer. Error = 0x%lx", ret); 647 } 648 } 649 650 651 static int 652 getintprop(pnode_t node, char *name, int deflt) 653 { 654 int value; 655 656 switch (prom_getproplen(node, name)) { 657 case 0: 658 value = 1; /* boolean properties */ 659 break; 660 661 case sizeof (int): 662 (void) prom_getprop(node, name, (caddr_t)&value); 663 break; 664 665 default: 666 value = deflt; 667 break; 668 } 669 670 return (value); 671 } 672 673 /* 674 * Called by setcpudelay 675 */ 676 void 677 cpu_init_tick_freq(void) 678 { 679 md_t *mdp; 680 mde_cookie_t rootnode; 681 int listsz; 682 mde_cookie_t *listp = NULL; 683 int num_nodes; 684 uint64_t stick_prop; 685 686 if (broken_md_flag) { 687 sys_tick_freq = cpunodes[CPU->cpu_id].clock_freq; 688 return; 689 } 690 691 if ((mdp = md_get_handle()) == NULL) 692 panic("stick_frequency property not found in MD"); 693 694 rootnode = md_root_node(mdp); 695 ASSERT(rootnode != MDE_INVAL_ELEM_COOKIE); 696 697 num_nodes = md_node_count(mdp); 698 699 ASSERT(num_nodes > 0); 700 listsz = num_nodes * sizeof (mde_cookie_t); 701 listp = (mde_cookie_t *)prom_alloc((caddr_t)0, listsz, 0); 702 703 if (listp == NULL) 704 panic("cannot allocate list for MD properties"); 705 706 num_nodes = md_scan_dag(mdp, rootnode, md_find_name(mdp, "platform"), 707 md_find_name(mdp, "fwd"), listp); 708 709 ASSERT(num_nodes == 1); 710 711 if (md_get_prop_val(mdp, *listp, "stick-frequency", &stick_prop) != 0) 712 panic("stick_frequency property not found in MD"); 713 714 sys_tick_freq = stick_prop; 715 716 prom_free((caddr_t)listp, listsz); 717 (void) md_fini_handle(mdp); 718 } 719 720 int shipit(int n, uint64_t cpu_list_ra); 721 722 #ifdef DEBUG 723 #define SEND_MONDO_STATS 1 724 #endif 725 726 #ifdef SEND_MONDO_STATS 727 uint32_t x_one_stimes[64]; 728 uint32_t x_one_ltimes[16]; 729 uint32_t x_set_stimes[64]; 730 uint32_t x_set_ltimes[16]; 731 uint32_t x_set_cpus[NCPU]; 732 #endif 733 734 void 735 send_one_mondo(int cpuid) 736 { 737 int retries, stat; 738 uint64_t starttick, endtick, tick, lasttick; 739 struct machcpu *mcpup = &(CPU->cpu_m); 740 741 CPU_STATS_ADDQ(CPU, sys, xcalls, 1); 742 starttick = lasttick = gettick(); 743 mcpup->cpu_list[0] = (uint16_t)cpuid; 744 stat = shipit(1, mcpup->cpu_list_ra); 745 endtick = starttick + xc_tick_limit; 746 retries = 0; 747 while (stat != H_EOK) { 748 if (stat != H_EWOULDBLOCK) { 749 if (panic_quiesce) 750 return; 751 if (stat == H_ECPUERROR) 752 cmn_err(CE_PANIC, "send_one_mondo: " 753 "cpuid: 0x%x has been marked in " 754 "error", cpuid); 755 else 756 cmn_err(CE_PANIC, "send_one_mondo: " 757 "unexpected hypervisor error 0x%x " 758 "while sending a mondo to cpuid: " 759 "0x%x", stat, cpuid); 760 } 761 tick = gettick(); 762 /* 763 * If there is a big jump between the current tick 764 * count and lasttick, we have probably hit a break 765 * point. Adjust endtick accordingly to avoid panic. 766 */ 767 if (tick > (lasttick + xc_tick_jump_limit)) 768 endtick += (tick - lasttick); 769 lasttick = tick; 770 if (tick > endtick) { 771 if (panic_quiesce) 772 return; 773 cmn_err(CE_PANIC, "send mondo timeout " 774 "(target 0x%x) [retries: 0x%x hvstat: 0x%x]", 775 cpuid, retries, stat); 776 } 777 drv_usecwait(1); 778 stat = shipit(1, mcpup->cpu_list_ra); 779 retries++; 780 } 781 #ifdef SEND_MONDO_STATS 782 { 783 uint64_t n = gettick() - starttick; 784 if (n < 8192) 785 x_one_stimes[n >> 7]++; 786 else if (n < 15*8192) 787 x_one_ltimes[n >> 13]++; 788 else 789 x_one_ltimes[0xf]++; 790 } 791 #endif 792 } 793 794 void 795 send_mondo_set(cpuset_t set) 796 { 797 uint64_t starttick, endtick, tick, lasttick; 798 uint_t largestid, smallestid; 799 int i, j; 800 int ncpuids = 0; 801 int shipped = 0; 802 int retries = 0; 803 struct machcpu *mcpup = &(CPU->cpu_m); 804 805 ASSERT(!CPUSET_ISNULL(set)); 806 CPUSET_BOUNDS(set, smallestid, largestid); 807 if (smallestid == CPUSET_NOTINSET) { 808 return; 809 } 810 811 starttick = lasttick = gettick(); 812 endtick = starttick + xc_tick_limit; 813 814 /* 815 * Assemble CPU list for HV argument. We already know 816 * smallestid and largestid are members of set. 817 */ 818 mcpup->cpu_list[ncpuids++] = (uint16_t)smallestid; 819 if (largestid != smallestid) { 820 for (i = smallestid+1; i <= largestid-1; i++) { 821 if (CPU_IN_SET(set, i)) { 822 mcpup->cpu_list[ncpuids++] = (uint16_t)i; 823 } 824 } 825 mcpup->cpu_list[ncpuids++] = (uint16_t)largestid; 826 } 827 828 do { 829 int stat; 830 831 stat = shipit(ncpuids, mcpup->cpu_list_ra); 832 if (stat == H_EOK) { 833 shipped += ncpuids; 834 break; 835 } 836 837 /* 838 * Either not all CPU mondos were sent, or an 839 * error occurred. CPUs that were sent mondos 840 * have their CPU IDs overwritten in cpu_list. 841 * Reset cpu_list so that it only holds those 842 * CPU IDs that still need to be sent. 843 */ 844 for (i = 0, j = 0; i < ncpuids; i++) { 845 if (mcpup->cpu_list[i] == HV_SEND_MONDO_ENTRYDONE) { 846 shipped++; 847 } else { 848 mcpup->cpu_list[j++] = mcpup->cpu_list[i]; 849 } 850 } 851 ncpuids = j; 852 853 /* 854 * Now handle possible errors returned 855 * from hypervisor. 856 */ 857 if (stat == H_ECPUERROR) { 858 int errorcpus; 859 860 if (!panic_quiesce) 861 cmn_err(CE_CONT, "send_mondo_set: cpuid(s) "); 862 863 /* 864 * Remove any CPUs in the error state from 865 * cpu_list. At this point cpu_list only 866 * contains the CPU IDs for mondos not 867 * succesfully sent. 868 */ 869 for (i = 0, errorcpus = 0; i < ncpuids; i++) { 870 uint64_t state = CPU_STATE_INVALID; 871 uint16_t id = mcpup->cpu_list[i]; 872 873 (void) hv_cpu_state(id, &state); 874 if (state == CPU_STATE_ERROR) { 875 if (!panic_quiesce) 876 cmn_err(CE_CONT, "0x%x ", id); 877 errorcpus++; 878 } else if (errorcpus > 0) { 879 mcpup->cpu_list[i - errorcpus] = 880 mcpup->cpu_list[i]; 881 } 882 } 883 ncpuids -= errorcpus; 884 885 if (!panic_quiesce) { 886 if (errorcpus == 0) { 887 cmn_err(CE_CONT, "<none> have been " 888 "marked in error\n"); 889 cmn_err(CE_PANIC, "send_mondo_set: " 890 "hypervisor returned " 891 "H_ECPUERROR but no CPU in " 892 "cpu_list in error state"); 893 } else { 894 cmn_err(CE_CONT, "have been marked in " 895 "error\n"); 896 cmn_err(CE_PANIC, "send_mondo_set: " 897 "CPU(s) in error state"); 898 } 899 } 900 } else if (stat != H_EWOULDBLOCK) { 901 if (panic_quiesce) 902 return; 903 /* 904 * For all other errors, panic. 905 */ 906 cmn_err(CE_CONT, "send_mondo_set: unexpected " 907 "hypervisor error 0x%x while sending a " 908 "mondo to cpuid(s):", stat); 909 for (i = 0; i < ncpuids; i++) { 910 cmn_err(CE_CONT, " 0x%x", mcpup->cpu_list[i]); 911 } 912 cmn_err(CE_CONT, "\n"); 913 cmn_err(CE_PANIC, "send_mondo_set: unexpected " 914 "hypervisor error"); 915 } 916 917 tick = gettick(); 918 /* 919 * If there is a big jump between the current tick 920 * count and lasttick, we have probably hit a break 921 * point. Adjust endtick accordingly to avoid panic. 922 */ 923 if (tick > (lasttick + xc_tick_jump_limit)) 924 endtick += (tick - lasttick); 925 lasttick = tick; 926 if (tick > endtick) { 927 if (panic_quiesce) 928 return; 929 cmn_err(CE_CONT, "send mondo timeout " 930 "[retries: 0x%x] cpuids: ", retries); 931 for (i = 0; i < ncpuids; i++) 932 cmn_err(CE_CONT, " 0x%x", mcpup->cpu_list[i]); 933 cmn_err(CE_CONT, "\n"); 934 cmn_err(CE_PANIC, "send_mondo_set: timeout"); 935 } 936 937 while (gettick() < (tick + sys_clock_mhz)) 938 ; 939 retries++; 940 } while (ncpuids > 0); 941 942 CPU_STATS_ADDQ(CPU, sys, xcalls, shipped); 943 944 #ifdef SEND_MONDO_STATS 945 { 946 uint64_t n = gettick() - starttick; 947 if (n < 8192) 948 x_set_stimes[n >> 7]++; 949 else if (n < 15*8192) 950 x_set_ltimes[n >> 13]++; 951 else 952 x_set_ltimes[0xf]++; 953 } 954 x_set_cpus[shipped]++; 955 #endif 956 } 957 958 void 959 syncfpu(void) 960 { 961 } 962 963 void 964 sticksync_slave(void) 965 {} 966 967 void 968 sticksync_master(void) 969 {} 970 971 void 972 cpu_init_cache_scrub(void) 973 { 974 mach_set_soft_state(SIS_NORMAL, &SOLARIS_SOFT_STATE_RUN_MSG); 975 } 976 977 int 978 dtrace_blksuword32_err(uintptr_t addr, uint32_t *data) 979 { 980 int ret, watched; 981 982 watched = watch_disable_addr((void *)addr, 4, S_WRITE); 983 ret = dtrace_blksuword32(addr, data, 0); 984 if (watched) 985 watch_enable_addr((void *)addr, 4, S_WRITE); 986 987 return (ret); 988 } 989 990 int 991 dtrace_blksuword32(uintptr_t addr, uint32_t *data, int tryagain) 992 { 993 if (suword32((void *)addr, *data) == -1) 994 return (tryagain ? dtrace_blksuword32_err(addr, data) : -1); 995 dtrace_flush_sec(addr); 996 997 return (0); 998 } 999 1000 /*ARGSUSED*/ 1001 void 1002 cpu_faulted_enter(struct cpu *cp) 1003 { 1004 } 1005 1006 /*ARGSUSED*/ 1007 void 1008 cpu_faulted_exit(struct cpu *cp) 1009 { 1010 } 1011 1012 static int 1013 kdi_cpu_ready_iter(int (*cb)(int, void *), void *arg) 1014 { 1015 int rc, i; 1016 1017 for (rc = 0, i = 0; i < NCPU; i++) { 1018 if (CPU_IN_SET(cpu_ready_set, i)) 1019 rc += cb(i, arg); 1020 } 1021 1022 return (rc); 1023 } 1024 1025 /* 1026 * Sends a cross-call to a specified processor. The caller assumes 1027 * responsibility for repetition of cross-calls, as appropriate (MARSA for 1028 * debugging). 1029 */ 1030 static int 1031 kdi_xc_one(int cpuid, void (*func)(uintptr_t, uintptr_t), uintptr_t arg1, 1032 uintptr_t arg2) 1033 { 1034 int stat; 1035 struct machcpu *mcpup; 1036 uint64_t cpuaddr_reg = 0, cpuaddr_scr = 0; 1037 1038 mcpup = &(((cpu_t *)get_cpuaddr(cpuaddr_reg, cpuaddr_scr))->cpu_m); 1039 1040 /* 1041 * if (idsr_busy()) 1042 * return (KDI_XC_RES_ERR); 1043 */ 1044 1045 init_mondo_nocheck((xcfunc_t *)func, arg1, arg2); 1046 1047 mcpup->cpu_list[0] = (uint16_t)cpuid; 1048 stat = shipit(1, mcpup->cpu_list_ra); 1049 1050 if (stat == 0) 1051 return (KDI_XC_RES_OK); 1052 else 1053 return (KDI_XC_RES_NACK); 1054 } 1055 1056 static void 1057 kdi_tickwait(clock_t nticks) 1058 { 1059 clock_t endtick = gettick() + nticks; 1060 1061 while (gettick() < endtick) 1062 ; 1063 } 1064 1065 static void 1066 kdi_cpu_init(int dcache_size, int dcache_linesize, int icache_size, 1067 int icache_linesize) 1068 { 1069 kdi_dcache_size = dcache_size; 1070 kdi_dcache_linesize = dcache_linesize; 1071 kdi_icache_size = icache_size; 1072 kdi_icache_linesize = icache_linesize; 1073 } 1074 1075 /* used directly by kdi_read/write_phys */ 1076 void 1077 kdi_flush_caches(void) 1078 { 1079 /* Not required on sun4v architecture. */ 1080 } 1081 1082 /*ARGSUSED*/ 1083 int 1084 kdi_get_stick(uint64_t *stickp) 1085 { 1086 return (-1); 1087 } 1088 1089 void 1090 cpu_kdi_init(kdi_t *kdi) 1091 { 1092 kdi->kdi_flush_caches = kdi_flush_caches; 1093 kdi->mkdi_cpu_init = kdi_cpu_init; 1094 kdi->mkdi_cpu_ready_iter = kdi_cpu_ready_iter; 1095 kdi->mkdi_xc_one = kdi_xc_one; 1096 kdi->mkdi_tickwait = kdi_tickwait; 1097 kdi->mkdi_get_stick = kdi_get_stick; 1098 } 1099 1100 uint64_t soft_state_message_ra[SOLARIS_SOFT_STATE_MSG_CNT]; 1101 static uint64_t soft_state_saved_state = (uint64_t)-1; 1102 static int soft_state_initialized = 0; 1103 static uint64_t soft_state_sup_minor; /* Supported minor number */ 1104 static hsvc_info_t soft_state_hsvc = { 1105 HSVC_REV_1, NULL, HSVC_GROUP_SOFT_STATE, 1, 0, NULL }; 1106 1107 1108 static void 1109 sun4v_system_claim(void) 1110 { 1111 watchdog_suspend(); 1112 /* 1113 * For "mdb -K", set soft state to debugging 1114 */ 1115 if (soft_state_saved_state == -1) { 1116 mach_get_soft_state(&soft_state_saved_state, 1117 &SOLARIS_SOFT_STATE_SAVED_MSG); 1118 } 1119 /* 1120 * check again as the read above may or may not have worked and if 1121 * it didn't then soft state will still be -1 1122 */ 1123 if (soft_state_saved_state != -1) { 1124 mach_set_soft_state(SIS_TRANSITION, 1125 &SOLARIS_SOFT_STATE_DEBUG_MSG); 1126 } 1127 } 1128 1129 static void 1130 sun4v_system_release(void) 1131 { 1132 watchdog_resume(); 1133 /* 1134 * For "mdb -K", set soft_state state back to original state on exit 1135 */ 1136 if (soft_state_saved_state != -1) { 1137 mach_set_soft_state(soft_state_saved_state, 1138 &SOLARIS_SOFT_STATE_SAVED_MSG); 1139 soft_state_saved_state = -1; 1140 } 1141 } 1142 1143 void 1144 plat_kdi_init(kdi_t *kdi) 1145 { 1146 kdi->pkdi_system_claim = sun4v_system_claim; 1147 kdi->pkdi_system_release = sun4v_system_release; 1148 } 1149 1150 /* 1151 * Routine to return memory information associated 1152 * with a physical address and syndrome. 1153 */ 1154 /* ARGSUSED */ 1155 int 1156 cpu_get_mem_info(uint64_t synd, uint64_t afar, 1157 uint64_t *mem_sizep, uint64_t *seg_sizep, uint64_t *bank_sizep, 1158 int *segsp, int *banksp, int *mcidp) 1159 { 1160 return (ENOTSUP); 1161 } 1162 1163 /* 1164 * This routine returns the size of the kernel's FRU name buffer. 1165 */ 1166 size_t 1167 cpu_get_name_bufsize() 1168 { 1169 return (UNUM_NAMLEN); 1170 } 1171 1172 /* 1173 * This routine is a more generic interface to cpu_get_mem_unum(), 1174 * that may be used by other modules (e.g. mm). 1175 */ 1176 /* ARGSUSED */ 1177 int 1178 cpu_get_mem_name(uint64_t synd, uint64_t *afsr, uint64_t afar, 1179 char *buf, int buflen, int *lenp) 1180 { 1181 return (ENOTSUP); 1182 } 1183 1184 /* ARGSUSED */ 1185 int 1186 cpu_get_mem_sid(char *unum, char *buf, int buflen, int *lenp) 1187 { 1188 return (ENOTSUP); 1189 } 1190 1191 /* ARGSUSED */ 1192 int 1193 cpu_get_mem_addr(char *unum, char *sid, uint64_t offset, uint64_t *addrp) 1194 { 1195 return (ENOTSUP); 1196 } 1197 1198 /* 1199 * xt_sync - wait for previous x-traps to finish 1200 */ 1201 void 1202 xt_sync(cpuset_t cpuset) 1203 { 1204 union { 1205 uint8_t volatile byte[NCPU]; 1206 uint64_t volatile xword[NCPU / 8]; 1207 } cpu_sync; 1208 uint64_t starttick, endtick, tick, lasttick, traptrace_id; 1209 uint_t largestid, smallestid; 1210 int i, j; 1211 1212 kpreempt_disable(); 1213 CPUSET_DEL(cpuset, CPU->cpu_id); 1214 CPUSET_AND(cpuset, cpu_ready_set); 1215 1216 CPUSET_BOUNDS(cpuset, smallestid, largestid); 1217 if (smallestid == CPUSET_NOTINSET) 1218 goto out; 1219 1220 /* 1221 * Sun4v uses a queue for receiving mondos. Successful 1222 * transmission of a mondo only indicates that the mondo 1223 * has been written into the queue. 1224 * 1225 * We use an array of bytes to let each cpu to signal back 1226 * to the cross trap sender that the cross trap has been 1227 * executed. Set the byte to 1 before sending the cross trap 1228 * and wait until other cpus reset it to 0. 1229 */ 1230 bzero((void *)&cpu_sync, NCPU); 1231 cpu_sync.byte[smallestid] = 1; 1232 if (largestid != smallestid) { 1233 for (i = (smallestid + 1); i <= (largestid - 1); i++) 1234 if (CPU_IN_SET(cpuset, i)) 1235 cpu_sync.byte[i] = 1; 1236 cpu_sync.byte[largestid] = 1; 1237 } 1238 1239 /* 1240 * To help debug xt_sync panic, each mondo is uniquely identified 1241 * by passing the tick value, traptrace_id as the second mondo 1242 * argument to xt_some which is logged in CPU's mondo queue, 1243 * traptrace buffer and the panic message. 1244 */ 1245 traptrace_id = gettick(); 1246 xt_some(cpuset, (xcfunc_t *)xt_sync_tl1, 1247 (uint64_t)cpu_sync.byte, traptrace_id); 1248 1249 starttick = lasttick = gettick(); 1250 endtick = starttick + xc_sync_tick_limit; 1251 1252 for (i = (smallestid / 8); i <= (largestid / 8); i++) { 1253 while (cpu_sync.xword[i] != 0) { 1254 tick = gettick(); 1255 /* 1256 * If there is a big jump between the current tick 1257 * count and lasttick, we have probably hit a break 1258 * point. Adjust endtick accordingly to avoid panic. 1259 */ 1260 if (tick > (lasttick + xc_tick_jump_limit)) { 1261 endtick += (tick - lasttick); 1262 } 1263 lasttick = tick; 1264 if (tick > endtick) { 1265 if (panic_quiesce) 1266 goto out; 1267 cmn_err(CE_CONT, "Cross trap sync timeout: " 1268 "at cpu_sync.xword[%d]: 0x%lx " 1269 "cpu_sync.byte: 0x%lx " 1270 "starttick: 0x%lx endtick: 0x%lx " 1271 "traptrace_id = 0x%lx\n", 1272 i, cpu_sync.xword[i], 1273 (uint64_t)cpu_sync.byte, 1274 starttick, endtick, traptrace_id); 1275 cmn_err(CE_CONT, "CPUIDs:"); 1276 for (j = (i * 8); j <= largestid; j++) { 1277 if (cpu_sync.byte[j] != 0) 1278 cmn_err(CE_CONT, " 0x%x", j); 1279 } 1280 cmn_err(CE_PANIC, "xt_sync: timeout"); 1281 } 1282 } 1283 } 1284 1285 out: 1286 kpreempt_enable(); 1287 } 1288 1289 #define QFACTOR 200 1290 /* 1291 * Recalculate the values of the cross-call timeout variables based 1292 * on the value of the 'inter-cpu-latency' property of the platform node. 1293 * The property sets the number of nanosec to wait for a cross-call 1294 * to be acknowledged. Other timeout variables are derived from it. 1295 * 1296 * N.B. This implementation is aware of the internals of xc_init() 1297 * and updates many of the same variables. 1298 */ 1299 void 1300 recalc_xc_timeouts(void) 1301 { 1302 typedef union { 1303 uint64_t whole; 1304 struct { 1305 uint_t high; 1306 uint_t low; 1307 } half; 1308 } u_number; 1309 1310 /* See x_call.c for descriptions of these extern variables. */ 1311 extern uint64_t xc_tick_limit_scale; 1312 extern uint64_t xc_mondo_time_limit; 1313 extern uint64_t xc_func_time_limit; 1314 extern uint64_t xc_scale; 1315 extern uint64_t xc_mondo_multiplier; 1316 extern uint_t nsec_shift; 1317 1318 /* Temp versions of the target variables */ 1319 uint64_t tick_limit; 1320 uint64_t tick_jump_limit; 1321 uint64_t mondo_time_limit; 1322 uint64_t func_time_limit; 1323 uint64_t scale; 1324 1325 uint64_t latency; /* nanoseconds */ 1326 uint64_t maxfreq; 1327 uint64_t tick_limit_save = xc_tick_limit; 1328 uint64_t sync_tick_limit_save = xc_sync_tick_limit; 1329 uint_t tick_scale; 1330 uint64_t top; 1331 uint64_t bottom; 1332 u_number tk; 1333 1334 md_t *mdp; 1335 int nrnode; 1336 mde_cookie_t *platlist; 1337 1338 /* 1339 * Look up the 'inter-cpu-latency' (optional) property in the 1340 * platform node of the MD. The units are nanoseconds. 1341 */ 1342 if ((mdp = md_get_handle()) == NULL) { 1343 cmn_err(CE_WARN, "recalc_xc_timeouts: " 1344 "Unable to initialize machine description"); 1345 return; 1346 } 1347 1348 nrnode = md_alloc_scan_dag(mdp, 1349 md_root_node(mdp), "platform", "fwd", &platlist); 1350 1351 ASSERT(nrnode == 1); 1352 if (nrnode < 1) { 1353 cmn_err(CE_WARN, "recalc_xc_timeouts: platform node missing"); 1354 goto done; 1355 } 1356 if (md_get_prop_val(mdp, platlist[0], 1357 "inter-cpu-latency", &latency) == -1) 1358 goto done; 1359 1360 /* 1361 * clock.h defines an assembly-language macro 1362 * (NATIVE_TIME_TO_NSEC_SCALE) to convert from %stick 1363 * units to nanoseconds. Since the inter-cpu-latency 1364 * units are nanoseconds and the xc_* variables require 1365 * %stick units, we need the inverse of that function. 1366 * The trick is to perform the calculation without 1367 * floating point, but also without integer truncation 1368 * or overflow. To understand the calculation below, 1369 * please read the discussion of the macro in clock.h. 1370 * Since this new code will be invoked infrequently, 1371 * we can afford to implement it in C. 1372 * 1373 * tick_scale is the reciprocal of nsec_scale which is 1374 * calculated at startup in setcpudelay(). The calc 1375 * of tick_limit parallels that of NATIVE_TIME_TO_NSEC_SCALE 1376 * except we use tick_scale instead of nsec_scale and 1377 * C instead of assembler. 1378 */ 1379 tick_scale = (uint_t)(((u_longlong_t)sys_tick_freq 1380 << (32 - nsec_shift)) / NANOSEC); 1381 1382 tk.whole = latency; 1383 top = ((uint64_t)tk.half.high << 4) * tick_scale; 1384 bottom = (((uint64_t)tk.half.low << 4) * (uint64_t)tick_scale) >> 32; 1385 tick_limit = top + bottom; 1386 1387 /* 1388 * xc_init() calculated 'maxfreq' by looking at all the cpus, 1389 * and used it to derive some of the timeout variables that we 1390 * recalculate below. We can back into the original value by 1391 * using the inverse of one of those calculations. 1392 */ 1393 maxfreq = xc_mondo_time_limit / xc_scale; 1394 1395 /* 1396 * Don't allow the new timeout (xc_tick_limit) to fall below 1397 * the system tick frequency (stick). Allowing the timeout 1398 * to be set more tightly than this empirically determined 1399 * value may cause panics. 1400 */ 1401 tick_limit = tick_limit < sys_tick_freq ? sys_tick_freq : tick_limit; 1402 1403 tick_jump_limit = tick_limit / 32; 1404 tick_limit *= xc_tick_limit_scale; 1405 1406 /* 1407 * Recalculate xc_scale since it is used in a callback function 1408 * (xc_func_timeout_adj) to adjust two of the timeouts dynamically. 1409 * Make the change in xc_scale proportional to the change in 1410 * xc_tick_limit. 1411 */ 1412 scale = (xc_scale * tick_limit + sys_tick_freq / 2) / tick_limit_save; 1413 if (scale == 0) 1414 scale = 1; 1415 1416 mondo_time_limit = maxfreq * scale; 1417 func_time_limit = mondo_time_limit * xc_mondo_multiplier; 1418 1419 /* 1420 * Don't modify the timeouts if nothing has changed. Else, 1421 * stuff the variables with the freshly calculated (temp) 1422 * variables. This minimizes the window where the set of 1423 * values could be inconsistent. 1424 */ 1425 if (tick_limit != xc_tick_limit) { 1426 xc_tick_limit = tick_limit; 1427 xc_tick_jump_limit = tick_jump_limit; 1428 xc_scale = scale; 1429 xc_mondo_time_limit = mondo_time_limit; 1430 xc_func_time_limit = func_time_limit; 1431 } 1432 1433 done: 1434 /* 1435 * Increase the timeout limit for xt_sync() cross calls. 1436 */ 1437 xc_sync_tick_limit = xc_tick_limit * (cpu_q_entries / QFACTOR); 1438 xc_sync_tick_limit = xc_sync_tick_limit < xc_tick_limit ? 1439 xc_tick_limit : xc_sync_tick_limit; 1440 1441 /* 1442 * Force the new values to be used for future cross calls. 1443 * This is necessary only when we increase the timeouts. 1444 */ 1445 if ((xc_tick_limit > tick_limit_save) || (xc_sync_tick_limit > 1446 sync_tick_limit_save)) { 1447 cpuset_t cpuset = cpu_ready_set; 1448 xt_sync(cpuset); 1449 } 1450 1451 if (nrnode > 0) 1452 md_free_scan_dag(mdp, &platlist); 1453 (void) md_fini_handle(mdp); 1454 } 1455 1456 void 1457 mach_soft_state_init(void) 1458 { 1459 int i; 1460 uint64_t ra; 1461 1462 /* 1463 * Try to register soft_state api. If it fails, soft_state api has not 1464 * been implemented in the firmware, so do not bother to setup 1465 * soft_state in the kernel. 1466 */ 1467 if ((i = hsvc_register(&soft_state_hsvc, &soft_state_sup_minor)) != 0) { 1468 return; 1469 } 1470 for (i = 0; i < SOLARIS_SOFT_STATE_MSG_CNT; i++) { 1471 ASSERT(strlen((const char *)(void *) 1472 soft_state_message_strings + i) < SSM_SIZE); 1473 if ((ra = va_to_pa( 1474 (void *)(soft_state_message_strings + i))) == -1ll) { 1475 return; 1476 } 1477 soft_state_message_ra[i] = ra; 1478 } 1479 /* 1480 * Tell OBP that we are supporting Guest State 1481 */ 1482 prom_sun4v_soft_state_supported(); 1483 soft_state_initialized = 1; 1484 } 1485 1486 void 1487 mach_set_soft_state(uint64_t state, uint64_t *string_ra) 1488 { 1489 uint64_t rc; 1490 1491 if (soft_state_initialized && *string_ra) { 1492 rc = hv_soft_state_set(state, *string_ra); 1493 if (rc != H_EOK) { 1494 cmn_err(CE_WARN, 1495 "hv_soft_state_set returned %ld\n", rc); 1496 } 1497 } 1498 } 1499 1500 void 1501 mach_get_soft_state(uint64_t *state, uint64_t *string_ra) 1502 { 1503 uint64_t rc; 1504 1505 if (soft_state_initialized && *string_ra) { 1506 rc = hv_soft_state_get(*string_ra, state); 1507 if (rc != H_EOK) { 1508 cmn_err(CE_WARN, 1509 "hv_soft_state_get returned %ld\n", rc); 1510 *state = -1; 1511 } 1512 } 1513 } 1514