1What:		/sys/bus/iio/devices/triggerX/master_mode_available
2KernelVersion:	4.11
3Contact:	benjamin.gaignard@st.com
4Description:
5		Reading returns the list possible master modes which are:
6
7
8		- "reset"
9				The UG bit from the TIMx_EGR register is
10				used as trigger output (TRGO).
11		- "enable"
12				The Counter Enable signal CNT_EN is used
13				as trigger output.
14		- "update"
15				The update event is selected as trigger output.
16				For instance a master timer can then be used
17				as a prescaler for a slave timer.
18		- "compare_pulse"
19				The trigger output send a positive pulse
20				when the CC1IF flag is to be set.
21		- "OC1REF"
22				OC1REF signal is used as trigger output.
23		- "OC2REF"
24				OC2REF signal is used as trigger output.
25		- "OC3REF"
26				OC3REF signal is used as trigger output.
27		- "OC4REF"
28				OC4REF signal is used as trigger output.
29
30		Additional modes (on TRGO2 only):
31
32		- "OC5REF"
33				OC5REF signal is used as trigger output.
34		- "OC6REF"
35				OC6REF signal is used as trigger output.
36		- "compare_pulse_OC4REF":
37				OC4REF rising or falling edges generate pulses.
38		- "compare_pulse_OC6REF":
39				OC6REF rising or falling edges generate pulses.
40		- "compare_pulse_OC4REF_r_or_OC6REF_r":
41				OC4REF or OC6REF rising edges generate pulses.
42		- "compare_pulse_OC4REF_r_or_OC6REF_f":
43				OC4REF rising or OC6REF falling edges generate
44				pulses.
45		- "compare_pulse_OC5REF_r_or_OC6REF_r":
46				OC5REF or OC6REF rising edges generate pulses.
47		- "compare_pulse_OC5REF_r_or_OC6REF_f":
48				OC5REF rising or OC6REF falling edges generate
49				pulses.
50
51		::
52
53		  +-----------+   +-------------+            +---------+
54		  | Prescaler +-> | Counter     |        +-> | Master  | TRGO(2)
55		  +-----------+   +--+--------+-+        |-> | Control +-->
56		                     |        |          ||  +---------+
57		                  +--v--------+-+ OCxREF ||  +---------+
58		                  | Chx compare +----------> | Output  | ChX
59		                  +-----------+-+         |  | Control +-->
60		                        .     |           |  +---------+
61		                        .     |           |    .
62		                  +-----------v-+ OC6REF  |    .
63		                  | Ch6 compare +---------+>
64		                  +-------------+
65
66		Example with: "compare_pulse_OC4REF_r_or_OC6REF_r"::
67
68		                  X
69		                X   X
70		              X .   . X
71		            X   .   .   X
72		          X     .   .     X
73		  count X .     .   .     . X
74		          .     .   .     .
75		          .     .   .     .
76		          +---------------+
77		  OC4REF  |     .   .     |
78		        +-+     .   .     +-+
79		          .     +---+     .
80		  OC6REF  .     |   |     .
81		        +-------+   +-------+
82		          +-+   +-+
83		  TRGO2   | |   | |
84		        +-+ +---+ +---------+
85
86What:		/sys/bus/iio/devices/triggerX/master_mode
87KernelVersion:	4.11
88Contact:	benjamin.gaignard@st.com
89Description:
90		Reading returns the current master modes.
91		Writing set the master mode
92
93What:		/sys/bus/iio/devices/iio:deviceX/in_count0_preset
94KernelVersion:	4.12
95Contact:	benjamin.gaignard@st.com
96Description:
97		Reading returns the current preset value.
98		Writing sets the preset value.
99		When counting up the counter starts from 0 and fires an
100		event when reach preset value.
101		When counting down the counter start from preset value
102		and fire event when reach 0.
103
104What:		/sys/bus/iio/devices/iio:deviceX/in_count_enable_mode_available
105KernelVersion:	4.12
106Contact:	benjamin.gaignard@st.com
107Description:
108		Reading returns the list possible enable modes.
109
110What:		/sys/bus/iio/devices/iio:deviceX/in_count0_enable_mode
111KernelVersion:	4.12
112Contact:	benjamin.gaignard@st.com
113Description:
114		Configure the device counter enable modes, in all case
115		counting direction is set by in_count0_count_direction
116		attribute and the counter is clocked by the internal clock.
117
118		always:
119			Counter is always ON.
120
121		gated:
122			Counting is enabled when connected trigger signal
123			level is high else counting is disabled.
124
125		triggered:
126			Counting is enabled on rising edge of the connected
127			trigger, and remains enabled for the duration of this
128			selected mode.
129
130What:		/sys/bus/iio/devices/iio:deviceX/in_count_trigger_mode_available
131KernelVersion:	4.13
132Contact:	benjamin.gaignard@st.com
133Description:
134		Reading returns the list possible trigger modes.
135
136What:		/sys/bus/iio/devices/iio:deviceX/in_count0_trigger_mode
137KernelVersion:	4.13
138Contact:	benjamin.gaignard@st.com
139Description:
140		Configure the device counter trigger mode
141		counting direction is set by in_count0_count_direction
142		attribute and the counter is clocked by the connected trigger
143		rising edges.
144