1*32e2eae2SMauro Carvalho Chehab# SPDX-License-Identifier: GPL-2.0
2*32e2eae2SMauro Carvalho Chehab
3*32e2eae2SMauro Carvalho Chehabdigraph board {
4*32e2eae2SMauro Carvalho Chehab	rankdir=TB
5*32e2eae2SMauro Carvalho Chehab	n00000001 [label="{{<port0> 0} | msm_csiphy0\n/dev/v4l-subdev0 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
6*32e2eae2SMauro Carvalho Chehab	n00000001:port1 -> n0000000a:port0 [style=dashed]
7*32e2eae2SMauro Carvalho Chehab	n00000001:port1 -> n0000000d:port0 [style=dashed]
8*32e2eae2SMauro Carvalho Chehab	n00000001:port1 -> n00000010:port0 [style=dashed]
9*32e2eae2SMauro Carvalho Chehab	n00000001:port1 -> n00000013:port0 [style=dashed]
10*32e2eae2SMauro Carvalho Chehab	n00000004 [label="{{<port0> 0} | msm_csiphy1\n/dev/v4l-subdev1 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
11*32e2eae2SMauro Carvalho Chehab	n00000004:port1 -> n0000000a:port0 [style=dashed]
12*32e2eae2SMauro Carvalho Chehab	n00000004:port1 -> n0000000d:port0 [style=dashed]
13*32e2eae2SMauro Carvalho Chehab	n00000004:port1 -> n00000010:port0 [style=dashed]
14*32e2eae2SMauro Carvalho Chehab	n00000004:port1 -> n00000013:port0 [style=dashed]
15*32e2eae2SMauro Carvalho Chehab	n00000007 [label="{{<port0> 0} | msm_csiphy2\n/dev/v4l-subdev2 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
16*32e2eae2SMauro Carvalho Chehab	n00000007:port1 -> n0000000a:port0 [style=dashed]
17*32e2eae2SMauro Carvalho Chehab	n00000007:port1 -> n0000000d:port0 [style=dashed]
18*32e2eae2SMauro Carvalho Chehab	n00000007:port1 -> n00000010:port0 [style=dashed]
19*32e2eae2SMauro Carvalho Chehab	n00000007:port1 -> n00000013:port0 [style=dashed]
20*32e2eae2SMauro Carvalho Chehab	n0000000a [label="{{<port0> 0} | msm_csid0\n/dev/v4l-subdev3 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
21*32e2eae2SMauro Carvalho Chehab	n0000000a:port1 -> n00000016:port0 [style=dashed]
22*32e2eae2SMauro Carvalho Chehab	n0000000a:port1 -> n00000019:port0 [style=dashed]
23*32e2eae2SMauro Carvalho Chehab	n0000000a:port1 -> n0000001c:port0 [style=dashed]
24*32e2eae2SMauro Carvalho Chehab	n0000000a:port1 -> n0000001f:port0 [style=dashed]
25*32e2eae2SMauro Carvalho Chehab	n0000000d [label="{{<port0> 0} | msm_csid1\n/dev/v4l-subdev4 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
26*32e2eae2SMauro Carvalho Chehab	n0000000d:port1 -> n00000016:port0 [style=dashed]
27*32e2eae2SMauro Carvalho Chehab	n0000000d:port1 -> n00000019:port0 [style=dashed]
28*32e2eae2SMauro Carvalho Chehab	n0000000d:port1 -> n0000001c:port0 [style=dashed]
29*32e2eae2SMauro Carvalho Chehab	n0000000d:port1 -> n0000001f:port0 [style=dashed]
30*32e2eae2SMauro Carvalho Chehab	n00000010 [label="{{<port0> 0} | msm_csid2\n/dev/v4l-subdev5 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
31*32e2eae2SMauro Carvalho Chehab	n00000010:port1 -> n00000016:port0 [style=dashed]
32*32e2eae2SMauro Carvalho Chehab	n00000010:port1 -> n00000019:port0 [style=dashed]
33*32e2eae2SMauro Carvalho Chehab	n00000010:port1 -> n0000001c:port0 [style=dashed]
34*32e2eae2SMauro Carvalho Chehab	n00000010:port1 -> n0000001f:port0 [style=dashed]
35*32e2eae2SMauro Carvalho Chehab	n00000013 [label="{{<port0> 0} | msm_csid3\n/dev/v4l-subdev6 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
36*32e2eae2SMauro Carvalho Chehab	n00000013:port1 -> n00000016:port0 [style=dashed]
37*32e2eae2SMauro Carvalho Chehab	n00000013:port1 -> n00000019:port0 [style=dashed]
38*32e2eae2SMauro Carvalho Chehab	n00000013:port1 -> n0000001c:port0 [style=dashed]
39*32e2eae2SMauro Carvalho Chehab	n00000013:port1 -> n0000001f:port0 [style=dashed]
40*32e2eae2SMauro Carvalho Chehab	n00000016 [label="{{<port0> 0} | msm_ispif0\n/dev/v4l-subdev7 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
41*32e2eae2SMauro Carvalho Chehab	n00000016:port1 -> n00000022:port0 [style=dashed]
42*32e2eae2SMauro Carvalho Chehab	n00000016:port1 -> n0000002b:port0 [style=dashed]
43*32e2eae2SMauro Carvalho Chehab	n00000016:port1 -> n00000034:port0 [style=dashed]
44*32e2eae2SMauro Carvalho Chehab	n00000016:port1 -> n0000003d:port0 [style=dashed]
45*32e2eae2SMauro Carvalho Chehab	n00000016:port1 -> n00000046:port0 [style=dashed]
46*32e2eae2SMauro Carvalho Chehab	n00000016:port1 -> n0000004f:port0 [style=dashed]
47*32e2eae2SMauro Carvalho Chehab	n00000016:port1 -> n00000058:port0 [style=dashed]
48*32e2eae2SMauro Carvalho Chehab	n00000016:port1 -> n00000061:port0 [style=dashed]
49*32e2eae2SMauro Carvalho Chehab	n00000019 [label="{{<port0> 0} | msm_ispif1\n/dev/v4l-subdev8 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
50*32e2eae2SMauro Carvalho Chehab	n00000019:port1 -> n00000022:port0 [style=dashed]
51*32e2eae2SMauro Carvalho Chehab	n00000019:port1 -> n0000002b:port0 [style=dashed]
52*32e2eae2SMauro Carvalho Chehab	n00000019:port1 -> n00000034:port0 [style=dashed]
53*32e2eae2SMauro Carvalho Chehab	n00000019:port1 -> n0000003d:port0 [style=dashed]
54*32e2eae2SMauro Carvalho Chehab	n00000019:port1 -> n00000046:port0 [style=dashed]
55*32e2eae2SMauro Carvalho Chehab	n00000019:port1 -> n0000004f:port0 [style=dashed]
56*32e2eae2SMauro Carvalho Chehab	n00000019:port1 -> n00000058:port0 [style=dashed]
57*32e2eae2SMauro Carvalho Chehab	n00000019:port1 -> n00000061:port0 [style=dashed]
58*32e2eae2SMauro Carvalho Chehab	n0000001c [label="{{<port0> 0} | msm_ispif2\n/dev/v4l-subdev9 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
59*32e2eae2SMauro Carvalho Chehab	n0000001c:port1 -> n00000022:port0 [style=dashed]
60*32e2eae2SMauro Carvalho Chehab	n0000001c:port1 -> n0000002b:port0 [style=dashed]
61*32e2eae2SMauro Carvalho Chehab	n0000001c:port1 -> n00000034:port0 [style=dashed]
62*32e2eae2SMauro Carvalho Chehab	n0000001c:port1 -> n0000003d:port0 [style=dashed]
63*32e2eae2SMauro Carvalho Chehab	n0000001c:port1 -> n00000046:port0 [style=dashed]
64*32e2eae2SMauro Carvalho Chehab	n0000001c:port1 -> n0000004f:port0 [style=dashed]
65*32e2eae2SMauro Carvalho Chehab	n0000001c:port1 -> n00000058:port0 [style=dashed]
66*32e2eae2SMauro Carvalho Chehab	n0000001c:port1 -> n00000061:port0 [style=dashed]
67*32e2eae2SMauro Carvalho Chehab	n0000001f [label="{{<port0> 0} | msm_ispif3\n/dev/v4l-subdev10 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
68*32e2eae2SMauro Carvalho Chehab	n0000001f:port1 -> n00000022:port0 [style=dashed]
69*32e2eae2SMauro Carvalho Chehab	n0000001f:port1 -> n0000002b:port0 [style=dashed]
70*32e2eae2SMauro Carvalho Chehab	n0000001f:port1 -> n00000034:port0 [style=dashed]
71*32e2eae2SMauro Carvalho Chehab	n0000001f:port1 -> n0000003d:port0 [style=dashed]
72*32e2eae2SMauro Carvalho Chehab	n0000001f:port1 -> n00000046:port0 [style=dashed]
73*32e2eae2SMauro Carvalho Chehab	n0000001f:port1 -> n0000004f:port0 [style=dashed]
74*32e2eae2SMauro Carvalho Chehab	n0000001f:port1 -> n00000058:port0 [style=dashed]
75*32e2eae2SMauro Carvalho Chehab	n0000001f:port1 -> n00000061:port0 [style=dashed]
76*32e2eae2SMauro Carvalho Chehab	n00000022 [label="{{<port0> 0} | msm_vfe0_rdi0\n/dev/v4l-subdev11 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
77*32e2eae2SMauro Carvalho Chehab	n00000022:port1 -> n00000025 [style=bold]
78*32e2eae2SMauro Carvalho Chehab	n00000025 [label="msm_vfe0_video0\n/dev/video0", shape=box, style=filled, fillcolor=yellow]
79*32e2eae2SMauro Carvalho Chehab	n0000002b [label="{{<port0> 0} | msm_vfe0_rdi1\n/dev/v4l-subdev12 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
80*32e2eae2SMauro Carvalho Chehab	n0000002b:port1 -> n0000002e [style=bold]
81*32e2eae2SMauro Carvalho Chehab	n0000002e [label="msm_vfe0_video1\n/dev/video1", shape=box, style=filled, fillcolor=yellow]
82*32e2eae2SMauro Carvalho Chehab	n00000034 [label="{{<port0> 0} | msm_vfe0_rdi2\n/dev/v4l-subdev13 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
83*32e2eae2SMauro Carvalho Chehab	n00000034:port1 -> n00000037 [style=bold]
84*32e2eae2SMauro Carvalho Chehab	n00000037 [label="msm_vfe0_video2\n/dev/video2", shape=box, style=filled, fillcolor=yellow]
85*32e2eae2SMauro Carvalho Chehab	n0000003d [label="{{<port0> 0} | msm_vfe0_pix\n/dev/v4l-subdev14 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
86*32e2eae2SMauro Carvalho Chehab	n0000003d:port1 -> n00000040 [style=bold]
87*32e2eae2SMauro Carvalho Chehab	n00000040 [label="msm_vfe0_video3\n/dev/video3", shape=box, style=filled, fillcolor=yellow]
88*32e2eae2SMauro Carvalho Chehab	n00000046 [label="{{<port0> 0} | msm_vfe1_rdi0\n/dev/v4l-subdev15 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
89*32e2eae2SMauro Carvalho Chehab	n00000046:port1 -> n00000049 [style=bold]
90*32e2eae2SMauro Carvalho Chehab	n00000049 [label="msm_vfe1_video0\n/dev/video4", shape=box, style=filled, fillcolor=yellow]
91*32e2eae2SMauro Carvalho Chehab	n0000004f [label="{{<port0> 0} | msm_vfe1_rdi1\n/dev/v4l-subdev16 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
92*32e2eae2SMauro Carvalho Chehab	n0000004f:port1 -> n00000052 [style=bold]
93*32e2eae2SMauro Carvalho Chehab	n00000052 [label="msm_vfe1_video1\n/dev/video5", shape=box, style=filled, fillcolor=yellow]
94*32e2eae2SMauro Carvalho Chehab	n00000058 [label="{{<port0> 0} | msm_vfe1_rdi2\n/dev/v4l-subdev17 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
95*32e2eae2SMauro Carvalho Chehab	n00000058:port1 -> n0000005b [style=bold]
96*32e2eae2SMauro Carvalho Chehab	n0000005b [label="msm_vfe1_video2\n/dev/video6", shape=box, style=filled, fillcolor=yellow]
97*32e2eae2SMauro Carvalho Chehab	n00000061 [label="{{<port0> 0} | msm_vfe1_pix\n/dev/v4l-subdev18 | {<port1> 1}}", shape=Mrecord, style=filled, fillcolor=green]
98*32e2eae2SMauro Carvalho Chehab	n00000061:port1 -> n00000064 [style=bold]
99*32e2eae2SMauro Carvalho Chehab	n00000064 [label="msm_vfe1_video3\n/dev/video7", shape=box, style=filled, fillcolor=yellow]
100*32e2eae2SMauro Carvalho Chehab	n000000e2 [label="{{} | ov5645 3-0039\n/dev/v4l-subdev19 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
101*32e2eae2SMauro Carvalho Chehab	n000000e2:port0 -> n00000004:port0 [style=bold]
102*32e2eae2SMauro Carvalho Chehab	n000000e4 [label="{{} | ov5645 3-003a\n/dev/v4l-subdev20 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
103*32e2eae2SMauro Carvalho Chehab	n000000e4:port0 -> n00000007:port0 [style=bold]
104*32e2eae2SMauro Carvalho Chehab	n000000e6 [label="{{} | ov5645 3-003b\n/dev/v4l-subdev21 | {<port0> 0}}", shape=Mrecord, style=filled, fillcolor=green]
105*32e2eae2SMauro Carvalho Chehab	n000000e6:port0 -> n00000001:port0 [style=bold]
106*32e2eae2SMauro Carvalho Chehab}
107