1Atmel system registers
2
3Chipid required properties:
4- compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
5- reg : Should contain registers location and length
6
7PIT Timer required properties:
8- compatible: Should be "atmel,at91sam9260-pit"
9- reg: Should contain registers location and length
10- interrupts: Should contain interrupt for the PIT which is the IRQ line
11  shared across all System Controller members.
12
13PIT64B Timer required properties:
14- compatible: Should be "microchip,sam9x60-pit64b"
15- reg: Should contain registers location and length
16- interrupts: Should contain interrupt for PIT64B timer
17- clocks: Should contain the available clock sources for PIT64B timer.
18
19System Timer (ST) required properties:
20- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
21- reg: Should contain registers location and length
22- interrupts: Should contain interrupt for the ST which is the IRQ line
23  shared across all System Controller members.
24- clocks: phandle to input clock.
25Its subnodes can be:
26- watchdog: compatible should be "atmel,at91rm9200-wdt"
27
28RSTC Reset Controller required properties:
29- compatible: Should be "atmel,<chip>-rstc".
30  <chip> can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7"
31  it also can be "microchip,sam9x60-rstc"
32- reg: Should contain registers location and length
33- clocks: phandle to input clock.
34
35Example:
36
37	rstc@fffffd00 {
38		compatible = "atmel,at91sam9260-rstc";
39		reg = <0xfffffd00 0x10>;
40		clocks = <&clk32k>;
41	};
42
43RAMC SDRAM/DDR Controller required properties:
44- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
45			"atmel,at91sam9260-sdramc",
46			"atmel,at91sam9g45-ddramc",
47			"atmel,sama5d3-ddramc",
48			"microchip,sam9x60-ddramc",
49			"microchip,sama7g5-uddrc"
50- reg: Should contain registers location and length
51
52Examples:
53
54	ramc0: ramc@ffffe800 {
55		compatible = "atmel,at91sam9g45-ddramc";
56		reg = <0xffffe800 0x200>;
57	};
58
59RAMC PHY Controller required properties:
60- compatible: Should be "microchip,sama7g5-ddr3phy", "syscon"
61- reg: Should contain registers location and length
62
63Example:
64
65	ddr3phy: ddr3phy@e3804000 {
66		compatible = "microchip,sama7g5-ddr3phy", "syscon";
67		reg = <0xe3804000 0x1000>;
68};
69
70SHDWC Shutdown Controller
71
72required properties:
73- compatible: Should be "atmel,<chip>-shdwc".
74  <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
75- reg: Should contain registers location and length
76- clocks: phandle to input clock.
77
78optional properties:
79- atmel,wakeup-mode: String, operation mode of the wakeup mode.
80  Supported values are: "none", "high", "low", "any".
81- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
82
83optional at91sam9260 properties:
84- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
85
86optional at91sam9rl properties:
87- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
88- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
89
90optional at91sam9x5 properties:
91- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
92
93Example:
94
95	shdwc@fffffd10 {
96		compatible = "atmel,at91sam9260-shdwc";
97		reg = <0xfffffd10 0x10>;
98		clocks = <&clk32k>;
99	};
100
101SHDWC SAMA5D2-Compatible Shutdown Controller
102
1031) shdwc node
104
105required properties:
106- compatible: should be "atmel,sama5d2-shdwc", "microchip,sam9x60-shdwc" or
107  "microchip,sama7g5-shdwc"
108- reg: should contain registers location and length
109- clocks: phandle to input clock.
110- #address-cells: should be one. The cell is the wake-up input index.
111- #size-cells: should be zero.
112
113optional properties:
114
115- debounce-delay-us: minimum wake-up inputs debouncer period in
116  microseconds. It's usually a board-related property.
117- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
118
119optional microchip,sam9x60-shdwc or microchip,sama7g5-shdwc properties:
120- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
121
122The node contains child nodes for each wake-up input that the platform uses.
123
1242) input nodes
125
126Wake-up input nodes are usually described in the "board" part of the Device
127Tree. Note also that input 0 is linked to the wake-up pin and is frequently
128used.
129
130Required properties:
131- reg: should contain the wake-up input index [0 - 15].
132
133Optional properties:
134- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
135  by the child, forces the wake-up of the core power supply on a high level.
136  The default is to be active low.
137
138Example:
139
140On the SoC side:
141	shdwc@f8048010 {
142		compatible = "atmel,sama5d2-shdwc";
143		reg = <0xf8048010 0x10>;
144		clocks = <&clk32k>;
145		#address-cells = <1>;
146		#size-cells = <0>;
147		atmel,wakeup-rtc-timer;
148	};
149
150On the board side:
151	shdwc@f8048010 {
152		debounce-delay-us = <976>;
153
154		input@0 {
155			reg = <0>;
156		};
157
158		input@1 {
159			reg = <1>;
160			atmel,wakeup-active-high;
161		};
162	};
163
164Special Function Registers (SFR)
165
166Special Function Registers (SFR) manage specific aspects of the integrated
167memory, bridge implementations, processor and other functionality not controlled
168elsewhere.
169
170required properties:
171- compatible: Should be "atmel,<chip>-sfr", "syscon" or
172	"atmel,<chip>-sfrbu", "syscon"
173  <chip> can be "sama5d3", "sama5d4" or "sama5d2".
174  It also can be "microchip,sam9x60-sfr", "syscon".
175- reg: Should contain registers location and length
176
177	sfr@f0038000 {
178		compatible = "atmel,sama5d3-sfr", "syscon";
179		reg = <0xf0038000 0x60>;
180	};
181
182Security Module (SECUMOD)
183
184The Security Module macrocell provides all necessary secure functions to avoid
185voltage, temperature, frequency and mechanical attacks on the chip. It also
186embeds secure memories that can be scrambled.
187
188The Security Module also offers the PIOBU pins which can be used as GPIO pins.
189Note that they maintain their voltage during Backup/Self-refresh.
190
191required properties:
192- compatible: Should be "atmel,<chip>-secumod", "syscon".
193  <chip> can be "sama5d2".
194- reg: Should contain registers location and length
195- gpio-controller:	Marks the port as GPIO controller.
196- #gpio-cells:		There are 2. The pin number is the
197			first, the second represents additional
198			parameters such as GPIO_ACTIVE_HIGH/LOW.
199
200
201	secumod@fc040000 {
202		compatible = "atmel,sama5d2-secumod", "syscon";
203		reg = <0xfc040000 0x100>;
204		gpio-controller;
205		#gpio-cells = <2>;
206	};
207