1%YAML 1.2
2---
3$id: http://devicetree.org/schemas/bus/renesas,bsc.yaml#
4$schema: http://devicetree.org/meta-schemas/core.yaml#
5
6title: Renesas Bus State Controller (BSC)
7
8maintainers:
9  - Geert Uytterhoeven <geert+renesas@glider.be>
10
11description: |
12  The Renesas Bus State Controller (BSC, sometimes called "LBSC within Bus
13  Bridge", or "External Bus Interface") can be found in several Renesas ARM
14  SoCs.  It provides an external bus for connecting multiple external
15  devices to the SoC, driving several chip select lines, for e.g. NOR
16  FLASH, Ethernet and USB.
17
18  While the BSC is a fairly simple memory-mapped bus, it may be part of a
19  PM domain, and may have a gateable functional clock.  Before a device
20  connected to the BSC can be accessed, the PM domain containing the BSC
21  must be powered on, and the functional clock driving the BSC must be
22  enabled.
23
24  The bindings for the BSC extend the bindings for "simple-pm-bus".
25
26allOf:
27  - $ref: simple-pm-bus.yaml#
28
29properties:
30  compatible:
31    items:
32      - enum:
33          - renesas,bsc-r8a73a4  # R-Mobile APE6 (r8a73a4)
34          - renesas,bsc-sh73a0   # SH-Mobile AG5 (sh73a0)
35      - const: renesas,bsc
36      - {} # simple-pm-bus, but not listed here to avoid false select
37
38  reg:
39    maxItems: 1
40
41  interrupts:
42    maxItems: 1
43
44required:
45  - reg
46
47unevaluatedProperties: false
48
49examples:
50  - |
51    #include <dt-bindings/interrupt-controller/irq.h>
52
53    bsc: bus@fec10000 {
54        compatible = "renesas,bsc-sh73a0", "renesas,bsc", "simple-pm-bus";
55        #address-cells = <1>;
56        #size-cells = <1>;
57        ranges = <0 0 0x20000000>;
58        reg = <0xfec10000 0x400>;
59        interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
60        clocks = <&zb_clk>;
61        power-domains = <&pd_a4s>;
62    };
63