1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm A53 PLL clock
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11
12description:
13  The A53 PLL on few Qualcomm platforms is the main CPU PLL used used for
14  frequencies above 1GHz.
15
16properties:
17  compatible:
18    enum:
19      - qcom,ipq5018-a53pll
20      - qcom,ipq5332-a53pll
21      - qcom,ipq6018-a53pll
22      - qcom,ipq8074-a53pll
23      - qcom,ipq9574-a73pll
24      - qcom,msm8916-a53pll
25      - qcom,msm8939-a53pll
26
27  reg:
28    maxItems: 1
29
30  '#clock-cells':
31    const: 0
32
33  clocks:
34    items:
35      - description: board XO clock
36
37  clock-names:
38    items:
39      - const: xo
40
41  operating-points-v2: true
42
43required:
44  - compatible
45  - reg
46  - '#clock-cells'
47
48additionalProperties: false
49
50examples:
51  # Example 1 - A53 PLL found on MSM8916 devices
52  - |
53    a53pll: clock@b016000 {
54        compatible = "qcom,msm8916-a53pll";
55        reg = <0xb016000 0x40>;
56        #clock-cells = <0>;
57    };
58  # Example 2 - A53 PLL found on IPQ6018 devices
59  - |
60    a53pll_ipq: clock-controller@b116000 {
61        compatible = "qcom,ipq6018-a53pll";
62        reg = <0x0b116000 0x40>;
63        #clock-cells = <0>;
64        clocks = <&xo>;
65        clock-names = "xo";
66    };
67