1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/bridge/ingenic,jz4780-hdmi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Bindings for Ingenic JZ4780 HDMI Transmitter
8
9maintainers:
10  - H. Nikolaus Schaller <hns@goldelico.com>
11
12description: |
13  The HDMI Transmitter in the Ingenic JZ4780 is a Synopsys DesignWare HDMI 1.4
14  TX controller IP with accompanying PHY IP.
15
16allOf:
17  - $ref: synopsys,dw-hdmi.yaml#
18
19properties:
20  compatible:
21    const: ingenic,jz4780-dw-hdmi
22
23  reg-io-width:
24    const: 4
25
26  clocks:
27    maxItems: 2
28
29  ports:
30    $ref: /schemas/graph.yaml#/properties/ports
31
32    properties:
33      port@0:
34        $ref: /schemas/graph.yaml#/properties/port
35        description: Input from LCD controller output.
36
37      port@1:
38        $ref: /schemas/graph.yaml#/properties/port
39        description: Link to the HDMI connector.
40
41required:
42  - compatible
43  - clocks
44  - clock-names
45  - ports
46  - reg-io-width
47
48unevaluatedProperties: false
49
50examples:
51  - |
52    #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
53
54    hdmi: hdmi@10180000 {
55        compatible = "ingenic,jz4780-dw-hdmi";
56        reg = <0x10180000 0x8000>;
57        reg-io-width = <4>;
58        interrupt-parent = <&intc>;
59        interrupts = <3>;
60        clocks = <&cgu JZ4780_CLK_AHB0>, <&cgu JZ4780_CLK_HDMI>;
61        clock-names = "iahb", "isfr";
62
63        ports {
64            #address-cells = <1>;
65            #size-cells = <0>;
66            hdmi_in: port@0 {
67                reg = <0>;
68                dw_hdmi_in: endpoint {
69                    remote-endpoint = <&jz4780_lcd_out>;
70                };
71            };
72            hdmi_out: port@1 {
73                reg = <1>;
74                dw_hdmi_out: endpoint {
75                    remote-endpoint = <&hdmi_con>;
76                };
77            };
78        };
79    };
80
81...
82