1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics STM32 Digital Camera Memory Interface (DCMI) binding
8
9maintainers:
10  - Hugues Fruchet <hugues.fruchet@st.com>
11
12properties:
13  compatible:
14    const: st,stm32-dcmi
15
16  reg:
17    maxItems: 1
18
19  interrupts:
20    maxItems: 1
21
22  clocks:
23    maxItems: 1
24
25  clock-names:
26    items:
27      - const: mclk
28
29  dmas:
30    maxItems: 1
31
32  dma-names:
33    items:
34      - const: tx
35
36  resets:
37    maxItems: 1
38
39  port:
40    type: object
41    description:
42      DCMI supports a single port node with parallel bus. It should contain
43      one 'port' child node with child 'endpoint' node. Please refer to the
44      bindings defined in
45      Documentation/devicetree/bindings/media/video-interfaces.txt.
46
47required:
48  - compatible
49  - reg
50  - interrupts
51  - clocks
52  - clock-names
53  - resets
54  - dmas
55  - dma-names
56  - port
57
58additionalProperties: false
59
60examples:
61  - |
62    #include <dt-bindings/interrupt-controller/arm-gic.h>
63    #include <dt-bindings/clock/stm32mp1-clks.h>
64    #include <dt-bindings/reset/stm32mp1-resets.h>
65    dcmi: dcmi@4c006000 {
66        compatible = "st,stm32-dcmi";
67        reg = <0x4c006000 0x400>;
68        interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
69        resets = <&rcc CAMITF_R>;
70        clocks = <&rcc DCMI>;
71        clock-names = "mclk";
72        dmas = <&dmamux1 75 0x400 0x0d>;
73        dma-names = "tx";
74
75        port {
76             dcmi_0: endpoint {
77                   remote-endpoint = <&ov5640_0>;
78                   bus-width = <8>;
79                   hsync-active = <0>;
80                   vsync-active = <0>;
81                   pclk-sample = <1>;
82             };
83        };
84    };
85
86...
87