12707177eSAlexandre Belloni* Microsemi MIPS CPUs 22707177eSAlexandre Belloni 32707177eSAlexandre BelloniBoards with a SoC of the Microsemi MIPS family shall have the following 42707177eSAlexandre Belloniproperties: 52707177eSAlexandre Belloni 62707177eSAlexandre BelloniRequired properties: 7*597fa616SGregory CLEMENT- compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2" 82707177eSAlexandre Belloni 92707177eSAlexandre Belloni 102707177eSAlexandre Belloni* Other peripherals: 112707177eSAlexandre Belloni 122707177eSAlexandre Bellonio CPU chip regs: 132707177eSAlexandre Belloni 142707177eSAlexandre BelloniThe SoC has a few registers (DEVCPU_GCB:CHIP_REGS) handling miscellaneous 152707177eSAlexandre Bellonifunctionalities: chip ID, general purpose register for software use, reset 162707177eSAlexandre Bellonicontroller, hardware status and configuration, efuses. 172707177eSAlexandre Belloni 182707177eSAlexandre BelloniRequired properties: 192707177eSAlexandre Belloni- compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon" 202707177eSAlexandre Belloni- reg : Should contain registers location and length 212707177eSAlexandre Belloni 222707177eSAlexandre BelloniExample: 232707177eSAlexandre Belloni syscon@71070000 { 242707177eSAlexandre Belloni compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon"; 252707177eSAlexandre Belloni reg = <0x71070000 0x1c>; 262707177eSAlexandre Belloni }; 272707177eSAlexandre Belloni 282707177eSAlexandre Belloni 292707177eSAlexandre Bellonio CPU system control: 302707177eSAlexandre Belloni 312707177eSAlexandre BelloniThe SoC has a few registers (ICPU_CFG:CPU_SYSTEM_CTRL) handling configuration of 322707177eSAlexandre Bellonithe CPU: 8 general purpose registers, reset control, CPU en/disabling, CPU 332707177eSAlexandre Belloniendianness, CPU bus control, CPU status. 342707177eSAlexandre Belloni 352707177eSAlexandre BelloniRequired properties: 362707177eSAlexandre Belloni- compatible: Should be "mscc,ocelot-cpu-syscon", "syscon" 372707177eSAlexandre Belloni- reg : Should contain registers location and length 382707177eSAlexandre Belloni 392707177eSAlexandre BelloniExample: 402707177eSAlexandre Belloni syscon@70000000 { 412707177eSAlexandre Belloni compatible = "mscc,ocelot-cpu-syscon", "syscon"; 422707177eSAlexandre Belloni reg = <0x70000000 0x2c>; 432707177eSAlexandre Belloni }; 446afea95aSQuentin Schulz 456afea95aSQuentin Schulzo HSIO regs: 466afea95aSQuentin Schulz 476afea95aSQuentin SchulzThe SoC has a few registers (HSIO) handling miscellaneous functionalities: 486afea95aSQuentin Schulzconfiguration and status of PLL5, RCOMP, SyncE, SerDes configurations and 496afea95aSQuentin Schulzstatus, SerDes muxing and a thermal sensor. 506afea95aSQuentin Schulz 516afea95aSQuentin SchulzRequired properties: 526afea95aSQuentin Schulz- compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd" 536afea95aSQuentin Schulz- reg : Should contain registers location and length 546afea95aSQuentin Schulz 556afea95aSQuentin SchulzExample: 566afea95aSQuentin Schulz syscon@10d0000 { 576afea95aSQuentin Schulz compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd"; 586afea95aSQuentin Schulz reg = <0x10d0000 0x10000>; 596afea95aSQuentin Schulz }; 60