1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs
8
9allOf:
10  - $ref: nand-controller.yaml
11
12maintainers:
13  - liang.yang@amlogic.com
14
15properties:
16  compatible:
17    enum:
18      - amlogic,meson-gxl-nfc
19      - amlogic,meson-axg-nfc
20
21  reg:
22    maxItems: 2
23
24  reg-names:
25    items:
26      - const: nfc
27      - const: emmc
28
29  interrupts:
30    maxItems: 1
31
32  clocks:
33    minItems: 2
34
35  clock-names:
36    items:
37      - const: core
38      - const: device
39
40patternProperties:
41  "^nand@[0-7]$":
42    type: object
43    properties:
44      reg:
45        minimum: 0
46        maximum: 1
47
48      nand-ecc-mode:
49        const: hw
50
51      nand-ecc-step-size:
52        const: 1024
53
54      nand-ecc-strength:
55        enum: [8, 16, 24, 30, 40, 50, 60]
56        description: |
57          The ECC configurations that can be supported are as follows.
58            meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60
59            meson-axg-nfc 8
60
61required:
62  - compatible
63  - reg
64  - interrupts
65  - clocks
66  - clock-names
67
68unevaluatedProperties: false
69
70examples:
71  - |
72    #include <dt-bindings/clock/axg-clkc.h>
73    #include <dt-bindings/interrupt-controller/arm-gic.h>
74    nand-controller@ffe07800 {
75      compatible = "amlogic,meson-axg-nfc";
76      reg = <0xffe07800 0x100>, <0xffe07000 0x800>;
77      reg-names = "nfc", "emmc";
78      interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
79      clocks = <&clkc CLKID_SD_EMMC_C>,  <&clkc CLKID_FCLK_DIV2>;
80      clock-names = "core", "device";
81
82      pinctrl-0 = <&nand_pins>;
83      pinctrl-names = "default";
84
85      #address-cells = <1>;
86      #size-cells = <0>;
87
88      nand@0 {
89        reg = <0>;
90      };
91    };
92
93...
94