1Distributed Switch Architecture Device Tree Bindings
2----------------------------------------------------
3
4Switches are true Linux devices and can be probed by any means. Once
5probed, they register to the DSA framework, passing a node
6pointer. This node is expected to fulfil the following binding, and
7may contain additional properties as required by the device it is
8embedded within.
9
10Required properties:
11
12- ports		: A container for child nodes representing switch ports.
13
14Optional properties:
15
16- dsa,member	: A two element list indicates which DSA cluster, and position
17		  within the cluster a switch takes. <0 0> is cluster 0,
18		  switch 0. <0 1> is cluster 0, switch 1. <1 0> is cluster 1,
19		  switch 0. A switch not part of any cluster (single device
20		  hanging off a CPU port) must not specify this property
21
22The ports container has the following properties
23
24Required properties:
25
26- #address-cells	: Must be 1
27- #size-cells		: Must be 0
28
29Each port children node must have the following mandatory properties:
30- reg			: Describes the port address in the switch
31
32An uplink/downlink port between switches in the cluster has the following
33mandatory property:
34
35- link			: Should be a list of phandles to other switch's DSA
36			  port. This port is used as the outgoing port
37			  towards the phandle ports. The full routing
38			  information must be given, not just the one hop
39			  routes to neighbouring switches.
40
41A CPU port has the following mandatory property:
42
43- ethernet		: Should be a phandle to a valid Ethernet device node.
44                          This host device is what the switch port is
45			  connected to.
46
47A user port has the following optional property:
48
49- label			: Describes the label associated with this port, which
50                          will become the netdev name.
51
52Port child nodes may also contain the following optional standardised
53properties, described in binding documents:
54
55- phy-handle		: Phandle to a PHY on an MDIO bus. See
56			  Documentation/devicetree/bindings/net/ethernet.txt
57			  for details.
58
59- phy-mode		: See
60			  Documentation/devicetree/bindings/net/ethernet.txt
61			  for details.
62
63- fixed-link		: Fixed-link subnode describing a link to a non-MDIO
64			  managed entity. See
65			  Documentation/devicetree/bindings/net/fixed-link.txt
66			  for details.
67
68The MAC address will be determined using the optional properties
69defined in ethernet.txt.
70
71Example
72
73The following example shows three switches on three MDIO busses,
74linked into one DSA cluster.
75
76&mdio1 {
77	#address-cells = <1>;
78	#size-cells = <0>;
79
80	switch0: switch0@0 {
81		compatible = "marvell,mv88e6085";
82		reg = <0>;
83
84		dsa,member = <0 0>;
85
86		ports {
87			#address-cells = <1>;
88			#size-cells = <0>;
89			port@0 {
90				reg = <0>;
91				label = "lan0";
92			};
93
94			port@1 {
95				reg = <1>;
96				label = "lan1";
97				local-mac-address = [00 00 00 00 00 00];
98			};
99
100			port@2 {
101				reg = <2>;
102				label = "lan2";
103			};
104
105			switch0port5: port@5 {
106				reg = <5>;
107				phy-mode = "rgmii-txid";
108				link = <&switch1port6
109					&switch2port9>;
110				fixed-link {
111					speed = <1000>;
112					full-duplex;
113				};
114			};
115
116			port@6 {
117				reg = <6>;
118				ethernet = <&fec1>;
119				fixed-link {
120					speed = <100>;
121					full-duplex;
122				};
123			};
124		};
125	};
126};
127
128&mdio2 {
129	#address-cells = <1>;
130	#size-cells = <0>;
131
132	switch1: switch1@0 {
133		compatible = "marvell,mv88e6085";
134		reg = <0>;
135
136		dsa,member = <0 1>;
137
138		ports {
139			#address-cells = <1>;
140			#size-cells = <0>;
141			port@0 {
142				reg = <0>;
143				label = "lan3";
144				phy-handle = <&switch1phy0>;
145			};
146
147			port@1 {
148				reg = <1>;
149				label = "lan4";
150				phy-handle = <&switch1phy1>;
151			};
152
153			port@2 {
154				reg = <2>;
155				label = "lan5";
156				phy-handle = <&switch1phy2>;
157			};
158
159			switch1port5: port@5 {
160				reg = <5>;
161				link = <&switch2port9>;
162				phy-mode = "rgmii-txid";
163				fixed-link {
164					speed = <1000>;
165					full-duplex;
166				};
167			};
168
169			switch1port6: port@6 {
170				reg = <6>;
171				phy-mode = "rgmii-txid";
172				link = <&switch0port5>;
173				fixed-link {
174					speed = <1000>;
175					full-duplex;
176				};
177			};
178		};
179		mdio-bus {
180			#address-cells = <1>;
181			#size-cells = <0>;
182			switch1phy0: switch1phy0@0 {
183				reg = <0>;
184			};
185			switch1phy1: switch1phy0@1 {
186				reg = <1>;
187			};
188			switch1phy2: switch1phy0@2 {
189				reg = <2>;
190			};
191		};
192	 };
193};
194
195&mdio4 {
196	#address-cells = <1>;
197	#size-cells = <0>;
198
199	switch2: switch2@0 {
200		compatible = "marvell,mv88e6085";
201		reg = <0>;
202
203		dsa,member = <0 2>;
204
205		ports {
206			#address-cells = <1>;
207			#size-cells = <0>;
208			port@0 {
209				reg = <0>;
210				label = "lan6";
211			};
212
213			port@1 {
214				reg = <1>;
215				label = "lan7";
216			};
217
218			port@2 {
219				reg = <2>;
220				label = "lan8";
221			};
222
223			port@3 {
224				reg = <3>;
225				label = "optical3";
226				fixed-link {
227					speed = <1000>;
228					full-duplex;
229					link-gpios = <&gpio6 2
230					      GPIO_ACTIVE_HIGH>;
231				};
232			};
233
234			port@4 {
235				reg = <4>;
236				label = "optical4";
237				fixed-link {
238					speed = <1000>;
239					full-duplex;
240					link-gpios = <&gpio6 3
241					      GPIO_ACTIVE_HIGH>;
242				};
243			};
244
245			switch2port9: port@9 {
246				reg = <9>;
247				phy-mode = "rgmii-txid";
248				link = <&switch1port5
249					&switch0port5>;
250				fixed-link {
251					speed = <1000>;
252					full-duplex;
253				};
254			};
255		};
256	};
257};
258