1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Ethernet Controller Generic Binding
8
9maintainers:
10  - David S. Miller <davem@davemloft.net>
11
12properties:
13  $nodename:
14    pattern: "^ethernet(@.*)?$"
15
16  label:
17    $ref: /schemas/types.yaml#/definitions/string
18    description: Human readable label on a port of a box.
19
20  local-mac-address:
21    description:
22      Specifies the MAC address that was assigned to the network device.
23    $ref: /schemas/types.yaml#/definitions/uint8-array
24    minItems: 6
25    maxItems: 6
26
27  mac-address:
28    description:
29      Specifies the MAC address that was last used by the boot
30      program; should be used in cases where the MAC address assigned
31      to the device by the boot program is different from the
32      local-mac-address property.
33    $ref: /schemas/types.yaml#/definitions/uint8-array
34    minItems: 6
35    maxItems: 6
36
37  max-frame-size:
38    $ref: /schemas/types.yaml#/definitions/uint32
39    description:
40      Maximum transfer unit (IEEE defined MTU), rather than the
41      maximum frame size (there\'s contradiction in the Devicetree
42      Specification).
43
44  max-speed:
45    $ref: /schemas/types.yaml#/definitions/uint32
46    description:
47      Specifies maximum speed in Mbit/s supported by the device.
48
49  nvmem-cells:
50    maxItems: 1
51    description:
52      Reference to an nvmem node for the MAC address
53
54  nvmem-cell-names:
55    const: mac-address
56
57  phy-connection-type:
58    description:
59      Specifies interface type between the Ethernet device and a physical
60      layer (PHY) device.
61    enum:
62      # There is not a standard bus between the MAC and the PHY,
63      # something proprietary is being used to embed the PHY in the
64      # MAC.
65      - internal
66      - mii
67      - gmii
68      - sgmii
69      - qsgmii
70      - qusgmii
71      - tbi
72      - rev-mii
73      - rmii
74      - rev-rmii
75      - moca
76
77      # RX and TX delays are added by the MAC when required
78      - rgmii
79
80      # RGMII with internal RX and TX delays provided by the PHY,
81      # the MAC should not add the RX or TX delays in this case
82      - rgmii-id
83
84      # RGMII with internal RX delay provided by the PHY, the MAC
85      # should not add an RX delay in this case
86      - rgmii-rxid
87
88      # RGMII with internal TX delay provided by the PHY, the MAC
89      # should not add an TX delay in this case
90      - rgmii-txid
91      - rtbi
92      - smii
93      - xgmii
94      - trgmii
95      - 1000base-x
96      - 2500base-x
97      - 5gbase-r
98      - rxaui
99      - xaui
100
101      # 10GBASE-KR, XFI, SFI
102      - 10gbase-kr
103      - usxgmii
104      - 10gbase-r
105      - 25gbase-r
106
107  phy-mode:
108    $ref: "#/properties/phy-connection-type"
109
110  pcs-handle:
111    $ref: /schemas/types.yaml#/definitions/phandle
112    description:
113      Specifies a reference to a node representing a PCS PHY device on a MDIO
114      bus to link with an external PHY (phy-handle) if exists.
115
116  phy-handle:
117    $ref: /schemas/types.yaml#/definitions/phandle
118    description:
119      Specifies a reference to a node representing a PHY device.
120
121  phy:
122    $ref: "#/properties/phy-handle"
123    deprecated: true
124
125  phy-device:
126    $ref: "#/properties/phy-handle"
127    deprecated: true
128
129  rx-fifo-depth:
130    $ref: /schemas/types.yaml#/definitions/uint32
131    description:
132      The size of the controller\'s receive fifo in bytes. This is used
133      for components that can have configurable receive fifo sizes,
134      and is useful for determining certain configuration settings
135      such as flow control thresholds.
136
137  sfp:
138    $ref: /schemas/types.yaml#/definitions/phandle
139    description:
140      Specifies a reference to a node representing a SFP cage.
141
142  tx-fifo-depth:
143    $ref: /schemas/types.yaml#/definitions/uint32
144    description:
145      The size of the controller\'s transmit fifo in bytes. This
146      is used for components that can have configurable fifo sizes.
147
148  managed:
149    description:
150      Specifies the PHY management type. If auto is set and fixed-link
151      is not specified, it uses MDIO for management.
152    $ref: /schemas/types.yaml#/definitions/string
153    default: auto
154    enum:
155      - auto
156      - in-band-status
157
158  fixed-link:
159    oneOf:
160      - $ref: /schemas/types.yaml#/definitions/uint32-array
161        deprecated: true
162        items:
163          - minimum: 0
164            maximum: 31
165            description:
166              Emulated PHY ID, choose any but unique to the all
167              specified fixed-links
168
169          - enum: [0, 1]
170            description:
171              Duplex configuration. 0 for half duplex or 1 for
172              full duplex
173
174          - enum: [10, 100, 1000, 2500, 10000]
175            description:
176              Link speed in Mbits/sec.
177
178          - enum: [0, 1]
179            description:
180              Pause configuration. 0 for no pause, 1 for pause
181
182          - enum: [0, 1]
183            description:
184              Asymmetric pause configuration. 0 for no asymmetric
185              pause, 1 for asymmetric pause
186      - type: object
187        additionalProperties: false
188        properties:
189          speed:
190            description:
191              Link speed.
192            $ref: /schemas/types.yaml#/definitions/uint32
193            enum: [10, 100, 1000, 2500, 10000]
194
195          full-duplex:
196            $ref: /schemas/types.yaml#/definitions/flag
197            description:
198              Indicates that full-duplex is used. When absent, half
199              duplex is assumed.
200
201          pause:
202            $ref: /schemas/types.yaml#definitions/flag
203            description:
204              Indicates that pause should be enabled.
205
206          asym-pause:
207            $ref: /schemas/types.yaml#/definitions/flag
208            description:
209              Indicates that asym_pause should be enabled.
210
211          link-gpios:
212            maxItems: 1
213            description:
214              GPIO to determine if the link is up
215
216        required:
217          - speed
218
219allOf:
220  - if:
221      properties:
222        phy-mode:
223          contains:
224            enum:
225              - rgmii
226              - rgmii-rxid
227              - rgmii-txid
228              - rgmii-id
229    then:
230      properties:
231        rx-internal-delay-ps:
232          description:
233            RGMII Receive Clock Delay defined in pico seconds.This is used for
234            controllers that have configurable RX internal delays. If this
235            property is present then the MAC applies the RX delay.
236        tx-internal-delay-ps:
237          description:
238            RGMII Transmit Clock Delay defined in pico seconds.This is used for
239            controllers that have configurable TX internal delays. If this
240            property is present then the MAC applies the TX delay.
241
242additionalProperties: true
243
244...
245