1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
3
4%YAML 1.2
5---
6$id: http://devicetree.org/schemas/net/wireless/mediatek,mt76.yaml#
7$schema: http://devicetree.org/meta-schemas/core.yaml#
8
9title: MediaTek mt76 wireless devices Generic Binding
10
11maintainers:
12  - Felix Fietkau <nbd@nbd.name>
13  - Lorenzo Bianconi <lorenzo@kernel.org>
14  - Ryder Lee <ryder.lee@mediatek.com>
15
16description: |
17  This node provides properties for configuring the MediaTek mt76xx
18  wireless device. The node is expected to be specified as a child
19  node of the PCI controller to which the wireless chip is connected.
20  Alternatively, it can specify the wireless part of the MT7628/MT7688
21  or MT7622/MT7986 SoC.
22
23allOf:
24  - $ref: ieee80211.yaml#
25
26properties:
27  compatible:
28    enum:
29      - mediatek,mt76
30      - mediatek,mt7628-wmac
31      - mediatek,mt7622-wmac
32      - mediatek,mt7986-wmac
33
34  reg:
35    minItems: 1
36    maxItems: 3
37    description:
38      MT7986 should contain 3 regions consys, dcm, and sku, in this order.
39
40  interrupts:
41    maxItems: 1
42
43  power-domains:
44    maxItems: 1
45
46  memory-region:
47    maxItems: 1
48
49  resets:
50    maxItems: 1
51    description:
52      Specify the consys reset for mt7986.
53
54  reset-names:
55    const: consys
56
57  mediatek,infracfg:
58    $ref: /schemas/types.yaml#/definitions/phandle
59    description:
60      Phandle to the infrastructure bus fabric syscon node.
61      This property is MT7622 specific
62
63  ieee80211-freq-limit: true
64
65  mediatek,eeprom-data:
66    $ref: /schemas/types.yaml#/definitions/uint32-array
67    description:
68      EEPROM data embedded as array.
69
70  mediatek,mtd-eeprom:
71    $ref: /schemas/types.yaml#/definitions/phandle-array
72    items:
73      - items:
74          - description: phandle to MTD partition
75          - description: offset containing EEPROM data
76    description:
77      Phandle to a MTD partition + offset containing EEPROM data
78
79  big-endian:
80    $ref: /schemas/types.yaml#/definitions/flag
81    description:
82      Specify if the radio eeprom partition is written in big-endian
83
84  mediatek,eeprom-merge-otp:
85    type: boolean
86    description:
87      Merge EEPROM data with OTP data. Can be used on boards where the flash
88      calibration data is generic and specific calibration data should be
89      pulled from the OTP ROM
90
91  mediatek,disable-radar-background:
92    type: boolean
93    description:
94      Disable/enable radar/CAC detection running on a dedicated offchannel
95      chain available on some hw.
96      Background radar/CAC detection allows to avoid the CAC downtime
97      switching on a different channel during CAC detection on the selected
98      radar channel.
99
100  led:
101    type: object
102    $ref: /schemas/leds/common.yaml#
103    additionalProperties: false
104    properties:
105      led-sources:
106        maxItems: 1
107
108  power-limits:
109    type: object
110    additionalProperties: false
111    patternProperties:
112      "^r[0-9]+":
113        type: object
114        additionalProperties: false
115        properties:
116          regdomain:
117            $ref: /schemas/types.yaml#/definitions/string
118            description:
119              Regdomain refers to a legal regulatory region. Different
120              countries define different levels of allowable transmitter
121              power, time that a channel can be occupied, and different
122              available channels
123            enum:
124              - FCC
125              - ETSI
126              - JP
127
128        patternProperties:
129          "^txpower-[256]g$":
130            type: object
131            additionalProperties: false
132            patternProperties:
133              "^b[0-9]+$":
134                type: object
135                additionalProperties: false
136                properties:
137                  channels:
138                    $ref: /schemas/types.yaml#/definitions/uint32-array
139                    minItems: 2
140                    maxItems: 2
141                    description:
142                      Pairs of first and last channel number of the selected
143                      band
144
145                  rates-cck:
146                    $ref: /schemas/types.yaml#/definitions/uint8-array
147                    minItems: 4
148                    maxItems: 4
149                    description:
150                      4 half-dBm per-rate power limit values
151
152                  rates-ofdm:
153                    $ref: /schemas/types.yaml#/definitions/uint8-array
154                    minItems: 8
155                    maxItems: 8
156                    description:
157                      8 half-dBm per-rate power limit values
158
159                  rates-mcs:
160                    $ref: /schemas/types.yaml#/definitions/uint8-matrix
161                    description:
162                      Sets of per-rate power limit values for 802.11n/802.11ac
163                      rates for multiple channel bandwidth settings.
164                      Each set starts with the number of channel bandwidth
165                      settings for which the rate set applies, followed by
166                      either 8 or 10 power limit values. The order of the
167                      channel bandwidth settings is 20, 40, 80 and 160 MHz.
168                    maxItems: 4
169                    items:
170                      minItems: 9
171                      maxItems: 11
172
173                  rates-ru:
174                    $ref: /schemas/types.yaml#/definitions/uint8-matrix
175                    description:
176                      Sets of per-rate power limit values for 802.11ax rates
177                      for multiple channel bandwidth or resource unit settings.
178                      Each set starts with the number of channel bandwidth or
179                      resource unit settings for which the rate set applies,
180                      followed by 12 power limit values. The order of the
181                      channel resource unit settings is RU26, RU52, RU106,
182                      RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160.
183                    items:
184                      minItems: 13
185                      maxItems: 13
186
187                  txs-delta:
188                    $ref: /schemas/types.yaml#/definitions/uint32-array
189                    description:
190                      Half-dBm power delta for different numbers of antennas
191
192required:
193  - compatible
194  - reg
195
196unevaluatedProperties: false
197
198examples:
199  - |
200    pcie0 {
201      #address-cells = <3>;
202      #size-cells = <2>;
203      wifi@0,0 {
204        compatible = "mediatek,mt76";
205        reg = <0x0000 0 0 0 0>;
206        ieee80211-freq-limit = <5000000 6000000>;
207        mediatek,mtd-eeprom = <&factory 0x8000>;
208        big-endian;
209
210        led {
211          led-sources = <2>;
212        };
213
214        power-limits {
215          r0 {
216            regdomain = "FCC";
217            txpower-5g {
218               b0 {
219                   channels = <36 48>;
220                   rates-ofdm = /bits/ 8 <23 23 23 23 23 23 23 23>;
221                   rates-mcs = /bits/ 8 <1 23 23 23 23 23 23 23 23 23 23>,
222                               /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22>;
223                   rates-ru = /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22 22 22>,
224                              /bits/ 8 <4 20 20 20 20 20 20 20 20 20 20 20 20>;
225               };
226               b1 {
227                   channels = <100 181>;
228                   rates-ofdm = /bits/ 8 <14 14 14 14 14 14 14 14>;
229                   rates-mcs = /bits/ 8  <4 14 14 14 14 14 14 14 14 14 14>;
230                   txs-delta = <12 9 6>;
231                   rates-ru = /bits/ 8  <7 14 14 14 14 14 14 14 14 14 14 14 14>;
232               };
233             };
234          };
235        };
236      };
237    };
238
239  - |
240    wifi@10300000 {
241      compatible = "mediatek,mt7628-wmac";
242      reg = <0x10300000 0x100000>;
243
244      interrupt-parent = <&cpuintc>;
245      interrupts = <6>;
246
247      mediatek,mtd-eeprom = <&factory 0x0>;
248    };
249
250  - |
251    #include <dt-bindings/interrupt-controller/arm-gic.h>
252    #include <dt-bindings/interrupt-controller/irq.h>
253    wifi@18000000 {
254      compatible = "mediatek,mt7622-wmac";
255      reg = <0x10300000 0x100000>;
256      interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_LOW>;
257
258      mediatek,infracfg = <&infracfg>;
259
260      power-domains = <&scpsys 3>;
261    };
262
263  - |
264    wifi@18000000 {
265        compatible = "mediatek,mt7986-wmac";
266        resets = <&watchdog 23>;
267        reset-names = "consys";
268        reg = <0x18000000 0x1000000>,
269              <0x10003000 0x1000>,
270              <0x11d10000 0x1000>;
271        interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
272        memory-region = <&wmcpu_emi>;
273    };
274