1* Pin-controller driver for the Marvell Berlin SoCs
2
3Pin control registers are part of both chip controller and system
4controller register sets. Pin controller nodes should be a sub-node of
5either the chip controller or system controller node. The pins
6controlled are organized in groups, so no actual pin information is
7needed.
8
9A pin-controller node should contain subnodes representing the pin group
10configurations, one per function. Each subnode has the group name and
11the muxing function used.
12
13Be aware the Marvell Berlin datasheets use the keyword 'mode' for what
14is called a 'function' in the pin-controller subsystem.
15
16Required properties:
17- compatible: should be one of:
18	"marvell,berlin2-soc-pinctrl",
19	"marvell,berlin2-system-pinctrl",
20	"marvell,berlin2cd-soc-pinctrl",
21	"marvell,berlin2cd-system-pinctrl",
22	"marvell,berlin2q-soc-pinctrl",
23	"marvell,berlin2q-system-pinctrl",
24	"marvell,berlin4ct-avio-pinctrl",
25	"marvell,berlin4ct-soc-pinctrl",
26	"marvell,berlin4ct-system-pinctrl",
27	"syna,as370-soc-pinctrl"
28
29Required subnode-properties:
30- groups: a list of strings describing the group names.
31- function: a string describing the function used to mux the groups.
32
33Example:
34
35sys_pinctrl: pin-controller {
36	compatible = "marvell,berlin2q-system-pinctrl";
37
38	uart0_pmux: uart0-pmux {
39		groups = "GSM12";
40		function = "uart0";
41	};
42};
43
44&uart0 {
45	pinctrl-0 = <&uart0_pmux>;
46	pinctrl-names = "default";
47};
48