1*d7ae8f8dSKalyan Kinthada* Marvell 98dx3236 pinctrl driver for mpp 2*d7ae8f8dSKalyan Kinthada 3*d7ae8f8dSKalyan KinthadaPlease refer to marvell,mvebu-pinctrl.txt in this directory for common binding 4*d7ae8f8dSKalyan Kinthadapart and usage 5*d7ae8f8dSKalyan Kinthada 6*d7ae8f8dSKalyan KinthadaRequired properties: 7*d7ae8f8dSKalyan Kinthada- compatible: "marvell,98dx3236-pinctrl" or "marvell,98dx4251-pinctrl" 8*d7ae8f8dSKalyan Kinthada- reg: register specifier of MPP registers 9*d7ae8f8dSKalyan Kinthada 10*d7ae8f8dSKalyan KinthadaThis driver supports all 98dx3236, 98dx3336 and 98dx4251 variants 11*d7ae8f8dSKalyan Kinthada 12*d7ae8f8dSKalyan Kinthadaname pins functions 13*d7ae8f8dSKalyan Kinthada================================================================================ 14*d7ae8f8dSKalyan Kinthadampp0 0 gpo, spi0(mosi), dev(ad8) 15*d7ae8f8dSKalyan Kinthadampp1 1 gpio, spi0(miso), dev(ad9) 16*d7ae8f8dSKalyan Kinthadampp2 2 gpo, spi0(sck), dev(ad10) 17*d7ae8f8dSKalyan Kinthadampp3 3 gpio, spi0(cs0), dev(ad11) 18*d7ae8f8dSKalyan Kinthadampp4 4 gpio, spi0(cs1), smi(mdc), dev(cs0) 19*d7ae8f8dSKalyan Kinthadampp5 5 gpio, pex(rsto), sd0(cmd), dev(bootcs) 20*d7ae8f8dSKalyan Kinthadampp6 6 gpo, sd0(clk), dev(a2) 21*d7ae8f8dSKalyan Kinthadampp7 7 gpio, sd0(d0), dev(ale0) 22*d7ae8f8dSKalyan Kinthadampp8 8 gpio, sd0(d1), dev(ale1) 23*d7ae8f8dSKalyan Kinthadampp9 9 gpio, sd0(d2), dev(ready0) 24*d7ae8f8dSKalyan Kinthadampp10 10 gpio, sd0(d3), dev(ad12) 25*d7ae8f8dSKalyan Kinthadampp11 11 gpio, uart1(rxd), uart0(cts), dev(ad13) 26*d7ae8f8dSKalyan Kinthadampp12 12 gpo, uart1(txd), uart0(rts), dev(ad14) 27*d7ae8f8dSKalyan Kinthadampp13 13 gpio, intr(out), dev(ad15) 28*d7ae8f8dSKalyan Kinthadampp14 14 gpio, i2c0(sck) 29*d7ae8f8dSKalyan Kinthadampp15 15 gpio, i2c0(sda) 30*d7ae8f8dSKalyan Kinthadampp16 16 gpo, dev(oe) 31*d7ae8f8dSKalyan Kinthadampp17 17 gpo, dev(clkout) 32*d7ae8f8dSKalyan Kinthadampp18 18 gpio, uart1(txd) 33*d7ae8f8dSKalyan Kinthadampp19 19 gpio, uart1(rxd), dev(rb) 34*d7ae8f8dSKalyan Kinthadampp20 20 gpo, dev(we0) 35*d7ae8f8dSKalyan Kinthadampp21 21 gpo, dev(ad0) 36*d7ae8f8dSKalyan Kinthadampp22 22 gpo, dev(ad1) 37*d7ae8f8dSKalyan Kinthadampp23 23 gpo, dev(ad2) 38*d7ae8f8dSKalyan Kinthadampp24 24 gpo, dev(ad3) 39*d7ae8f8dSKalyan Kinthadampp25 25 gpo, dev(ad4) 40*d7ae8f8dSKalyan Kinthadampp26 26 gpo, dev(ad5) 41*d7ae8f8dSKalyan Kinthadampp27 27 gpo, dev(ad6) 42*d7ae8f8dSKalyan Kinthadampp28 28 gpo, dev(ad7) 43*d7ae8f8dSKalyan Kinthadampp29 29 gpo, dev(a0) 44*d7ae8f8dSKalyan Kinthadampp30 30 gpo, dev(a1) 45*d7ae8f8dSKalyan Kinthadampp31 31 gpio, slv_smi(mdc), smi(mdc), dev(we1) 46*d7ae8f8dSKalyan Kinthadampp32 32 gpio, slv_smi(mdio), smi(mdio), dev(cs1) 47