1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/pinctrl/qcom,sm6350-tlmm.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Technologies, Inc. SM6350 TLMM block
8
9maintainers:
10  - Konrad Dybcio <konrad.dybcio@somainline.org>
11
12description:
13  Top Level Mode Multiplexer pin controller in Qualcomm SM6350 SoC.
14
15allOf:
16  - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
17
18properties:
19  compatible:
20    const: qcom,sm6350-tlmm
21
22  reg:
23    maxItems: 1
24
25  interrupts:
26    minItems: 9
27    maxItems: 9
28
29  interrupt-controller: true
30  "#interrupt-cells": true
31  gpio-controller: true
32
33  gpio-reserved-ranges:
34    minItems: 1
35    maxItems: 78
36
37  gpio-line-names:
38    maxItems: 156
39
40  "#gpio-cells": true
41  gpio-ranges: true
42  wakeup-parent: true
43
44required:
45  - compatible
46  - reg
47
48additionalProperties: false
49
50patternProperties:
51  "-state$":
52    oneOf:
53      - $ref: "#/$defs/qcom-sm6350-tlmm-state"
54      - patternProperties:
55          "-pins$":
56            $ref: "#/$defs/qcom-sm6350-tlmm-state"
57        additionalProperties: false
58
59$defs:
60  qcom-sm6350-tlmm-state:
61    type: object
62    description:
63      Pinctrl node's client devices use subnodes for desired pin configuration.
64      Client device subnodes use below standard properties.
65    $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
66
67    properties:
68      pins:
69        description:
70          List of gpio pins affected by the properties specified in this
71          subnode.
72        items:
73          oneOf:
74            - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$"
75            - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
76        minItems: 1
77        maxItems: 36
78
79      function:
80        description:
81          Specify the alternative function to be configured for the specified
82          pins.
83
84        enum: [ adsp_ext, agera_pll, atest_char, atest_char0, atest_char1, atest_char2,
85                atest_char3, atest_tsens, atest_tsens2, atest_usb1, atest_usb10, atest_usb11,
86                atest_usb12, atest_usb13, atest_usb2, atest_usb20, atest_usb21, atest_usb22,
87                atest_usb23, audio_ref, btfm_slimbus, cam_mclk0, cam_mclk1, cam_mclk2, cam_mclk3,
88                cam_mclk4, cci_async, cci_i2c, cci_timer0, cci_timer1, cci_timer2, cci_timer3,
89                cci_timer4, cri_trng, dbg_out, ddr_bist, ddr_pxi0, ddr_pxi1, ddr_pxi2, ddr_pxi3,
90                dp_hot, edp_lcd, gcc_gp1, gcc_gp2, gcc_gp3, gp_pdm0, gp_pdm1, gp_pdm2, gpio,
91                gps_tx, ibi_i3c, jitter_bist, ldo_en, ldo_update, lpass_ext, m_voc, mclk,
92                mdp_vsync, mdp_vsync0, mdp_vsync1, mdp_vsync2, mdp_vsync3, mi2s_0, mi2s_1, mi2s_2,
93                mss_lte, nav_gpio, nav_pps, pa_indicator, pcie0_clk, phase_flag0, phase_flag1,
94                phase_flag10, phase_flag11, phase_flag12, phase_flag13, phase_flag14, phase_flag15,
95                phase_flag16, phase_flag17, phase_flag18, phase_flag19, phase_flag2, phase_flag20,
96                phase_flag21, phase_flag22, phase_flag23, phase_flag24, phase_flag25, phase_flag26,
97                phase_flag27, phase_flag28, phase_flag29, phase_flag3, phase_flag30, phase_flag31,
98                phase_flag4, phase_flag5, phase_flag6, phase_flag7, phase_flag8, phase_flag9,
99                pll_bist, pll_bypassnl, pll_reset, prng_rosc, qdss_cti, qdss_gpio, qdss_gpio0,
100                qdss_gpio1, qdss_gpio10, qdss_gpio11, qdss_gpio12, qdss_gpio13, qdss_gpio14,
101                qdss_gpio15, qdss_gpio2, qdss_gpio3, qdss_gpio4, qdss_gpio5, qdss_gpio6,
102                qdss_gpio7, qdss_gpio8, qdss_gpio9, qlink0_enable, qlink0_request, qlink0_wmss,
103                qlink1_enable, qlink1_request, qlink1_wmss, qup00, qup01, qup02, qup10, qup11,
104                qup12, qup13_f1, qup13_f2, qup14, rffe0_clk, rffe0_data, rffe1_clk, rffe1_data,
105                rffe2_clk, rffe2_data, rffe3_clk, rffe3_data, rffe4_clk, rffe4_data, sd_write,
106                sdc1_tb, sdc2_tb, sp_cmu, tgu_ch0, tgu_ch1, tgu_ch2, tgu_ch3, tsense_pwm1,
107                tsense_pwm2, uim1_clk, uim1_data, uim1_present, uim1_reset, uim2_clk, uim2_data,
108                uim2_present, uim2_reset, usb_phy, vfr_1, vsense_trigger, wlan1_adc0, wlan1_adc1,
109                wlan2_adc0, wlan2_adc1, ]
110
111
112      bias-disable: true
113      bias-pull-down: true
114      bias-pull-up: true
115      drive-strength: true
116      input-enable: true
117      output-high: true
118      output-low: true
119
120    required:
121      - pins
122
123    additionalProperties: false
124
125examples:
126  - |
127    #include <dt-bindings/interrupt-controller/arm-gic.h>
128    pinctrl@f100000 {
129        compatible = "qcom,sm6350-tlmm";
130        reg = <0x0f100000 0x300000>;
131        interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
132                     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
133                     <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
134                     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
135                     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
136                     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
137                     <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
138                     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
139                     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
140
141        gpio-controller;
142        #gpio-cells = <2>;
143        interrupt-controller;
144        #interrupt-cells = <2>;
145        gpio-ranges = <&tlmm 0 0 157>;
146
147        gpio-wo-subnode-state {
148            pins = "gpio1";
149            function = "gpio";
150        };
151
152        uart-w-subnodes-state {
153            rx-pins {
154                pins = "gpio25";
155                function = "qup13_f2";
156                bias-disable;
157            };
158
159            tx-pins {
160                pins = "gpio26";
161                function = "qup13_f2";
162                bias-disable;
163            };
164        };
165    };
166...
167