1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
9
10maintainers:
11  - Richard Genoud <richard.genoud@gmail.com>
12
13properties:
14  compatible:
15    oneOf:
16      - enum:
17          - atmel,at91rm9200-usart
18          - atmel,at91sam9260-usart
19      - items:
20          - const: atmel,at91rm9200-dbgu
21          - const: atmel,at91rm9200-usart
22      - items:
23          - const: atmel,at91sam9260-dbgu
24          - const: atmel,at91sam9260-usart
25      - items:
26          - const: microchip,sam9x60-usart
27          - const: atmel,at91sam9260-usart
28      - items:
29          - const: microchip,sam9x60-dbgu
30          - const: microchip,sam9x60-usart
31          - const: atmel,at91sam9260-dbgu
32          - const: atmel,at91sam9260-usart
33
34  reg:
35    maxItems: 1
36
37  interrupts:
38    maxItems: 1
39
40  clock-names:
41    minItems: 1
42    items:
43      - const: usart
44      - const: gclk
45
46  clocks:
47    minItems: 1
48    items:
49      - description: USART Peripheral Clock
50      - description: USART Generic Clock
51
52  dmas:
53    items:
54      - description: TX DMA Channel
55      - description: RX DMA Channel
56
57  dma-names:
58    items:
59      - const: tx
60      - const: rx
61
62  atmel,usart-mode:
63    $ref: /schemas/types.yaml#/definitions/uint32
64    description:
65      Must be either <AT91_USART_MODE_SPI> for SPI or
66      <AT91_USART_MODE_SERIAL> for USART (found in dt-bindings/mfd/at91-usart.h).
67    enum: [ 0, 1 ]
68
69  atmel,use-dma-rx:
70    type: boolean
71    description: use of PDC or DMA for receiving data
72
73  atmel,use-dma-tx:
74    type: boolean
75    description: use of PDC or DMA for transmitting data
76
77  atmel,fifo-size:
78    $ref: /schemas/types.yaml#/definitions/uint32
79    description:
80      Maximum number of data the RX and TX FIFOs can store for FIFO
81      capable USARTS.
82    enum: [ 16, 32 ]
83
84required:
85  - compatible
86  - reg
87  - interrupts
88  - clock-names
89  - clocks
90  - atmel,usart-mode
91
92allOf:
93  - if:
94      properties:
95        atmel,usart-mode:
96          const: 1
97    then:
98      allOf:
99        - $ref: /schemas/spi/spi-controller.yaml#
100
101      properties:
102        atmel,use-dma-rx: false
103
104        atmel,use-dma-tx: false
105
106        atmel,fifo-size: false
107
108        "#size-cells":
109          const: 0
110
111        "#address-cells":
112          const: 1
113
114      required:
115        - "#size-cells"
116        - "#address-cells"
117
118    else:
119      allOf:
120        - $ref: /schemas/serial/serial.yaml#
121        - $ref: /schemas/serial/rs485.yaml#
122
123unevaluatedProperties: false
124
125examples:
126  - |
127    #include <dt-bindings/gpio/gpio.h>
128    #include <dt-bindings/interrupt-controller/irq.h>
129    #include <dt-bindings/mfd/at91-usart.h>
130    #include <dt-bindings/dma/at91.h>
131
132    /* use PDC */
133    usart0: serial@fff8c000 {
134        compatible = "atmel,at91sam9260-usart";
135        reg = <0xfff8c000 0x4000>;
136        atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
137        interrupts = <7>;
138        clocks = <&usart0_clk>;
139        clock-names = "usart";
140        atmel,use-dma-rx;
141        atmel,use-dma-tx;
142        rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
143        cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
144        dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>;
145        dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
146        dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>;
147        rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>;
148    };
149
150  - |
151    #include <dt-bindings/gpio/gpio.h>
152    #include <dt-bindings/interrupt-controller/irq.h>
153    #include <dt-bindings/mfd/at91-usart.h>
154    #include <dt-bindings/dma/at91.h>
155
156    /* use DMA */
157    usart1: serial@f001c000 {
158        compatible = "atmel,at91sam9260-usart";
159        reg = <0xf001c000 0x100>;
160        atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
161        interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
162        clocks = <&usart0_clk>;
163        clock-names = "usart";
164        atmel,use-dma-rx;
165        atmel,use-dma-tx;
166        dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
167               <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
168        dma-names = "tx", "rx";
169        atmel,fifo-size = <32>;
170    };
171
172  - |
173    #include <dt-bindings/gpio/gpio.h>
174    #include <dt-bindings/interrupt-controller/irq.h>
175    #include <dt-bindings/mfd/at91-usart.h>
176    #include <dt-bindings/dma/at91.h>
177
178    /* SPI mode */
179    spi0: spi@f001c000 {
180        compatible = "atmel,at91sam9260-usart";
181        reg = <0xf001c000 0x100>;
182        #address-cells = <1>;
183        #size-cells = <0>;
184        atmel,usart-mode = <AT91_USART_MODE_SPI>;
185        interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
186        clocks = <&usart0_clk>;
187        clock-names = "usart";
188        dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
189               <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
190        dma-names = "tx", "rx";
191        cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>;
192    };
193