1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/everest,es8326.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Everest ES8326 audio CODEC
8
9maintainers:
10  - David Yang <yangxiaohua@everest-semi.com>
11
12properties:
13  compatible:
14    const: everest,es8326
15
16  reg:
17    maxItems: 1
18
19  clocks:
20    items:
21      - description: clock for master clock (MCLK)
22
23  clock-names:
24    items:
25      - const: mclk
26
27  "#sound-dai-cells":
28    const: 0
29
30  everest,jack-pol:
31    $ref: /schemas/types.yaml#/definitions/uint8
32    description: |
33      just the value of reg 57. Bit(3) decides whether the jack polarity is inverted.
34      Bit(2) decides whether the button on the headset is inverted.
35      Bit(1)/(0) decides the mic properity to be OMTP/CTIA or auto.
36    minimum: 0x00
37    maximum: 0x0f
38    default: 0x0f
39
40  everest,mic1-src:
41    deprecated: true
42    $ref: /schemas/types.yaml#/definitions/uint8
43    description:
44      the value of reg 2A when headset plugged.
45    minimum: 0x00
46    maximum: 0x77
47    default: 0x22
48
49  everest,mic2-src:
50    deprecated: true
51    $ref: /schemas/types.yaml#/definitions/uint8
52    description:
53      the value of reg 2A when headset unplugged.
54    minimum: 0x00
55    maximum: 0x77
56    default: 0x44
57
58  everest,jack-detect-inverted:
59    $ref: /schemas/types.yaml#/definitions/flag
60    description:
61      Defined to invert the jack detection.
62
63  everest,interrupt-src:
64    $ref: /schemas/types.yaml#/definitions/uint8
65    description: |
66      value of reg 0x58, Defines the interrupt source.
67      Bit(2) 1 means button press triggers irq, 0 means not.
68      Bit(3) 1 means PIN9 is the irq source for jack detection. When set to 0,
69      bias change on PIN9 do not triggers irq.
70      Bit(4) 1 means PIN27 is the irq source for jack detection.
71      Bit(5) 1 means PIN9 is the irq source after MIC detect.
72      Bit(6) 1 means PIN27 is the irq source after MIC detect.
73    minimum: 0
74    maximum: 0x3c
75    default: 0x08
76
77  everest,interrupt-clk:
78    $ref: /schemas/types.yaml#/definitions/uint8
79    description: |
80     value of reg 0x59, Defines the interrupt output behavior.
81     Bit(0-3) 0 means irq pulse equals 512*internal clock
82       1 means irq pulse equals 1024*internal clock
83       2 means ...
84       7 means irq pulse equals 65536*internal clock
85       8 means irq mutes PA
86       9 means irq mutes PA and DAC output
87     Bit(4) 1 means we invert the interrupt output.
88     Bit(6) 1 means the chip do not detect jack type after button released.
89       0 means the chip detect jack type again after button released.
90    minimum: 0
91    maximum: 0x7f
92    default: 0x00
93
94required:
95  - compatible
96  - reg
97  - "#sound-dai-cells"
98
99additionalProperties: false
100
101examples:
102  - |
103    i2c {
104      #address-cells = <1>;
105      #size-cells = <0>;
106      es8326: codec@19 {
107        compatible = "everest,es8326";
108        reg = <0x19>;
109        clocks = <&clks 10>;
110        clock-names = "mclk";
111        #sound-dai-cells = <0>;
112        everest,jack-pol = [0e];
113        everest,interrupt-src = [08];
114        everest,interrupt-clk = [00];
115      };
116    };
117