1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/sound/fsl,rpmsg.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP Audio RPMSG CPU DAI Controller
8
9maintainers:
10  - Shengjiu Wang <shengjiu.wang@nxp.com>
11
12description: |
13  fsl_rpmsg is a virtual audio device. Mapping to real hardware devices
14  are SAI, MICFIL, DMA controlled by Cortex M core. What we see from
15  Linux side is a device which provides audio service by rpmsg channel.
16  We can create different sound cards which access different hardwares
17  such as SAI, MICFIL, .etc through building rpmsg channels between
18  Cortex-A and Cortex-M.
19
20allOf:
21  - $ref: sound-card-common.yaml#
22
23properties:
24  compatible:
25    enum:
26      - fsl,imx7ulp-rpmsg-audio
27      - fsl,imx8mn-rpmsg-audio
28      - fsl,imx8mm-rpmsg-audio
29      - fsl,imx8mp-rpmsg-audio
30      - fsl,imx8ulp-rpmsg-audio
31      - fsl,imx93-rpmsg-audio
32
33  clocks:
34    items:
35      - description: Peripheral clock for register access
36      - description: Master clock
37      - description: DMA clock for DMA register access
38      - description: Parent clock for multiple of 8kHz sample rates
39      - description: Parent clock for multiple of 11kHz sample rates
40
41  clock-names:
42    items:
43      - const: ipg
44      - const: mclk
45      - const: dma
46      - const: pll8k
47      - const: pll11k
48
49  power-domains:
50    description:
51      List of phandle and PM domain specifier as documented in
52      Documentation/devicetree/bindings/power/power_domain.txt
53    maxItems: 1
54
55  memory-region:
56    maxItems: 1
57    description:
58      phandle to a node describing reserved memory (System RAM memory)
59      The M core can't access all the DDR memory space on some platform,
60      So reserved a specific memory for dma buffer which M core can
61      access.
62      (see bindings/reserved-memory/reserved-memory.txt)
63
64  audio-codec:
65    $ref: /schemas/types.yaml#/definitions/phandle
66    description: The phandle to a node of audio codec
67
68  fsl,enable-lpa:
69    $ref: /schemas/types.yaml#/definitions/flag
70    description: enable low power audio path.
71
72  fsl,rpmsg-out:
73    $ref: /schemas/types.yaml#/definitions/flag
74    description: |
75      This is a boolean property. If present, the transmitting function
76      will be enabled.
77
78  fsl,rpmsg-in:
79    $ref: /schemas/types.yaml#/definitions/flag
80    description: |
81      This is a boolean property. If present, the receiving function
82      will be enabled.
83
84  fsl,rpmsg-channel-name:
85    $ref: /schemas/types.yaml#/definitions/string
86    description: |
87      A string property to assign rpmsg channel this sound card sits on.
88      This property can be omitted if there is only one sound card and it sits
89      on "rpmsg-audio-channel".
90    enum:
91      - rpmsg-audio-channel
92      - rpmsg-micfil-channel
93
94required:
95  - compatible
96
97unevaluatedProperties: false
98
99examples:
100  - |
101    #include <dt-bindings/clock/imx8mn-clock.h>
102
103    rpmsg_audio: rpmsg_audio {
104        compatible = "fsl,imx8mn-rpmsg-audio";
105        model = "wm8524-audio";
106        fsl,enable-lpa;
107        fsl,rpmsg-out;
108        clocks = <&clk IMX8MN_CLK_SAI3_IPG>,
109                 <&clk IMX8MN_CLK_SAI3_ROOT>,
110                 <&clk IMX8MN_CLK_SDMA3_ROOT>,
111                 <&clk IMX8MN_AUDIO_PLL1_OUT>,
112                 <&clk IMX8MN_AUDIO_PLL2_OUT>;
113        clock-names = "ipg", "mclk", "dma", "pll8k", "pll11k";
114    };
115
116  - |
117    #include <dt-bindings/clock/imx8mm-clock.h>
118
119    rpmsg_micfil: audio-controller {
120        compatible = "fsl,imx8mm-rpmsg-audio";
121        model = "micfil-audio";
122        fsl,rpmsg-channel-name = "rpmsg-micfil-channel";
123        fsl,enable-lpa;
124        fsl,rpmsg-in;
125        clocks = <&clk IMX8MM_CLK_PDM_IPG>,
126                 <&clk IMX8MM_CLK_PDM_ROOT>,
127                 <&clk IMX8MM_CLK_SDMA3_ROOT>,
128                 <&clk IMX8MM_AUDIO_PLL1_OUT>,
129                 <&clk IMX8MM_AUDIO_PLL2_OUT>;
130        clock-names = "ipg", "mclk", "dma", "pll8k", "pll11k";
131    };
132
133...
134